8.

Design and Testing of Ring Counter and Johnson Counter

AIM:
To design and setup four bit Johnson and Ring counter using JK flip-
flop.
COMPONENTS REQIRED:
IC 7476 (JK flip-flop)-
!igital trainer "it
#read board
Connecting $ires
%o$er suppl&
T!EOR":
Ring #ounter:
It is constructed using JK flip-flop b& connecting ' and '( outputs
fro) one flip-flop to the J and K inputs of the ne*t flip-flop. The outputs of
the final flip-flop are connected to the inputs of the first flip-flop. To start
the counter + first flip-flop is set using preset facilit& and the re)aining flip-
flops are reset using reset input .,hen cloc" signal arri-es+ this set
condition continues to shift around the ring. Ring counter using ! flip-flops
are )ade b& connecting the ' output of the last flip-flop to the ! input of
the first flip-flop. .s it can be seen fro) the truth table+ there are four
uni/ue output states for this counter+ rendering a )od-4 ring counter. Ring
counter is called a di-ide b& 0 counter+ $here 0 is the nu)ber of flip-flops.
Johnson #ounter:
The )odulo nu)ber of a ring counter can be doubled b& )a"ing a
s)all change in the ring counter circuit. The ' and '( outputs of the last
flip-flop are connected to K and J of the first flip-flop respecti-el&. This is
Johnson counter. Initiall&+ all the flip-flops are reset. .fter the first cloc"
pulse+ 11
2
is set and the re)aining flip-flops are reset. .fter fourth cloc"
pulse+ all 11(s are set. .fter fifth cloc" pulse 11
2
is reset and the re)aining
flip-flops are reset. There are 3 different output conditions creating a
)od-3 Johnson counter. Johnson counter is also called T$isted Ring
counter or di-ide b& 0 counter.
PROCEDRE:
4. 5et up the ring counter and set an& ' output using preset and appl&
)onopulse using debouncer s$itch in the trainer "it to the cloc" input.
. 0ote do$n the states of the ring counter outputs on the truth table for
successi-e cloc"s.
6. Repeat the steps 4 and for the Johnson counter.

Jo
Ko
J4
K4
J
K
'o
'o7
'4
'47
'
'7
clr
pre
cl"
'o '4 '
48 IC 7476 48 IC 7476 48 IC 7476
RING COUNTER
Circuit Diagram :

TRT! TA$%E:
Cloc"
'o
'4
'
Wave Form for Ring Counter:
C%& Q
'
Q
(
Q
)
2 2

2 2
4 4 2 2
2 4 2
6 2 2 4

Jo
Ko
J4
K4
J
K
'o
'o7
'4
'47
'
'7
clr
pre
cl"
'o '4 '
48 IC 7476 48 IC 7476 48 IC 7476
JOHNSON COUNTER
Circuit diagram :

Cloc"
'o
'4
'
'4
Timing diagram for Jon!on counter :

TRT! TA$%E:
C%& Q
'
Q
(
Q
)
4 4

2 2
4 4 2
6 4 4 4
4 2 4 4
9 2

2 4
6 2 2 2

4

6
4
9
6
7
3 :
42
44
4
46
49
46
44
4 Cl"
Cl"
4 %R;7
%R;7
4 C<R7
C<R7
=cc
>0! 4 J
J
4 K
K
4 '
4 '7
'
'7
IC 7476
"IN OUT OF IC #$#%

RES%T:
Thus a Johnson counter and a ring counter are designed and tested using
JK flip flops.