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Lecture 1

EE 6346 - Course details
Deleep R. Nair
CSD 318
Xtn: 4471
EE 6346
Advanced CMOS Devices and
3 credits
E slot
Tuesday 11am
Wednesday 10am
Thursday 10am
Classroom ESB 207B
TA Sarath G.
Course objective
To teach the basics of how modern CMOS devices
are designed for better power-performance compared
to previous generation when simple geometric
shrinking no longer works.

Since technology has reached a stage where
assumptions that allowed a total decoupling of circuit
design from process development are no longer
valid, I hope this course would be equally useful for
those who plan to have a career in IC design,
compact modeling or technology development
[EC 3101 (Solid State Devices) or
EE 5210 (Semiconductor Device
Modeling)] and Consent of Teacher
Knowledge in basic Quantum
mechanics and VLSI technology quite
Student background check
Solid State devices
Semiconductor device modeling
MOS device modeling
VLSI technology
Quantum mechanics/solid state
Course content
History of Si technology Review of CMOS scaling. Problems with
traditional geometric scaling Power crisis. Basic quantum mechanics
Mobility enhancement techniques. Review of stress and strain, how it
affects band structure of silicon. Types and realization of stress
elements. Problems with stress elements
Gate oxide scaling trend. Urgency to switch gate dielectric material.
High K material selection. Fermi level pinning Process integration of
high K gate dielectrics and metal gates
Multi-gate transistors. Ways of realization. Fabrication issues and
integration challenges
Ultra shallow junction. Dopant activation methods. Reduction of
parasitic RC
Analog and digital benchmarking of models. Layout dependent effects.
Test structures used for characterization.
Variations and how it can affect scaling.
Basics of sub wavelength lithography. Design for manufacturability
Reference Books (No single textbook)
1. Hei Wong , Nano-CMOS Gate Dielectric Engineering, CRC,
2. J.-P. Colinge, FinFETs and Other Multi-Gate Transistors,
Springer, 2010.
3. S. Deleonibus, Electronic Device Architectures for the Nano-
CMOS Era, Pan Stanford 2009
4. B. Wong, A. Mittal, Y. Cao, G. Starr, Nano-CMOS Circuit and
Physical Design, Wiley Inter-science 2004
5. B. Wong, F. Zach, V. Moroz, A. Mittal, G. Starr, A. Kahng,
Nano-CMOS Design for Manufacturability, Wiley 2009
6. A. Dimoulas, E. Gusev, P. McIntyre, M. Heyns, "Advanced
Gate Stacks for High-Mobility Semiconductors ", Springer 2007
7. Chris Mack, Fundamental Principles of Optical Lithography:
The Science of Microfabrication, Wiley Interscience 2008

8. Review papers provided by me

Evaluation pattern
Mid sem (30%)
One seminar/report (15+15%)
End sem (40%)

First assignment
Define and distinguish in less than 3 pages
(and 3 page ppt in concise form) what do you

Science, Technology and purpose of education

Return by 13 Aug 2014 (pdf). No weightage will be
carried for final grade.
Plagiarism/copying from peers strictly prohibited