7/10/2014 74LS47 IC | 74LS47 Datasheet | Pin Diagram & Description - EngineersGarage

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DataSheet:
Power Architect 7447.pdf

System Power 74LS47 is a BCD to 7-segment decoder/driver IC. It accepts a binary coded
Architect decimal as input and converts it into a pattern to drive a seven-segment for
displaying digits 0 to 9. Binary coded decimal (BCD) is an encoding in which
Processor Power each digit of a number is represented by its own binary sequence (usually of
Architect four bits).

FPGA Power For example 239 in BCD is represented as 0010 0011 1001.
Architect
74LS47 IC accepts four lines of BCD (8421) input data and generates their
LED Architect complements internally. The data is decoded with seven AND/OR gates to
drive indicator LEDs of the seven segment directly. The outputs correspond to
Common anode (CA) configuration of seven segment.
PMU Power
Architect Pin Diagram:

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Pin No Function Name

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7/10/2014 74LS47 IC | 74LS47 Datasheet | Pin Diagram & Description - EngineersGarage

1 BCD Input 2 A1
2 BCD Input 3 A2
3 Display test; Active low LT
4 Ripple blanking output; Active low RBO
5 Ripple blanking input; Active low RBI
6 BCD Input 4 A3
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