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80196 Microcontroller
80196 architecture
80196architecture
Featuresof8096/80196
Microcontroller
16BITmicrocontroller.Itperforms16bitprocessing.
PrincetonArchitecture.
ContinuousaddressspaceforSFRs,Registers,InternalRAM&
ROMandexternalmemory.
Registerbasedarithmeticandlogicoperations.
R i
b d ih
i
dl i
i
16BITstackpointer.
BIU&MUXunit.
4byteinstructionqueue.
5portsP0,P1,P2,P3&P4.
Timers,serialports,ADC&PWM.
Interruptcontrolcircuitandwatchdogtimer.
microcontrollers and applications
16KBROM/EPROMstartingfromaddress2000H.
Featuresof8096/80196
Microcontroller
Timersare16bitwiththefacilityofinputcaptureandout
compare.
Theportsaremultiplexed.
Th
t
lti l d
P0ismultiplexedwithanaloginputs.
P1ismultiplexedwithPWM&PTSsignals.
P1 i
l i l d i h PWM & PTS i l
P2ismultiplexedwithserialportandtimersignals.
P3&P4havealternatefunctionsinexpandedmodeof
h
l
f
d d
d f
operation.
P3hasAD00AD07.
P3 h AD00 AD07
P4hasAD00AD15.
1ST24bytesofmemoryisforSFRs.Thereare4horizontal
1ST 24 b t
f
i f SFR Th
4h i t l
windows.
Microcontrollers and Applications
Featuresof8096/80196
Microcontroller
Eachwindowisof24byteseachandaddressof24
byteswillbethesameforall4windows.
Sowecansaywindow0,window1,window2,
window3.
Page0addressesisfrom00toFFH.
First512bytesbetween0000to01FFHaredivided
First 512 bytes between 0000 to 01FFH are divided
intoverticalwindows.
Thesewindowsare16of32byteseach,8of64bytes
These windows are 16 of 32 bytes each 8 of 64 bytes
eachor4of128byteseach.
microcontrollers and applications
OperationalFeatures
Itdoes16bitsoperationson1instruction
y
cycle.
Itdoesnothaveseparatedataandcode
memory.
memory
Datamemorycontainsvariable.
Codememorycontainscode.
Bothoperandscanberegisters.
B th
d
b
it
PWMcanbeusedasDAC.
microcontrollers and applications
Operational Features
OperationalFeatures
Facilitywhichwillcontinuouslycheckwhether
p p y
g
(
g
CPUisproperlyworkingornot(Watchdog
timer).
PTS(PeripheralTransactionServer)
PTS (Peripheral Transaction Server)
SFRS of 80196
SFRSof80196
SpecialfunctionRegistersareavailablefrom
address0000H0017Hi.e.24addresses.Out
ofthese24.
addresses,9addressesarecommonto
addresses 9 addresses are common to
horizontalwindow0(read),horizontal
window0(write),horizontal.
(
) h
l
window1(Read)andhorizontalwindow15.
window 1(Read ) and horizontal window 15.
SFRsof80196:
Registerscommontoallwindows
Directaddress
i
dd
S
SFRs
00000001H
R0
0008H
Int_mask
0009H
INT_pending
0012H
INT_pend1
0013H
INT
INT_mask1
k1
0014H
WSR
SFRs of 80196
SFRsof80196
RegistersofHorizontalwindow0(read)andwindow0(write)
Directaddress
SFRs
0002
0002
0003
0003
00040005
00040005
0006
0006
0007
000A
000B
AD_command(write)
AD
ommand( rite)
AD_Result_L0(read)
HSI_mode (write)
AD result high(read)
AD_result_high(read)
HS0_Time(Write)
HS0_Time(read)
HS0 Command (write)
HS0_Command(write)
HS0_status(read)
SBUF
Watchdog (Write)
Watchdog(Write)
I0C2(Write)
SFRs of 80196
SFRsof80196
Directaddress
i
dd
S
SFRs
000A000B
000C000D
000E
000E
000F
0010
0011
0011
0015
0015
0016
0016
0017
Timer1(Read)
Timer2(read)
Baudrate(write)
P0(read)
P1(read/write)
P2(read/write)
SP_Control (write)
SP_stat (read)
10C0( i )
10C0(write)
10S0(read)
10C1(write)
10S1 (read)
10S1(read)
10S2(Read/write)
SFRs of 80196
SFRsof80196
Horizontalwindow1(read/write)
Directaddress
SFRs
0003
0004
0005
0006
0007
000C
0016
0017
AD_Time
PTSSEL_L0
PTSSEL_H0
PTSSRV_L0
PTSSRV_H0
10C3
PWM2control
PWM1control
SFRs of 80196
SFRsof80196
SFRsathorizontalwindow15
Directaddress
SFRs
000C
T2Capture_L0
0016
T2Capture_L0
D6
D5
D4
D3
SELECTIONOFWINDOW
D2
D1
D0
WINDOWNUMBER
4HSIs
4HSI
ItisrarelyusedforHSOoperation.
Theinputcaptureisahighspeedsignal.
Th i
t
t
i hi h
d i l
Itsinputsignalisconnectedtomicro
p
g
controller.
Itcancaptureveryfasteventsalso.
It can capture very fast events also
microcontrollers and applications
UsedmainlyforHSOs
Used
mainly for HSOs
6HSOs
C
ComparesentriesinCAM
t i i CAM
Eachentryis23bits
16 bit f
16bitsforcomparisondata
i
d t
7bitsforcommand
TheCAMmemorymeanscontentaddressable
memory.
microcontrollers and applications
INTERRUPTS
18groupsofinterrupts.
3 NMI groups.
3NMIgroups.
15generalinterruptgroups.
Priorityschemeisimplemented.
Masking facility is provided 2 levels of
Maskingfacilityisprovided.2levelsof
maskingisavailable.Thehigherlevelisbybit
9 f PSW d
9ofPSWandsecondarylevelisbyindividual
d
l l i b i di id l
bitsofINTmaskandINTmask1registers.
microcontrollers and applications
INTERRUPTS
Eachinterrupthasaspecificvector.Thevector
areaisfrom2000H 2014H&2030H203FH.
PriorityofinterruptisfixedasINT0being
higher priority and INT17 being lowest
higherpriorityandINT17beinglowest
priority.
Eachinterruptisindicatedbyaflag.For
example FIFOfullflag.
example
FIFO full flag.
Interrupt groups
Interruptgroups
Prioritywisegroups
Sources
Group0
Group1
Group 2
Group2
Group3
Group4
Group 5
Group5
Group6
Group7
Group8
p
Group9
Group10
Group11
Group12
Group13
Group14
Group15
Group16
Group17
Interruptat NMIpin
Interruptat HISunit
External INT1 P0 7 pin interrupt
ExternalINT1P0.7pininterrupt
Timer2overflow
Timer2,T2capture
HSI,FIFO HALF FULL
HSI,FIFOHALFFULL
SerialPort,RIflag
SerialPort,TIflag
Illegalcode
g
Instructiontrap
ExternalHW,EXINT
SerialPort,TIorRI
HSO
HSI
HSO.0HSO.5
HSIcapturedatareadyandFIFOfull
ADC
T1orT2overflow
ADDRESSING MODES
ADDRESSINGMODES
Implicit address mode
Implicitaddressmode
PUSHF
SETC
Immediateaddressingmode
LDAX,#55AH
ADD AX NUM #1234H
ADDAX,NUM,#1234H
Directaddressingmode
g
LDAL,P0
ADD BX NUM1 NUM2
ADDBX,NUM1,NUM2
microcontrollers and applications
ADDRESSING MODES
ADDRESSINGMODES
Indirectaddressingmode
Without port increment
Withoutportincrement
LDAX,[SI]
Withpostincrement
LDAX,[SI]+
[ ]
IndexLong
LDAX,[SI+offset]
LD AX [SI ff t]
Indexshort
LDAX,DISP[SI]
INSTRUCTIONS OF 80196
INSTRUCTIONSOF80196
Maximumnumberofoperandscanbeupto3.
Thememorylocationsaretreatedasregisters.
The memory locations are treated as registers.
Eachmemorylocationusedshouldbegivena
name.
Datatransferinstructions
LD
ST
PUSH
POP
microcontrollers and applications
INSTRUCTIONS OF 80196
INSTRUCTIONSOF80196
ArithmeticInstructions
ADD
ADC
SUB
SUBB
MULTIPLY
MULTIPLYSIGNNUMBERS
DIVIDE
DIVIDESIGNNUMBERS
DIVIDE SIGN NUMBERS
microcontrollers and applications
INSTRUCTIONS OF 80196
INSTRUCTIONSOF80196
DATAManipulationinstructions
CLR
EXT
NOT
BITManipulationinstructions
SETC
CLRC
EIDI
microcontrollers and applications
INSTRUCTIONS OF 80196
INSTRUCTIONSOF80196
Logicalinstructions
AND
OR
XOR
Programcontrolflowinstructions
CALL
SCALL
LCALL
JMP
SJMP
LJMP
Conditionaljumpbasedonflags
microcontrollers and applications
INSTRUCTIONS OF 80196
INSTRUCTIONSOF80196
Miscellaneousinstructions
RST
TRAP