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Dave Green
Project Manager, Automotive Services
Team
QNX Software Systems
Course Overview
Day 1
Introduction
Terminology
How we got here A Brief History of QNX running without BIOS
BIOS vs. IPL
when booting
at runtime
Terminology
Silverthorne = Atom = Z500,Z510, etc.
Poulsbo = US15W = System Controller Hub (SCH)
Menlow = a combination of Silverthorne/Poulsbo (or Atom/US15W)
Atom CPU with Intel ICH7/ICH8/ICH9 is NOT Menlow!
Southbridge
PCI devices (USB controller, PATA/SATA, kbd/mouse/interrupt
controller, legacy devices)
History
QNX was originally x86 only (QNX 2, QNX 4)
BIOS was the only way to boot
Intel very protective of information
only BIOS vendors had access
History (cont.)
QNX created a non-BIOS Initial Program Loader (IPL) for each of
these new SoCs
part of the original QNX4 EKit
required some additional work to remove BIOS dependencies from
device drivers
no VGA console output, so we use serial port instead
Photon graphics drivers no BIOS to change graphics mode, so direct
mode switchers were required
QNX Neutrino
New Challenges
maintaining code base for five different architectures would be a
nightmare
required proper planning
common code base for all platforms, except for well-defined exceptions
kernel
portions of startup library code
board specific code (normally contained in startup and IPL)
New Opportunities
no BIOS on any of these new platforms
IPL code is alternative to ROM Monitor / boot loader
unlike x86, all the necessary information is out there
Startup Code
QNX startup code consists of:
preboot
allows different image formats
ELF, S-record, binary, raw
on x86, any BIOS calls are limited to this portion
extra x86 stuff
probe for memory, hard drive, etc.
gate A20 control
switch from real mode to protected mode
for use with BIOS only; with a non-BIOS boot, stuff that is normally done
in preboot is done elsewhere, or else isnt necessary
for example, no need to know about hard drives; devb-eide will work fine
with no BIOS info
board directories
contain board-specific code which cant be abstracted to the library
for BIOS based x86 systems, startup-bios is the norm
dont let the name fool you it works fine with a non-BIOS x86 system!
although youll likely still need a custom startup at some point
10
Interrupts
interrupts are disabled during IPL execution
startup code sets up the interrupt controller, defines callouts
kernel uses callouts to identify, mask, and unmask system interrupts
11
Interrupts (cont.)
BIOS makes interrupt assignments, sets up routing of PCI ints
if theres no BIOS, we need to do it ourselves
BIOS often makes inefficient assignments
under-utilizes available routing options
many peripherals routed to the same interrupt
this leads to poor performance
many ISRs need to run, when only one actually needs to do anything
12
Interrupts (cont.)
not many physical interrupts available on x86
modern systems offer additional features to compensate
each PCI device can be assigned to one of 4 pins (INTA# - INTD#)
PCI INTA# - INTD# can be routed to any of 8 programmable IRQ lines
PIRQa PIRQh
each PIRQ can be routed to a different input on the dual 8259 system
additional logic to configure individual ISA interrupts as level triggered
these registers override the setup of the master/slave 8259s, where the
whole controller had to be either level or edge
13
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IPL
Whats needed to do a new IPL?
an existing IPL helps a lot
very few changes from one board to the next
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