Vous êtes sur la page 1sur 104

EE 3446

Circuits II
Lab Manual
Howard T. Russell, Jr., PhD
V 1.1 2010 OPALtx

Electrical Engineering Department

University of Texas at Arlington

EE 3446
Circuits II
Lab Manual
V 1.1 2010 OPALtx
Table of Contents
Lab Meeting No. 1

Introduction to EE Labs

Lab Experiment No. 1

Time-Domain Characteristics of Linear Networks

Lab Experiment No. 2

Mesh and Nodal Matrix Equations of Linear Resistive Networks .39

Lab Experiment No. 3

FM Transmitter Design Phase 1 & 2 ....57

Lab Experiment No. 4

Network Theorems Part 1 .60

Lab Experiment No. 5

Network Theorems Part 2 .....70

Lab Experiment No. 6

Amplifier Networks .....79

Lab Experiment No. 7

Op-Amp Test and Measurement ..81

Appendix 1

Breadboard Layout Examples

Appendix 2

Lab Measurement Example ...91

Appendix 3

Bills of Material

........................30

...87

....97

- 1 -

..2

Lab Meeting No. 1

Introduction to EE Labs

I.
Introduction
The objective of this first lab meeting is to introduce EE students to a professional laboratory environment where electronic circuits are built and electrical engineering experiments performed. The following topics will be addressed in this
introductory meeting
an orientation regarding proper behavior and safety while in the lab,
tools and tool box requirements,
lab instruments,
cables, connectors, probes, and wires,
electronic components, parts, and the parts request form,
lab report format, and
useful web sites.
II. Lab Orientation
All EE 3446 students are required to attend an orientation regarding proper behavior and safety while in the lab. This
orientation is presented by the resident lab technicians who are responsible for the maintenance and up-keep of the EE
labs in Nedderman Hall.
III. Tools and Tool Box (Attachment A)
Basic items such as pliers, cutters, and wire strippers are integral components in any electrical engineers tool box.
These tools are necessary to build circuits and perform experiments in the EE lab. Therefore, it is a mandatory
requirement that all EE 3446 students obtain and maintain a tool box containing a set of electrical engineering specific tools. The tool box requirement is not an option and all students must bring their tool box fully loaded to every
lab meeting beginning with the second meeting. Students without a tool box on the second and subsequent lab
meetings will not be allowed in the lab and will receive a zero for the lab. A list of these tools along with their photographs is included in Attachment A at the end of this document.
IV. Lab Instruments (Attachment B)
The electrical engineering labs located in rooms NH129, NH129A, NH148, and NH148A are equipped with the
most current industry standard test and measurement equipment found in professional electrical engineering companies. Each lab is divided into a series of lab benches with each bench containing the following instruments
Agilent 34401A 6 digit multimeter (DMM),
Agilent E3620A dual dc power supply (25V, 1A),
Agilent 54621A 60MHz dual channel oscilloscope, and
Agilent 33120A 15MHz function generator.
Most of the experiments performed in EE 3446 will involve the above mentioned instruments to some degree. Data
sheets for these instruments are included in Attachment B.
V. Cables, Connectors, Probes, and Wires
Each lab is equipped with one or more wall-mounted racks containing a variety of cables, connectors, oscilloscope
probes, and wires. These connectors provide the necessary electrical connections among the bench instruments and
your circuits.
VI. Electronic Components, Parts, and the Parts Request Form (Attachment C)
A wide assortment of electronic components and parts are available in the EE lab. An extensive list of components
and parts can be found on the lab web site www-ee.uta.edu/eelabs2/. Click on parts available for a view of the list.
The experiments performed in EE 3446 labs involve the use of parts supplied by the lab GTA. In more advanced
courses, students will have to order their own parts through the lab by submitting an online parts request form. A
copy of this form is shown in Attachment C. Most of the parts listed on the lab web site are considered disposable.
This means that once parts are given to the student, the student is allowed to keep and accumulate them. For parts
not on the list, a formal written request for these parts may be submitted along with instructor approval to lab personnel.
VII. Lab Report Format (Attachment D)
Formal lab reports are due typically within one week after each lab experiment. Exceptions are made for more
complex and/or extensive lab experiments. The format for lab reports is outlined below.
- 2 -

Title Page. Every lab report begins with a title page. This page includes the course and section number, experiment number, experiment title, date the experiment was performed, date the report submitted, and student name
and ID number. A sample of the EE 3446 lab report cover page is included in Attachment D.
Introduction. A brief description of the purpose of the lab and a discussion of key information the reader will
need to understand the experiment. Give a brief description of the theory the experiment is based upon.
Procedure. Describe how the experiment was performed. List equipment, instruments, and components used
in the experiment. Include the theory, equations, and detailed schematics of circuits involved.
Results. Present the results of the experiment with data collected from measurements performed. Data should
be professionally and neatly presented in the form of tables, graphs, and plots.
Discussions. Discuss any new ideas and/or questions produced in the experimental process. Comment on the
validity, accuracy, and usefulness of the procedure.
Conclusion. A description of what the experiment revealed. Generate a comparison between the expected results based on theory and the actual results. An attempt should be made here to explain any discrepancies between
these results.
Appendix. The appendix should contain actual compiled data, notes and comments, equations, sketches, and
schematics made during the experiment.
References. List any material contributed from other sources.
VIII. Useful Web Sites
Mouser Electronics
Jameco Electronics
Marlin P. Jones & Associates, Inc.
Electronics Express/RSR
Nuts and Volts (magazine)

www.mouser.com
www.jameco.com
www.mpja.com
www.elexp.com
www.nutsvolts.com

- 3 -

Attachment A
Tools and the Tool Box
August 2, 2009
Component

Example Brand

Example Source

Suitable container (all-purpose plastic


tool box; fishing tackle box)

Keter (13 all-purpose


box)

Wal-Mart

3.64

Needle nose pliers (4 to 5) (Figure 1)

Stanley (mini plier set)

Wal-Mart

12.88
(set of 6)

Diagonal cutters (4 to 5) (Figure 2)

Stanley (mini plier set)

Wal-Mart

Wire strippers (5) (Figure 3)


Prototype breadboard (6.5 x 2 to 6.5 x
4 with 3 to 5 binding posts) (Figures 4
and 5)
Precision screwdriver set (6 to 11 piece
set with slotted and Phillips screwdrivers)
(Figure 6)
22 gauge solid hook-up wire (Figure 7)

H-Tools (cutter and


stripper, 34-899C)
Elenco (Model 9425,
6.5 x 2, 830 test
points)

Frys

3.49

Frys

9.99

Stanley (6 piece; 4 slotted, 2 Phillips)

Wal-Mart

4.88

Frys product number:


PLU#1615281

Frys

2.99
Tax:
Total:

Photos

Figure 1
5 needle-nose pliers

- 4 -

Price ($)

3.09
40.96

Figure 2
5 diagonal cutters

Figure 3
Wire strippers

- 5 -

Figure 4
Three binding post breadboard

Figure 5
Three binding post breadboard

- 6 -

Figure 6
Screwdriver set

Figure 7
22 gauge wire

- 7 -

Attachment B

- 8 -

- 9 -

- 10 -

- 11 -

- 12 -

- 13 -

- 14 -

- 15 -

- 16 -

- 17 -

- 18 -

- 19 -

- 20 -

- 21 -

- 22 -

- 23 -

- 24 -

- 25 -

- 26 -

- 27 -

Attachment C

- 28 -

Attachment D

EE 3446.002
Lab Experiment 2
Resistors and Resistor Color Bands

Date experiment performed:

June 7, 2010

Date Lab Report submitted:

June 14, 2010

Student name:

Howard T. Russell, Jr.

Student ID:

1000xxxxxxxxx

- 29 -

Lab Experiment No. 1

Time-Domain Characteristics of Linear Networks

I. Introduction
The purpose of this lab is to investigate the behavior and characteristics of linear networks in the time-domain. The networks used here are simple first-order RL and RC networks and a bit more complex second-order RLC network. In order to initiate this investigation, it is necessary to perform a thorough analytical study of the network in question from the
derivation of a differential equation that describes its behavior in the time-domain. The solution of this equation and
subsequent plots of network variables versus time give valuable insight into how the network performs over time. Next,
the results of the analytical study are validated from a computer-aided simulation of the network using circuit simulators
such as PSPICE. Time-domain plots generated from simulations are compared to those obtained from the analytical
study to not only validate the accuracy and correctness of analytical methods but to also strengthen the confidence of
employing these methods. Finally, the network is built or constructed in the lab on a breadboard and evaluated with
professional grade instruments and equipment. The results of lab measurements are then compared to those from analytical study and simulation to complete the study. Your job in this lab exercise is to analyze and simulate in the pre-lab
assignment and then build, test, and evaluate in the lab each of the given RLC networks to expand your hands-on experience in working with networks in the time-domain. For each network, make use of the parts supplied by the GTA and
the test equipment located on the lab bench.
II. Components and Instruments
The components and instruments required for this lab are listed below.
Components:
Resistors
Capacitors
Inductors
100
10nF
680H
820
1K
Instruments:
Function generator
Agilent 33120A 15MHz

Oscilloscope
Agilent 54621A 60MHz dual-channel

Additional:
Breadboard
Tool box
Hook-up wire
Oscilloscope probes
III. Pre-lab Assignment
The schematics for three RLC networks N1, N2, and N3 are shown in Figures 1 through 3. Prior to constructing these
networks in the lab, you are to analyze and simulate these networks for the pre-lab assignment. Data from the results of
this work will be used to partially fill out Tables 1 through 5. You must bring the results of your pre-lab assignment to
the lab to assist you in the measurement process.

- 30 -

A. RL network N1 (Figure 1, Tables 1 and 2)

L1 680H

iL(t)
A

B
vL(t)

Eg(t)
vin(t)

R2
1K

vR(t)

N1
Figure 1
RL network N1
1.

Analysis
a. derive the network ODE with the resistor voltage vR(t) as the dependent variable, time t as the independent
variable, and Eg(t) as the network excitation,
b. set the initial inductor current to zero (iL(0) = 0), set Eg(t) equal to a step function with an amplitude of
10V; that is,

Eg ( t ) = 10V u ( t )

c.

and solve the ODE for the complete time-domain function for vR(t) and the inductor voltage vL(t),
i. use MatLab, Mathcad, or Excel to plot vR(t) and vL(t) versus time, scale the vertical axis for voltage
and the horizontal axis for time large enough to observe exponential behavior, label the axes with correct units, and
ii. fill out the first column of Table 1;
set the initial inductor current to zero (iL(0) = 0), set Eg(t) equal to a sinusoidal function with a peak voltage
of 10V and a frequency f of 150KHz; that is
Eg ( t ) = 10V sin (t )

= 2 f
f = 150 KHz

and solve the ODE for the complete time-domain function for vR(t) and the inductor voltage vL(t),
i. use MatLab, Mathcad, or Excel to plot the input voltage vin(t), the resistor voltage vR(t), and the inductor voltage vL(t) versus time, scale the vertical axis for voltage and the horizontal axis for time large
enough to observe several frequency cycles, label the axes with correct units, and
ii. fill out the first column of Table 2.
2.

PSPICE simulation
a. prepare network N1 in Figure 1 for time-domain analysis in PSPICE,
b. set the initial inductor current to zero (iL(0) = 0), set Eg(t) as a pulse voltage source with the following parameters
V 1 = 0.0
V 2 = 10.0
TD = 1.0u
TR = 1.0n
TF = 1.0n
PW = 5.0u
PER = 10.0u

initial value (V)


pulsed value (V)
delay time (sec.)
rise time (sec.)
fall time (sec.)
pulse width (sec.)
period (sec.)

- 31 -

c.

i. sweep time from zero seconds to 10 seconds,


ii. plot the inductor voltage vL(t) and the resistor voltage vR(t) versus time, and
iii. fill out the second column of Table 1;
set the initial inductor current to zero (iL(0) = 0), set Eg(t) as a sinusoidal voltage source with the following
parameters
VOFF = 0.0
VAMPL = 10.0

offset voltage (V)


amplitude (V)

FREQ = 150 K

frequency (Hz)

i. sweep time from zero seconds to 150 seconds,


ii. plot the input voltage vin(t), the inductor voltage vL(t), and the resistor voltage vR(t) versus time, and
iii. fill out the second column of Table 2.
Table 1
RL network N1 parameters; 10V step input
Method
Parameter

Analysis

Simulation

Breadboard

Units

Time-constant

sec.

Rise-time tR

sec.

Final value vR()

Table 2
RL network N1 parameters; 10V sinusoidal input
Method
Parameter

Analysis

Simulation

Units

Peak vR(t)/peak vin(t)

V/V

Phase offset m

deg.

- 32 -

Breadboard

B. RC network N2 (Figure 2, Tables 3 and 4)


IC(t)
A

C1

10nF
B

vC(t)

Eg(t)
vin(t)

R2
1K

vR(t)

N2

Figure 2
RC network N2
1.

Analysis
a. derive the network ODE with the capacitor voltage vC(t) as the dependent variable, time t as the independent variable, and Eg(t) as the network excitation,
b. set the initial capacitor voltage to zero (vC(0) = 0), set Eg(t) equal to a step function with an amplitude of
10V; that is,

Eg ( t ) = 10V u ( t )

c.

and solve for the complete time-domain function for vC(t) and the resistor voltage vR(t),
i. use MatLab, Mathcad, or Excel to plot vC(t) and vR(t) versus time, scale the vertical axis for voltage
and the horizontal axis for time large enough to observe exponential behavior, label the axes with correct units, and
ii. fill out the first column of Table 3.
set the initial capacitor voltage to zero (vC(0) = 0), set Eg(t) equal to a sinusoidal function with a peak voltage of 10V and a frequency f of 15KHz; that is
Eg ( t ) = 10V sin (t )

= 2 f
f = 15KHz

and solve for the complete time-domain function for vR(t) and the capacitor voltage vC(t),
i. use MatLab, Mathcad, or Excel to plot the input voltage vin(t), the resistor voltage vR(t), and the capacitor voltage vC(t) versus time, scale the vertical axis for voltage and the horizontal axis for time large
enough to observe several frequency cycles, label the axes with correct units, and
ii. fill out the first column of Table 4.
2.

PSPICE simulation
a. prepare network N2 in Figure 2 for time-domain analysis in PSPICE,
b. set the initial capacitor voltage to zero (vC(0) = 0), set Eg(t) as a pulse voltage source with the following
parameters

- 33 -

V 1 = 0.0
V 2 = 10.0
TD = 10.0u
TR = 1.0n
TF = 1.0n
PW = 50.0u
PER = 120.0u

c.

initial value (V)


pulsed value (V)
delay time (sec.)
rise time (sec.)
fall time (sec.)
pulse width (sec.)
period (sec.)

i. sweep time from zero seconds to 120 seconds,


ii. plot the input voltage vin(t), the capacitor voltage vC(t), and the resistor voltage vR(t) versus time, and
iii. fill out the second column of Table 3;
set the initial capacitor voltage to zero (vC(0) = 0), set Eg(t) as a sinusoidal voltage source with the following parameters
VOFF = 0.0
VAMPL = 10.0
FREQ = 15.0 K

offset voltage (V)


amplitude (V)
frequency (Hz)

i. sweep time from zero seconds to 120 seconds,


ii. plot the input voltage vin(t), the capacitor voltage vC(t), and the resistor voltage vR(t) versus time, and
iii. fill out the second column of Table 4.
Table 3
RC network N2 parameters, 10V step input
Method
Parameter

Analysis

Simulation

Breadboard

Units

Time-constant

sec.

Rise-time tR

sec.

Final value vR()

Table 4
RC network N2 parameters, 10V sinusoidal input
Method
Parameter

Analysis

Simulation

Units

Peak vR(t)/peak vin(t)

V/V

Phase offset m

deg.

- 34 -

Breadboard

C. RLC network N3 (Figure 3, Table 5)


L2

R1

iL(t)

A
Eg(t) = 10Vu(t)

100

B
iC(t)

680H

vin(t)

R3

C4

820

10nF

vC(t)

N3

Figure 3
RLC network N3
1.

Analysis
a. derive the network ODE with the capacitor voltage vC(t) as the dependent variable, time t as the independent variable, and Eg(t) as the network excitation,
b. set the initial capacitor voltage to zero (vC(0) = 0), set Eg(t) equal to a step function with an amplitude of
10V; that is,

Eg ( t ) = 10V u ( t )
and solve for the complete time-domain function for vC(t),
i. use MatLab, Mathcad, or Excel to plot the capacitor voltage vC(t) versus time, scale the vertical axis
for voltage and the horizontal axis for time large enough to observe exponential behavior, label the
axes with correct units, and
ii. fill out the first column of Table 5.
2.

PSPICE simulation
a. prepare network N3 in Figure 3 for time-domain analysis in PSPICE,
b. set the initial capacitor voltage to zero (vC(0) = 0), set Eg(t) as a pulse voltage source with the following
parameters
V 1 = 0.0
V 2 = 10.0
TD = 10.0u
TR = 1.0n
TF = 1.0n
PW = 90.0u
PER = 180.0u

initial value (V)


pulsed value (V)
delay time (sec.)
rise time (sec.)
fall time (sec.)
pulse width (sec.)
period (sec.)

i. sweep time from zero seconds to 100 seconds,


ii. plot the input voltage vin(t) and the capacitor voltage vC(t) versus time, and
iii. fill out the second column of Table 5.

- 35 -

Table 5
RLC network N3 parameters, 10V step input
Method
Parameter

Analysis

Simulation

Breadboard

Units

Exponent m

rad./sec.

Damped frequency of
oscillation m

rad./sec.

Damping ratio
Undamped frequency of
oscillation n

rad./sec.

Period of oscillation Td

sec.

Final value vR()

Percent overshoot PO

Phase offset m

deg.

IV. Lab Measurements


In this part of the lab, you are to build these networks on your breadboard and take time-domain measurements necessary
to verify the analytical and simulation calculations performed in the pre-lab. You will use the Agilent 33120A function
generator to provide network excitations and the Agilent 54621A oscilloscope to take measurements. Data taken from
these measurements will be used to complete Tables 1 through 5.
A. RL network N1 (Construction and measurements)
1. layout network N1 shown in Figure 1 on your breadboard using components provided by the GTA,
2. connect the Agilent 33120A function generator to the network in place of the voltage source Eg(t),
3. configure the function generator to produce a square-wave voltage waveform with a frequency of 100KHz, an
amplitude of 10V peak, and an offset of zero volts,
a. place channel A probe of the Agilent 54621A oscilloscope to terminals A and ground and channel B
probe to terminals B and ground of N1,
b. use the built-in functions of the oscilloscope to do the following:
i. display the waveforms of the resistor voltage vR(t) (Channel B) and the inductor voltage vL(t) (Channel A Channel B), compare these waveforms to the ones generated in the pre-lab for the 10V step
input,
ii. apply the oscilloscopes math functions to fill out the third column of Table 1;
4. configure the function generator to produce a sinusoidal voltage waveform with a frequency of 150KHz, an
amplitude of 10V peak, and an offset of zero volts,
a. place channel A probe of the oscilloscope to terminals A and ground and channel B probe to terminals B
and ground of N1,
b. use the built-in functions of the oscilloscope to do the following:
i. display the waveforms of the resistor voltage vR(t) (Channel B) and the inductor voltage vL(t) (Channel A Channel B), compare these waveforms to the ones generated in the pre-lab for the 10V sinusoidal input,
ii. apply the oscilloscopes math functions to fill out the third column of Table 2.

- 36 -

B. RC network N2 (Construction and measurements)


1. layout network N2 shown in Figure 2 on your breadboard using components provided by the GTA,
2. connect the Agilent 33120A function generator to the network in place of the voltage source Eg(t),
3. configure the function generator to produce a square-wave voltage waveform with a frequency of 10KHz, an
amplitude of 10V peak, and an offset of zero volts,
a. place channel A probe of the Agilent 54621A oscilloscope to terminals A and ground and channel B
probe to terminals B and ground of N2,
b. use the built-in functions of the oscilloscope to do the following:
i. display the waveforms of the resistor voltage vR(t) (Channel B) and the capacitor voltage vC(t) (Channel A Channel B), compare these waveforms to the ones generated in the pre-lab for the 10V step
input,
ii. apply the oscilloscopes math functions to fill out the third column of Table 3;
4. configure the function generator to produce a sinusoidal voltage waveform with a frequency of 15KHz, an amplitude of 10V peak, and an offset of zero volts,
a. place channel A probe of the oscilloscope to terminals A and ground and channel B probe to terminals B
and ground of N2,
b. use the built-in functions of the oscilloscope to do the following:
i. display the waveforms of the resistor voltage vR(t) (Channel B) and the capacitor voltage vC(t) (Channel A Channel B), compare these waveforms to the ones generated in the pre-lab for the 10V sinusoidal input,
ii. apply the oscilloscopes math functions to fill out the third column of Table 4.
C. RLC network N3 (Construction and measurements)
1. layout network N3 shown in Figure 3 on your breadboard using components provided by the GTA,
2. connect the Agilent 33120A function generator to the network in place of the voltage source Eg(t),
3. configure the function generator to produce a square-wave voltage waveform with a frequency of 12.5KHz, an
amplitude of 10V peak, and an offset of zero volts,
a. place channel A probe of the Agilent 54621A 60MHz dual channel oscilloscope to terminals A and
ground and channel B probe to terminals B and ground of N3,
b. use the built-in functions of the oscilloscope to do the following:
i. display the waveforms of the input voltage vin(t) (Channel A) and capacitor voltage vC(t) (Channel B),
compare these waveforms to the ones generated in the pre-lab for the 10V step input,
ii. apply the math functions of the oscilloscope to fill out the third column of Table 5.
V. Lab Report
The report for this lab experiment must be neatly and professionally word-processed and must contain the following
items
Title Page.
Introduction.
Provide your account of what this lab experiment is about and what is expected.
Pre-lab.
Include and explain all of your pre-lab derivations, calculations, and simulations. Detail discussions on any
problems encountered. Include Tables 1 through 5 filled out as required.
Lab Procedure.
Include an explanation on how the measurements are to be performed. Explain the use of lab instruments in
performing measurements. Provide schematics of all networks and the connection of the function generator and
oscilloscope. Provide detailed discussions and comments on any problems encountered with equipment and
taking measurements.
Results.
Tables 1 through 5 neatly and completely filled out with the results of your calculations, simulations, and measurements. Provide errors in percent among the calculated, simulated, and measured values with the calculated
values as the basis.
Discussions.
Provide detailed answers and discussions to the following questions
(a) How well do the measured values correspond to those from calculations and simulation?
(b) Are the errors among calculated, simulated, and measured values within reasonable (5% absolute) tolerances? If not, explain why not.
(c) Explain mathematically the relationship between time constant, and rise and fall time.
- 37 -

(d)

Explain the significance and importance of network time constants, and rise and fall times. Why these
values are or are not important.
(e) Explain what can be determined about a network from its time constants.
Conclusion.
Provide detailed answers and discussions to the following questions
(a) In your opinion, do the measurements match the results of calculation and simulation?
(b) Are the procedures and methods used in this experiment suitable for characterizing the time-domain behavior of networks similar to the ones examined in this lab? Explain why or why not.
(c) What other methods can be used? Explain in detail advantages and disadvantages.
(d) Explain what you learned from this lab and how you can apply what you learned.
References.
Include all of your pencil and paper work. All notes, calculations, derivations, measurements, and comments
performed in an informal manner with pencil and paper. This material serves as reference and back-up to the
formally written material included above. Include any references to textbooks and papers.

- 38 -

Lab Experiment No. 2

Mesh and Nodal Matrix Equations


of Linear Resistive Networks

I. Introduction
Matrix analysis methods are very powerful tools for calculating the branch voltages and currents of a linear network.
The purpose of this experiment is to apply these methods in the pre-lab and post-lab, and to verify the accuracy of these
methods from actual measurements made in the lab. The experiments involved in this lab address the following topics.
(a) Derivation and solution of the mesh-analysis matrix equation (MAME) and the node-analysis matrix equation
(NAME) of a linear resistive network under test (NUT).
(b) Generation of the voltage, current, and power map of the NUT.
(c) Proper layout of a network on a breadboard.
(d) Application of electronic test equipment to make voltage and current measurements.
(e) Performing the least number of measurements necessary to generate the map.
The theory and equations associated with these topics are covered in lectures and class notes. Your job in this session is
to build and apply measurement methods on each of the given networks in order to expand your hands-on experience
with networks and test equipment. Make use of the parts supplied by the GTA, and the DMM and dc power supply located on the lab bench to fill out the following Tables for each network included.
II. Components and Instruments
The components and instruments required for this lab are listed below.
Resistors:
Network N1
Network N2
Network N3
100 (2)
1.8K
10K (3) 30K
1K
3.6K
120
2.4K (2)
20K
100K (2)
1.2K
4.7K
1.2K (2) 2.7K
2K
5.6K
2.7K
7.5K
3.3K
Active devices1:
Op-amp
TLC274

Transistor
2N3819 NJFET

Instruments:
Power supply
Agilent E3620A

Multimeter
Agilent 34401A

Network N4
1K
5.1K
2K
6.8K
3K
10K trim-pot

Additional:
Breadboard
Tool box
Hook-up wire
III. Pre-lab Assignment
The schematics for four resistive networks N1 through N4 are shown in Figures 1 through 4. Prior to constructing these
networks in the lab, you are to perform a full circuit analysis of these networks for the pre-lab assignment. Networks N1
and N2 are to be analyzed with the mesh analysis method while the nodal analysis method is to be used on N3 and N4.
Data from the results of this work will be used to fill out Tables 1 through 4 associated with the networks. As usual, you
must bring the results of your pre-lab assignment to the lab to assist you in the measurement process.

Download data sheets for these devices for use in the lab.
- 39 -

A. Calculated variables for network N1 (Figure 1, Tables 1(a) and 1(b)).


1. Derive the MAME for N1 in symbolic and numerical form using the mesh orientations shown on the schematic.
2. Solve the MAME for the mesh current vector Im and use it to fill out Table 1(a).
3. Apply the mesh currents to calculate the voltage across, the current through, and the power dissipated by each
network component, and place these values in Table 1(b) for the network variable map.
4. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 1(a) where indicated.
Network N1
R1

100

Eps1

12V

1.2K

R4

m1

R8
m2
R2

m3

R5

1.8K

2.7K

120

m4
Eps2

2.4K

R7

12V
m5

R6

2.4K
R9

1.2K

R3
2

N1

100

Figure 1
Resistive network N1
Table 1(a)
Calculated mesh currents
for N1
Mesh i

Imi (A)

m1
m2
m3
m4
m5
Pdiss

Pdel

Table 1(b)
Calculated variable map for N1
Component
i

Spec
value

R1

100

R2

120

R3

100

R4

1.2K

R5

1.8K

Vi (V)

- 40 -

Ii (A)

Pi (W)

R6

1.2K

R7

2.7K

R8

2.4K

R9

2.4K

Eps1

12V

Eps2

12V

B. Calculated variables for network N2 (Figure 2, Tables 2(a) and 2(b)).


1. Derive the MAME for N2 in symbolic and numerical form using the mesh orientations shown in the schematic.
2. Solve the MAME for the mesh current vector Im and use it to fill out Table 2(a).
3. Apply the mesh currents to calculate the voltage across, the current through, and the power dissipated by each
network component, and place these values in Table 2(b) for the network variable map (be sure to include these
variables for the VCVS).
4. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 2(a) where indicated.
Network N2
R2
10K
R1

m3

2
R3

10K
Eps1
5V

R4
3
20K

VR5

m1

30K

m2

10K

VR5

( = 2V/V)

N2

Figure 2
Resistive network N2
Table 2(a)
Calculated mesh currents
for N2
Mesh i

Imi (A)

m1
m2
m3
Pdiss

Pdel

- 41 -

R5

Table 2(b)
Calculated variable map for N2
Component
i

Spec
value

R1

10K

R2

10K

R3

20K

R4

30K

R5

10K

Eps1

5V

VCVS

= 2V/V

Vi (V)

Ii (A)

Pi (W)

C. Calculated variables for network N3 (Figure 3, Tables 3(a) and 3(b)).


1. Derive the NAME for N3 in symbolic and numerical form using the positive node voltage orientation shown on
the schematic.
2. Solve the NAME for the node voltage vector Vn and use it to fill out Table 3(a).
3. Apply the node voltages to calculate the voltage across, the current through, and the power dissipated by each
network component, and place these values in Table 3(b) for the network variable map.
4. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 3(a) where indicated.
Network N3
2

R2

Vn2

3.3K

Vn4

2K

4.7K
1.2K

R4
5V

Eps1

R7

3.6K
1K

R6

Vn1
1

Eps2

R9

7.5K

8V
N3

Figure 3
Resistive network N3

- 42 -

5.6K

R8
R1

R3

Vn3

R5
2.7K

Vn5
5

Table 3(a)
Calculated node voltages
for N3
Node i

Vni (V)

1
2
3
4
5
Pdiss

Pdel

Table 3(b)
Calculated variable map for N3
Component
i

Spec
value

R1

4.7K

R2

3.3K

R3

5.6K

R4

1.2K

R5

2.7K

R6

7.5K

R7

1K

R8

2K

R9

3.6K

Eps1

5V

Eps2

8V

Vi (V)

Ii (A)

Pi (W)

D. Calculated variables for network N4 (Figure 4, Tables 4(a) and 4(b)).


1. Derive the NAME for N4 in symbolic and numerical form using the positive node voltage orientation shown on
the schematic.
2. Solve the NAME for the node voltage vector Vn and use it to fill out Table 4(a).
3. Apply the node voltages to calculate the voltage across, the current through, and the power dissipated by each
network component, and place these values in Table 4(b) for the network variable map.
4. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 4(a) where indicated.

- 43 -

Network N4
R3
6.8K
R2
Vn1

R1

3K

1K

Vn3

2K
Jg2

Eps1

R4

Vn2

1mA

R5

5.1K

20V

0
N4

Figure 4
Resistive network N4
Table 4(a)
Calculated node voltages
for N4
Node i

Vni (V)

1
2
3
Pdiss

Pdel

Table 4(b)
Calculated variable map for N4
Component
i

Spec
value

R1

2K

R2

3K

R3

6.8K

R4

1K

R5

5.1K

Eps1

20V

Jg2

1mA

Vi (V)

- 44 -

Ii (A)

Pi (W)

IV. Lab Measurements


In this part of the lab, you are to build the networks in Figures 1 through 4 on your breadboard and take dc measurements
necessary to verify the calculations performed in the pre-lab. You will use the Agilent E3620A power supply to provide
network excitations and the Agilent 34401A DMM to take dc voltage and current measurements. Data from these measurements will be used to fill out the Tables included with each network.
A. Measured variables for network N1 (Figure 5, Tables 5(a) and 5(b)).
1. Build network N1 shown in Figure 5 below (identical to Figure 1) on your breadboard with particular attention
paid to strict layout procedures. Connect the power supply to the network in place of the voltage sources Eps1
and Eps2. Set the supply voltages to 12V as indicated on the schematic.
2. Measure with the DMM the resistance of each resistor and the voltage source voltages. Record these values in
the third column of Table 5(a) where indicated.
3. Use the DMM to measure the voltage drop across each resistor and label on the schematic with a positive sign
(+) the resistors positive terminal. Record these voltage readings in the fourth column of Table 5(a) where indicated.
4. Complete Table 5(a) entries by calculating the current through and the power dissipated by each resistor. Use
KCL to determine the current through and the power dissipated by the power supplies.
5. Apply the component currents in Table 5(a) to calculate the mesh currents in meshes m1 through m5. Label on
the schematic the direction of positive current flow with an arrow and record these currents in Table 5(b).
6. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 5(b) where indicated.
Network N1
R1

100

Eps1

12V

R4

m1

1.2K
R8
m2

R2

m3

1.8K

R5

2.7K

120

m4
Eps2

2.4K

R7

12V
m5

R6

2.4K
R9

1.2K

R3
2

100

N1

Figure 5
Resistive network N1

- 45 -

Table 5(a)
Measured variable map for N1
Component
i

Spec
value

R1

100

R2

120

R3

100

R4

1.2K

R5

1.8K

R6

1.2K

R7

2.7K

R8

2.4K

R9

2.4K

Eps1

12V

Eps2

12V

Measured
value

Vi (V)

Table 5(b)
Measured mesh currents
for N1
Mesh i

Imi (A)

m1
m2
m3
m4
m5
Pdiss

Pdel

- 46 -

Ii (A)

Pi (W)

B. Measured variables for network N2 (Figure 6, Tables 6(a) and 6(b)).


1. Build network N2 shown in Figure 6 below on your breadboard with particular attention paid to strict layout
procedures. The TLC274 operational amplifier with resistors Ra and Rb is an active subnetwork biased by Eps2
that models the VCVS with a gain parameter determined from

= 1+

2.
3.
4.
5.
6.

Rb
= 2.0V/V
Ra

Connect the power supply to the network in place of the voltage sources Eps1 and Eps2. Set Eps1 to 5V and Eps2
to 10V as indicated on the schematic.
Measure with the DMM the resistance of each resistor and the voltage source voltages. Record these values in
the third column of Table 6(a) where indicated.
Use the DMM to measure the voltage drop across each resistor and label on the schematic with a positive sign
(+) the resistors positive terminal. Record these voltage readings in the fourth column of Table 6(a) where indicated.
Complete Table 6(a) entries by calculating the current through and the power dissipated by each resistor. Use
KCL to determine the current through and the power dissipated by the power supply Eps1.
Apply the component currents in Table 6(a) to calculate the mesh currents in meshes m1 through m3. Label on
the schematic the direction of positive current flow with an arrow and record these currents in Table 6(b).
Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 6(b) where indicated.
Network N2
R2
10K
m3
R1

R4

10K

30K
R3

Eps2

20K
Eps1
m1

5V

R5

TLC274

10K

Rb

m2
Ra

100K

100K
0
N2

(Eps2 = 10V)

Figure 6
Network N2 with op-amp simulated VCVS

- 47 -

VR5

Table 6(a)
Measured variable map for N2
Component
i

Spec
value

R1

10K

R2

10K

R3

20K

R4

30K

R5

10K

Eps1

5V

VCVS

= 2V/V

Measured
value

Vi (V)

Ii (A)

Pi (W)

Table 6(b)
Measured mesh currents
for N2
Mesh i

Imi (A)

m1
m2
m3
Pdiss

Pdel

C. Measured variables for network N3 (Figure 7, Tables 7(a) and 7(b)).


1. Build network N3 shown in Figure 7 below (identical to Figure 3) on your breadboard with particular attention
paid to strict layout procedures. Connect the power supply to the network in place of the voltage sources Eps1
and Eps2, and set the supply voltages to 5V and 8V, respectively, as indicated on the schematic.
2. Measure with the DMM the resistance of each resistor and the voltage source voltages. Record these values in
the third column of Table 7(a) where indicated.
3. Use the DMM to measure the voltage at each node (Vni) with respect to the ground node (node 0) and record
in Table 7(b) where indicated. Label on the schematic the polarity of the node voltage with a positive (+) or
negative (-) sign.
4. Apply KVL to the node voltages to calculate the voltage across each network resistor. Record the resistor voltages in the fourth column of Table 7(a).
5. Complete the entries in Table 7(a) by computing the current through and the power dissipated by each resistor.
Use KCL to compute the current through and the power dissipated by the power supply voltages.
6. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 7(b) where indicated.

- 48 -

Network N3
2

R2

Vn2

3.3K

Vn4

5.6K

R8
R1

R3

Vn3

2K

4.7K
1.2K

R4
5V

Eps1

R7

3.6K
1K
Eps2

R6

Vn1
1

R9

7.5K

8V

R5

Vn5

2.7K

N3

Figure 7
Resistive network N3
Table 7(a)
Measured variable map for N3
Component
i

Spec
value

R1

4.7K

R2

3.3K

R3

5.6K

R4

1.2K

R5

2.7K

R6

7.5K

R7

1K

R8

2K

R9

3.6K

Eps1

5V

Eps2

8V

Measured
value

Vi (V)

- 49 -

Ii (A)

Pi (W)

Table 7(b)
Measured node voltages
for N3
Node i

Vni (V)

1
2
3
4
5
Pdiss

Pdel

D. Measured variables for network N4 (Figures 8(a) and 8(b), Tables 8(a) and 8(b)).
1. Build the network shown in Figure 8(a) with a 2N3819 NJFET. This network is current diode that is to replace
the current sink in network N4 in Figure 4. Adjust the 10K trimpot RT for a drain current ID of 1mA. Use the
DMM to measure the resistance of the adjusted trimpot. Label this resistance RS.
2. Build network N4 shown in Figure 8(b) on your breadboard with the current diode network biased by a source
resistor having a value as close as possible to the value of RS. Again, pay attention to strict layout procedures.
Connect the power supply to the network in place of the voltage source Eps1 and set the supply voltage to 20V
as indicated on the schematic.
3. Measure with the DMM the resistance of each resistor and the voltage source voltage. Record these values in
the third column of Table 8(a) where indicated.
4. Use the DMM to measure the voltage at each node (Vni) with respect to the ground node (node 0) and record
in Table 8(b) where indicated. Label on the schematic the polarity of the node voltage with a positive (+) or
negative (-) sign.
5. Apply KVL to the node voltages to calculate the voltage across each network resistor. Record the resistor voltages in the fourth column of Table 8(a).
6. Complete the entries in Table 8(a) by computing the current through and the power dissipated by each resistor.
Use KCL to compute the current through and the power dissipated by the power supply voltage.
7. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 8(b) where indicated.

- 50 -

Network N4
R3
6.8K

R2
Vn1

ID

3K

VDD
10V

RT

1K

2N3819

R5

1mA
R1

VDD

2K

ID

2N3819

J1

R4

Vn2

J1

10V

Eps1

20V

10K

RS
0
N4
(a)

(b)

Figure 8
(a) NJFET current diode
(b) Resistive network N4 with NJFET current diode
Table 8(a)
Measured variable map for N4
Component
i

Spec
value

R1

2K

R2

3K

R3

6.8K

R4

1K

R5

5.1K

Eps1

20V

J1

1mA

Measured
value

Vi (V)

Table 8(b)
Measured node voltages
for N4
Node i

Vni (V)

1
2
3
Pdiss

Pdel

- 51 -

Ii (A)

Pi (W)

Vn3

V. Post-lab Assignment
In order to establish a legitimate comparison between the matrix methods of network analysis and physical measurements from actual networks, you are to recalculate the variable maps generated for each network in the pre-lab using
measured resistance values. Fill out the following Tables below for each network.
A. Recalculated variables for network N1 (Figure 1, Tables 9(a) and 9(b)).
1. Repeat the calculation steps performed in the pre-lab assignment on network N1 with resistor values measured
in the lab and recorded in Table 5(a).
2. Record the recalculated mesh currents in Table 9(a).
3. Record the voltage across, the current through, and the power dissipated by each network component, and place
these values in Table 9(b).
4. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 9(a) where indicated.
Table 9(a)
Recalculated mesh currents
for N1
Mesh i

Imi (A)

m1
m2
m3
m4
m5
Pdiss

Pdel

Table 9(b)
Recalculated variable map for N1
Component
i

Spec
value

R1

100

R2

120

R3

100

R4

1.2K

R5

1.8K

R6

1.2K

R7

2.7K

R8

2.4K

R9

2.4K

Eps1

12V

Eps2

12V

Measured
Value

Vi (V)

- 52 -

Ii (A)

Pi (W)

B. Recalculated variables for network N2 (Figure 2, Tables 10(a) and 10(b)).


1. Repeat the calculation steps performed in the pre-lab assignment on network N2 with resistor values measured
in the lab and recorded in Table 6(a).
2. Record the recalculated mesh currents in Table 10(a).
3. Record the voltage across, the current through, and the power dissipated by each network component, and place
these values in Table 10(b).
4. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 10(a) where indicated.
Table 10(a)
Recalculated mesh currents
for N2
Mesh i

Imi (A)

m1
m2
m3
Pdiss

Pdel

Table 10(b)
Recalculated variable map for N2
Component
i

Spec
value

R1

10K

R2

10K

R3

20K

R4

30K

R5

10K

Eps1

5V

VCVS

= 2V/V

Measured
value

Vi (V)

- 53 -

Ii (A)

Pi (W)

C. Recalculated variables for network N3 (Figure 3, Tables 11(a) and 11(b)).


1. Repeat the calculation steps performed in the pre-lab assignment on network N3 with resistor values measured
in the lab and recorded in Table 7(a).
2. Record the recalculated node voltages in Table 11(a).
3. Record the voltage across, the current through, and the power dissipated by each network component, and place
these values in Table 11(b).
4. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 11(a) where indicated.
Table 11(a)
Recalculated node voltages
for N3
Node i

Vni (V)

1
2
3
4
5
Pdiss

Pdel

Table 11(b)
Recalculated variable map for N3
Component
i

Spec
value

R1

4.7K

R2

3.3K

R3

5.6K

R4

1.2K

R5

2.7K

R6

7.5K

R7

1K

R8

2K

R9

3.6K

Eps1

5V

Eps2

8V

Measured
value

Vi (V)

- 54 -

Ii (A)

Pi (W)

D. Recalculated variables for network N4 (Figure 4, Tables 12(a) and 12(b)).


1. Repeat the calculation steps performed in the pre-lab assignment on network N4 with resistor values measured
in the lab and recorded in Table 8(a).
2. Record the recalculated node voltages in Table 12(a).
3. Record the voltage across, the current through, and the power dissipated by each network component, and place
these values in Table 12(b).
4. Calculate the total power dissipated by the network (Pdiss) and the total power delivered to the network (Pdel).
List these powers at the bottom of Table 12(a) where indicated.
Table 12(a)
Recalculated node voltages
for N4
Node i

Vni (V)

1
2
3
Pdiss

Pdel

Table 12(b)
Recalculated variable map for N4
Component
i

Spec
value

R1

2K

R2

3K

R3

6.8K

R4

1K

R5

5.1K

Eps1

20V

J1

1mA

Measured
value

Vi (V)

- 55 -

Ii (A)

Pi (W)

VI. Lab Report


The report for this lab experiment must be neatly and professionally word-processed and must contain the following
items
Title Page.
Introduction.
Provide your account of what this lab experiment is about and what is expected.
Pre-lab.
Include and explain all of your pre-lab derivations and calculations. Detail discussions on any problems encountered. Include Tables 1 through 4 filled out as required.
Lab Procedure.
Include an explanation on how the measurements are to be performed. Explain the use of lab instruments in
performing measurements. Provide schematics of all networks and the connection of the power supply and
DMM. Provide detailed discussions and comments on any problems encountered with equipment and taking
measurements.
Results.
Tables 1 through 12 neatly and completely filled out with the results of your pre-lab, measurements, and postlab. Provide errors in percent among the calculated, simulated, and measured values with the calculated values
as the basis.
Discussions.
Provide detailed answers and discussions to the following questions
(a) For the two networks analyzed with the MAME (N1 and N2), compare the calculated mesh currents from the
pre-lab to those determined from measurements. Compare the calculated variable map to the measured variable map for each network. Explain reasons for any differences greater than 5%.
(b) For the two networks analyzed with the MAME (N1 and N2), compare the calculated mesh currents from the
post-lab to those determined from measurements. Compare the calculated variable map to the measured variable map for each network. Explain reasons for any differences greater than 5%.
(c) Which calculated variables are more accurate, those from the pre-lab or post lab? Explain reasons why.
(d) For the two networks analyzed with the NAME (N3 and N4), compare the calculated node voltages from the
pre-lab to those determined from measurements. Compare the calculated variable map to the measured variable map for each network. Explain reasons for any differences greater than 5%.
(e) For the two networks analyzed with the NAME (N3 and N4), compare the calculated node voltages from the
post-lab to those determined from measurements. Compare the calculated variable map to the measured variable map for each network. Explain reasons for any differences greater than 5%.
(f) Which calculated variables are more accurate, those from the pre-lab or post lab? Explain reasons why.
(g) Provide comments on how efficient, accurate, and reliable the MAME is for calculating network variables. Are
there any restrictions on the application of the MAME for the analysis of on a network? Explain these restrictions.
(h) Provide comments on how efficient, accurate, and reliable the NAME is for calculating network variables. Are
there any restrictions on the application of the NAME for the analysis of on a network? Explain these restrictions.
(i) Are the errors among calculated and measured values within reasonable (5% absolute) tolerances? If not,
explain why not.
(j) How well do the dissipated powers match the delivered powers for each network? Explain any differences
beyond 5% absolute.
Conclusion.
Provide detailed answers and discussions to the following questions
(a) In your opinion, do the measurements match the results of pre-lab and post-lab calculations?
(b) Are the procedures and methods used in this experiment suitable for analyzing networks similar to the
ones examined in this lab? Explain why or why not.
(c) What other methods can be used? Explain in detail advantages and disadvantages.
(d) Explain what you learned from this lab and how you can apply what you learned.
Appendix. The appendix should contain actual compiled data, notes and comments, equations, sketches, and
schematics made during the experiment. Include all of your pencil and paper work. All notes, calculations, derivations, measurements, and comments performed in an informal manner with pencil and paper. This material
serves as reference and back-up to the formally written material included above.
References. List any material contributed from other sources.

- 56 -

Lab Experiment No. 3

FM Transmitter Design Phase 1 & 2

I. Introduction
The object of this lab experiment is to gain familiarity with the design cycle of analog circuits. The network used in
this project is a simple RF transmitter that must oscillate with a frequency within the FM band (88MHz to 108MHz).
The network used in this design is shown in Figure 1 where a single NPN bipolar junction transistor (BJT)
(MPS5179) is employed as the active device that drives a tuned LC circuit to set the oscillation frequency. Your job
in this lab involves the first two phases in the design cycle of analog circuits
the application of the theory and tools developed in Circuits II to analyze the network in Figure 1 and
the application of the PSPICE circuit simulator to investigate the networks large-signal time-domain behavior.
The third phase is the actual fabrication and testing of the design to verify the analysis and simulation results. This
phase is reserved for a future lab experiment.

II. Components and Instruments


No electronic components or instruments are required for this lab experiment.

III. Phase 1: Analysis


The small-signal equivalent circuit of the transmitter is shown in Figure 2(a) while the small-signal high-frequency
model of the NPN BJT is shown in Figure 2(b). Values for the bias-dependent model components evaluated at the
dc operating point are given below.

gm =
r =

I CQ

F Vt
F
gm

= 0.271S

= 230

(1)

C = C jc = 0.458 pF
C =

gm
C = 44.4 pF
2 fT

Insert the BJT model into the equivalent circuit in Figure 2(a), assume the capacitor C4 has an initial voltage (vC4(0))
stored on its plates, and do the following.
(a) Derive the symbolic s-domain function for the voltage VC(s) at the collector C. Express VC(s) as a rational response function of s with vC4(0) as the excitation. For best results, apply the NAME algorithm in your analysis
[1].
(b) Use the response function for VC(s) to derive symbolically the relationship among the network and model components that will sustain oscillation.
(c) Derive the symbolic expression for the frequency of oscillation (fosc) in Hz.
(d) Use the network and model component values to generate a plot of the analytical frequency of oscillation (fosc)
versus C3 swept from 6.5pF to 30pF. Include at least 10 points in this plot for good resolution.
IV. Phase 2: Simulation
Use the PSPICE program to perform a dc operating point and time-domain simulation of the network shown in Figure 1. Use the 2N5179 BJT found in the Fairchild semiconductor parts library in place of the MPS5179 device. In
the simulation of the dc operating point, make sure the inductor L1 and all capacitors (C1 through C7) are void of
initial conditions; that is, iL1(0) and vC1(0) through vC7(0) are all zero. This will prevent initial condition contamination of the networks dc bias point. From this simulation, do the following.
(a) Generate a complete voltage, current, and power map of the network at dc. Use the tabular format for this map
as was done in several Problem Set problems.
(b) Generate a plot of the simulated frequency of oscillation (fosc) versus C3 from 6.5pF to 30pF. Include at least 10
points in this plot for resolution.
(c) Compare the analytical and simulated plots of fosc versus C3. Comment on which plot is more accurate and
why.

- 57 -

Ant.
+VCC
C6

C7

10nF

L1

10F
C1

C3

101.5nH

C5

R1

3.3nF

3.3nF

15K

Mod. input

VCC

C4

Q1

9V

10pF
R2

C2

R3

10K

3.3nF

220
C3 = 6.5pF to 30pF
(trimmer capacitor)
Q1 = MPS5179
(NPN RF BJT)

gnd

Figure 1
RF transmitter network
vC4(0)

C4
VE(s)

VC(s)

Q1

C3

L1

R3

(a)

C
B

C
r

gmv
v

E
E
(b)

Figure 2
(a) Transmitter network equivalent circuit
(b) HF BJT model

- 58 -

V. Lab Report
Your lab report on these design phases should consist of the following:
Analysis and simulation phases.
(a) Detailed derivations from circuit analysis. Expression for fosc and conditions for oscillation from analysis. A plot of
fosc vs C3.
(b) Voltage and current map from analysis.
(c) Time-domain plots from simulation. Determine fosc and conditions for oscillation from these plots. A plot of fosc vs
C3.
(d) Voltage and current map from simulation.
(e) A conclusion and comments on the accuracy of your measurements and extracted parameters.
(f) An appendix containing copies of pages from your lab notebook containing all data and calculations made during
the experiment.
Discussions.
Provide detailed discussions on how well the analytical results and values correspond to those from simulation.
Conclusion.
(a) Are the procedures and methods used in this experiment suitable for designing analog networks similar to the
ones examined in this lab? Explain why or why not.
(b) What other methods can be used? Explain in detail advantages and disadvantages.
(c) Explain what you learned from this lab and how you can apply what you learned.
Appendix.
The appendix should contain actual compiled data, notes and comments, equations, sketches, and schematics made
during the experiment. Include all of your pencil and paper work. All notes, calculations, derivations, measurements, and comments performed in an informal manner with pencil and paper. This material serves as reference and
back-up to the formally written material included above. Include any references to textbooks and papers.
References.
List any material contributed from other sources.

VI. References
1. H.T. Russell, Jr., An Algorithm for the Fast Generation of the Nodal-Analysis Matrix Equation of a Linear
Network, OPAL Engineering, Inc., 1995.

- 59 -

Lab Experiment No. 4

Network Theorems Part 1

I. Introduction
The purpose of this lab is to gain familiarity with several important Electrical Engineering theorems. The experiments
performed in this lab involve the following concepts
application of voltage division,
application of current division, and
superposition theorem.
The theory and equations associated with these experiments are covered in your class notes. Your job in this session is
to investigate and apply the above theorems on resistive networks to provide a hands-on experience to the theory covered
in the lectures on these topics. For each of the networks given below, use the parts supplied by the GTA, and the DMM
and dc power supply located on the lab bench.
II. Components and Instruments
The components and instruments required for this lab are listed below.
Resistors:
Network N1
Network N2
Network N3
100
3.3K
2K (2)
15K
1K (5)
2K (5)
270
5.1K
7.5K
24K
1.6K
10K (2) 30K (2)

Network N4
7.5K
15K
30K

Network N5
1K
5.1K
2.7K
6.8K
3.9K
8.2K
4.7K
Instruments:
Power supply
Agilent E3620A

Multimeter
Agilent 34401A

Additional:
Breadboard
Tool box
Hook-up wire
III. Experiment Procedures
Procedures for performing experiments on a collection of networks are attached. These experiments involve the theory
and applications covered in the lecture on voltage and current division, superposition, and reciprocity. In your lab report, provide detailed answers and discussions to the following
(a) With respect to resistor tolerance, are the results of the measurements within tolerance to calculated values using specified component values?
(b) Explain reasons for any discrepancies between calculated and measured results.
(c) How useful are these theorems and operations? Can you think of any specific applications?
IV. Application of Voltage Division
Voltage dividers play important roles in reference circuits. However, there is another application of the voltage divider
that is just as important. This application involves the indirect measurement of the terminal driving-point resistance of a
given network. Consider, for example, the network N shown in Figure 1. The driving-point resistance of N at terminals
AB is modeled by the resistance RAB which is unknown. A battery EG and resistor RG are connected to the network as
shown. The values for both of these components have been measured and are known. By measuring the voltage VAB,
the value of RAB can be calculated from the voltage divider theory. For the connection shown, VAB is written as
VAB =

RAB
EG
RAB + RG

- 60 -

(1)

RG

EG

VAB

RAB

Figure 1
Network N connected to EG and RG

Since RAB is the only unknown in this expression, it can be calculated from

RAB =

RG
EG
1
VAB

(2)

The result from this equation will be more accurate if the value of RG is selected to be very close to that of RAB. You are
to apply this method to measure the terminal input resistance of two networks.
A. Resistive network N1.
1. Build network N1 shown in Figure 2(a) on your breadboard using parts supplied by the GTA.
2. Measure the values of each resistor with the DMM and record in Table 1(a) where indicated.
3. Use network analysis operations to do the following:
a. calculate the value of the resistance at terminal 1 to ground of N1 (Rin1) using specified component values and
record in Table 1(b),
b. calculate the value of Rin1 using measured component values and record in Table 1(b), and,
c. use the DMM to measure the value of Rin1 and record in Table 1(b).
4. Connect terminals 1-0 of N1 to the 10V source and RG as shown in Figure 2(b) and do the following:
a. select a specified value of RG to be as close as possible to that of the calculated value of Rin1; record this value
in Table 1(c),
b. obtain this resistor from the GTA, measure its value, measure the value of EG, and record in Table 1(c),
c. measure the voltage V10 at terminal 1 to ground of N1 and record in Table 1(c),
d. apply the voltage divider operation to calculate the value of Rin1 using the measured values of EG, RG, and
V10; record in Table 1(c), and
e. calculate the difference () in percent between the DMM measured value of Rin1 and the value of Rin1 calculated from the voltage divider operation; use the DMM value as the basis with

(%) =

5.

Rin1 ( voltage divider ) Rin1 ( DMM )


Rin1 ( DMM )

(3)

record in Table 1(c) where indicated.


Provide comments on the accuracy of voltage division for calculating network input resistance with respect to resistor tolerance.

- 61 -

100%

R2
1.6K
1

R1

RG

100

270
R3

Rin1

R4

5.1K

R5

3.3K

EG

10V

V10

Rin1
N1

N1
(a)

(b)

Figure 2
(a) Network N1
(b) N1 in the voltage divider connection
Table 1(a)
N1 component values

Component

Specified value

R1

270

R2

1.6K

R3

5.1K

R4

100

R5

3.3K

Measured value

Table 1(b)
Rin1 from N1 (Figure 2(a))

Condition

Rin1 ()

Calculated from specified R values


Calculated from measured R values
Rin1 measured with DMM

Table 1(c)
Rin1 from voltage division (Figure 2(b))

RG specified
()

RG measured
()

EG measured
(V)

V10 measured
(V)

- 62 -

Rin1 calculated
()

(%)

B. Resistive network N2.


1. Build network N2 shown in Figure 3(a) on your breadboard using parts supplied by the GTA.
2. Measure the values of each resistor with the DMM and record in Table 2(a) where indicated.
3. Use resistor combination operations to do the following:
a. calculate the value of the resistance at terminals A-B of N2 (RAB) using specified component values and record
in Table 2(b),
b. calculate the value of RAB using measured component values and record in Table 2(b), and,
c. use the DMM to measure the value of RAB and record in Table 2(b).
4. Connect terminals A-B of N2 to the 10V source and RG as shown in Figure 3(b) and do the following:
a. select a specified value of RG to be as close as possible to that of the calculated value of RAB; record this value
in Table 2(c),
b. obtain this resistor from the GTA, measure its value, measure the value of EG, and record in Table 2(c),
c. measure the voltage VAB across terminals A-B of N2 and record in Table 2(c),
d. apply the voltage divider operation to calculate the value of RAB using the measured values of EG, RG, and
VAB; record in Table 2(c), and
e. use equation (3) to calculate the difference () in percent between RABs DMM measured value (3c) and
RABs value calculated from the voltage divider operation (4d), use the DMM value as the basis; record in
Table 2(c).
5. Provide comments on the accuracy of voltage division for calculating network input resistance with respect to resistor tolerance.
R1

R3

15K
R2

RAB
R9
B

30K
R8

10K 5

2K
30K R5

R4

7.5K

2K

N2
(a)

RG

EG

10V

VAB

B
(b)

Figure 3
(a) Network N2
(b) Voltage divider with N2

- 63 -

24K R6
R7

N2

10K

Table 2(a)
N2 component values

Component

Specified value

R1

15K

R2

30K

R3

2K

R4

30K

R5

24K

R6

10K

R7

2K

R8

7.5K

R9

10K

Measured value

Table 2(b)
RAB from N2 (Figure 3(a))

Condition

RAB ()

Calculated from specified R values


Calculated from measured R values
RAB measured with DMM

Table 2(c)
RAB from voltage division (Figure 3(b))

RG specified
()

RG measured
()

EG measured
(V)

VAB measured
(V)

- 64 -

RAB calculated
()

(%)

V. Application of Current Division


An important application of current division is applied in the design of a current output digital-to-analog converter
(DAC). These networks use binary scaled currents generated in a resistive ladder network called the R-2R ladder.
This network is responsible for repeatedly dividing the input reference current (Iref) into a series of branch currents
scaled by powers of 2. A typical R-2R ladder network is shown in Figure 4 where 1K and 2K resistors are used.

R-2R current divider network N3.


1. Build R-2R network N3 shown in Figure 4 on your breadboard using parts supplied by the GTA.
2. Measure the values of each resistor and the voltage source EG with the DMM and record in Table 3(a) where indicated.
3. Apply the current division operation to calculate values for the currents listed on the schematic and record in Table
3. Use specified resistor and voltage source values in these calculations.
4. Measure with the DMM these currents and record their values in Table 3.
5. Calculate the difference () in percent between the currents measured from the network (3) and those calculated
with specified component values (2) as the basis, and record in Table 3 where indicated.
6. Provide comments on the accuracy of the current divider network N3 for providing precise binary-weighted currents
resistor scaling and tolerance.
RG1 1K
Iref

R2
I1

RG2 1K
EG

12V

R1

2K

R4
I3

1K

R6
I5

1K

2K

R3

R5

1K

2K

R7

I7

I8

2K

R8
2K

N3

Figure 4
R-2R network N3
Table 3(a)
N3 component values

Component

Specified value

EG

12V

RG1

1K

RG2

1K

R1

2K

R2

1K

R3

2K

R4

1K

R5

2K

R6

1K

R7

2K
- 65 -

Measured value

R8

2K

Table 3(b)
N3 currents

Current

Calculated from current


division (A)

Measured from N3
(A)

(%)

Iref
I1
I3
I5
I7
I8
VI. Superposition
A. Resistive Network N4.
1. Build network N4 shown in Figure 5 on your breadboard using parts supplied by the GTA.
2. Measure the value of each resistor and each voltage source with the DMM and record in Table 4(a) where indicated.
3. With both sources connected and turned on, measure VAB and record its value in Table 4(a) where indicated.
4. Perform the following operations.
a. With EG1 turned on and EG2 turned off by replacing it with a short circuit, perform the following operations
i. calculate voltage VAB using the specified component values and record in the first row of Table 4(b),
ii. calculate voltage VAB using the measured component values and record in the first row of Table 4(b), and
iii. measure with the DMM voltage VAB from the breadboard and record in the first row of Table 4(b).
b. With EG2 turned on and EG1 turned off by removing it with a short circuit, perform the following operations
i. calculate voltage VAB using the specified component values and record in the second row of Table 4(b),
ii. calculate voltage VAB using the measured component values and record in the second row of Table 4(b),
and
iii. measure with the DMM voltage VAB from the breadboard and record in the second row of Table 4(b).
c. Apply the superposition theorem to do the following
i. calculate the total voltage for VAB by adding the values calculated from specified component values and
record in the third row of Table 4(b),
ii. calculate the total voltage for VAB by adding the values calculated from measured component values and
record in the third row of Table 4(b), and
iii. calculate the total voltage for VAB by adding the values measured from the breadboard and record in the
third row of Table 4(b).
d. Calculate the difference () in percent (%) between VAB measured directly from N4 (step 3) and the total VAB
calculated from superposition with measured values (step 3ciii); use the direct measured value as the basis.
5. Provide comments on the accuracy of superposition for providing precise voltage measurements and on the ease of
making these measurements.

- 66 -

R1

R2

30K

EG1

14V

15K
R3

VAB

7.5K

EG2

14V

N4
B

Figure 5
Network N4
Table 4(a)
N4 values

Component

Specified value

EG1

14V

EG2

14V

R1

30K

R2

15K

R3

7.5K

Measured value

VAB

Table 4(b)
N4 voltages from superposition

Voltage

Calculated from
specified R values
(V)

Calculated from
measured R values
(V)

Measured from N4
(V)

VAB (EG2 = 0)
VAB (EG1 = 0)
VAB (total)
B. Resistive network N5.
1. Build network N5 shown in Figure 6 on your breadboard using parts supplied by the GTA.
2. Measure the value of each resistor and each voltage source with the DMM and record in Table 5(a) where indicated.
3. With both sources connected and turned on, measure voltages VAB and VCD directly from N5 and record their values
in column 5 of Table 5(b) under Direct measurement where indicated.
3. Perform the operations similar to those performed in Part A.
a. With EG1 turned on and EG2 turned off by replacing it with a short circuit, measure voltages VAB and VCD, and
record in the first column of Table 5.
b. With EG2 turned on and EG1 turned off by replacing it with a short circuit, measure voltages VAB and VCD, and
record in the second column of Table 5.
c. Apply the superposition theorem to calculate the total measured values for VAB and VCD, and record in the
fourth column of Table 5(b).
- 67 -

d.
3.

Calculate the difference () in percent between VAB and VCD measured directly from N5 (fifth column) and VAB
and VCD calculated from superposition (fourth column) with the direct measured values as the basis. Record
these values in the last column of Table 5(b).
Provide comments on the accuracy of superposition for providing precise voltage measurements and on the ease of
making these measurements.
R1
1K
EG1

R2

A
N5

15V

5.1K

R3

D
8.2K

R5

6.8K

R4

4.7K

EG2

R6
C
3.9K

B
12V
R7
2.7K

Figure 6
Network N5
Table 5(a)
N5 component values

Component

Specified value

EG1

15V

EG2

12V

R1

1K

R2

8.2K

R3

5.1K

R4

6.8K

R5

4.7K

R6

3.9K

R7

2.7K

- 68 -

Measured value

Table 5(b)
N5 voltages

Voltage

Measured with
EG2 = 0
(V)

Measured with
EG1 = 0
(V)

Total from
superposition
(V)

VAB
VCD

- 69 -

Direct
measurement
(V)

(%)

Lab Experiment No. 5

Network Theorems Part 2

I. Introduction
The investigation of network theorems is continued in this lab. Part 2 of Network Theorems include experiments on the
following concepts
Thevenins theorem,
Nortons theorem,
reciprocity theorem, and
maximum power transfer.
The theory and equations associated with these experiments are again covered in your class notes. Your job in this session is to investigate and apply the above theorems on resistive networks to provide hands-on experience to verify and
demonstrate the theory covered in the lectures on these topics. For each of the networks given below, use the parts supplied by the GTA, and the DMM and dc power supply located on the lab bench.
II. Components and Instruments
The components and instruments required for this lab are listed below.
Resistors:
Network N2
Network N3
Network N1
1K
5.1K
1.5K
6.8K
1K
5.1K
2.7K
6.8K
3K (2)
12K
2.7K
6.8K
3.9K
8.2K
3.6K
15K
3.9K
8.2K
4.7K
4.7K

Network N4
100
1K (3)

Network N5
100
4.7K
300
5.1K (2)
1K (2)
6.8K (2)
2K
8.2K
2.7K
10K
3K
30K
3.9K
51K
Diode:
Network N4
1N4148
Instruments:
Power supply
Agilent E3620A

Multimeter
Agilent 34401A

Additional:
Breadboard
Tool box
Hook-up wire
III. Experiment Procedures
Procedures for performing experiments on a collection of resistive networks are attached. These experiments involve the
theory and applications covered in the lecture on Thevenins and Nortons equivalents, reciprocity, and maximum power
transfer. In your lab report, provide detailed answers and discussions to the following
(a) With respect to resistor tolerance, are the results of the measurements within tolerance to calculated values using specified component values?
(b) Explain reasons for any discrepancies between calculated and measured results.
(c) How useful are these theorems and operations? Can you think of any specific applications?

- 70 -

IV. Thevenins Equivalent


Resistive network N1.
1. Build network N1 shown in Figure 1(a) on your breadboard using parts supplied by the GTA.
2. Measure the values of the voltage sources and resistors with the DMM, and record in Table 1(a).
3. Apply basic network operations to do the following:
a. calculate values for the Thevenins voltage source ETH, Thevenins resistance RTH, and the current IL through
RL using the specified values of the components and record in Table 1(b),
b. calculate values for ETH, RTH, and IL using the measured values of the components and record in Table 1(b),
c. apply the DMM on N1 to measure values for ETH, RTH, and IL and record in Table 1(b), and
d. calculate the difference () in percent (%) between ETH, RTH, and IL measured from the network (c) and those
calculated with specified resistor values (a) as the basis, and record in Table 1(b) where indicated.
4. Provide comments on the accuracy and convenience of Thevenins equivalent for providing precise resistor currents
connected as loads to the network.
R1
1K
EG1
N1

R3

15V

R2
8.2K
A
R4

5.1K
B

4.7K

EG2

R5
3.9K

12V
R6
2.7K
(a)

N1TH

RTH

A
IL

ETH

VL

RL
6.8K

B
(b)

Figure 1
(a) Network N1
(b) Thevenins equivalent network

- 71 -

Table 1(a)
N1 component values

Component

Specified value

EG1

15V

EG2

12V

R1

1K

R2

8.2K

R3

5.1K

R4

4.7K

R5

3.9K

R6

2.7K

RL

6.8K

Measured value

Table 1(b)
N1 Thevenins equivalent

Component

Calculated from
specified R values

Calculated from
measured R values

Measured from N1

(%)

ETH
RTH
IL
V. Nortons Equivalent
Resistive network N2.
1. Build network N2 shown in Figure 2(a) on your breadboard using parts supplied by the GTA.
2. Measure the values of the voltage sources and resistors with the DMM, and record in Table 2(a).
3. Apply basic network operations to do the following:
a. calculate values for the Nortons current source JN, Nortons conductance GN, and the current IL through RL
using the specified values of the components and record in Table 2(b),
b. calculate values for JN, GN, and IL using the measured values of the components and record in Table 2(b),
c. apply the DMM on N2 to measure values for JN, GN, and IL and record in Table 2(b), and
d. calculate the difference () in percent (%) between JN, GN, and IL measured from the network (c) and those
calculated with specified resistor values (a) as the basis, and record in Table 2(b) where indicated.
4. Provide comments on the accuracy and convenience of Nortons equivalent for providing precise resistor currents
connected as loads to the network.

- 72 -

R1
N2

3K

3.6K

R2

EG1

R4

R5

EG2
3K

15K

6V
R3

12V

R6
B

1.5K

12K

(a)

N2N

A
IL

JN

GN

VL

RL
6.8K

B
(b)

Figure 2
(a) Network N2
(b) Nortons equivalent network
Table 2(a)
N2 component values

Component

Specified value

EG1

6V

EG2

12V

R1

3K

R2

15K

R3

1.5K

R4

3.6K

R5

3K

R6

12K

RL

6.8K

- 73 -

Measured value

Table 2(b)
N2 Nortons equivalent

Component

Calculated from
specified R values

Calculated from
measured R values

Measured from N2

(%)

JN
GN
IL
VI. Reciprocity and Reciprocal Networks
A. Resistive Network N3.
1. Build network N3 shown in Figure 3 on your breadboard using parts supplied by the GTA.
2. Measure the value of each resistor and voltage source with the DMM and record in Table 3(a) where indicated.
3. Perform the following operations.
a. Remove voltage source EG2 from the connection by replacing it with a short circuit. Turn on voltage source
EG1, measure its value, and record in Table 3(a) then
i. using specified component values, calculate current IG2 and transconductance YT21 from

YT 21 =

IG 2
EG1

(1)
EG 2 = 0

and record both IG2 and YT21 in Table 3(b) where indicated,
using measured component values, calculate current IG2 and transconductance YT21 and record both in Table 3(b) where indicated,
iii. measure with the DMM current IG2 from the breadboard and use it to calculate YT21; record both in Table
3(b) where indicated, and
iv. calculate the difference () in percent (%) between YT21 measured and YT21 calculated with specified component values as the basis, and record in Table 3(b).
Remove voltage source EG1 from the connection by replacing it with a short circuit. Turn on voltage source
EG2, measure its value, and record in Table 3(a) then
i. using specified component values, calculate current IG1 and transconductance YT12 from
ii.

b.

YT 12 =

I G1
EG 2

and record both IG1 and YT12 in Table 3(b) where indicated,
using measured component values, calculate current IG1 and transconductance YT12 and record both in Table 3(b) where indicated,
iii. measure with the DMM current IG1 from the breadboard and use it to calculate YT21; record both in Table
3(b) where indicated, and
iv. calculate the difference () in percent (%) between YT12 measured and YT12 calculated with specified component values as the basis, and record in Table 3(b).
Provide comments on the accuracy of your calculations and measurements for generating the transconductance
functions YT21 and YT12.
ii.

4.

- 74 -

(2)
EG 1 = 0

R1
1K
EG1
N3

R3

IG1

R2
8.2K

8V

5.1K

6.8K

R4

EG2

R6

R5

3.9K

4.7K

12V

IG2

R7
2.7K

Figure 3
Network N3
Table 3(a)
N3 component values

Component

Specified value

EG1

8V

EG2

12V

R1

1K

R2

8.2K

R3

5.1K

R4

6.8K

R5

4.7K

R6

3.9K

R7

2.7K

- 75 -

Measured value

Table 3(b)
N3 transconductances

Parameter

Calculated from
specified R values

Calculated from
measured R values

Measured from N3

Difference
(%)

IG2 (EG2 = 0) (A)


YT21(EG2 = 0) (S)
IG1 (EG1 = 0) (A)
YT12(EG1 = 0) (S)

B. Network N4.
1. Build network N4 shown in Figure 4 on your breadboard using parts supplied by the GTA.
2. Determine from measurements if N4 is reciprocal. Provide definite reasons why it is or is not.
R3 1K

V1

R1

D1

R4

1K

1N4148

100

R2

1K

V2

N7

Figure 4
Network N4
VII. Maximum Power Transfer
Resistive network N5.
1. Build network N5 (identical to network N1 in Figure 1(a)) shown in Figure 5 on your breadboard using parts supplied by the GTA.
2. Measure the values of the voltage sources and resistors with the DMM, and record in Table 5(a).
3. Connect the load resistors RL listed in Table 5(b) to terminals A-B and measure the corresponding load voltage VL,
load current IL, and load power PL. Record these measurements in Table 5(b) where indicated.
4. Generate a plot of PL (linear scale) versus RL (log scale) and indicate the maximum power PL(max) and corresponding RL (RL(opt)) on the plot.
5. Use the measured component values in Table 5(a) to calculate the optimal value for the load resistor RL (RLC(opt))
that will produce the maximum power delivered by N5 to the load. Calculate the maximum power PLC(max). Make
use of the Thevenins equivalent.
6. Calculate the difference () in percent (%) between the measured maximum power and the calculated maximum
power with the measured value as the basis, and record in Table 5(c).
7. Compare PLC(max) to PL(max) and RLC(opt) to RL(opt) and comment on the accuracy of the calculations and measurements of these terms.

- 76 -

R1
1K
EG1
N5

R3

R2
8.2K

15V

5.1K

VL

IL

RL

R4

4.7K

B
R5
EG2

3.9K

12V

R6
2.7K

Figure 5
Network N5
Table 5(a)
N5 component values

Component

Specified value

EG1

15V

EG2

12V

R1

1K

R2

8.2K

R3

5.1K

R4

4.7K

R5

3.9K

R6

2.7K

RL

6.8K

- 77 -

Measured value

Table 5(b)
N5 measurements

Specified RL
value ()

Measured RL
value ()

Load voltage
VL (V)

Load current
IL (A)

100
300
1K
2K
3K
5.1K
6.8K
10K
30K
51K

Table 5(c)
N5 maximum power transfer

Parameter

Measured value

Calculated value

RL(opt)
PL(max)

- 78 -

(%)

Load power
PL (W)

Lab Experiment No. 6

Amplifier Networks

I. Introduction
The purpose of this lab session is to gain familiarity with several well-known amplifier circuits built with standard operational amplifiers. The theory and derivations associated with each of the circuits listed below has been covered both in
class and in homework assignments. Basically, your job in this session is to design (where necessary), build, test, and
evaluate each of these circuits in order to expand your hands-on experience in working with operational amplifiers. For
each circuit listed below, use TLC274 operational amplifiers, standard 5% resistors, a 5 volt dc power supply, and an ac
signal generator. For measurements, use ac voltmeters, DVMs, and oscilloscopes.
II. Components and Instruments
The components and instruments required for this lab are listed below.
Components:
Resistors
510
5.1K
10K
18K
30K
39K
51K
10K single-turn potentiometer

Instruments:
Function generator
Agilent 33120A 15MHz
Power supply
Agilent E3620A

20K

Oscilloscope
Agilent 54621A 60MHz dual-channel
Multimeter
Agilent 34401A

Additional:
Breadboard
Tool box
Hook-up wire
Oscilloscope probes
III. Lab Assignment
Build and perform measurements on the following amplifier networks.

A. Amplifier No. 1. An inverting-gain amplifier with a dc voltage gain of -5.0 and an input resistance of 10.0K.
Measure and plot the magnitude of the voltage gain (dB) over frequency from 10Hz to 15MHz. Indicate on this plot
the -3dB bandwidth and calculate the amplifier GBW.
B. Amplifier No. 2. A non-inverting-gain amplifier with a dc voltage gain of +4.0 and an input resistance of 10.0K.
Measure and plot the magnitude of the voltage gain (dB) over frequency from 10Hz to 15MHz. Indicate on this plot
the -3dB bandwidth and calculate the amplifier GBW.
C. Amplifier No. 3. A dual-input difference amplifier with a dc voltage gain of 2.0 and input resistances of 10.0K.
Measure and plot the magnitude of the voltage gain (dB) for each input over frequency from 10Hz to 15MHz. Indicate on this plot the -3dB bandwidth and calculate the GBW for each input.
D. Amplifier No. 4. The dual-output audio panpot amplifier (see problem 1.25 Ref .1) shown in Figure 1. Determine
the 1KHz voltage gain at each output as the pot RP is varied over its full range.
E. Amplifier No. 5. The bridge amplifier (see problem 1.74 Ref. 1, Ref. 2) shown in Figure 2. Design this amplifier
for a differential output voltage gain of 8. Determine the maximum undistorted peak-to-peak voltage swing across
the load resistor RL at 1KHz.
IV. References
1. S. Franco, Design with Operational Amplifiers and Analog Integrated Circuits, 3rd Ed., The McGraw-Hill
Companies, Inc., New York, NY, 2002, (ISBN 0-07-232084-2).
2. NSC data sheet, LM4991, 3W Audio Power Amplifier with Shutdown Mode, Audio Power Amplifier Series, National Semiconductor Corporation, 2003.

- 79 -

R1L

R3L

5K

10K

R2L

20K

+5V

VoL

OAL

left channel
-5V
RP
10K
Vin

+5V
right channel
VoR

OAR

5K

10K

R1R

R3R

-5V

R2R 20K

Figure 1
Audio panpot amplifier
R1a

R2a

10K

+5V
Vo1

OA1

-5V

Vin

RL

Vo

510
R2b

R1b

Vo2

10K

+5V

OA2

-5V

Figure 2
Bridge amplifier
(aka Boomer Amplifier)

- 80 -

Lab Experiment No. 7

Op-Amp Test and Measurement

I. Introduction
The purpose of this lab exercise is to test an operational amplifier (op-amp) and to measure a set of its open-loop parameters. The results of these measurements provide important parameters for an op-amp data sheet. Your job in this lab
experiment is to apply test circuit OATC1 shown in Figure 1 to a given device under test (DUT). The description of this
test circuit and the procedures for taking measurements from the DUT are explained in the paper OATC1: A Universal
Test Circuit for Measuring Op-Amp Parameters attached to this experiment. Make use of the parts and the DUT supplied by the GTA, and the instruments located on the lab bench to perform this experiment.
II. Components and Instruments
The components and instruments required for this lab are listed below.
Components:
Op-amp: OP-07 (3)
LM741 DUT
Capacitors: 300nF, NPO multilayer ceramic
Resistors:
100 (2)
2K (5)
30K
51K (3)
100K (2)
Potentiometer:
10K, trimpot

Instruments:
Power supply
Agilent E3620A
Function generator
Agilent 33120A

Multimeter
Agilent 34401A
Oscilloscope
Agilent 54621A

Additional:
Breadboard
Tool box
Hook-up wire
III. Op-amp Parameters and the Data Sheet
Download the data sheet for the LM741 op-amp. From this data sheet, extract the parameters listed in Table 1. Fill out
the first column in Table 1 with these parameters. Build test circuit OATC1 on your breadboard with the LM741 connected as the device under test (DUT). Apply the procedures outlined in the attached paper to measure the parameters
listed in Table 1. Fill out the second column of Table 1 with these measured values.
IV. Compare and Comment
(a)
Compare the parameter values listed in Table 1. How close are the LM741 data sheet parameters to those from
actual measurements? How useful is the test circuit OATC1 for generating a data sheet for an op-amp?
(b)
Comment on any major differences among the data in Table 1. Determine reasons for these differences.
V. References
1. V. Pua, H.T. Russell, Jr., W.A Davis, and R.L. Carter, A Comparison of Operational Amplifier Test Circuits, 9th
IEEE Emerging Technologies Conference (ETC 2006), Richardson, TX, September 15, 2006.
2. S. Franco, Design with Operational Amplifiers and Analog Integrated Circuits, 3rd Ed., The McGraw-Hill
Companies, Inc., New York, NY, 2002, (ISBN 0-07-232084-2).
VI. Attachments
1. H.T. Russell, Jr., OATC1: A Universal Test Circuit for Measuring Op-Amp Parameters, Department of EE,
UTA, November, 2009.

- 81 -

R7
51K

R3
1

+Vpsp

R4

100

100K

In

100

100K

Ip

R1

R2

Vic

+5V 2K

R5
Vo

R9

2K
OP07

+5V

300nF

2K

DUT

-Vpsn

CC

RC 30K

R8

S4

Vo1

U1

R6
-5V

2K

Vo2

OP07
U2
-5V

Vid

S2

(a)

+5V

Rp
10K
OP07

Vid or Vic
U3
RF3

-5V

2K

(b)

Figure 1
Op-amp test circuit OATC1
Table 1
DUT parameters
(Vpsp/Vpsn = 10V, RL = 2K, T = 27C)

Parameter

LM741
Data sheet

Description

Units

Vos

Input offset voltage

IB

Input bias current

IBOS

Input bias offset current

Pdiss

Power dissipation

CMRR

Common-mode rejection ratio

dB

PSRRp

Positive power supply rejection ratio

dB

PSRRn

Negative power supply rejection ratio

dB

Gvdm(0)

Open-loop dc differential-mode voltage gain

V/V

Gvcm(0)

Open-loop dc common-mode voltage gain

V/V

- 82 -

OATC1

The University of Texas at Arlington


Department of Electrical Engineering

Dr. H.T. Russell, Jr.

OPALtx
November 2009
OATC1: A Universal Test Circuit for
Measuring Op-Amp Parameters

The circuit shown in Figure 1(a) is the test circuit OATC1 for the measurement of a variety of operational amplifier parameters. This circuit is an adaptation of the one shown on Intersil Corporations application note AN551.1
entitled Recommended Test Procedures for Operational Amplifiers. You may download this note from the company web site www.intersil.com. A similar circuit may be found in problem 5.27 on pages 246-247 of Sergio Francos textbook2.
R7
51K

+Vpsp

R3

R4

100

100K

In

100

100K

Ip

R1

R2

Vo

300nF

2K
OP07
U1

R6

-Vpsn

+5V

R9

2K

DUT
2

Vic

+5V 2K

R5

CC

RC 30K

R8

S4

U2

-5V

2K

Vo2

OP07

Vo1

-5V

Vid

S2

(a)

+5V

Rp
10K
Vid or Vic

OP07
U3
RF3
-5V

2K

(b)

Figure 1
(a) OATC1 op-amp test circuit
(b) dc voltage generator

The Vpsp and Vpsn dc voltage rails are nominal power supply voltages required to bias the device under test
(DUT) while Vid and Vic represent differential-mode and common-mode input voltages to the DUT. These voltages
are obtained from the circuit shown in Figure 1(b) which generates a low-impedance dc voltage set by Rp. Resistor
values shown on the schematic are typical with 1% tolerances and can be changed if necessary. Assuming that the
OP07s in this circuit are ideal op-amps, routine circuit analysis produces the following low-frequency, small-signal
expression for the output voltage Vo2.
Vid =

F R I F R I G bV
GH R JK GH R + R JK
6

vdm

o2

g FGH RR IJK G

Vic

vcm Vic

F R I G dV
GH R JK
6

vdm

os

+ R p I p Rn In

S. Franco, Design with Operational Amplifiers and Analog Integrated Circuits, 3nd Ed., The McGraw-Hill Companies, Inc., New York, NY,
2001.

- 83 -

(1)

where

Rp = R1 + R2
Rn = R4 +

(2)

R3 R7
R3 + R7

These equations are used in the procedures that follow to measure a series of low-frequency op-amp parameters. In
these procedures, the indicated changes in Vid and Vic are provided by the dc voltage generator with values.
1.

Input offset voltage Vos


a. close switches S2 and S4,
b. set Vic and Vid to zero by connecting pins 1 and 2 to ground,
c. measure Vo2 with a dc voltmeter,
d. calculate Vos from
Vos =

F R IV
GH R + R JK
3

2.

(3)

o2

Open-loop differential-mode voltage gain Gvdm


a. close switches S2 and S4,
b. set Vic to zero by connecting pin 1 to ground,
c. connect the output of the signal generator to pin 2 for Vid,
d. adjust Rp to change the dc value of Vid to get

af

af

Vid = Vid 1 Vid 2


e.

(4)

measure the corresponding dc values of Vo2 to get

af

af

Vo2 = Vo2 1 Vo2 2


f.

(5)

calculate Gvdm from


Gvdm =

F R I F1 + R I 1
GH R JK GH R JK F V I
GH V JK
5

(6)

o2
id

3.

Common-mode rejection ratio CMRR


a. close switches S2 and S4,
b. set Vid to zero by connecting pin 2 to ground,
c. connect the output of the signal generator to pin 1 for Vic,
d. adjust Rp to change the dc value of Vic to get

af a f

Vic = Vic 1 Vic 2


e.

(7)

measure the corresponding dc values of Vo2 to get

af

af

Vo2 = Vo2 1 Vo2 2

(8)

- 84 -

f.

4.

calculate CMRR from


R
1
CMRR = 1 + 7
R3
Vo 2
1
Vic

1
Rp

LMF R I V
MNGH R + R JK
3

o2

+ Vos

OP
PQ

(10)

Negative input terminal current In


a. close switch S2, open switch S4,
b. set Vic and Vid to zero by connecting pins 1 and 2 to ground,
c. measure Vo2 with a dc voltmeter,
d. calculate In from
In =

6.

(9)

IJ
K

Positive input terminal current Ip


a. open switch S2, close switch S4,
b. set Vic and Vid to zero by connecting pins 1 and 2 to ground,
c. measure Vo2 with a dc voltmeter,
d. calculate Ip from
Ip =

5.

I
JK F
GH

F
GH

1
Rn

LMF R I V
MNGH R + R JK
3

o2

+ Vos

OP
PQ

(11)

Input bias current IB and input bias offset current IBOS


a. calculate IB and IBOS from

IB =

I p + In
(12)

2
I BOS = I p I n
Example. Four 741-type op-amps were tested with this circuit. Circuit values for the DUT are given below.

VCC = 5.06V
VEE = 5.05V

(13)

R7 = 51K
Data for Vos
Unit

Vo2 (V)

Vos (V)

7001

-0.294

575.3

7014A

-0.238

465.7

2E23

-0.157

307.2

D34

-0.0634

124.1

- 85 -

Data for Gvdm


Unit

Vid(1) (V)

Vo2(1) (V)

Vid(2) (V)

Vo2(2) (V)

Gvdm (V/V)

7001

-1.012

-0.316

+1.023

-0.276

26.00K

7014

-1.001

-0.258

+1.069

-0.221

28.59K

2E23

-1.049

-0.1603

+1.038

-0.1599

2.67M

D34

-1.093

-0.0668

+1.096

-0.0666

5.59M

Data for CMRR


Unit

Vic(1) (V)

Vo2(1) (V)

Vic(2) (V)

Vo2(2) (V)

CMRR

7001

-1.029

-1.294

+1.069

0.757

22.81K

7014

-1.075

-1.301

+1.069

0.819

45.65K

2E23

-1.016

-1.162

+1.044

0.878

52.63K

D34

-1.018

1.065

+1.048

0.974

39.10K

- 86 -

Appendix 1

Breadboard Layout Examples


EE 1105
Bread board layout techniques
September 13, 2008
HTR, Jr.

binding post
(black)

binding post
(red)

R3

R1

1K

R2
33K
Figure 1
Resistor network schematic

Figu re 2
Wrong way off the board with loops

- 87 -

200K

Figure 3
Right way - low to the board and tight

Figure 4
Right way low to the board and even tighter

- 88 -

Breadboard layout examples


HTR, Jr.
February, 25, 2009

- 89 -

- 90 -

Appendix 2

Lab Measurement Example


Lab Measurement Example 1
R1

R2

10K
Vps

3.3K

56K

680

R5

R3

10V
R6
B

56K

R4
2

Figure 1
Network schematic

Figure 2
Breadboard layout

- 91 -

51K

Table 1
Voltage, current, and power map

Element voltage
Nodes
Element

Specified
value

Measured
value

R1

10K

9.8251K

R2

3.3K

3.2624K

R3

680

684.22

R4

51K

50.294K

R5

56K

55.175K

R6

56K

55.158K

Vps

10V

Element current
Nodes

Measured
value (V)

Calculated
value (A)

Table 2
Kirchhoff current law

Node

Total current
into (Iin) (A)

Total current
out of (Iout) (A)

1
2
3
4
A
B

- 92 -

KCL
(Iin Iout) (A)

Element
power (W)

Table 3
Kirchhoff voltage law

Circuit

Total cw voltage
drop (Vcw) (V)

Total ccw voltage


drop (Vccw) (V)

Vps, R1,
R5, R6
R5, R2, R3,
R4
Vps, R1,
R2, R3, R4,
R6

- 93 -

KVL
(Vcw Vccw) (V)

Lab Measurement Example 1

Solutions
R1

R2

10K
Vps

3.3K

56K

680

R5

R3

10V
R6
B

56K

R4
2

Figure 1
Network schematic

Figure 2
Breadboard layout

- 94 -

51K

Table 1
Voltage, current, and power map

Element voltage
Nodes

Element current
Nodes

Measured
value

Measured
value (V)

Calculated
value (A)

Element
power (W)

10K

9.8251K

1.09245

111.1897

121.4692

R2

3.3K

3.2624K

0.18271

56.00478

10.23263

R3

680

684.22

38.073m

55.64438

2.118549

R4

51K

50.294K

2.8199

56.06832

158.1071

R5

56K

55.175K

3.0406

55.10829

167.5623

R6

56K

55.158K

6.1287

111.1117

680.9704

Vps

10V

10.0147V

10.2831

-111.4

1.145537m

Element

Specified
value

R1

Table 2
Kirchhoff current law

Node

Total current
into (Iin) (A)

Total current
out of (Iout) (A)

KCL
(Iin Iout) (A)

(IR1)
111.1897

(IR2 + IR5)
111.1131

76.63n
(0.069%)

(IR4 + IR5)
111.1766

(IR6)
111.1117

64.91n
(0.058%)

(IR3)
55.64438

(IR4)
56.06832

423.9366n
(0.762%)

(IR2)
56.00478

(IR3)
55.64438

360.4n
(0.648%)

(IR1 + Ips)
210.3n

210.3n
(0.189%)

(Ips + IR6)
-288.3n

288.3nA
(0.259%)

- 95 -

Table 3
Kirchhoff voltage law

Circuit

Total cw voltage
drop (Vcw) (V)

Total ccw voltage


drop (Vccw) (V)

KVL
(Vcw Vccw) (V)

Vps, R1, R5, R6

(VR1 + VR5 + VR6)


10.26175

(Vps)
10.2831

21.35m
(0.208%)

R5, R2, R3, R4

(VR2 + VR3 + VR4)


3.040683

(VR5)
3.0406

83
(0.0027%)

Vps, R1, R2, R3,


R4, R6

(VR1 + VR2 + VR3 + VR4 + VR6)


10.26183

(Vps)
10.2831

21.267m
(0.207%)

R1

R2

10K
Vps

3.3K

R5

56K

R3

680

10V
R6
B

56K

R4
2

51K

Figure 3
Oriented network schematic

Total power dissipated by resistors (delivered to resistors) = 1.14046mW


Total power delivered by the power supply
= 1.145537mW
Absolute difference (%)
= 5.076W (0.445%)

- 96 -

Appendix 3

Bills of Material
Lab 1
Bill of materials (BOM)

Resistors
100
820
1K
Capacitors
10nF
Inductors
680H

- 97 -

Lab 2
Bill of materials (BOM)

Resistors
100 (2)
1.2K (2)
2.4K (2)
3.3K
5.1K
7.5K
30K

120
1.8K
2.7K (2)
3.6K
5.6K
10K (3)
100K (2)

Active devices:
TLC274 op-amp

2N3819 NJFET

1K (2)
2K (2)
3K
4.7K
6.8K
20K
10K trimpot

- 98 -

Lab 3
Bill of materials (BOM)

No electronic components or instruments are required for this lab experiment.

- 99 -

Lab 4
Bill of materials (BOM)

Resistors
100
2K (5)
4.7K
8.2K
30K (2)

270
2.7K
5.1K
10K (2)

1K (5)
3.3K
6.8K
15K

1.6K
3.9K
7.5K
24K

- 100 -

Lab 5
Bill of materials (BOM)

Resistors:
100
2K
3.9K
8.2K
30K

300
2.7K
4.7K
10K
51K

1K (3)
3K (2)
5.1K (2)
12K

1.5K
3.6K
6.8K (2)
15K

Diode:
1N4148

- 101 -

Lab 6
Bill of Materials

Part

Description

Op-amp

TLC274, quad CMOS op-amp, plastic


encapsulated

Resistor

510, 1/4W, 5%, carbon film resistor

Resistor

5.1K, 1/4W, 5%, carbon film resistor

Resistor

10K, 1/4W, 5%, carbon film resistor

10

Resistor

18K, 1/4W, 5%, carbon film resistor

Resistor

20K, 1/4W, 5%, carbon film resistor

Resistor

30K, 1/4W, 5%, carbon film resistor

Resistor

39K, 1/4W, 5%, carbon film resistor

Resistor

51K, 1/4W, 5%, carbon film resistor

Pot

10K, 1/4W, single turn potentiometer

Misc.

Wire

- 102 -

Count

Lab 7
Bill of materials (BOM)

Active devices:
OP-07 op-amp (3)

LM741 DUT

Resistors:
100 (2)
51K (3)

2K (5)
100K (2)

30K
10K trimpot

Capacitors:
300nF, NPO multilayer

- 103 -