Es1 Final

EXPERIMENT NO:-1
1. Program Statement:Write a program to find largest number from array having 20 numbers of 8 bit unsigned
type which is stored in external data memory from 1000H onwards. Save the result in 1020H
(external data memory).
2. Software Used For Simulation: - MCU 8051 IDE v1.4.

3. Program code:Line
No
Address
Label
1.
Program
(Mnemonics)
Program
(Opcodes)
ORG 0000H
Description of Instruction
START PROGRAM FROM 0000H
2.
0000H
MOV R1,#20
79,14
3.
0002H
MOV DPTR,#1000H
90,10,00
4.
0005H
MOVX A,@DPTR
E0
5.
0006H
MOV B,A
F5, F0
6.
0008H
INC DPTR
A3
7.
0009H
MOVX A,@DPTR
E0
8.
000AH
CJNE A,B,DOWN1
B5,F0,02
9.
000DH
SJMP DOWN
80,04
TAKE NEXT DATA FROM DPTR

TO A
FIND MAX NO. (IF A/=B THEN
JUMP TO )
IF A=B THEN CONTINUE
10.
000FH
JC DOWN
40,02
JUMP IF CARRY (A>B)
11.
0011H
MOV B,A
F5,F0
MOVE A TO B
12.
0013H
DJNZ R1,UP
D9,F3
13.
0015H
MOV A,B
F5,F0
DECREMENT R1,( IF NOT ZERO

JUMP TO)
MOVE B TO A
14.
0017H
MOV DPTR, #1020H
90,10,20
15.
001AH
MOVX @DPTR,A
F0
16.
001BH
SJMP LOOP
80,FE
17.
UP
DOWN
1
DOWN
LOOP
INITIALISE MEMORY
COUNTER
INITIALISE MEMORY POINTER
MOVE THE CONTENTS
POINTED BY DPTR TO A
MOVE DATA FROM ATO B
REGISTER
INCREMENT DPTR
ALLOTE 1020H LOCATION TO

DPTR
STORE LARGER NO. TO DPTR
LOCATION
SHORT JUMP WITHIN THE
LOOP
END
1
4. Theory:Microcontrollers: It is a general purpose device but one that is mean to read data, performs
limited calculations on that data and control its environment based on those calculations. The
prime use of a microcontroller is to control the operation of a machine using a fixed program that
is stored in RAM and that does not change over the lifetime of the system.
External Memory: In this program we are using the external RAM memory to store the data. In
the microcontroller two separate external memory spaces are made available by the 16-bit PC
and DPTR and by different control pins for enabling external RAM and ROM chips. In this
program we are using 1K RAM to store the data.
In this program we are using the logic to find the largest no. from the array of 20
numbers. For that we use two register (A & B) the 1st data is moved to the reg. A and then to reg.
B and second data is moved to the reg. A. Then we compare both the data of registers, and if the
content of A is not equal to the content of B then jump in the loop DOWN1 otherwise jump in
the loop DOWN. This process continues till the counter becomes zero. Then the greatest number
is stored in reg. A and the result is stored in memory location 1020H.
5. Flowchart:START
Initialize memory counter to 20H

Initialize memory pointer to 1000H
Take first data to accumulator
Move the data from reg. A to reg. B
Increment DPTR to next address

Move the data from memory pointed by DPTR to A
Yes
IF AB
No
Short jump to down
Yes
If CF=1
No
Move data from reg. A to reg. B
Decrement R1
Yes
IF R10
No
Move data from reg. B to reg. A
Set data pointer to 1020H location
Move the data from A to 1020H memory location
3
END
6. Result:-The program has been executed and the result is stored in memory location 1020H.
MEMORY
ADDRESS
1000H
1001H
1002H
1003H
1004H
DATA
1005H
1006H
1007H
1008H
1009H
1010H
60H
70H
80H
90H
21H
22H
1011H
1012H
1013H
1014H
1015H
1016H
23H
24H
26H
37H
46H
30H
1017H
1018H
1019H
50H
67H
78H
1020H
90H
10H
20H
30H
40H
50H
EXPERIMENT NO: - 2
1. Program statement:
Write a program to generate a square wave of period 10 ms by using timer.
2. Software used for simulation: MCU 8051 IDE version 1.4.7
Keil software
Proteus 7.2
3. Program code: Generate square wave using TIMER 1 IN MODE 1
Line
No.
Address
Label
Program
(Mnemonics)
Program Description of
(Opcodes) Instruction
ORG 0000H
0000H
MOV
TMOD,#10H
MOV
TL1,#00H
MOV
TH1,#0EEH
SETB TR1
75,89,10
TIMER 1,MODE 1
0003H
75,8B,00
TL=00 LOW BYTE
0006H
75,8D,EE
TH1=EE HIGHER BYTE
0009H
D2,8E
START TIMER 1
000BH
JNB TF1,BACK
30,8F,FD
000EH
CLR TR1
C2,8E
REMAIN UNTIL THE

TIMER ROLLS OVER
STOP TIMER 1
7
8
0010H
CPL P0.1
B2,81
0012H
CLR TF1
C2,8F
COMPLEMENT THE
BIT
CLEAR TIMER FLAG
11
0014H
SJMP AGAIN
80,ED
RELOAD COUNETR
12
AGAIN:
BACK
END
4. Theory:-Square wave generation using 8051.

Using software delay subroutines square waves over a wide frequency range (limited by
the crystal frequency) can be produced using 8051. The idea is very simple to run a
subroutine with delay equal to half the time period of the square wave, complement any port
pin after the delay routine is finished, repeat the delay subroutine again, complement the
same port pin again and repeat the cycle again and again over time. This will result in a
square wave of the required frequency at the corresponding port pin. Basic register of timer
in 8051 are Timer0 and Timer1 register. Timer 0 and Timer 1 are 16 bit register and they can
be accessed as low byte and high byte. For Timer0, low byte register is TL0 and higher byte
is TH0 and for timer1, low byte is TL1 and TH1.
D15 D14 D1
3
D1
D1
D1
D9 D8 D7 D6 D5 D4 D3 D2 D1 D
0
TH0
TLO
Timer 0 register
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D

0
TH1
TL1
Timer 1 register
4.1TMOD: As we are generating square wave by using timer.
We are using TMOD and
TCON also. We are generating square wave using timer one in mode 1 as well as mode 2. The
experiment uses Timers in modes 1 and 2. Mode 1 combines the two Timer registers to form a
16 bit register, comprising Timer High byte (TH) and Timer Low byte (TL). Mode 2 sets the
Timer Low byte (TL) as the working 8 bit register and Timer High byte (TH) as the reload
register. In mode 2 the TL register is automatically reloaded from the TH register with present
value, after roll-over. Also the Timer roll-over Flag (TF) is automatically cleared.
6
The Timer modes are set by the Gate, C/T, M1 and M0 Timer MODE register (TMOD).
GATE
C/T
M1
M0
GATE
C/T
TIMER 1
Bit Name
7
Timer
M1
M0
TIMER 0
Description
Gate
Gate bit: when set, timer1 only runs while INT1 is high
C/T
Counter Timer select bit: 1 = Counter, 0 = Timer
M1
Mode bit 1: See table below
M0
Mode bit 0: See table below
Gate
Gate bit: when set, timer0 only runs whileINT0 is high
C/T
Counter Timer select bit: 1 = Counter, 0 = Timer
M1
Mode bits 1: See table below
M0
Mode bits 0: See table below
M1
M0
Mode
Description
13-bit timer mode (compatibility with 8048)
16-bit timer mode
8-bit timer mode Auto-reload Mode
split timer mode
Timer 0: TL0 is an 8-bit timer controlled by timer 0 mode

bits; TH0, the same except controlled by timer 1 mode bits.
Timer1: stopped
4.2TCON:
The Timer is turned on by setting TR = 1 in the Timer control register TCON, TR = 0 turns
off the Timer.
TCON (Timer Control)
TF1
TR1
Bit
TF0
Symbol
TR0
IE1
IT1
IE0
IT0
Description
TCON.7
TF1
Timer 1 overflow Flag
TCON.6
TR1
Timer 1 run control Flag
TCON.5
TF0
Timer 0 overflow Flag.
TCON.4
TR0
Timer 0 run control Flag.
TCON.3
IE1
External Interrupt 1 edge flag
TCON.2
IT1
External Interrupt 1 Type flag
TCON.1
IE0
External Interrupt 0 edge flag.
TCON.0
IT1
External Interrupt 0 Type flag.
5. Calculation:
FOR MODE 1
Crystal oscillator frequency = 11.0592 MHz
Timer controls with clk frequency of 1/2th of crystal frequency
F=11.0592/12
= 0.921MHz
Time period :T= 1/0.921*10^6
=1.085*10^-6 sec
Duty cycle is 50% .Hence Ton is 5ms and Toff is 5ms.
Required Delay= 5*10^-3
Required Count = 5*10^-3/1.085*10^-6=4608
Maximum possible value that can be stored in Reg. TL1 and TH1= 65536
8
Initial value to be loaded in Reg. TL1 and TH1= 65536 - 4608

= 60928 (decimal)
= EE00 (Hex)
6. Flowchart:FOR TIMER 1 IN MODE 1

START
SELECTING TIMER 1
LOAD COUNT VALUE 00H IN TL1
LOAD COUNT VALUE EEH IN TH1
TO RUN THE TIMER 1 SET TR1
TF1=0
MONITOR TF1
TF1=1
CLEAR TIMER
COMPLEMENT P0.1
CLEAR TF1
SJMP AGAIN
End
9
7. Hardware Description Diagram
10
8. Result:
A square wave of time period 10 ms is generated by using mode 1 operation and Timer
register1.Mode of operation and Timer register is selected by loading the value in TCON
register by loading value in EE00H in Timer register 1(i.e. TH1 and TL1).Thus Square
wave of desired time period is obtained.
11
EXPERIMENT NO: - 3
1. Program Statement:Write a program to transfer message MTECH VLSI serially at baud rate 9600 baud, 8bit data and 1 stop bit.
2. Software used for simulation:-Pinnacle 52

No.
1.
Address
Label
Program
(Mnemonics)
ORG 0000H
Program
(Opcodes)
2.
0000H
MOV TMOD,#20H 75 89 20
3.
0003H
MOV TH1,#0FDH
75 8D FD
4.
0006H
MOV SCON,#50H
75 98 50
5.
0009H
MOV R1,#03H
79 03
8-BIT DATA, 1 START BIT AND 1

STOP BIT
SET COUNTER
6.
000BH
SETB TR1
D2 8E
START TIMER 1
7.
000DH
MOV A, #M
74 4D
TAKE 1ST CHARACTER IN ACC
8.
000FH
ACALL TRANS
11 53
CALL SUB ROUTINE TRANS
9.
0011H
MOV A, #T
74 49
10.
0013H
ACALL TRANS
11 53
11.
0015H
MOV A, #E
74 43
12.
0017H
ACALL TRANS
11 53
13.
0019H
MOV A, #C
74 52
14.
001BH
ACALL TRANS
11 53
15.
001DH
MOV A, #H
74 4F
16.
001FH
ACALL TRANS
11 53
17.
0021H
MOV A, #V
74 20
18.
0023H
ACALL TRANS
11 53
RPT
TIMER IN MODE 2(AUTO

RELOAD MODE)
BAUD RATE OF 9600 BAND
12
19.
0025H
MOV A, #L
74 43
20.
0027H
ACALL TRANS
11 53
21.
0029H
MOV A, #S
74 4F
22.
002BH
ACALL TRANS
11 53
23.
002DH
MOV A, #I
74 4E
24.
004BH
ACALL TRANS
11 53
25.
004DH
MOV A, #
74 20
26.
004FH
ACALL TRANS
11 53
27.
0051H
DJNZ R1,RPT
D9 BA
28.
0053H
TRANS MOV SBUF, A
F5 99
DECREASE COUNTER AND

REPEAT IF COUNTER NOT
EQUAL TO ZERO
MOV A DATA TO SBUF
29.
0055H
HERE
JNB T1, HERE
30 99 FD
IF TI NOT 0 THEN HERE
30.
0058H
CLR T1
C2 99
CLEAR INTERRUPT REG
31.
005AH
RET
22
RETURN
32.
005BH
END
END OPERATION
4. Theory:
Data Transfer:
SENDER
RECEIVER
SENDER
RECEIVER
Fig1. SERIAL COMMUNICATION
Fig.2 PARALLEL COMMUNICATION
13
Serial Communications:
Serial communications send a single bit at a time. This only requires a single
communication channel, as opposed to 8 channels to send a byte. With only one channel the
costs are lower, but the communication rates are slower. The communication channels are often
wire based, but they may also be can be optical and radio. It uses two methods as follows:
1. Synchronous data transfer

Synchronous data transmission is one in which the data is transmitted by synchronizing
the transmission at the receiving and sending ends using a common clock signal. Since start and
stop bits are not present, this allows the use of transmission bandwidth for more message bits and
makes the whole transmission process simpler and easier.
2. Asynchronous data transfer

The term asynchronous is usually used to describe communications in which data can be
transmitted bit vise rather than in a block of data. For example, a telephone conversation is
asynchronous because both parties can talk whenever they like. If the communication were
synchronous, each party would be required to wait a specified interval before speaking.
Asynchronous Serial Communication:

Asynchronous serial communication is widely used for character-oriented (1 byte)
transmissions. In asynchronous method, each character is placed in between start and stop bits.
This is called as Framing.
Start and stop bits

FRAMING
ASCII CHARACTER
STOP BIT
One or two bits 1
Go out last!
D7 D6 D5 D4 D3 D2 D1 D0
Data bits
START BIT
only one bit 0
Go out first!
RS232 Standards:
RS232 is set by Electronics Industries Association (EIA) in 1960. RS232 is a serial I/O
interfacing standard; however, since the standard was set long before the advent of the TTL logic
14
family, its input and output voltage levels are not TTL compatible. TTL is Transistor-Transistor
Logic family (Bipolar transistor) in 1968.
MAX232:
RS232 is not compatible to TTL. For this reason, to connect any RS232 to a
microcontroller system, we must use Voltage Converters such as MAX232 to convert the TTL
logic levels to the RS232 voltage levels, and vice versa.
A MAX232 IC chips is referred to as Line Driver.
Baud Rate:
The transmission speed is the maximum number of bits that can be sent per second. The
unit for this is baud. The baud rate includes the start, parity and stop bits.
11.0592 MHz
XTAL
Oscillator
/12
Machine cycle freq.
/32
921.6kHz
By UART
11.0592MHz/12
= 921.6 KHz
28800Hz
To Timer 1
To set the baud rate
921.6KHz/32
= 28800 Hz
BAUD RATE
TH1(decimal)
TH1(Hex)
9600
-3
FD
4800
-6
FA
2400
-12
F4
1200
-24
E8
TMOD Register:
TMOD is use to set various timer mode or counter. Both timer 0 and 1 uses the same
register.
15
(MSB)
(LSB)
GATE
C/T
M1
M0
GATE
C/T
TIMER 1
M1
M0
TIMER 0
SBUF Register:
SBUF is physically two registers. One is write only and is used to hold data to be
transferred out of the 8051 via TxD line. The other is read only and received the data from
external source via RxD line. Both mutually exclusive registers use address 99H.
SCON Register:
Mode 0, 2, and 3 are ready used today. Mode 1 is compatible with the COM port of IBM
PC. Mode 1 allows the baud rate to be variable and is set by Timer 1 of 8051.
SM0
SM1
SM2
REN
SM0
SM1
MODE
TB8
RB8
TI
RI
8 bit data, 1 start bit, 1 stop bit
16
5. Flow Chart:START
SET THE TIMER MODE
SET THE REQUIRED BAUD RATE
SET COUNTER
START TIMER
MOVE CHARACTER M IN REG A
MOVE CHARACTER M IN REG A
DECREASE COUNTER
COUNTER
=0
NO
YES
YES
SUB ROUTINE: MOVE REG
A TO SBUF
17
TI BIT =
1
NO
YES
CLEAR INTEREPUT REGISTER
RETURN
STOP
Before Execution:
18
After Execution:
6. Result and Conclusion:We have successfully transfer message MTECH VLSI serially at band rate 9600 band,
8-bit data and 1 stop bit.
19
EXPERIMENT NO:-4
1. Program Statement: - Draw and explain interfacing of 16X2 LCD display with 8051.
Write a program for display as given belowLine 1 VLSI DESIGN
2. Software Used For Stimulation: KEIL UVISION4

PROTEUS VERSION 7.2
3. Program code :Line Address

No.
Label
Program
(Mnemonics)
Program
(Opcodes)
Description of
Instruction
1.
ORG 0000H
2. 0000H
MOV A, #38H
74,38
3. 0002H
ACALL COMMAND
11,75
4. 0004H
ACALL DELAY
11,8F
ORGANISE WITH
0000H ADRESS
INTIALISE LCD 2
LINES, 5*7 MATRIX
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
5. 0006H
MOV A, #0EH
74, 0E
CLEAR LCD
6. 0008H
ACALL COMMAND
11, 75
7. 000AH
ACALL DELAY
11, 8F
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
8. 000CH
MOV A, #01H
74, 01
9. 000EH
ACALL COMMAND
11, 75
10. 0010H
ACALL DELAY
11, 8F
MOV A,#18H
74, 18
ACALL COMMAND
11,75
0012H
11. 0014H
SHIFT ENTIRE
DISPLAY TO THE
LEFT
CALL COMMAND
SUBROUTINE
20
12.
ACALL DELAY
11,8F
PROVIDE DELAY
0016H
13. 0018H
MOV A,#81H
74, 81
14. 001AH
ACALL COMMAND
11,75
15. 001CH
ACALL DELAY
11, 8F
FORCE CURSOR TO
BEGINNING OF 1ST
LINE
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
16. 001EH
MOV A,# V
74, 56
DISPLAY LETTER B
17. 0020H
ACALL DATA 1
11, 82
18. 0022H
ACALL DELAY
11, 8F
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
19. 0024H
MOV A,#L
74,4c
DISPLAY LETTER D
20. 0026H
ACALL DATA 1
11, 82
21. 0028H
ACALL DELAY
11, 8F
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
22. 002AH
MOV A,#S
74, 53
DISPLAY LETTER C
23. 002CH
ACALL DATA 1
11,82
24. 002EH
ACALL DELAY
11, 8F
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
25. 0030H
MOV A,#I
74,49
DISPLAY LETTER O
26. 0032H
ACALL DATA 1
11, 82
27. 0034H
ACALL DELAY
11, 8F
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
28. 0036H
MOV A,#
74,20
DISPLAY LETTER E
29. 0038H
ACALL DATA 1
11,82
30. 003AH
ACALL DELAY
11,8F
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
31. 003CH
MOV A,# D
74,44
DISPLAY LETTER
32. 003EH
ACALL DATA 1
11, 82
CALL COMMAND
21
33. 0040H
ACALL DELAY
11, 8F
SUBROUTINE
PROVIDE DELAY
34. 0042H
MOV A,#E
74,45
DISPLAY LETTER S
35. 0044H
ACALL DATA 1
11,82
36. 0046H
ACALL DELAY
11,8F
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
37. 0048H
MOV A,#S
74, 53
DISPLAY LETTER E
38. 004AH
ACALL DATA 1
11,82
39. 004CH
ACALL DELAY
11,8F
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
40. 004EH
MOV A,#I
74, 49
41. 0050H
ACALL DATA 1
11,82
42. 0052H
ACALL DELAY
11,8F
DISPLAY LETTER
W
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
43. 0054H
MOV A,#G
74,47
DISPLAY LETTER A
44. 0056H
ACALL DATA 1
11,82
45. 0058H
ACALL DELAY
11,8F
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
46. 005AH
MOV A.#N
74,4E
DISPLAY LETTER G
47. 005CH
ACALL DATA 1
11, 82
48. 005EH
ACALL DELAY
11,8F
CALL COMMAND
SUBROUTINE
PROVIDE DELAY
49. 0072H
LJUMP AGAIN
02,00,12
MOV P1,A
F5, 90
51. 0077H
CLR P2.0
C2,A0
52. 0079H
53. 007BH
CLR P2.1
SETB P2.2
C2,A1
D2,A2
COPY CONTENT OF
A TO PORT 1
RS0 = 1 FOR
COMMAND
R/W = 0 FOR WRITE
E=1 FOR HIGH
54. 007DH
ACALL DELAY
11,8F
PROVIDE DELAY
55. 007FH
CLR P2.2
C2,A2
E=0 FOR H-L PULSE
56. 0081H
RET
22
MOV P1,A
F5,90
58. 0084H
SETB P2.0
D2,A0
COPY CONTENT OF
A TO PORT 1
RS0 = 1 FOR DATA
59. 0086H
CLR P2.1
C2,A1
R/W = 0 FOR WRITE
60. 0088H
SETB P2.2
D2,A2
E=1 FOR HIGH
61. 008AH
ACALL DELAY
11,8F
PROVIDE DELAY
62. 008CH
CLR P2.2
C2,A2
E=0 FOR H-L PULSE
50. 0075H
57. 0082H
COMMAND
DATA1
22
63. 008EH
RET
22
64. 008FH
DELAY
MOV R3,#50H
7B,50
65. 0091H
UP
MOV R4,#0FH
7C,OF
66. 0093H
HERE1
DJNZ R3,HERE1
DC,FE
67. 0095H
DJNZ R3,UP
DB,FA
68. 0097H
RET
22
69.
END
DECREASE R3 AND
JUMP TO HERE1
WHEN R3 IS NOT
ZERO
DECREASE R3 AND
JUMP TO UP WHEN
R3 IS NOT ZERO
STOP
4. Theory:
LCD means liquid crystal display. It is very helpful in providing user to interface as well
as for debugging purpose. The most common type of LCD controller is HITACHI 44780 which
provides a simple interface between the controller and LCD. These LCDs are very simple to
interface with the controller as well as are cost effective.
The LCD requires 3 control lines i.e. RS, R/W, EN and 8 or 4 data lines i.e.
D0 to D7. The number of data lines depends on mode of operation. If LCD operated on 8-bit
mode then 8 data lines pins 3 control lines i.e. total 11 lines are required. And if operated on 4-bit
mode then required 7 lines. Here we have to use 8-bit mode for interfacing a LCD through 8051.
Because we have sufficient data lines and we need to display fast for better result.
In these programming, we use 14 pins. The function of each pin is shown in
below.
While Vcc and Vss provides +5v and ground respectively and Vee is used for controlling LCD
contrast.
Pin Description for LCD:
Pin
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Symbol
Vss
Vcc
Vee
RS
R/W
E
DB0
DB1
DB2
DB3
Description
Ground
+5v power supply
Power supply to control contrast
RS=0 to select command register, RS=1 to select data resister
R/W=0 for write, R/W=1 for read
Enable
The 8 bit data bus
The 8 bit data bus
The 8 bit data bus
The 8 bit data bus
23
11.
12.
13.
14.
DB4
DB5
DB6
DB7
The 8 bit data bus

The 8 bit data bus
The 8 bit data bus
The 8 bit data bus
When RS is low (0), the data is to be treated as a command. When RS is high (1), the data being
sent is considered as text data which should be displayed on the screen.
When R/W is low (0), the information on the data bus is being written to the LCD. When RW is
high (1), the program is effectively reading from the LCD. Most of the times there is no need to
read from the LCD so this line can directly be connected to Gnd thus saving one controller line.
The ENABLE pin is used to latch the data present on the data pins. A HIGH - LOW signal is
required to latch the data. The LCD interprets and executes our command at the instant the EN
line is brought low. If you never bring EN low, your instruction will never be executed. The 8-bit
data pins D0-D7 are used to send information to LCD or read the contents of LCDs internal
register. To display letters and numbers, we send ASCII codes for the letters and numbers to
these pins while making RS=1.
USEFUL COMMANDS:
For shift display to left corner- 00011000 i.e 18H
For display cursor in steady position- 00001110 i.e 0EH
For force cursor to beginning of 1st line-10000000i.e. 81H
For 2line and 5*7 matrix-00111000i.e 38H
For cursor on display on 01H
24
5. INTERFACING DIAGRAM
25
6. Flowchart:
START
SEND 38H TO ACC.
ACALL COMMAD
ACALL DELAY
SEND 01H TO ACC.
ACALL COMMAD
ACALL DELAY
SEND 0EH TO ACC.
ACALL COMMAD
ACALL DELAY
SEND 18H TO ACC.
ACALL COMMAD
ACALL DELAY
SEND 81H TO ACC.
ACALL COMMAD
ACALL DELAY
SEND CHAR V TO ACC.
26
D
B
SEND CHAR L TO ACC.
ACALL DATA1
ACALL DELAY
SEND CHAR S TO ACC.
ACALL DATA1
ACALL DELAY
SEND CHAR I TO ACC.
ACALL DATA1
ACALL DELAY
SEND CHAR D TO ACC.
ACALL DATA1
ACALL DELAY
SEND CHAR E TO ACC.
ACALL DATA1
ACALL DELAY
SEND CHAR G TO ACC.
27
B
A
SEND ACC.TO P1
E
D
G
C
E G
MOV 50H TO R3
SEND ACC.TO P1
CLEAR P2.0
MOV 0FFH TO R4
SETP2.0
CLEARP2.1
IF R3=!0
CLEARP2.1
SET P2.2
SET P2.2
ACALL DELAY
CLEAR P2.2
IF R4=!0
ACALL DELAY
CLEARP2.2
RET
RET
RET
28
7. Hardware Connection Diagram:
8. Result and Conclusion: By using keil uvision4 and proteus 7.2 lcd interfacing
with mcu and show VLSI DESIGN is successful
29
EXPERIMENT NO:-5
1. Program statement:Draw the interface of ADC 0808 which is an 8-bit 8 channel ADC with 8051.
Write a Program to read analog input and convert it into digital form. Use channel 1
analog input.
2. Software Used For Simulation: KEIL MICRO VERSION 4

PROTUS VERSION 7.2
3. Program code:
Line
no.
Address
Label
Program
(mnemonics)
1
2
ALE BIT 2.4

OE BIT 2.5
3
4
SC BIT 2.6
EOC BIT 2.7
ADDR_A BIT P2.0
6
7
ADDR_B BIT P2.1

ADDR_C BIT P2.2
MYDATA EQU P1
ORG 0000H
MOV
MYDATA,#0FFH
SETB EOC
CLR ALE
CLR SC
CLR OE
CLR ADDR_C
10
11
12
13
14
15
0000H
0003H
0005H
0007H
0009H
000BH
BACK:
Program
(Opcodes)
Description of
Instruction
75,90,FF
D2,A7
C2,A4
C2,A6
C2,A5
C2,A2
Make P1 an input
Make EOC an input
Clear ALE
Clear WRITE
Clear READ
C=0
30
16 000DH
CLR ADDR_B
C2,A1
17 000FH
SETB ADDR_A
D2,A0
18 0011H
19 0013H
20 0015H
ACALL DELAY
SETB ALE
ACALL DELAY
11,2E
D2,A6
11,2E
21 0017H
SETE SC
D2,A6
22 0019H
ACALL DELAY
11,2E
23
24
25
26
27
28
29
30
CLR ALE
CLR SC
JB EOC,HERE
JNB EOC,HERE1
SETB OE
ACALL DELAY
MOV A,MYDATA
CLE OE
ACALL
CONVERSION
SJMP BACK
C2,A4
C2,A6
20,A7,FD
30,A7,FD
D2,A5
11,2E
E5,90
C2,A5
001BH
001DH
001FH
0022H
0025H
0027H
0029H
002BH
HERE:
HERE1:
31 002DH
32 002FH
11,37
80,DD
B=0
A=1(Select CHANNEL
1)
make sure address are
stable
Latch Address
START
CONVERSION
Wait Until Done

Wait Until Done
Enable READ
Wait
Read DATA
Clear READ for next
HEX to ASCII
33 0031H
DELAY:
MOV R2,#100
7A,64
34 0033H
H1:
MOV R3,#255
7B,FF
35 0035H
H2:
DJNZ R3,H2
DB,FE
DJNZ R2,H1
RET
DA,EF
22,54
MOVE 100 to R2 for

Delay
MOVE 255 to R3 for
Delay
JUMP until R3=0 TO
H2
JUMP until R2=0 TO
H1
RETURN
ANL A,#0FH
ORL A,30H
RET
54,0F
44,30
22
MASKING A with 0fh

ORING with 30H
RETURN
36 0037H
37 0039H
38 003AH
39 003CH
40 003EH
CONVE
RTION:
4. Theory:ADC0808
The ADC0808, ADC0809 data acquisition component is a monolithic CMOS device with an 8bit analog-to-digital converter, 8-channel multiplexer and microprocessor compatible control
logic. The 8-bit A/D converter uses successive approximation as the conversion technique. The
converter features a high impedance chopper stabilized comparator, a 256R voltage divider with
analog switch tree and a successive approximation register. The 8-channel multiplexer can
directly access any of 8-single-ended analog signals. The device eliminates the need for external
31
zero and full-scale adjustments. Easy interfacing to microprocessors is provided by the latched
and decoded multiplexer address inputs and latched TTL TRI-STATE outputs. The design of
the ADC0808, ADC0809 has been optimized by incorporating the most desirable aspects of
several A/D conversion techniques. The ADC0808, ADC0809 offers high speed, high accuracy,
minimal temperature dependence, excellent long-term accuracy and repeatability, and consumes
minimal power. These features make this device ideally suited to applications from process and
machine control to consumer and automotive applications.
4.1 Features:1. Easy interface to all microprocessors

2. Operates ratio metrically or with 5 VDC or analog span adjusted voltage reference
3. No zero or full-scale adjust required
4. n 8-channel multiplexer with address logic
5. n 0V to 5V input range with single 5V power supply
6. n Outputs meet TTL voltage level specifications
7. n Standard hermetic or molded 28-pin DIP package
8. n 28-pin molded chip carrier package
9. n ADC0808 equivalent to MM74C949
10. n ADC0809 equivalent to MM74C949-1
4.2 Key Specifications:1.
2.
3.
4.
5.
Resolution 8 Bits
Total Unadjusted Error 12 LSB and 1 LSB
Single Supply 5 VDC
Low Power 15 Mw
Conversion Time 100 s
4.3 Pin Diagram of Adc0808
32
4.4 Pin Description:

1. I/O Pins
Address Lines A, B, C.
The device contains 8-channels. A particular channel is selected by using the address decoder
line. The table shows the input states for address lines to select any channel
SELECTED
ANALOG
CHANNEL
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
ADDRESS C
ADDRESS B
ADDRESS A
L
L
L
L
H
H
H
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
2. Address Latch Enable (ALE)

33
The address is latched on the Low High transition of ALE

3. Start conversion (SC)
The ADCs Successive Approximation Register (SAR) is reset on the positive edge i.e. LowHigh of the Start Conversion pulse. Whereas the conversion is begun on the falling edge i.e. high
low of the pulse.
4. Output Enable (OE)
Whenever data has to be read from the ADC, Output Enable pin has to be pulled high thus
enabling the TRI-STATE outputs, allowing data to be read from the data pins D0-D7.
5. End of Conversion (EOC)
This Pin becomes high when the conversion has ended, so the controller comes to know that the
data can now be read from the data pins.
6. Clock
External clock pulses are to be given to the ADC; this can be given either from LM 555 in a
stable mode or the controller can also be used to give the pulses.
5. Flowchart:START
INITIALIAZING PORT 2 WITH
ADC AND PORT 1 WITH
MYDATA
MAKE P1 AS INPUT
PORT PAND PIN
MAKE EOC AS INPUT
CLEAR ALE, CLEAR SC, CLEAR
OE
SELECT CHANNEL 1 THEN
ADDRESS A IS 1, ADDRESS C IS 0
AND ADDRESS IS 0.
DELAY
ACALL DELAY
START CONVERSION IN DIGITAL
FORM
34
MOVE DATA 100 TO R2
ACALL DELAY
MOVE DATA 255 TO
R3
CLEAR ALE, CLEAR SC
R3 if
not =0
True
False
IF EOC
NOT=1
True
R2 if t
not = 0
True
False
False
ACALL DELAY
MOVE MYDATA IN
ACCUMULATOR
CLEAR OE
RETURN
SJMP
=+
6. Hardware Diagram:Before Execution
35
After Execution:
36
6.1 Connection description:

Select an analog channel by providing bit to A, B and C so we select channel 1 then
A=1, B=0 and C=0.
37
Activate the ALE (address latch enable) pin. It needs an low to high pulse to latch in the
address.
Activate SC (start conversion) by an low to high pulse to initiate the conversion.
Monitor the EOC (end of conversion) to see whether the conversion is finished. High to
low output indicated that the data is converted and is ready to be picked up. If we do not
use EOC, we can read the converted digital data after a brief time delay. Delay size is
depends on the speed of the external clock we connect to clock pin. Notice that the EOC
is the same as the INTR pin in other ADC chip.
Activate the output enable to read the data out of the ADC chip. An low to high pulse to
the OE pin will bring the digital data out of the chip. Also notice that the OE is same as
the RD pin in the other ADC chips.
7. Result and Conclusion:-Thus we have studied the interface of ADC 0808which is an 8bit 8 channel ADC with 8051and read analog input and convert it into digital form using
channel 1 analog input.
EXPERIMENT NO:-6
1. Program Statement:
38
Write a program to multiply two 16 bit numbers.
2. Software used for simulation: MCU 8051 IDE V.1.4.7

3. Program code:
Line
No.
Address
1.
Program
(Mnemonics)
Program
(Opcode)
Move the data 11H to register

R1
R2
R3
R4
Move the data 11H from R2 to
accumulator A
Move the data 11H from R2 to
accumulator A
Multiply the register B data with
register A
Move the data from register A to
13H address
Move the data from register B to
6H address
Move the data from register R1
to accumulator A
to register B
register A
7H address
8H address
to accumulator A
to register B
register A
9H address
0A H address
ORG 00H
2.
0000H
MOV R1,#11H
7911
3.
0002H
MOV R2,#11H
7A11
4.
0004H
MOV R3,#11H
7B11
5.
0006H
MOV R4,#11H
7C11
6.
0008H
MOV A,R2
EA
7.
0009H
MOV B,R4
8CF0
8.
000BH
MUL AB
A4
9.
000CH
MOV 13H,A
F513
10.
000EH
MOV 6H,B
85F006
11.
0011H
MOV A,R1
E9
12.
0012H
MOV B,R4
8CF0
13.
0014H
MUL AB
A4
14.
0015H
MOV 7H,A
F507
15.
0017H
MOV 8H,B
85F008
16.
001AH
MOV A,R2
EA
17.
001BH
MOV B,R3
8BF0
18.
001DH
MUL AB
A4
19.
001EH
MOV 9H,A
F509
20.
0020H
MOV 0AH,B
85F00A
21.
0023H
MOV A,R1
E9
39
22.
0024H
MOV B,R3
8BF0
23.
0026H
MUL AB
A4
24.
0027H
MOV 0BH,A
F50B
25.
0029H
MOV 0CH,B
85F00C
26.
002CH
MOV A,07H
E507
27.
002EH
ADD A,06H
2506
28.
0030H
ADDC A,09H
3509
29.
0032H
MOV 12H,A
F512
30.
0034H
MOV A,08H
E508
31.
0036H
ADDC A,0AH
350A
32.
0038H
ADDC A,0BH
350B
33.
003AH
MOV 11H,A
F511
34.
003CH
MOV A,#0CH
740C
35.
003EH
MOV 10H,A
F510
36.
END
to accumulator A
to B
register A
Move the data from accumulator
A to 0B H address
0CH address
Move the data from address 07H
to accumulator
Add the data of 06H address
with accumulator A
Add the data of 09H address
with accumulator A with carry
A to 12 H address
Move the data from 08H address
to accumulator A
Add the data of 0AH address
Add the data of 0BH address
to 11H address
Move the data 0CH to
accumulator A
to 10H address
Stop or end the program
4. Theory:
For the multiplication of two 16 bits numbers four 8 bits data registers are selected
and these data registers are R1,R2,R3,R4 out of which first data is present in R1 and R2 and
second data in R3 and R4.Each of the second data register will be multiplied with the register of
first data register. Initially the multiplication of data R2 and R4 is done and result of
multiplication will be stored to A. Similarly R1 and R4, R2 and R3, R1 and R3 respectively.
Here we are using three instructions for the execution of program. The MOV
instruction for moving the data contents from one register to another. For multiplication MUL
instruction and for addition ADD instruction is used. After executing all instruction the result is
40
stored in accumulator A as well as B. The register A will store the lower byte data and the
register B will store the higher byte data.
Example:
Consider the two 16 bit numbers. In which first number has LSB 1 and MSB 1 and second
number has LSB 2 and MSB 2.
Initially the LSB 1 and LSB 2 will be multiplied then LSB 2 and MSB 1, MSB 2 and LSB 1 and
finally MSB 2 and MSB 1.
Consider two number (1212) H*(2323) H
Step 1: R2 * R4
12H
* 23H
02 76H
Where A= (76) H at an address 13H
B= (02) H at an address 06H
Step 2: R1 * R4
12H
* 23H
02 76H
B= (02) H at an address 08H
Step 3: R2 * R3
12H
* 23H
02 76H
B= (02) H at an address 0AH
Step 4: R1 * R3
12H
41
* 23 H
02 76H
Where A= (76) H at an address 0BH
B= (02) H at an address 0AH
Step 5:
Now A=76H and B =02H
And memory location 13H will store 76H.
Step: 6
From memory location 07H accumulator A will contain 76H i.e. A=76H
Now add the contents from 06H memory location to A.
i.e.
76H
+ 02H
78H
Again add with carry the contents from memory location 09H to A.
i.e.
02 78H
+ 00 76H
02 EEH
Where A=EEH and B=02H
And now move the content of A to memory location 12H i.e.12H will store EEH.
Step: 7
Now move the contents from memory location 08H to A i.e. =02H and add the contents from
0AH memory location with carry to A. Hence A=02H.
02H
+ 02H
04H
Hence now A will contain 04H.Now again add the content from 0BH memory location to A with
carry. And 0BH memory location has 76H data.
i.e.
42
04H
+
76H
7AH
i.e. now A=7AH.

Step: 8
Now move the contents from A to memory location 11H i.e.11H=7AH and move the data of
0CH to A i.e. =02H.And finally then move to memory location 10H i.e. 10H=02H.
5. Flowchart:
Start
43
Move the first data 11H to R1 & second data 11H to R2
Move the third data 11H to R3 & fourth data 11H to R4
Move the data 11H from R2 to accumulator A and 11H to register B
Multiply the contents of A and B data
Move the data from A to 13H address and data from register B to 6H
address
Move the data from R1 to A and from R4 to register B
Move the data from A to 7H address and data from register B to 08H
address
Move the data from A to 9H address and data from register B to 0AH address
44
Move the data from A to BH address & from register B to 0CH & 07H to A
Add the contents from 06H memory location to A and from 09H to A with carry
Move the data from A to 12H address and data from 0AH address to A
address
Add the contents from 0AH memory location to A and from 0BH to A with carry
Move the data from A to memory location 11H and data of 0CH to A and move the
data from A to 10H address
Stop
6. RESULT:
The program for the multiplication of two 16 bits number has been performed and result has
been seen on the memory location.
Memory location
Data
10H
02H
11H
7AH
12H
EEH
13H
76H
45
EXPERIMENT NO:-7
1. Program Statement:Write a program to find Fibonacci series up to 10 numbers and store the result in memory
location starting from the address of 50H.
2. Software Used For Simulation:-MCU 8051 IDE v1.4.

No.
Address
Label
1.
Program
(Mnemonics)
Program
(Opcodes)
ORG 00H
2.
0000H
MOV R0,#50H
78,50
MOVE THE DATA 50H TO R0
3.
0002H
MOV R1,#08H
79,08
4.
0004H
MOV R2,#01H
7A,01
5.
0006H
MOV @R0,#01H
76,01
MOVE DATA 01H TO THE

LOCATION OF R0
6.
0008H
INC R0
08
INCREMENT R0
7.
0009H
MOV @R0,#01H
76,01
MOVE DATA 01H TO THE

LOCATION OF R0
8.
000BH
INC R0
08
INCREMENT R0
9.
000CH
MOV R3,#01H
7B,01
10
000EH
MOV A,R2
EA
MOVE THE CONTENT OF R2 TO

ACCUMULATOR
11
000FH
ADD A,R3
2B
ADD THE CONTENTS OF R3

AND ACC AND STORE RESULT
IN ACC
12
0010H
MOV @R0,A
F6
MOVE THE CONTENTS OF ACC

TO THE LOCATION OF R0
13
0011H
INC R0
08
INCREMENT R0
BACK
46
14
0012H
MOV B,R3
8B,F0
MOVE THE CONTENT OF R3 TO

REG. B
15
0014H
MOV R2,B
AA,F0
MOVE THE CONTENT OF B TO

R2
16
0016H
MOV R3,A
FB
MOVE THE CONTENT OF ACC

TO R3
17
0017H
DJNZ R1,BACK
D9,F5
DECREMENT R1 AND JUMP TO

BACK IF NOT ZERO
18
END
END THE PROGRAM
Theory:Fibonacci series: It is a sequence of numbers that starts with one or zero in

which 1 appear twice as the first two numbers and every subsequent number is the sum of
two preceding numbers: 1,1,2,3,5,8,13,. And so on.
47
The pattern shows that each cohort or generation remains as a part of the next and in addition,
each group-up pair contributes a baby pair. The number of such a baby pairs matches the total
number of pairs in the previous generation.
Symbolically
Fn = Number of pairs
Fn = Fn-1 + Fn-2
So here a recursive formula where each generation is defined in terms of the previous two
generations. Using this approach we can successively calculate Fn for as many generation.
So this sequence of numbers
1, 1, 2, 3, 5, 8, 13, 21,
In this program we are using the logic to find the Fibonacci series up to 10 numbers. For
that we use two register (A & R3) the 1st data is moved to the first register i.e. A and second data
is moved to the second register i.e. R3. The result is stored in memory location. So the logic is
that the next number is added to the previous number to form the next new number. In this way
the Fibonacci Series is formed and hence the program gets executed and the final result is saved
in memory location starting from the address of 50H.
48
Flow Chart:START
MOVE THE DATA 08H AND 01H TO R1 AND R2
MOVE DATA 01H TO THE LOCATION POINTED BY R0
INCREMENT R0
AGAIN MOVE DATA 01H TO THE LOCATION POINTED BY R0

AND INCREMENT R0
MOVE THE CONTENT OF R2 TO ACC
ADD THE CONTENTS OF R3 AND ACC AND STORE RESULT IN ACCUMULATOR
MOVE THE CONTENTS OF ACC TO THE LOCATION POINTED BY

R0
INCREMENT R0
MOVE THE CONTENT OF R3 TO REG. B
MOVE THE CONTENT OF B TO R2
MOVE THE CONTENT OF ACC TO R3
If R0 0
DECREMENT R0
STOP
49
Result:-The program has been simulated and the result is stored from the memory location
50H.
MEMORY
ADDRESS
DATA
(FIBONACCI
SERIES)
50H
01H
51H
01H
52H
02H
53H
03H
54H
05H
55H
08H
56H
0DH
57H
15H
58H
22H
59H
37H
50
EXPERIMENT NO:-8
1. Program Statement:Write a program to convert 5 Packed BCD numbers to ASCII. Assume that packed BCD
is located in ROM locations starting at 300 H. Place the ASCII code in RAM location starting at
40H.
2. Software used for simulation:-MCU 8051 IDE v1.4.7

3. Program:Line
No.
Address
Label
1.
Program
Program
(Mnemonics)
(Opcodes)
START (ORIGIN) AT
ORG 0000H
LOCATION
2.
0000H
MOV R2,#05H
7A 05
initialize counter, R2=05H
3.
0002H
MOV R0,#40H
78 04
Load the pointer. R0=40H
4.
0004H
MOV R1,#41H
79 41
Load the pointer. R1=41H
5.
0006H
0009H
000AH
000BH
MOV
DPTR,#300H
LOOP
CLR A
MOVC
90 03 00
E4
Initialize data pointer To

external ROM location
300H
Clear accumulator.
93
LOAD BCD no. of address

DPTR pointed to into reg. A
MOV @R1,A
F7
000CH
ANL A,#0FH
54 0F
10
000EH
ORL A,#30H
44 30
11
0010H
MOV @R0,A
F6
12
0011H
MOV A,@R1
E7
MOVE the content A into

RAM R1 points to
AND A with #0FH, keep
result in A
OR A with #30H, keep
result in A
MOVE content of A into
RAM whose address is held
by R0
Copy the content of the
address held by R1 to the A
register.
A,@A+DPTR
51
AND A with #0F0H, keep

result in A
Swap the content of ACC
13
0012H
ANL A,#0F0H
54 F0
14
0014H
SWAP A
C4
15
0015H
ORL A,#30H
44 30
16
0017H
MOV @R1,A
F7
17
0018H
INC R0
08
18
0019H
INC R0
08
OR A with #30H, keep

result in A
MOVE content of A into
RAM whose address is held
by R1
Increment pointer, Now
R0=41.
Increment pointer, R0=42.
19
001AH
INC R1
09
Increment Pointer, R1=42.
20
001BH
09
Increment pointer, R1=43.
21
001CH
INC R1
INC DPTR
A3
22
001DH
DJNZ R2,LOOP
DA
increment DPTR by 1
LOOP until counter = zero.
23
24
25
ORG 300H
D1: DB
20H,21H,22H,23
H,24H
END
Initialize external ROM

location
Assemble external data in
the program
End of Program
4. Theory:4.1 BCD Number System:

The Binary representation of a digit 0 to 9 is called a BCD (Binary Coded Decimal). It is
classified as Unpacked BCD:In unpacked BCD, the lower 4 bits of the number represents the BCD Number,
and the rest of the bits are 0.
Ex. 00001001 and 00000101 are unpacked BCD for 9 and 5.
Packed BCD:In packed BCD, a single byte has two BCD number in it, one in the lower 4 bits,
and one in the upper 4 bits.
Ex.0101 1001 is the packed BCD for 59H.
52
The acronym ASCII stands for the American Standard Code for Information Interchange. Every
industry attempts to set standard for its product.
4.2 The ASCII Character Code
The original ASCII character standard assigned a 7 bit binary number to 127
characters.
Below table gives the relation between ASCII and BCD number.
Table 1.1 Relations between BCD and ASCII.
Key
ASCII (hex)
Binary
BCD(unpacked)
30
0011 0000
0000 0000
31
0011 0001
0000 0001
32
0011 0010
0000 0010
33
0011 0011
0000 0011
34
0011 0100
0000 0100
35
0011 0101
0000 0101
36
0011 0110
0000 0110
37
0011 0111
0000 0111
38
0011 1000
0000 1000
39
0011 1001
0000 1001
53
5. Flow Chart:-
STAR
T
Initialize counter
Separate higher nibble of packed BCD
Initialize RAM location to 40H

Swap the content of Accumulator by
nibble wise
Initialize Data Pointer to internal ROM location 300H
LOCATIONtotoitiexternmeROM
Convert into ASCII
Clear Accumulator
Store the ASCII of higher nibble in next RAM
Move the content of ROM
location to Accumulator
location
Increment RAM location by 2

Separate lower nibble of packed BCD
Increment Data Pointer for next ROM location
Convert into ASCII
Decrement counter by 1
Store the ASCII of lower nibble in 1st RAM location 40H
NO
Reload number in Accumulator
Is
Counter=0?
Yes
YES
STOP
54
6. Result and conclusion:-Five Packed BCD numbers located in ROM locations starting at
300 H are successfully converted to ASCII and placed in RAM location starting at 40H.
ROM
ADDRESS DATA
(HEX)
(HEX)
0300H
20
0301H
21
0302H
22
0303H
23
0304H
24
RAM
ADDRESS (HEX)
DATA (HEX)
40
30
41
32
42
31
43
32
44
32
45
32
46
33
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Es1 Final

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Es1 Final

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EXPERIMENT NO:-1

2. Software Used For Simulation: - MCU 8051 IDE v1.4.

TAKE NEXT DATA FROM DPTR

JUMP IF CARRY (A>B)

DECREMENT R1,( IF NOT ZERO

MOV DPTR, #1020H

ALLOTE 1020H LOCATION TO

Initialize memory counter to 20H

Increment DPTR to next address

TL=00 LOW BYTE

TH1=EE HIGHER BYTE

REMAIN UNTIL THE

4. Theory:-Square wave generation using 8051.

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D

4.1TMOD: As we are generating square wave by using timer.

We are using TMOD and

Counter Timer select bit: 1 = Counter, 0 = Timer

Mode bit 1: See table below

Mode bit 0: See table below

Gate bit: when set, timer0 only runs whileINT0 is high

Counter Timer select bit: 1 = Counter, 0 = Timer

Mode bits 1: See table below

Mode bits 0: See table below

13-bit timer mode (compatibility with 8048)

16-bit timer mode

8-bit timer mode Auto-reload Mode

split timer mode

Timer 0: TL0 is an 8-bit timer controlled by timer 0 mode

Timer 1 overflow Flag

Timer 1 run control Flag

Timer 0 overflow Flag.

Timer 0 run control Flag.

External Interrupt 1 edge flag

External Interrupt 1 Type flag

External Interrupt 0 edge flag.

External Interrupt 0 Type flag.

Initial value to be loaded in Reg. TL1 and TH1= 65536 - 4608

6. Flowchart:FOR TIMER 1 IN MODE 1

LOAD COUNT VALUE 00H IN TL1

LOAD COUNT VALUE EEH IN TH1

TO RUN THE TIMER 1 SET TR1

7. Hardware Description Diagram

2. Software used for simulation:-Pinnacle 52

8-BIT DATA, 1 START BIT AND 1

TAKE 1ST CHARACTER IN ACC

CALL SUB ROUTINE TRANS

TAKE 2ST CHARACTER IN ACC

CALL SUB ROUTINE TRANS

TAKE 3ST CHARACTER IN ACC

CALL SUB ROUTINE TRANS

TAKE 4ST CHARACTER IN ACC

CALL SUB ROUTINE TRANS

TAKE 5ST CHARACTER IN ACC

CALL SUB ROUTINE TRANS

TAKE 6ST CHARACTER IN ACC

CALL SUB ROUTINE TRANS

TIMER IN MODE 2(AUTO

TAKE 7ST CHARACTER IN ACC

CALL SUB ROUTINE TRANS

TAKE 8ST CHARACTER IN ACC

CALL SUB ROUTINE TRANS

TAKE 9ST CHARACTER IN ACC

CALL SUB ROUTINE TRANS