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EE/TE 3301

Electrical Network Analysis


Summer Semester 2006

Instructor Dr. Tanay Bhatt


Phone: 972-883-6755 – Department Phone Leave a message
Email: tbhatt@utdallas.edu
TA: Junjie Yao jxy027000@utdallas.edu

Office TBD

Office Hours Tuesday and Thursday 3:00 PM - 4:00 PM, or by appointment

Class Meetings Tuesday and Thursday 1:00 PM – 2:50 AM in ECSN 2.120

Text: Electric Circuits, 7th Edition, by Nilsson and Riedel, Prentice Hall

Recommended: Introduction to Pspice Manual for Electric Circuits using OrCad Release 9.1, 4th Edition,
by Nilsson and Riedel, Prentice Hall or later version.

Course Purpose The goal is to gain an understanding of the methods of analysis for, and the properties of,
electrical circuits. Subject matter will begin with a study of DC resistive circuits, and progress to
more complex resistive networks, and then to transient operation of circuits containing resistive,
capacitive and inductive elements.

Grading Homework 15%


Semester Exams 75%
Attendance 10%
Project Bonus

There will be 3 exams given during the semester, and a final exam. No make-up exams will
be given.

Homework assignments will be collected, graded, and discussed in class (as time permits).
Homework will be collected at the beginning of the class period when it is due. Homework that is
not reasonably neat and readable, or not bound, will be marked down. Late Homework will not
be accepted. Homework will be due about one week after it is assigned. IT may not be returned
to you until a week after it is due, which means you may not have it back for a problem-solving
session, or to use in studying for an exam. If you want to have it available at these times, you
will have to make a photocopy of it before you turn it in.

Grades Grades will be assigned as follows:


90% - 100% A
80% - 89% B
70% - 79% C
60 - 69% D
Below 60% F

Scholastic Integrity The value of an academic degree depends on the absolute integrity of the work done by
the student to earn that degree. It is imperative that students maintain a high level of
individual honor in his or her scholastic work. Scholastic dishonesty at The University of
Texas at Dallas includes, but is not limited to, plagiarism and/or collusion. Scholastic
dishonesty will not be tolerated.

Bhatt\mydocs\UTD\EE3301\syllabus
EE/TE 3301 Circuits: Engineering Concepts
Summer 2006
Class Schedule

Chapter Section Date Topic

2 1-5 5/16/2006 Circuit Elements: Voltage and Current, Electrical Resistance,


Construction of a model circuit, Kirchoff’s Laws, Analysis of Circuits
Containing a Dependent Source
3 1-6 5/18/2006 Simple Resistive Circuits: Resistors in Series, Resistors in Parallel, The
Voltage-Divider Circuit, The Current-Divider Circuit, Measuring
Voltage and Current, The Wheatstone Bridge
4 1-8 5/23/2006 Techniques of Circuit Analysis: Introduction to the Node-Voltage
Method, The Node-Voltage Method and Dependent Sources, The Node-
Voltage Method: Some Special Cases, Introduction to the Mesh-Current
Method, The Mesh-Current Method and Dependent Sources, The Mesh-
Current Method: Some Special Cases, The Node-Voltage Method versus
the Mesh-Current method
4 9-13 5/25/2006 Techniques of Circuit Analysis: Source Transformations, Thevenin and
Norton Equivalents, Maximum Power Transfer, Super Position, Review
and Problem Solving Session
5/30/2006 Exam 1
5 1-6 6/1/2006 Operational Amplifiers: Operational Amplifier Concepts, The Inverting-
Amplifier Circuit, The Summing Amplifier, The Non-inverting
Amplifier Circuit, The Difference Amplifier
6 1-4 6/6/2006 Inductors and Capacitors: The Inductor, The Capacitor, Series-Parallel
Combinations of Inductance and Capacitance, Mutual Inductance
7 1-4 6/8/2006 Response of First-Order RL and RC Circuits: The Natural Response of
an RL Circuit, The Natural Response of an RC Circuit, The Step
Response of RL and RC Circuits, A General Solution for Step and
natural Response
8 1-3 6/13/2006 Natural Response of RLC Circuits: The Natural Response of a Parallel
RLC Circuit, The Step Response of a Parallel RLC Circuit
8 4 6/15/2006 Natural and Step Response of RLC Circuits: The Natural Response of
a Parallel RLC Circuit, The Step Response of a Parallel RLC Circuit,
Review and Problem Solving Session
6/20/2006 Exam 2
9 1-6 6/22/2006 Sinusoidal Steady-State Analysis: The Sinusoidal Source, The
Sinusoidal Response, The Phasor, : Passive Circuit Elements in the
Frequency Domain, Series and Parallel Simplifications, Source
Transformations and Thevenin-Norton Equivalent
9 7-11 6/27/2006 Sinusoidal Steady-State Analysis: The Node-Voltage Method, The
Mesh-Current Method, Phasor Diagrams, Transformers
10 1-4 6/29/2006 Sinusoidal Steady-State Power Calculations: Instantaneous Power,
Average and Reactive Power, The RMS Value and Power Calculations,
Complex Power, Review and Problem Solving Session
7/4/2006 Independence Day Holiday
7/6/2006 Exam 3
13 1-4 7/11/2006 The Laplace Transform in Circuit Analysis: A Review of the Laplace
Transform, Circuit Elements in the s Domain, Circuit Analysis in the s
Domain, Applications, Transfer Functions
13 5-7 7/13/2006 The Laplace Transform in Circuit Analysis: The Transfer Function, The
Transfer Function in Partial Fraction Expansions, The Transfer
Function, Steady-State Response
13/14 8/1-3 7/18/2006 The Laplace Transform in Circuit Analysis: The Transfer Function,
Steady-State Response, The Impulse Function in Circuit Analysis,
Introduction to Frequency Selective Circuits: Low-Pass Filters, High-
Pass Filters
14 4-5 7/20/2006 Introduction to Frequency Selective Circuits: Band Pass Filters, Band
Bhatt\mydocs\UTD\EE3301\syllabus
reject Filters, Introduction to Frequency Selective Circuits: Bode
Diagrams
7/25/2006 Review and Problem Solving Session
8/1/2006 Final Exam 2:00 PM

Bhatt\mydocs\UTD\EE3301\syllabus