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T.SATYANARAYANA
SUBJECT:
IC APPLICATIONS LAB
ECE-III YEAR
1. Objectives and Relevance
2. Scope
3. Prerequisites
4. Syllabus
5. Lab Schedule
6. Suggested Books
7. Websites
8.
Experts Details
9.
10.
Industrial Visits
11.
Shadow Engineering
12.
13.
14. Troubleshooting
The main objective of this lab course is to gain the practical hands on
experience by exposing the students to various linear IC applications. The
students will have an understanding of the concepts involved in various Linear
and Digital integrated circuits and their various applications.
Through this lab the students will get a thorough understanding of various
linear ICs and finally this lab introduces some TTL ICs(74LS series) for digital
circuit applications, and the 741 operational amplifier, 555 timer and its various
applications. The lab also introduces various voltage regulators.
2
SCOPE
PREREQUISITES
1.
2.
3.
4.
5.
6.
7.
PART- B
TO VERIFY THE FUNCTIONALITY OF 74 series TTL ICs.
1.
D FLIP-FLOP (74LS74) and JK Master- Slave Flip-Flop(74LS73).
2.
DECADE COUNTER (74LS90) and UP-DOWN COUNTER(74 LS 192).
3.
UNIVERSAL SHIFT REGISTERS 74LS194/195.
4.
3 TO 8 DECODER 74LS138.
5. 4-BIT COMPARATOR-74LS85.
6. 8x1 MULTIPLEXER 74151 AND 2X4 DEMULTIPLEXER- 74155
7. RAM (16 x4)-74189 (Read and Write operation)
PART - 1
4. SYLLABUS-JNTU
UNIT-I
No experiments in this unit as per syllabus.
UNIT II
EXPERIMENT NO. 1
Adder, Subtractor, Comparator using IC 741 Op-Amp.
OBJECTIVE
To study the applications of IC 741 as adder, subtractor, comparator.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Operation of IC 741 ,Regulated
Power Supply, Function Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of Adder, Subtractor, Comparator.
d. Graphical determination of input and output waveforms of comparator. OPAMP AS
ADDER
To design adder, subtractor and comparator using opamp.
APPARATUS:
Name of the
component/equipment
S.No.
Quantity
1.
Op amp 741 IC
2.
Resistance- 1K
3.
Resistance -10 K
4.
5.
Bread Board
6.
CRO
7.
Multimeter
CIRCUIT DIAGRAM:
PROCEDURE:
1.
2.
3.
4.
5.
6.
RESULT:
OPAMP AS SUBTRACTOR
To design subtractor using 741opamp.
APPARATUS:
Name of the
component/equipment
S.No.
Quantity
1.
Op amp 741 IC
2.
Resistance 10K
3.
4.
Bread Board
5.
CRO
6.
Multimeter
CIRCUIT DIAGRAM:
PROCEDURE:
Connect the circuit as shown in figure.
Apply +Vcc =+15V and Vcc = 15V to Pin 7 and 4 of 741IC
Apply the i/p voltage V1 and V2.
3.
Measure the o/p voltage using Multi meter.
4.
Verify with theoretical value.
5.
Repeat the above for different values of V1 and V2.
6.
RESULT: In the above circuit Op amp works as subtractor.
1.
2.
To compare the applied input signal with the reference voltages to the Comparator
Circuit.
. APPARATUS:
Name of the
component/equipment
S.No.
Quantity
1.
Op amp 741 IC
2.
Resistor- 10K
3.
Resistor-100
4.
Bread Board
6.
CRO
7.
Diode-4148
CIRCUIT DIAGARAM
PROCEDURE:
1. Connect the comparator circuit as shown in fig (1).
2. Connect the 1MHz function generator to the input terminals. Apply 1V signal at noninverting terminals of the op-amp IC741.
3. Connect the 20MHz C.R.O at the output terminals.
4. Keep 1V reference voltage at the Inverting terminal of the Op-amp. When Vin is less
than the Vref, then output voltage is at Vsat because of the higher input voltage at
negative terminal. Therefore the output voltage is at logic low level
5. Now, Keep 1V reference voltage. When Vref is less than the Vin, then the output
voltage is at +Vsat because of the higher input voltage at positive terminal. Hence, the
output voltage is at logic high level.
6. Observe and record the output voltage and waveforms.
RESULT: comparison between the given 2 waveforms are observed.
APPLICATIONS
The applications of comparator are
1.
2.
3.
4.
EXPERIMENT NO. 2
Integrator and Differentiator Circuits using IC 741.
OBJECTIVE
To design and verify the operation of an integrator and differentiator for a given input.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Operation of IC 741, Regulated
Power Supply, Function Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of an integrator and differentiator for a given input.
d. Graphical determination of input and output waveforms of integrator and
differentiator.
APPARATUS:
CIRCUIT DIAGRAM :
Differentiator:
Integrator :
The Integrator:
A circuit in which the output voltage waveform is the integration of the input is called
integrator
Procedure:
1. Connect the integrator shown in figure and switch on the mains.
2. Connect the function generators to the input terminals, apply square wave at the input
terminals.
3. Measure the output voltage of regulated power supply circuit +5 volts and -5volts.
4. Observe output of the square wave oscillator using CRO the output voltage will be
approximately 4.5vpp and frequency is 100 Hz to 20 KHz.
5. Select required frequency using potentiometer and connect it to the input of the
differentiator.
6. Choose capacitor value such that RC time constant is smaller than the input signal
(RC<<T).
7. Connect the capacitor and observe the output signal suing CRO.
8. Thus the output signal will be the derivative of the input signal.
9. Similarly change the capacitor C value for different time constants
RC>>T
RC=T
RC<<T
The Differentiator:
The differentiator circuit performs the mathematical operation of differentiation. That is
the output waveform is the derivative of the input waveform.
Vout RF C1
dVin
dt
Procedure:
1. Connect the differentiator shown in figure and switch on the mains.
2. Connect the function generators to the input terminals, apply square wave at the input
terminals.
3. Measure the output voltage of regulated power supply circuit +5 volts and -5volts.
4. Observe output of the square wave oscillator using CRO the output voltage will be
approximately 4.5vpp and frequency is 100 Hz to 20 KHz.
5. Select required frequency using potentiometer and connect it to the input of the
differentiator.
6. Choose capacitor value such that RC time constant is smaller than the input signal
(RC<<T).
7. Connect the capacitor and observe the output signal suing CRO.
8. Thus the output signal will be the derivative of the input signal.
9. Similarly change the capacitor C value for different time constants
RC>>T
RC=T
RC<<T
APPLICATIONS
1. The differentiator used in wave shaping circuits to detect high frequency components
in an input signal and also as a rate-of change detector in FM demodulators.
2. The integrator is used in analog computers and analog to digital converters and
signal-wave shaping circuits
EXPERIMENT NO. 3
Schmitt trigger circuits using IC 741 & IC 555.
OBJECTIVE
To design the Schmitt trigger circuit using IC 741 and IC 555.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Operation of IC 741 ,
Operation of IC 555 ,Regulated Power Supply, Function Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min.
741 Op-Amp
Resistors 100 2 Nos, 56 K, 10 K.
Bread board.
Function generator.
CRO.
Probes.
Connecting wires.
CIRCUIT DIAGRAM :
PROCEDURE:
1. Connections are made as per circuit diagram and switch ON the power supply.
2. Apply the input sine wave 5 V (p-p) using function generator at 1 KHz frequency.
3. Connect channel 1 of CRO at the input terminals and Channel-2 at the output
terminals.
4. Observe the output square waveform corresponding to input sinusoidal signal.
5. Sketch the waveforms by noting the amplitude and timeperiod of input Vin and output
Vo.
EXPECTED WAVEFORMS:
TABULAR COLUMN :
RESULT :
APPLICATIONS
1. Schmitt triggers are typically used in open loop configurations for noise immunity
and closed loop configurations to implement function generators.
EXPERIMENT NO. 4
Voltage Regulator using IC 723.
OBJECTIVE
To design a low voltage variable regulator of 2 to 7V using IC 723.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Operation of IC 723 , Operation
of IC 555 ,Regulated Power Supply, Function Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min.
b. Connection of experiment and its verifications.
c. Experimental determination of characteristics of a voltage variable regulator.
d. Graphical determination of Load and Line Regulation characteristics.
To construct and test voltage Regulator using 723 IC.
APPARATUS:
S.No.
1.
Quantity
3.
4.
1
Capacitor 100pF
Regulated Power supply
2
1
5.
6.
Bread Board
CRO
1
1
CIRCUIT DIAGRAM:
PROCEDURE:
1. Connect the circuit as shown in fig Consisting.
2. The internal Vref is applied to Potential divides the consisting of R1 and R2.
3. Vary the input voltage and note down the corresponding values of Output.
4. Draw a smoother curve by talking input voltage on X- axis And Output voltage on Y-axis.
RESULT:
By experiment voltage Regulator using 723 IC we observed Vi and Vo values .
THREE TERMINAL VOLTAGE REGULATORS-7805, 7809,7812,7912.
CIRCUIT DIAGRAM :
78XX voltage Regulator
The voltage regulators of 78XX series all have the same internal circuitry, expect
for different values of one resistor, which determines the output voltage level.
Fig represents the circuit connections for 78XX series. Pin 1 represents the input, Pin 2
represents ground and Pin3 represents the output terminal.
79XX THREE TERMINAL NEGATIVE VOLTAGE REGULATOR
The 79XX series of fixed output negative voltage regulators are complements to the
78XX series devices. The negative regulators are available in the output voltage options -2,
-5, -5.2, -6, -8, -12, -15, -18 and -24 V. The maximum input voltage for Vo=24v is 40V,
while for the remaining options is -35V
PROCEDURE:
1. Connect the circuit as shown in fig.
2. Switch ON the 3 Pin regulator IC trainer.
3. Observe the output voltages for 78XX and 79XX IC regulators at Pin 2 by applying
input at Pin 1.
4. Tabulate the reading for different ICs.
TABULAR COLUMN:
S.No
1
2
3
4
5
6
Voltage
Regulator
7805
7806
7812
7905
7912
7924
Input Vin
(volts)
Output Vo
(volts)
RESULT: 78XX and 79XX 3 pin IC voltage regulators output voltages are observed.
APPLICATIONS
Voltage regulators are used as
1.Control circuits in PWM.
2.Series type switch mode supplies.
3.Rregulated power supplies.
4.Voltage stabilizers.
UNIT-III
EXPERIMENT NO. 5
Active Low Pass & High Pass Butterworth Filter(Second Order).
OBJECTIVE
To study Op-Amp as second order LPF and second order HPF and to obtain frequency
response.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Operation of IC 741 ,Regulated
Power Supply, Function Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of frequency response for second order low pass & high
pass filter.
d. Graphical determination of input and output waveforms of integrator and
differentiator.
To plot frequency Response of LPF (first order).
APPARATUS :
CIRCUIT DIAGRAM :
A First Order Low Pass Butterworth filter that uses an RC network for filtering. Note
that the op-amp is used in the non-inverting configuration; hence it does not load down
the RC network. Resistors R1 and RF determine the gain of the filter.
According to the voltage divider rule, the voltage at the non-inverting terminal (across
capacitor C ) is
-jXC
V1 = ---------Vin
R- jXC
Where j = -1 and - jXC = 1/ j 2fC
Simplifying Equation , we get
Vin
V1 = ----------1+ j 2fRC
And the output voltage
V0 = ( 1 + R F / R1) V1
Vin
`That is
or
V0 = ( 1 + R F / R1 ) --------1+j2fRC
V0 /Vin = AF /[1+ j(f / f H)]
At f = fH, | V0 /Vin |
= AF/2 = 0.707 AF
At f > fH | V0 /Vin |
< AF
Thus the Low Pass filter has a constant gain AF from 0 Hz to the high cutoff frequency
fH the gain is 0.707AF , and after fH it decreases at a constant rate with an increase in
frequency . That is when the frequency is increased tenfold ( one decade), the voltage
gain is divided by 10 . In other words, the gain decreases 20 dB ( = 20 log 10) each time
the frequency is increased by 10. Hence the rate at which the gain rolls off after f H is 20
dB/decade or 6 dB/octave , where octave signifies a two fold increase in frequency. The
frequency f = fH is called the cut off frequency because the gain of the filter at this
frequency is down by 3 dB ( =20log 0.707) form 0 Hz. Other equivalent terms for cutoff
frequency are -3dB frequency , break frequency , or corner frequency.
3.
PROCEDURE :
1. Switch ON low pass filter trainer kit by connecting any one capacitor provided
externally on the trainer to the C terminals of the circuit.
2. Connect input terminals to the function generator.
S.NO.
R = 10 k
C = 0.1 F
Vin = 100 mV
Input Frequency
Output Voltage
Gain Magnitude
f(Hz)
Vo (V)
| V0/Vin|
CALCULATIONS :
THEORETICAL Cut-off frequency :
fH = 1/(2RC) = high cutoff frequency of the Low pass filter.
= 1/ (2 x 10K x 0.1 F )
=
PRACTICAL Cut-off frequency :
fH = high cutoff frequency of the Low pass filter
= 3dB cutoff frequency
=
Gain in dB =
20log| V0/Vin|
EXPECTED GRAPH :
RESULT :
The frequency response of 1st order Low Pass Filter is plotted. The cut off
frequency is calculated and is verified with the theoretical value.
APPLICATIONS
High-pass filters have many applications.
1. They are used as part of an audio crossover to direct high frequencies to a tweeter
while attenuating bass signals which could interfere with, or damage, the speaker.
2. High-pass filters are also used for AC coupling at the inputs of many audio power
amplifiers.
EXPERIMENT NO. 6
RC Phase Shift and Wien Bridge Oscillators using IC 741 op-amp.
OBJECTIVE
To design verify the (i) phase shift oscillator (ii) Wien Bridge oscillator for the given
frequency of oscillation and verify it practically.
PREREQUISITES
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of frequency response for second order low pass & high
pass filter.
d. Graphical determination of measuring the time period and amplitude of the output
waveform
To compare theoretical and practical frequency of oscillation of RC Phase Shift
Oscillator.
APPARATUS :
CIRCUIT DIAGRAM :
Oscillator is a circuit which generates output without any input. Oscillator can be defined
as a device that converts dc to ac.
Oscillators can be classified as
Based on the components used.
C F
Theoretical
fo= 1/2RC6
Timeperiod
T
Practical
fo = 1/T
EXPECTED WAVEFORMS :
RESULT: Practical frequency of oscillation of RC Phase Shift Oscillator is compared with the
theoretical value.
IC-741 OSCILLATOR CIRCUITS
RC PHASE SHIFT OSCILLATOR & WEIN BRIDGE OSCILLATOR
b) Wein Bridge Oscillator.
To compare theoretical and practical frequency of oscillation of Wein Bridge Oscillator.
APPARATUS :
CIRCUIT DIAGRAM :
This wein Bridge Oscillator is the standard oscillator circuit for low to moderate frequencies, in
the range of 5 Hz to about 1 MHz . This oscillator is preferred for commercial audio generators
and other low frequency applications. To avoid the damped oscillations at the output the Wein
Bridge oscillator it uses a feedback circuit called a lead lag network. To generate un damped
oscillations, the positive feedback must be used because the output must generate itself.
Barkhausen s criterion for oscillations:
1) For sustained oscillations the phase shift around the circuit( amplifier and feedback
circuit) should be 360o or 0o.
2)The gain of the amplifier should greater than or equal to unity.
This type of RC oscillators is used for frequencies from 1 Hz to 5 MHz,
The commonly used audio frequency oscillator is Wein Bridge oscillator as shown in the
circuit. The feedback signal in this circuit is connected to the non-inverting terminal, therefore
the Op-Amp is working in non-inverting mode. Hence this amplifier doesnt provide any phase
shift. There fore the feedback network need not provide any phase shift. The condition of zero
Phase shift around the circuit is achieved by balancing the bridge.
For sustained oscillations, the amplifier must have a gain of precisely 3. but practically
Av may be slightly less or greater than 3.
For Av < 3, the oscillations will either die down or fail to start.
For Av > 3, the oscillations will be growing.
PROCEDURE :
1. Connect Resistors and Capacitors provided externally on the kit.
2. Switch ON the Wein bridge Oscillator Kit.
3. Connect the output of the circuit to CRO through probes.
4. Calculate the practical frequency of oscillation f = 1/T by observing the timeperiod of the
output sinusoidal waveform on the CRO and compare it with theoretical frequency of Oscillation
f = 1/2RC
5. Sketch the output waveform by noting the timeperiod and peak to peak voltage of the output
waveform
TABULAR COLUMN:
S.No
C F
EXPECTED WAVEFORMS :
Theoretical
fo= 1/2RC
Timeperiod
T
Practical
fo = 1/T
RESULT: Practical frequency of oscillation of Wein Bridge Oscillator is compared with the
theoretical value.
APPLICATIONS
Oscillators are used in
1. Radio,
2. Television,
3. Computers, and communications
UNIT-IV
EXPERIMENT NO. 7
IC 555 Timer-Monostable Operation Circuit
OBJECTIVE
To generate a pulse using Monostable Multivibrator by using IC555
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Operation of IC 555,
Regulated Power Supply, Function Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of frequency response for second order low pass & high
pass filter.
d. Graphical determination of output waveform and measure the pulse duration.
To compare theoretical and practical frequency of oscillation of an Monostable
Multivibrator using IC555
APPARATUS : Monostable Multivibrator Kit
CRO
Probes
Connecting wires
CIRCUIT DIAGRAM :
Monostable can also called as One shot Multivibrator. when the output is low, the
circuit is in stable state, Transistor Q1 is ON and Capacitor C is shorted out to ground. However,
upon application of a negative trigger pulse to Pin 2, transistor Q1 is turned OFF , which
releases short circuit across the external capacitor and drives the output High. The capacitor C
now starts charging up toward VCC through RA . However when the voltage across the external
capacitor equals 2/ 3 VCC comparator 1s (C1 ) output switches from low to high, which is turn
derives the output to its low state via the output of the flip flop turns transistor Q1 ON, and
hence, capacitor C rapidly discharges through the transistor. The output of the Monostable
remains low until a trigger pulse is again applied. Then the cycle repeats. The time during which
the output remains high is given by Tp = 1.1 R C
Once triggered, the circuit s output will remain in the high state until the set time t p
elapses. The output will not change its state even if an input trigger is applied again during this
time interval tp.
PROCEDURE:
1. Connect the circuit as shown in fig.
2. Connect function generator at Pin 2 and Ch-1 of CRO at Pin 2 and ch-2of CRO at Pin 3.
3. Apply square wave from function generator and observe the output voltage Vo with respect to
input.
4. Now connect ch-2 of CRO across capacitor and observe the voltage across the capacitor Vc.
5. Note the timeperiod and amplitude of output voltage Vo and capacitor voltage Vc.
6. Calculate the practical frequency of oscillation (fp =1/T) with the theoretical value ( f T= 1/T =
1/ (1.1 RC) )
CALCULATIONS:
THEORETICAL frequency of oscillation
R=
C=
T = 1.1 RC =
fT= 1/T =
PRACTICAL frequency of oscillation
T =
fp =1/T =
EXPECTED WAVEFORMS:
PWM.
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of operation of NE 565 PLL
d. Graphical determination of output waveform and measure the pulse duration.
To use IC565 PLL for FM Demodulation
APPARATUS:
CIRCUIT DIAGRAM :
The phase Locked loop principle has been used in applications such as FM.
Demodulations, FSK decoders and generation of local oscillator frequencies in TV and in FM
tuners.
The PLL can lock to track an input signal over typically 60 % of band with respect to f
as
the
center frequency. The lock range f L and capture range fC of the PLL 565 is given
OUT
below:
f L = 8 fout / V
Where f out is the free running frequency of VCO (Hz)
and V = + V- (-V) Volts
therefore , V = 2V Volts.
fC = { fL / 2 x (3.6) x 10
x C2 } 1/2
The lock range usually increases with an increase in input voltage but decreases with increase in
supply voltage.
Fig shows the block diagram of PLL in its basic form containing
1. Phase Detector.
2. Low Pass Filter
3. VCO ( Voltage Controlled Oscillator)
PHASE DETECTOR : The function of phase detector is to compares the input signal f IN with
the feed back signal f OUT . Therefore , the output of phase detector is proportional to the phase
difference between f IN and f OUT . But the output voltage of the phase detector is d.c voltage and is
often referred as the voltage.
LOW PASS FILTER : The output signal of phase detector is fed to the input of Low Pass
Filter . The function of the Low Pass Filter is to remove the high frequencies and it allows
the only low frequency signal . It produces a d.c voltage.
VCO: The output low pass filter is fed to the voltage controlled oscillator . The VCO frequency
is compared with the input frequencies and adjusted until it is equal to the input frequencies. In
other words, the PLL goes through three states:
1. Free running 2. Capture Range 3. Phase Lock
If no signal is applied , then the PLL is in free running state. Once the input frequency
is applied, the VCO frequency starts to change and the PLL is said to be in the capture mode. The
VCO frequency continues to change until it equals the input frequency and the PLL is said to be
phase locked state.
RATINGS: Transformer : Primary Voltage : 230V , 50Hz
Secondary Voltage : 18V 0 18V /500mA
PLL 565:
1. Operating Frequency
: 0.001 Hz to 500KHz
: 10 K
: 1 mA
: 10mA
: 5.4 V p-p at 6 V
: 2.4 V p-p at 6V
output with the frequency is determined by the voltage to frequency transfer function of the
VCO.
PROCEDURE:
1. Connect the circuit as shown in fig. Switch ON the circuit
2. The VCO free running frequency fo should be adjusted to be at the centre of the input signal
frequency range. C1 can any value , R1 should be in the range of 2 to 20 K with an optimum
value of the order of 4K.
3. The input signal be directly coupled if the dc resistance seen from pin 2 & 3 are equal and
there is no DC voltage difference between the pins. Apply 2Vp-p voltage through the capacitor =
1F.
4. Pin 6 provides Dc reference voltage that is also to the DC potential of the demodulated output
( at pin 7)
5. Thus if a resistance is connected between pin 1, 6 and 7 the gain of the output stage can be
reduced with little change in DC voltage level at the output.
6. This allows the lock range to be decreased with little change in free running.
7. A small capacitor ( 1Kpf) should be connected between pins 7 and 8 to eliminate the possible
oscillations in the control current source.
8. Single loop filter is formed by the capacitor C2 connected between pin 7 and +5V supply.
9. Connect channel-1 at the input pin 2 and channel -2 of CRO to the pin 7 which displays the
demodulated output.
10. Change the input frequency and observe the output is phase locked at a particular frequency.
EXPECTED WAVEFORM:
Radio.
2. Telecommunications.
3. Computers and other electronic applications.
4. They can be used to recover a signal from a noisy communication channel, generate
stable frequencies at a multiple of an input frequency (frequency synthesis), or
distribute clock timing pulses in digital logic designs such as microprocessors.
UNIT V
EXPERIMENT NO. 9
4 Bit Comparator IC 7485.
OBJECTIVE
To study and the operation of 4-bit Magnitude Comparator using IC 7485.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Operation of IC 7485,
Regulated Power Supply, Function Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of 3 to 8 decoder by verifying truth table.
Shift registers are used in digital systems for temporary information storage and for
data manipulation or transfer. There are two ways to shift (store) data into a register i.e.
serial or parallel, and similarly two ways to shift data out of the register. The following
are the four basic modes of operation:
Serial data i/p
Shift
register
(4 bits)
Shift
MSB
LSB
a. Serial in serial out (siso)
MSB
Parallel
data i/p
MSB
Serial data o/p
LSB
Shift
register
Parallel
data i/p
Shift
register
LSB
(4 bits)
LSB
d. Parallel in-parallel out (pipo)
A. Serial in-Serial out: In this type of shift register, data is stored into the register one
bit at a time (serial) and taken out serially too.
B. Serial in-Parallel out: Here data is stored serially into the register and is taken out
collectively at one shot (parallel).
C. Parallel in-Serial out: In this case entire data is stored into the register in one shot
and is taken out serially.
D. Parallel in- Parallel out: Data is stored into the register at one go and is taken out
collectively at one shot too.
BLOCK DIAGRAM:
clk
data [3:0
reset
4-bit Shift
q [3:0]
Register
reg (1)-reg
(4)
Clk
Rst
1
2
3
4
Q
0000
0000
1000
0100
1010
Sout
X
0
0
0
0
The above details of the serial-in/parallel-out shift register are fairly simple. It looks like
a serial-in/ serial-out shift register with taps added to each stage output. Serial data shifts in
at SI (Serial Input). After a number of clocks equal to the number of stages, the first data
bit in appears at SO (QD) in the above figure. In general, there is no SO pin. The last stage
(QD above) serves as SO and is cascaded to the next package if it exists.
If a serial-in/parallel-out shift register is so similar to a serial-in/ serial-out shift register,
why do manufacturers bother to offer both types? Why not just offer the serial-in/parallelout shift register? They actually only offer the serial-in/parallel-out shift register, as long as
it has no more than 8-bits. Note that serial-in/ serial-out shift registers come in gigger than
8-bit lengths of 18 to to 64-bits. It is not practical to offer a 64-bit serial-in/parallel-out shift
register requiring that many output pins. See waveforms below for above shift register.
The shift register has been cleared prior to any data by CLR', an active low signal, which
clears all type D Flip-Flops within the shift register. Note the serial data 1011 pattern
presented at the SI input. This data is synchronized with the clock CLK. This would be the
case if it is being shifted in from something like another shift register, for example, a
parallel-in/ serial-out shift register (not shown here). On the first clock at t1, the data 1 at
SI is shifted from D to Q of the first shift register stage. After t2 this first data bit is at QB.
After t3 it is at QC. After t4 it is at QD. Four clock pulses have shifted the first data bit all
the way to the last stage QD. The second data bit a 0 is at QC after the 4th clock. The third
data bit a 1 is at QB. The fourth data bit another 1 is at QA. Thus, the serial data input
pattern 1011 is contained in (QD QC QB QA). It is now available on the four outputs. It will
available on the four outputs from just after clock t4 to just before t5. This parallel data must
be used or stored between these two times, or it will be lost due to shifting out the QD stage
on following clocks t5 to t8 as shown above.
TRUTH TABLE:
si
clk
Qp
rst
0000
0000
1000
0100
1010
APPLICATIONS
1 Comparator designed for use in computer and logical applications that require the
comparison of two 4-bit words.
UNIT VI
No experiments in this unit as per syllabus.
UNIT VII
EXPERIMENT NO. 10
3 - 8 DECODER-74LS138
OBJECTIVE
To verify operation of the 3 to 8 decoder using IC 74138.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Switching Theory and Logic
Design ,Operation of IC 74LS138, Regulated Power Supply, Function Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of 3 to 8 decoder by verifying truth table.
A Decoder is a combinational circuit with multiple input, multiple output logic
circuit that converts Programd inputs into Programd outputs, where the inputs are lesser
in number than and output Programs. The input data is generally has fewer bits than the
output bits, there is one-to-one mapping from input Program words into output Program
words. In a one-to-one mapping, each input Program word produces a different output
Program word.
The general structure of a Decoder circuit can be shown as follows. The enable inputs, if
present must be asserted for the Decoder to perform its normal mapping function.
Otherwise the Decoder maps all the input Program words into a single disabled output
Program word. The corresponding I.C number is 74138.
BLOCK DIAGRAM:
a(0)
a(1)
a(2)
g1 g2a
g2b
TRUTH TABLE:
Select Inputs
Decoder Outputs
a(2) a(1) a(0) y(7) y(6) y(5) y(4) y(3) y(2) y(1) y(0)
APPLICATIONS
Decoding is necessary in applications such as
1. Data Multiplexing.
2. 7 segment display and memory address decoding.
UNIT-VIII
EXPERIMENT NO. 11
D Flip Flop-IC 74LS74 and JK Master Slave Flip Flop-IC 74LS73.
OBJECTIVE
To verify the truth table of D Flip Flop-IC 7474 and JK Master Slave Flip Flop-IC
74LS73.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Switching Theory and
Logic Design Operation of IC 74LS73 and IC 74LS74, Regulated Power Supply,
Function Generator, CRO .
DESCRIPTION
BOOLEAN EXPESSION:
Characteristic Equation is
Q(t+1) = d
LOGIC SYMBOL:
Set
TRUTH TABLE:
d
q
IC
Reset
Clk
(+ve edge)
1
Q(t+1)
APPLICATIONS
1. Flip-Flops and latches are used as data storage elements.
2. D Flip-Flop is a storage device used in register.
3. Master slave JK Flip-Flop is used in counter.
EXPERIMENT NO. 12
Decade Counter 74LS90
OBJECTIVE
To construct and verify the working of a single digit decade counter using IC 7490.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Switching Theory and Logic
Design, Operation of IC 7490, Regulated Power Supply, Function Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min.
b. Connection of experiment and its verifications.
c. Experimental determination of decade counter.
APPLICATIONS
Decade Counter used in
1. Multiplexers and De-multiplexers
EXPERIMENT NO. 13
Universal Shift Register - 74LS194/95.
OBJECTIVE
To study the following applications of the Universal shift register using IC 74LS194/95.
a. Shift Right Logic
b. Shift Left Logic
c. Parallel Load
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Switching Theory and Logic
Design, Operation of IC 74LS194/95, Regulated Power Supply, Function Generator, CRO
.
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of D Flip Flop-IC 7474 and JK Master Slave FlipFlop-IC
74LS73 by verifying truth table.
APPLICATIONS
1. A shift register is used for multiplying and division. If a binary number of say Bin.
100101 (37 Dec.) is multiplied by 2 the bits have to be left shifted one time and the
number will then be Bin. 1001010 (74 Dec.) and to divide by 2 the bits have to be
right shifted
EXPERIMENT NO. 14
8x1 Multiplexer 74151 and 2x1 Demultiplexer 74155
OBJECTIVE
To verify the truth table of a given 8 to 1 Multiplexer and 2 to 1 De-Multiplexer using IC
74151 and 74155 .
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Switching Theory and
Logic Design ,Operation of IC 74151/74155, Regulated Power Supply, Function
Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of 8 to 1 Multiplexer and 2 to 1 De-Multiplexer by
verifying truth table.
A Multiplexer consists have a set of and gate whose outputs are connected to single
or gate, Because of this construction of any Boolean function in a SOP form can be easily
realized using multiplexer. Each AND gate in the multiplexer represents a minterm. In 8
to 1 multiplexer, there are 3 select inputs and 23 minterms. By connecting the function
variables directly to the select Inputs, a multiplexer can be made to select the AND gate
that corresponds to the minterm in the function. If a minterm exists in a function, we have
to connect the AND gate data input to logic 1; otherwise we have to connect it to logic 0;
BLOCK DIAGRAM:
I (1)
I (2)
I (3)
I (4)
8x1
I (5)
MULTIPLEXER
(74x151)
I (6)
I (7)
TRUTH TABLE:
Select ( S)
Enable
Output
(en)
O
0
000
I(0)
0
001
I(1)
0
010
I(2)
0
011
I(3)
0
100
I(4)
0
101
I(5)
0
110
I(6)
0
111
I(7)
1
Xxx
0
EXPERIMENT NO. 15
RAM (164) - IC 7489 using (read and write operation).
OBJECTIVE
To study the operation of the RAM Ic7489.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Switching Theory and
Logic Design ,Operation of IC 74151/74155, Regulated Power Supply, Function
Generator, CRO .
DESCRIPTION
a. Introduction to experiment -30 min
b. Connection of experiment and its verifications
c. Experimental determination of read and write operation of RAM.
BLOCK DIAGRAM:
Addr(3:0)
Dout(3:0)
Din(3:0)
Clk
Reset
16 x 4
RAM
Rw
A 16X4 Ram has four data inputs Din (3:0), three control inputs Clk, Reset, Rw and four
data outputs. The control input Rw provides a mechanism for writing into or reading from
Ram.When Rw=0 write operation is performed and vive versa. The top priority is given to
Reset and then Clock.
APPLICATIONS
1. RAMs are used in Personal Computers.
2. Lap Tops.
3. Music Players etc.
LAB SCHEDULE:
(A) LAB SCHEDULE: The lab schedule should be planned once in a week. The week wise
scheduled experiment should be completed.
CYCLE 1:
CYCLE 1
Batches
B1(30112),B2(31324),B3(325336)
B4(337348),B5(349360),B6
B3
B4
B5
week-1
Demo
week-2
Exp.1
week-3
Exp.2
week-4
Exp.3
week-5
Exp.9
week-6
Exp.8
week-7
test
Demo
Exp.2
Exp.10
Exp.9
Exp.8
Exp.1
test
Demo
Demo
Demo
Exp.10
Exp.9
Exp.8
Exp.9
Exp.8
Exp.1
Exp.8
Exp.1
Exp.2
Exp.1
Exp.2
Exp.10
Exp.2
Exp.10
Exp.9
test
test
test
CYCLE 2
Batches
week-1
week-2
week-3
week-4
week-5
week-6
week-7
B1
Exp.3
Exp.4
Exp.6
Exp.11
Exp.12
Exp.5
test
B2
Exp.7
Exp.6
Exp.11
Exp.12
Exp.5
Exp.4
test
B3
Exp.3
Exp.11
Exp.12
Exp.5
Exp.4
Exp.6
test
B4
Exp.10
Exp.12
Exp.5
Exp.4
Exp.6
Exp.11
test
B5
Exp.9
Exp.5
Exp.4
Exp.6
Exp.11
Exp.12
test
(B) VIVA SCHEDULE: The viva schedule should be planned prior starting to the lab
experiment.
ROUND - 1
Batches
week-1
B1,B2,B3
viva
B1,B2,B3
week-2
week-3
week-4
week-5
viva
B1,B2,B3
viva
B1,B2,B3
viva
B1,B2,B3
viva
ROUND - 2
Batches
week-1
SG1
viva
SG2
SG3
SG4
week-2
week-3
week-4
week-5
viva
viva
viva
SG5
viva
SUGGESTED BOOKS
Linear Integrated Circuits-D. Roy Chowdhury, new Age international (p)Ltd, 3rd Edition,
2008.
2. Digital Fundamentals- Floyd and Jain,Pearson Education ,8th edition,2005.
3. Op-Amp
&
Linear
Integrated
Circuits-Concepts
&
Applications
by
JamesM.Fiore,Cengage/Jaico,2/e, 2009.
1.
WEB SITES
1.
2.
3.
4.
http://nptel.iitm.ac.in/courses/117106030/
http://www.nprcet.org/e%20content/Misc/e-Learning/EEE/II%20YEAR/EE2254%20%20Linear%20Integrated%20Circuits%20and%20Applications.pdf
http://home.cogeco.ca/~rpaisley4/LM555.html
http://electronicsclub.info/555timer.htm
EXPERTS DETAILS
The expert details which have been mentioned below are only a few of the eminent ones
known Internationally, Nationally and Locally.
INTERNATIONAL
1. Mr.D.Roy Chowdhury, Ph.D. University of Michigan,Dept. of Electronics and
Communication Engg.
Contact Details: 033 23603722 (Off), rcdiptiman@yahoo.com
(626) 395-8417,
NATIONAL
1. Prof.Roy Paily Palathinkal,Deptt. of Electrical Engg.,IIT Guwahati
Contact Information:
Office Address: ECE Department, Academic Complex, IIT Guwahati, Guwahati 781039.
Phone: +91-361-258-2512 (O)
Fax: +91-361-2582542, 2690762
Email: roypaily@iitg.ernet.in
REGIONAL
OBJECTIVE
ON Light.
Light is switched ON at night and OFF in the morning hours.
PREREQUISITES
Basic knowledge about Electronic Devices and Circuits , Operation of IC 741 ,Regulated
Power Supply, Function Generator, CRO.
DESCRIPTION
WORKING
When light falls on the LDR then its resistance decreases whichresults in increase of the voltage
at pin 2 of the IC 555.
IC 555 has got comparator inbuilt, which compares between the input voltage from pin2 and
1/3rd of the power supply voltage
When input falls below 1/3rd then output is set high otherwise it is set low.
Since in brightness, input voltage rises so we obtain no positive voltage at output of pin 3 to
drive relay or LED, besides in poor light condition we get output to energize.
LDR
It is a special type of resistor whose value depends on the
brightness of light which is falling on it.
It has resistance of about 1mega ohm when in total darkness,
APPLICATIONS
OBJECTIVE
The main objective of this experiment is to design and verify the operation and
application of a simple, economical and versatile circuit switches on the motor pump when water
in the overhead tank falls below the lowest level and turns it off when the tank is full.
Moreover, if the pump is running dry due to low voltage, it sounds an alarm to alert you to
switch off the controller circuit (and hence the motor pump) to avoid coil burn and power
wastage.
PREREQUISITES
The probe from bottom level is connected to the trigger (2nd) pin of 555 IC. So the voltage at
2nd pin is Vcc when it is covered by water.
. When water level goes down, the 2nd pin gets disconnected(untouched) from water i.e.
Voltage at the trigger pin becomes less than Vcc. Then the output of 555 becomes high.
The
output of 555 is fed to a SL 100 transistor, it energizes the relay coil and the
water pump set is turned ON.
the water level rises, the top level probe is covered by water and the transistor becomes
ON. Its collector voltage goes to Vce(sat) =0.2V.
The
low voltage at the 4th pin resets the IC. So the output of 555 becomes 0V. Hence the motor
will turn OFF automatically.
For
practical implementation, you must use a relay. Rating of relay is chosen according to the
load (Motor). 32 Ampere relay is best suited for domestic applications.
APPLICATIONS
The applications are
www.ebookbrowse.com
www.electronicsforyou.com
www.digitek.in
www.sridigitek.com
http://www.buildcircuit.com/ldr-engineer/
http://www.talkingelectronics.com/projects/50%20-%20555%20Circuits/50555Circuits.pdf
7. http://www.buildcircuit.com/ldr-engineer/
8. http://www.instructables.com/id/DARKLIGHT-SENSOR-BASED-ON-the-LM741opamp/?ALLSTEPS
9. http://www.technologystudent.com/elec1/opamp3.htm