PROGRAMME

FACULTY OF ELECTRICAL ENGINEERING

UNIVERSITI TEKNOLOGI MARA
PULAU PINANG
Diploma in Electrical Engineering

COURSE

Digital System 1 (ECE351)

CREDIT HOUR

3 (three) 56 h (lecture : 42h Tutorial: 14h)

SEMESTER

JULY NOV 2009

SYNOPSIS:
This subject covers an introductory course in digital circuit fundamentals. A basic understanding of digital circuits and
logic design as used in modern computers. Students will be using computer aided design tools.
OBJECTIVES

To provide knowledge and understanding in digital electronics, its principles in Boolean algebra and
digital concepts, with concentration on the analysis and design of combinational and sequential logic
circuits.
To introduce digital circuit computer simulation in the verification of circuit design

COURSE OUTCOME
Upon completion of the course, students will be able to: Describe several combinational logic and arithmetic circuits
Design digital circuits using MSI devices
Design and analyze sequential logic circuit
Describe simple application of analogue to digital and digital to analogue signal conversion and simple
application
COURSE EVALUATION
Assessments
1. Tests
2. Quizzes
3. Simulation Project
Total Assessments
Final Examination
Total Marks

Percentage
30 %
3%
7%
40 %
60 %
100%

RECOMMENDED TEXT

Thomas L.Floyd, Digital Fundamentals 9th Edition, Macmillan Publishing Company.

REFERENCES

1. Ronald J.Tocci, Neal S.Widmer, Gregory L.Moss, S.A., Digital Systems: Principle and Applications
10th Edition, Prentice Hall, Inc.
2. M.Morris Mano, Digital Design 3rd edition, Prentice Hall Inc, 2002
3. katz, Boriella, Contemporary Logic Design 2nd. Edition, Pearson, 2006
4. William Kleitz, Digital Electronics: A practical Approach, Prentice Hall, 2004
LECTURER
1. Pn. Intan Rahayu Ibrahim
2. En. Ahmad Puad Ismail
3. Cik Faridah Abd Razak
4. Cik Shahidah Sadimin
5. Pn. Sharifah Saliha Syed Bahrom

Room : 4.102
Room : 4.104
Room : 4.05
Room : 4.05
Room : 4.98

COURSE OUTLINE
WEEK

CHAPTER
1

1-3
(9 hours)

CONTENT/SUB-CHAPTER

1.1 Number System: Decimal, Binary, Octal and

Hexadecimal Numbers.

NUMBER SYSTEMS
AND CODES

1.2 Number Conversion

1.2.1
1.2.2
1.2.3

1.3
1.4
1.5
1.6
1.7
1.8
2
4
(3 hours)

2.1

LOGIC GATES

2.2
3
56
(6 hours)

BOOLEAN ALGEBRA

3.1
3.2
3.3
3.4
3.5
3.6
3.7

4
7 -9
(9 hours)

COMBINATIONAL LOGIC
AND MSI CIRCUITS

4.1
4.2
4.3
4.4
4.5
4.6

4.6

Decimal to Binary and Binary to Decimal

Binary to Octal and Octal to Binary
Binary to Hexadecimal and Hexadecimal to
Binary
Arithmetic Operation In Binary, Octal and Hexadecimal
1st Compliment and 2nd Compliment of Binary Numbers
Signed Numbers
Arithmetic Operations with Signed Numbers
Number Codes: BCD, ASCII, Gray and Seven Segment
Display
Parity Method For Error Detection
Logic Gates: Symbols, Operations, truth tables, Timing
Diagrams and Logic Expressions
2.1.1 NOT
2.1.2 AND
2.1.3 OR
2.1.4 NAND
2.1.5 NOR
2.1.6 EX-OR
2.1.7 EX-NOR
IC Gates
Boolean Operations and Expressions
Laws and Rules of Boolean Algebra
De Morgans Theorems
Boolean Analysis of Logic Circuits
Standard Forms of Boolean Expressions (SOP and
POS)
Simplification using Boolean Algebra
Karnaugh Map Minimization up to 4 variables (SOP
and POS)
Basic Combinational logic Circuits
Implementing Combinational Logic
Universal Property of NAND and NOR gates
Combinational Logic using NAND and NOR gates
Combinational Logic Design Procedures
MSI Circuits Design
4.2.1 Arithmetic circuit Adder (Half Adder, Full Adder,
4-bit parallel Adder), substractor and multiplier
4.2.2 Comparator, 4-bit magnitude Comparator IC
4.2.3 Decoders (2-to-4, 3-to-8, 4-to-16, BCD-todecimal, BCD-to-7-segment, decoder ICs
4.2.4 Encoders (Decimal-to-BCD, Priority Encoder,
Encoder ICs)
4.2.5 Code Converter
4.2.6 Data Selectors (Multiplexers, Demultiplexers,
ICs)
Simulation of Combinational Logic and MSI Circuits
using Multisim

WEEK 8

TEST 1 (Chapter 1, 2, 3)
Date : 20 August 2009 (5.00pm 7.00pm)
Venue : Later
5
INTRODUCTION TO
SEQUENTIAL CIRCUITS

10 - 14
(9 hours)

5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9

14
(3 hours)

WEEK
14
WEEK
15

7.1

INTRODUCTION TO
ANALOG TO DIGITAL
CONVERSION (ADC)
AND DIGITAL TO
ANALOG CONVERSION
(DAC)

7.2
7.3
7.4

Latches (SR, D), Gated Latches

Edge-Triggered Flip flops (SR, D, JK)
Asynchronous inputs (Preset and Clear)
Flip Flop Conversion
IC Flip-flops
Flip Flop Applications (Data Storage, Frequency
Divider, Counter)
Analysis of Sequential Logic Circuits
Design of Simple counters and Registers
Simulation of Sequential Circuits using Multisim
Digital to analog conversion (DAC)
7.1.1 Resolution (Step Size)
7.1.2 Percentage Resolution
7.1.3 DAC Specifications (Resolution, Accuracy,
Settling Time, Monotonocity)
Analog to Digital Conversion (ADC)
A/D resolution and accuracy
Conversion time, tc

TEST 2 (Chapter 4,5, 6)

Date : 6 Oktober 2009 ( 5.00pm -7.00pm)
Venue : Later
Presentation of Simulation Project