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Ordering number : EN8262A

Bi-CMOS IC

LV1116N/NV

Surround Processor ICs for

Electronic Volume Control

Overview
The LV1116N/NV are sound processor ICs developed for use in TV sets.
They incorporate the surround processing functions including (AViSS), pseudo stereo function, (L+R) output, and the
major functional blocks of an electronic volume control IC.

Features
Input function SWs (stereo inputs [L, R]).
Line out pin (through output).
Input gain control (6dB, 4dB, 0dB, 4dB, 6dB: 5 positions).
AViSS (ON/OFF/4-stage level control).
Tone control (BASS: 20dB, TREBLE: 18dB [in 2dB steps]).
Volume control (0dB to 14dB: 1dB steps/14dB to 80dB: 2dB steps/=82dB).
Balance control.
Through mode/Mute mode.
Pseudo stereo function (ON/OFF/MONO).
L+R output with LPF (Mute + 7-stage level control: 8 positions).
I2C bus control.
* Initial gain of L+R AMP can be controlled by the resistance value of external resistor.

Specifications
Maximum Ratings at Ta = 25C
Parameter

Symbol

Conditions

Maximum supply voltage

VCC max

Allowable power dissipation 1

Pd max1

Ta 70C *, DIP

Allowable power dissipation 2

Pd max2

Ta 70C *, SSOP

Ratings

Unit
10.5

700

mW

550

mW

Operating temperature

Topr

-25 to +70

Storage temperature

Tstg

-40 to +125

Note *: Mounted on a specified board: 114.3mm76.1mm1.6mm, glass epoxy board


Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.

12308 TI IM B8-8523,8524 / N2206 / 21805 JK No.8262-1/18

LV1116N/1116NV
Operating Condtions at Ta = 25C
Parameter
Recommended supply voltage

Symbol

Conditions

Ratings

Unit

VCC

Operating supply voltage 1

VCC opg1

DIP

Operating supply voltage 2

VCC opg2

SSOP

9.0

5.0 to 10.0

5.0 to 9.0

Control data
H level voltage

VIH

2.0 to 5.5

L level voltage

VIL

0.0 to 1.0

V
s

Pulse width

tw

1.0

Hold time

thold

1.0

Operating frequency

fopg

500

kHz

Electrical Characteristics at Ta = 25C, VCC = 9.0V, fin = 1kHz, VIN = 300mVrms = 0dB, RL = 10k
(Input=L/R-A, Output=L/R-VROUT)
Parameter
Quiescent current

Symbol

Conditions

Ratings
min

ICCO

typ

Unit

max

48

mA

Total through (Total through mode, Volume control: 0dB)


Voltage gain

VGT

Maximum output voltage

VOT

THD=1%

-1.6

-0.6

2.0

2.6

+0.6

dB
Vrms

Total harmonic distortion

THDT

DIN AUDIO

0.03

0.1

Output noise voltage

VNOT

DIN AUDIO

-99

-85

dBV

CTT

DIN AUDIO

Cross talk

85

95

-1.7

-0.7

1.5

2.0

dB

Matrix through (Matrix mode, Input gain: 0dB, Volume control: 0dB)
Voltage gain

VGF

Maximum output voltage

VOM

THD=1%

+0.7

dB
Vrms

Total harmonic distortion

THDM

DIN AUDIO

0.04

0.1

Output noise voltage

VNOM

DIN AUDIO

-95

-85

dBV

CTM

DIN AUDIO

Cross talk

85

93

dB

MONO mode (MONO mode, Input gain: 0dB, Volume control: 0dB)
Maximum output voltage

VOS

Total harmonic distortion

THDS

DIN AUDIO

THD=1%

1.5

0.04

2.0
0.5

Vrms
%

Output noise voltage

VNOS

DIN AUDIO

-95

-85

dBV

Surround (Surround mode-A, Input gain: 0dB, Volume control: 0dB)


Maximum output voltage

VOS

Total harmonic distortion

THDS

DIN AUDIO

THD=1%

1.5

0.2

2.0
0.5

Vrms
%

Output noise voltage

VNOS

DIN AUDIO

-92

-85

dBV

Pseudo stereo (Pseudo stereo mode, Input gain: 0dB, Volume control: 0dB)
Maximum output voltage

VOS

Total harmonic distortion

THDS

DIN AUDIO

THD=1%

1.5

0.07

2.0
0.5

Vrms
%

Output noise voltage

VNOS

DIN AUDIO

-92

-85

dBV

dB

Bass band EQ (Matrix through mode, Input gain: 0dB, Volume control: 0dB)
Control Range 1

GeqB

Max. Boost/Cut, DIP

18

20

22

Control Range 2

GeqB

Max. Boost/Cut, SSOP

17

20

23

dB

1.0

2.0

3.0

dB

dB

Step resolution

EstepB

Treble band EQ (Matrix through mode, Input gain: 0dB, Volume control: 0dB)
Control Range 1

GeqT

Max. Boost/Cut, DIP

16

18

20

Control Range 2

GeqT

Max. Boost/Cut, SSOP

15

18

21

dB

1.0

2.0

3.0

dB

Step resolution

EstepT

Continued on next page.

No.8262-2/18

LV1116N/1116NV
Continued from preceding page.
Parameter

Symbol

Conditions

Ratings
min

typ

Unit

max

L+R output (Output=L+R-OUT, Step=0dB, L+R_Step=Step4)


Gain

VGF

-2.3
2.0

-1.3

-0.3

Maximum output voltage

VOF

Total harmonic distortion

THDF

DIN AUDIO

0.03

0.1

Output noise voltage

VNOF

DIN AUDIO

-99

-85

dBV

THD=1%

2.5

dB
Vrms

Note: The output wave form becomes big depending on the surround or tone control setting. Please make sure the
output waveform is not distorted. If the waveform is distorted, reduce the gain setting of surround, tone control, or
input signal level.

Package Dimensions
unit : mm (typ)
3170A

[LV1116N]
32.4

10.16

19

8.6

36

18

0.25

(3.25)
0.51min

3.0 3.95max

0.95

0.48

1.78

(1.1)

SANYO : DIP36S(400mil)

Package Dimensions
unit : mm (typ)
3247A

[LV1116NV]

7.6

19

0.5

5.6

36

18

0.2

(0.7)

0.8

(1.5)
0.1

15.0

1.7max

0.3

SANYO : SSOP36(275mil)

No.8262-3/18

LV1116N/1116NV
Block Diagram

No.8262-4/18

LV1116N/1116NV
I2C BUS Control Signal
tHIGH

tR

tF

SCL

tSU:STA

tHD:STA

tLOW
tHD:DAT

tSU:STO

tSU:DAT

tBUF

SDA

Figure1 I2C BUS Control Signal timing chart

I2C BUS register


1) The explanation of I2C Bus
I2C Bus (Inter IC Bus) is the bus system which the PHILIPS company developed.
It does controls such as the start, the stop by two control signals of SDA (Serial Data) and SCL (Serial Clock).
The output of each signal is open drain and forms out of wired OR.

S: Start condition
P: Stop condition
ACK: Acknowledge
Data is transmitted in the MSB first. 1 unit is composed of 8 bits and ACK is put back from the slave to confirm.
Slave IC reads data with rising edge of SCL. Master IC changes data by falling edge in SCL.
2) The control register
Table1 Slave Address
MSB

LSB

Note; LV1116N/NV are reception exclusive use. It depends and it uses LSB by the "0" fixation.
Table2 I2C Bus transmission
Sub Address

Function
Input control/Gain control

Data

BINARY

HEX

D7

D6

0000 0001

01

D5

D4

D3

D2

Gain

D1

D0

Input

Volume control

0000 0010

02

Output/Surround/MODE control

0000 0011

03

Channel

Volume

Tone control [Bass]

0000 0100

04

Bass

Tone control [TREBLE]

0000 0101

05

TREBLE

D7

D6

D5

D4

D3

D2

D1

Mute

In A

D7

D6

D5

D4

D3

D2

D1

D0

-6dB

-4dB

+4dB

+6dB

L+R out gain

Surround

MODE

Table3 Input Selection


Sub Address
A7

In B

A6

A5

A4

A3

Data
A2

A1

A0

In C

D0

Table4 Gain control


Sub Address
A7

0dB

A6

A5

A4

A3

Data
A2

A1

A0

No.8262-5/18

LV1116N/1116NV
Table5 Mode control
Sub Address
A7

D6

D5

D4

D3

D2

D1

Total

Matrix

A5

A4

A3

Data
D7

Mono

A6

A2

A1

A0

D0

D7

D6

D5

D4

D3

D2

D1

D0

OFF

MODE-C

Pseudo

Table6 Surround control


Sub Address
A7

A6

A5

A4

A3

Data
A2

A1

A0

MODE-B
MODE-A

MODE-F
MODE-E

D7

D6

D5

D4

D3

D2

D1

D0

MUTE

Step1

Step2

Step3

Step5

Step6

Step7

D7

D6

D5

D4

D3

D2

D1

D0

+20dB

+18dB

+16dB

+14dB

+12dB

+10dB

+8dB

+6dB

+4dB

+2dB

-2dB

-4dB

-6dB

-8dB

-10dB

-12dB

-14dB

-16dB

-18dB

-20dB

MODE-D

Note; At the time of forced mono mode, there is not surround effect.
Note; Output gain = Step1 < Step7
Table7 L+R Output Gain control
Sub Address
A7

Step4

A6

A5

A4

A3

Data
A2

A1

A0

Note; Output gain = Step1 < Step7


Table8 Tone control [Bass control]
Sub Address
A7

0dB

A6

A5

A4

A3

Data
A2

A1

A0

No.8262-6/18

LV1116N/1116NV
Table9 Tone control [TREBLE control]
Sub Address
A7

D6

D5

D4

D3

D2

D1

D0

+18dB

+16dB

+14dB

+12dB

+10dB

+8dB

+6dB

+4dB

+2dB

-2dB

-4dB

-6dB

-8dB

-10dB

-12dB

-14dB

-16dB

-18dB

D7

D6

D5

D4

D3

D2

D1

D0

0dB

-1dB

-2dB

-3dB

-4dB

-5dB

-6dB

-7dB

-8dB

-9dB

-10dB

-11dB

-12dB

-13dB

-14dB

-16dB

-18dB

-22dB

-24dB

-26dB

-28dB

-30dB

-32dB

-34dB

-36dB

-38dB

-40dB

-42dB

-44dB

-46dB

-48dB

-50dB

-52dB

A5

A4

A3

Data
D7

0dB

A6

A2

A1

A0

Table10 Volume control


Sub Address
A7

-20dB

A6

A5

A4

A3

Data
A2

A1

A0

Continued on next page.

No.8262-7/18

LV1116N/1116NV
Continued from preceding page.
Sub Address
A7

D6

D5

D4

D3

D2

D1

D0

-54dB

-56dB

-58dB

-60dB

-62dB

-64dB

-66dB

-70dB

-72dB

-74dB

-76dB

-78dB

-80dB

-dB

D0

A5

A4

A3

Data
D7

-68dB

A6

A2

A1

A0

Table11 Volume channel control


Sub Address
A7

A6

A5

A4

A3

Data
A2

A1

A0

L-ch
R-ch

L/R

D7

D6

D5

D4

D3

D2

D1

It is the flow chart of theprogram which controls LV1116N/NV.


Ex.1: It is the order, sets an initial and input port control.
When doing an initial setting
Start

Slave_Address (EEH) Transmits

Start_Sub_Address (01H) Transmits

Sub_Address1_Data (01H) Transmits

Input = Ch-A
Gain = 0dB

Sub_Address2_Data (D6H) Transmits

Lch = Rch = -30dB

Sub_Address3_Data (01H) Transmits

Matrix mode
Surround off
L+R mute

Sub_Address4_Data (03H) Transmits

Bass Band +6dB

Sub_Address5_Data (13H) Transmits

Treble Band -6dB

End

Note: The data to transmit is ex..

No.8262-8/18

LV1116N/1116NV
Ex.2: It is the order, sets a volume control data, when Lch and Rch are same data.
When doing a volume setting (Lch = Rch)
Start

Slave_Address (EEH) Transmits

Start_Sub_Address (02H) Transmits

Sub_Address2_Data (D6H) Transmits

Lch = Rch = -30dB

Sub_Address3_Data (01H) Transmits

Matrix mode
Surround off
L+R mute

Sub_Address4_Data (03H) Transmits

Bass Band +6dB

Sub_Address5_Data (13H) Transmits

Treble Band -6dB

End

Note 1: The data to transmit is ex..


Note 2: This control doesnt change, input control and input gain control.
Ex.3: It is the order, sets a volume control data, when Lch and Rch are other data.
When doing a volume setting (Lch = -28dB, Rch = -32dB)
Start
Slave_Address (EEH) Transmits
Start_Sub_Address (02H) Transmits
Sub_Address2_Data (55H) Transmits

Lch = -28dB

Sub_Address3_Data (01H) Transmits

Matrix mode Surround off


L+R mute

Sub_Address4_Data (03H) Transmits

Bass Band +6dB

Sub_Address5_Data (13H) Transmits

Treble Band -6dB

Slave_Address (EEH) Transmits


Start_Sub_Address (02H) Transmits
Sub_Address2_Data (97H) Transmits

Rch = -32dB

Sub_Address3_Data (01H) Transmits

Matrix mode Surround off


L+R mute

Sub_Address4_Data (03H) Transmits

Bass Band +6dB

Sub_Address5_Data (13H) Transmits

Treble Band -6dB

End

Note 1: The data to transmit is ex..


Note 2: This control doesnt change, input control and input gain control.
No.8262-9/18

LV1116N/1116NV
Ex.4: It is the order, sets a mode control, surround and output control data.
When doing a mode setting
Start

Slave_Address (EEH) Transmits

Start_Sub_Address (03H) Transmits

Sub_Address3_Data (01H) Transmits

Matrix mode
Surround off
L+R mute

Sub_Address4_Data (03H) Transmits

Bass Band +6dB

Sub_Address5_Data (13H) Transmits

Treble Band -6dB

End

Note 1: The data to transmit is ex..


Note 2: This control doesnt change, input control, input gain control and volume control.
Ex.5: It is the order, sets a mode control, bass band control data.
When doing a bass band setting
Start

Slave_Address (EEH) Transmits

Start_Sub_Address (04H) Transmits

Sub_Address4_Data (03H) Transmits

Bass Band +6dB

Sub_Address5_Data (13H) Transmits

Treble Band -6dB

End

Note 1: The data to transmit is ex..


Note 2: This control doesnt change, input, gain, volume, and output mode control.
Ex.6: It is the order, sets a mode control, treble band control data.
When doing a treble band setting
Start
Slave_Address (EEH) Transmits
Start_Sub_Address (05H) Transmits
Sub_Address5_Data (13H) Transmits

Treble Band -6dB

End

Note 1: The data to transmit is ex..


Note 2: This control doesnt change, Except this treble band data.

No.8262-10/18

Rch-A

GND

35

36

Lch-A

Rch-B

34

Lch-B

Rch-C

33

Lch-C

R LINE
out

32

L Line
out

R-DC

31

L-DC

ST-1

30

ST-2

28

R-TC1

27

L-BC1

26

L-BC2

LPFC

R-TC1

R-BC1

10

R-BC2

11

LV1116N/1116NV

29

HPFC

R-OUT

12

25

L-OUT

14

13

1 F

R-VROUT

23

L+R

15

22

L-VROUT L+R LPF

24

AGND

1 F

VREF

16

21

VSS

VCC

17

20

CLK

VDD

18

19

DATA

LV1116N/1116NV

Sample Application Circuit

No.8262-11/18

LV1116N/1116NV
Pin Functions
Pin No
1

Function
GND

INPUT-A(R)

35

INPUT-A(L)

INPUT-B(R)

34

INPUT-B(L)

INPUT-C(R)

33

INPUT-C(L)

LINE-OUT(R)

Voltage

Remarks

Internal equivalent circuit

0
VREF

Input Impedance
ri=50k

VREF

Function SW Output
ro=50k

32

LINE-OUT(L)

DC Cut(R)

VREF

DC offset cancellation capacitor


connection pin

31

DC Cut(L)

6
31
7

ST-1

VREF

Pseudo stereo phase shift capacitor


connection pin

30

ST-2

7
30

AViSS LPF

VREF

Capacitor connection pin for surround low


pass filter

TREBLE(R)

VREF

Capacitor connection pin for configuring


treble filter

28

10

TREBLE(L)

BASS-1(R)

VREF

28

10

27

Bass band filter configuration capacitor


and resistor connection pins

27

BASS-1(L)

11

BASS-2(R)

26

BASS-2(L)

12

OUT(R)

11
26

VREF

Output Impedance
ro=50k

12
25

OUT(L)

25

Continued on next page.


No.8262-12/18

LV1116N/1116NV
Continued from preceding page.
Pin No
13

Function
EVR-IN(R)

Voltage
VREF

Remarks

Internal equivalent circuit

Input Impedance
ri=50k

13
24

24

EVR-IN(L)

14

EVR-OUT(R)

VREF

Output Impedance

14 23

ro=50k

23

EVR-OUT(L)

15

L+R OUT

VREF

Output Impedance
ro=10k

15

16

VREF

0.5VCC

Reference voltage

VCC
16

17

VCC

VCC

18

VDD

VDD

19

I2C-DATA

I2C control data input

20

I C-CLK

21

VSS

22

L+R LPF

0
VREF

Internal resistor

22

29

AViSS HPF

VREF

29

36

ANALOG GND

VREF

36

No.8262-13/18

LV1116N/1116NV
Treble / Bass Band Block Equivalent Circuit Diagram
From L-Input Block

SW3

+
-

SW3

+
-

SW2

To L-OUT Block

SW2

SW1

SW4

SW1

SW4

0dB
2dB

R1=10.633k

4dB

R2=8.446k

6dB

R3=6.709k

8dB

R4=5.329k

10dB

R5=4.233k

12dB

R6=3.363k

14dB

R7=2.671k

16dB

R8=2.122k

18dB

R9=1.665k

0dB

Total=51.7k

R10=6.510k

2dB

R1=15.220k

4dB

R2=12.089k

6dB

R3=9.603k

8dB

R4=7.628k

10dB

R5=6.059k

12dB

R6=4.813k

14dB

R7=3.823k

16dB

R8=3.037k

18dB

R9=2.412k

20dB

R10=1.916k

R12=100
L-TC1

L-BC2

Total=66.7k

R11=100

L-BC1

Same for Right channel

During boost, SW1 and SW3 are ON, during cut, SW2 and SW4 are ON, when 0dB, 0dBSW and SW2 and SW3 are ON.

L+R Block Equivalent Circuit Diagram


From L-VROUT

+
-

R1=50k
Mute
+
-

R4=10k

L+R

R2=50k
From R-VROUT

+
-

Step1

R3=50k

L+R_LPF

Step2

R5=10.284k

Step3

R6=8.169k

Step4

R7=6.489k

Step5

R8=5.154k

Step6

R9=4.094k

Step7

R10=3.252k

Total=50k

R11=12.559k

AGND

ILV00257

No.8262-14/18

LV1116N/1116NV
Tone Circuit Constant Calculation Examples
Treble Band Circuit: The shelving characteristics can be obtained for the treble band.
The equivalent circuit and calculation formula during boost are indicated below.
Calculation example 1
Specification Set frequency: f = 10000Hz
Gain during maximum boost: G+18dB = 17.5dB
Let us use R1 = 6.51k and R2 = 45.19k
The above constants are inserted in the following formula
G = 20 Log10 1+

+
R2

R2

R1

R12+(1/ C)2

1
C=

R2

2f

-R12

10G/20-1

45190

210000

7.50 - 1

6500 (pF)

- 6510

Bass Band Circuit: The equivalent circuit and the formula for calculating the external RC with a mean frequency of
100Hz are shown below.
Calculation example 1
specification
Mean frequency: f0 = 100Hz
Gain during maximum boost: G+20dB = 20dB
Let us use R1 = 0k and R2 = 66.7k, and C1 = C2 = C.

+
R1

R2

We obtain R3 from G = 20dB


G = 20 Log10 1+

R3 =

C1

R2
2R3

R2
2 (10G+20dB/20 - 1)

C2

R3

66700
2 (10 - 1)

3.6k

We obtain C from mean frequency f0 = 100Hz


f0 =

C=

1
(R3R2C1C2)
1

2f0

R3R2

2 100

1
66700 3600

0.1F

We obtain Q
Q=

R3R2
2R3

1
R3R2

2.15

Note item when using


(1) When turning on the power, the setting inside is unsettled.
Before setting control data, it does a mute.
(2) To prevent the digital noise of the high frequency influence a terminal. (SCL, SDA)
It can be protected by a signal line in the ground pattern or by the shielding cable.
(3) To prevent the noise in changing a mode, please set the mute ON.
No.8262-15/18

LV1116N/1116NV
Volume Control Step Characteristics
Vcc = 9.0V
Vin = 0dBV
Input = VRIN
Output = VROUT

-20
-30

Vcc = 9.0V
Vin = -10dBV
Input = L/R Ch-A
Output = L/R OUT

8
6

Gain Attenetion (dB)

-10

Volume attenuation (dB)

Gain - Frequency

10

-40
-50
-60
-70

4
2
0
-2
-4
-6

-80

-8

-90
-90

-80

-70

-60

-50

-40

-30

-20

-10

-10

-6

Step Setting (dB)

-15
-20
-25
-30
-35

-10
-15
-20

-25
-30
-35
-40

-40
-45

-45
10

100

1000

10000

10

100000

100

Frequency (Hz)

-5

10000

100000

L+R Frequency Characteristics


10

Vcc = 9.0V
Vin = -20dBV
Input = L/R Ch-A
Output = L/R OUT

-15
-20

Vcc = 9.0V
Vin = 0dBV
Input = VRIN
Output = VROUT

0
-10

Gain (dBV)

-10

1000

Frequency (Hz)

Surround Mode Frequency Characteristics

Gain (dBV)

0
2
Gain Step (dB)

Vcc = 9.0V
Vin = -20dBV
C = 2700pF
Input = L/R Ch-A
Output = L/R OUT

0
-5

Gain (dBV)

Gain (dBV)

Vcc = 9.0V
Vin = -20dBV
C = 0.1uF
R = 3.6k
Input = L/R Ch-A
Output = L/R OUT

-5
-10

-2

Treble Band Frequency Characteristics

Bass Band Frequency Characteristics


5
0

-4

-20
-30
-40
-50

-25

-60
10

100

1000

10000

100000

10

100

Pseud Lch vs Rch Phese Shift vs Frequency


Characteristics

100000

100.0

Vomax (dBV)

Phase Shift (DEG)

10000

Vcc - Vomax Characteristics (1)

Vcc = 9.0V
Vin = -20dBV
Input = L/R Ch-A
Output = L/R OUT

180

1000

Frequency (Hz)

Frequency (Hz)

90

Total

10.0

Matrix
1.0
THD = 1%
Input = L/R Ch-A
Output = L/R OUT

0.1

0
10

100

1000

Frequency (Hz)

10000

100000

8
Vcc (V)

10

No.8262-16/18

LV1116N/1116NV
THD - Vin characteristics

THD - Vin characteristics (Surround)

Total harmonic distotion (%)

Vcc=9.0V
fin=1kHz

0.1

Total

0.01

Matrix
Mono
Psudo

0.001
-40

-30

-20

-10

Total harmonic distotion (%)

Vcc=9.0V
fin=1kHz
Mode_A

0.1

0.01

0.001
-40

-30

-20

Vin (dBV)

THD - Frequency Characteistics

Vcc=9.0V
Vin=-10dBV

0.1

Total
Matrix
Mono
Psudo
Surround
1000

THD - Supply Voltage Characteristics

10000

Total harmonic distotion (%)

Total harmonic distotion (%)

0.01
100

-10

Vin (dBV)

Total

0.1

Matrix
Mono
Psudo
Surround
0.01
4.0

100000

Vin=-10dBV
fin=1kHz

5.0

6.0

7.0

8.0

9.0

10.0

11.0

Supply Voltage (V)

Frequency (Hz)

VCC - VREF

VCC - VDD
3.3

6.0
5.5

3.1

4.5

VDD (V)

VREF (V)

5.0
4.0
3.5
3.0

2.9

2.7

2.5
2.0
1.5
4.0

5.0

6.0

7.0

8.0

9.0

10.0

2.5
4.0

11.0

5.0

6.0

VCC (V)

60.0

5.0

55.0

4.5

50.0

ICCO (mA)

AGND (V)

65.0

5.5

4.0
3.5
3.0

25.0

VCC (V)

9.0

10.0

11.0

35.0
30.0

8.0

11.0

40.0

2.0
7.0

10.0

45.0

2.5

6.0

9.0

VCC - ICCO

6.0

5.0

8.0

VCC (V)

VCC - AGND

1.5
4.0

7.0

9.0

10.0

11.0

20.0
4.0

5.0

6.0

7.0

8.0

VCC (V)

No.8262-17/18

LV1116N/1116NV

SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
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limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellectual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of January, 2008. Specifications and information herein are subject
to change without notice.

PS No.8262-18/18

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