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Giovanni Anelli
CERN - European Organization for Nuclear Research
Physics Department
Microelectronics Group
CH-1211 Geneva 23 Switzerland
Giovanni.Anelli@cern.ch
Outline
Noise in CMOS IC components
Matching: definitions
Causes of mismatch
Matching characterization
Measurement examples
Matching golden rules
Outline
Noise in CMOS IC components
Matching: definitions
Causes of mismatch
Matching characterization
Measurement examples
Matching golden rules
Noise: definitions
Noise can be defined as any unwanted disturbance that obscures or
interferes with a desired signal.
Noise is an extremely important parameter in analog design. The
resolution of a sensor, the smallest detectable signal in a circuit, the
dynamic range of a system are determined by noise.
Noise is a totally random signal. It consists of frequency components
that are random in both amplitude and phase. The exact noise
amplitude at any instant can not be predicted. We can only measure its
long term root mean square (rms) value, or predict its randomness.
The average power of noise is also predictable.
Most noise sources of interest for us have a Gaussian distribution of
instantaneous amplitudes versus time.
C. D. Motchenbacher and J. A. Connelly, Low Noise Electronic System Design, John Wiley and Sons, 1993.
f(x)
1
p( x ) =
e
2
( x )2
22
0
-8
0.4
0.3
f(x)
: mean value
0.1
-6
-4
-2
0
x
0.2
0.1
0
-8
-6
-4
-2
0
x
John R. Taylor, An Introduction to Error Analysis, University Science Books, 2nd Edition, 1997, Chapter 5.
T T T / 2
[ V2 ]
Power spectral density (PSD): shows how much power the signal (noise
in our case) carries at each frequency. It is generally indicated by S(f),
and measured in V2/Hz.
If a signal (noise) with PSD SIN(f) is applied to a linear time-invariant
system with transfer function H(f), then the output spectrum SOUT(f) is
2
given by:
The average noise power of the sum of two separate noise sources is:
1 T/2
+ lim 2x 1(t )x 2 (t )dt
T T T / 2
The last term express the correlation between the 2 noise sources
Puebla, December 2004
Thermal noise
Thermal noise is caused by the random thermally excited vibration of the
charge carriers in a conductor.
Thermal noise was first observed by J. B. Johnson in 1927, and a
theoretical analysis was provided by H. Nyquist in 1928.
Thermal noise is therefore also called Johnson or Nyquist noise.
R
S v (f ) = 4kTR , f 0
2
n
vn2 = 4kTR f
Noiseless
resistor
[V 2 ]
S v (f )
4kTR
f
Puebla, December 2004
[V 2 /Hz]
Shot noise
Shot noise is always associated with a direct current flow. It is present in
diodes, MOS transistors and bipolar transistors. Shot noise is given by
the current granularity, and it is associated with current flow across a
potential barrier.
Si (f ) = 2qI
Noiseless
diode
in2
in2 = 2qI f
q = 1.6 10 19 C
Si ( f )
2qI
f
Puebla, December 2004
f0
[A 2 /Hz]
[A 2 ]
(Electroni c charge)
1/f noise
1/f noise (also called flicker noise, excess noise, pink noise, lowfrequency noise and semiconductor noise) is found in all active devices
as well as in some discrete passive components as carbon resistors.
It exists only in association with a direct current.
The origins of flicker noise are varied, but it is caused mainly by traps
associated by contamination and crystal defects.
Ib
S1 / f ( f ) = K
f
f0
[A /Hz]
Ib
i = K f
f
2
n
S1 / f ( f )
The power spectral density of 1/f noise
depends on frequency!
f
P. R. Gray et al., Analysis and design of analog integrated circuits, John Wiley and Sons, 4th Edition, 2002, Chapter 11.
[A 2 ]
vn2 = 4kTR f
[V 2 ]
in2
4kT
i =
f
R
2
n
[A 2 ]
N.B. Discrete
resistors made
with carbon
granules also
show 1/f noise
Noise in circuits
To be independent from the gain of a given system, we use the concept
of input-referred noise. This allows comparing easily the noise
performance of different circuits (with different gains), and calculating
easily the Signal-to-Noise Ratio (SNR).
At the input of our linear two-port circuit, we use two noise generator
(one noise voltage source and one noise current source) to represent
the noise of the system regardless the impedance at the input of the
circuit and of the source driving the circuit.
vn2,in
Noisy
circuit
vn2 ,out
in2,in
Noiseless
circuit
vn2 ,out
A. L. McWhorter, Semiconductor Surface Physics, University Pennsylvania Press, 1956, pp. 207-227.
i2d
= Sid = 4kTngm
f
i2f
K
1 2
= Sif = 2 a
gm
f
Cox WL f
i2dB
2
= SidB = 4kTR Bgmb
f
Z.Y. Chang and W.M.C. Sansen, "Low-noise wide-band amplifiers in bipolar and CMOS technologies", Kluwer Academic Publishers, 1991.
f
gm Cox WL f
gm
Channel thermal
noise
= F(I.C.)
1/f noise
Gate resistance
thermal noise
Bulk resistance
thermal noise
F(I.C.) =
0.64
F(I.C.)
0.62
1 1
+
2 6 1
4
I.C.
0.6
IDS
I.C. =
2n 2t
0.58
0.56
0.54
0.52
0.5
0.001
0.01
0.1
10
100
1000
10000
kT
t =
q
I.C.
W.I.
M.I.
S.I.
Y. Tsividis, Operation and Modeling of The MOS Transistor, 2nd edition, McGraw-Hill, 1999, pp. 426-427
1 + 4 I.C. + 1
2
in
Ka
g
v
1
1
= 4kTn
+ 2
+ 4kTR G + 4kT
RB
f
gm Cox WL f
g
We stay in the white
region of the spectrum
2
v in2
g
f
g
m
= b
+ a
S. Tedja et al., Noise Spectral Density Measurements of a Radiation Hardened CMOS Process in the Weak and Moderate Inversion, IEEE
Transactions on Nuclear Science (IEEE TNS), vol. 39, no. 4, 1992, pp. 804-808.
S. Tedja et al., Analytical and Experimental Studies of Thermal Noise in MOSFET's, IEEE Transactions on Electron Devices (IEEE TED),
vol. 41, no. 11, November 1994, pp. 2069-2075.
vout
vin
DUT
E n ,DUT ( f ) =
Transimpedance
Stage
Gain
Stage
Vn2,TOT ( f ) Vn2,BGD ( f )
G(f )
Spectrum
Analyzer
gm /IDS [ 1/V ]
25
20
15
10
5
IDS = 0.5 mA
0
1E-11 1E-10 1E-09 1E-08
IDS/W [ A/ m ]
Puebla, December 2004
Noise [ V/sqrt(Hz) ]
L = 0.36um
L = 0.5um
L = 0.64um
L = 0.78um
L = 1.2um
1.E-08
1.E-09
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
Frequency [ Hz ]
Puebla, December 2004
1.E+07
1.E+08
Noise [ V/sqrt(Hz) ]
L = 0.36um
L = 0.5um
L = 0.64um
L = 0.78um
L = 1.2um
1.E-08
1.E-09
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
Frequency [ Hz ]
Puebla, December 2004
1.E+07
1.E+08
Noise [ V/sqrt(Hz) ]
1.E-07
Weak Inversion
Moderate Inversion
Strong Inversion
1.E-08
1.E-09
1.E-10
1.E+02
1.E+03
1.E+04
1.E+05
Frequency [ Hz ]
Puebla, December 2004
1.E+06
1.E+07
1.E+08
3.5
3
2.5
2
1.5
1
0.5
0
0.2
0.4
0.6
0.8
Gate Length [ m ]
Puebla, December 2004
1.2
3.5
2.5
1.5
1
0.3
0.4
0.5
0.6
0.7
0.8
0.9
Gate Length [ m ]
Puebla, December 2004
1.1
1.2
Outline
Noise in CMOS IC components
Matching: definitions
Causes of mismatch
Matching characterization
Measurement examples
Matching golden rules
M.J.M. Pelgrom et al., Matching Properties of MOS Transistors, IEEE Journal of Solid-State Circuits (IEEE JSSC), vol. 24, no. 10, 1989, p. 1433.
M.J.M. Pelgrom et al., A 25-Ms/s 8-bit CMOS A/D Converter for Embedded Application, IEEE JSSC, vol. 29, no. 8, Aug. 1994 , pp. 879-886.
What is matching?
DEFINITION:
Matching is the
statistical study of the
differences between
identically designed
components placed at a
small distance in an
identical environment
and used with the same
bias conditions
D = D1 D 2 [ m]
Relative mismatch
Absolute mismatch
n+
n+
p-substrate (Na)
SUBSTRATE
CHANNEL
DEPLETED
SUBSTRATE
GATE
S&D
DIFFUSIONS
OXIDE
INTERCONNECTION
(METAL)
GATE
(POLYSILICON)
ACTIVE AREA
(S & D DIFFUSIONS)
W
Puebla, December 2004
CONTACT
Giovanni Anelli, CERN
Mismatch is given by
differences in physical
parameters (such as tox,
Na, ) as well as layout
dimensions (W, L)
Mismatch in
Na, , Tox
Mismatch in
W and L
IDS1
VGS1
Puebla, December 2004
IDS =
Parameter
mismatch
IDS2
( VGS VT )2
2n
VGS2
I mismatch
and V offset
VT and
VGS and
ID
ID
Systematic effects:
Stochastic effects:
Ion implantation
Dimensional errors
Dopant diffusion
Device orientation
Dopant clustering
Mechanical stress
Interface states
Temperature differences
Edge roughness
Different DC bias
Parasitic components
VT 10 - 50 mV
5 - 15 %
2 20 mm
VT 2 - 20 mV
1 - 10 %
Matched transistors
1 100 m
The short distance
between the two devices
eliminates the systematic
effects and leaves only the
stochastic effects
VT 0.1 - 10 mV
0.1 - 5 %
Systematic differences:
Technological
Offset
Environmental
True mismatch
Distance effects:
H. P. Tuinhout, "Design of Matching Test Structures", Proceedings IEEE 1994 International Conference on Microelectronic Test Structures,
vol. 7, March 1994, pp. 21-27.
I V ( VGS1 VT ) = gm V
n
I
gm R
I
I
1
2
R
V
VDS1
VDS2
I
VDS
I
VT 1 to 3 mV/ C
0.5 %/ C
Type of package
Bonding wires
Chip attachment (glue)
Distance effects
Strong gradients across a wafer can be a source of mismatch. This can
appear as a random effect if we do not know where the chips were
taken on the wafer.
This effect, which is important only for large devices or large distances,
can be accounted for in the following way:
2P
A P2
=
+ SP2 D2
WL
P =
AP
WL
P
AP
1/ WL [1/m]
K. R. Lakshmikumar, R. A. Hadaway and M. A. Copeland, "Characterization and Modeling of Mismatch in MOS Transistors for Precision Analog
Design", IEEE Journal of Solid-State Circuits, vol. 21, no. 6, December 1986, pp. 1057-1066.
Matching characterization
Matching characterization
Matching is a statistical study. Therefore, for a
given transistor pair, we need to measure a
statistically significant number N of matched
pairs. The fractional uncertainty in is:
100
90
80
70
60
50
40
30
20
10
0
Counts
Counts
1
2(N 1)
-8
-6
-4
-2
100
90
80
70
60
50
40
30
20
10
0
10
VT [mV]
-8
-6
-4
-2
VT [mV]
John R. Taylor, An Introduction to Error Analysis, University Science Books, 2nd Edition, 1997, p. 140.
10
Expected mismatch
Vth =
2
/
A Vth
WL
A C2 ox
A 2W
A L2
=
+
+ 2 +
W L W L W L W L2
t ox 4
AN = 2 C
N
ox
q t ox
A IT = 2
NIT
ox
/ =
A
WL
From the
literature
Behind each
point of this plot
there are 180
measurements
4.3 / 0.28
5
4.6 / 0.36
4.5
Vth [mV]
4
3.5
5.2 / 0.5
3
2.5
2
23.2 / 5
1.5
The same
behavior is found
for the
mismatch
7.2 / 1
A Vth = 4 mV m
0.5
0
0
0.2
0.4
0.6
(Gate Area)
Puebla, December 2004
-1/2
0.8
1.2
[1/ m]
Giovanni Anelli, CERN
3
GATE
(POLYSILICON)
ACTIVE AREA
(S & D DIFFUSIONS)
D24
S
D13
INTERCONNECTION
(METAL1)
CONTACT
INTERCONNECTION
(METAL2)
M1 - M2 Via
4
G13