ELCT 604: Electronic Circuits

chapter 5:

Differential Amplifiers, Current Mirrors

and Active Loads
(Continued)
Associate Prof. Dr. Soliman Mahmoud
Faculty of Information Engineering and Technology
Electrical and Electronic Department
Soliman.awad@guc.edu.eg
Assistant Prof. Dr. Ahmed H. Madian
Faculty of Information Engineering and Technology
Electrical and Electronic Department
Spring 2010
ahmed.madian@guc.edu.eg

4. Simple Current Source (or Mirror)

The simplest form of a current mirror
consists of two transistors. The shown
Figure shows a bipolar version of this
mirror. Transistor Q3 is diode connected,
forcing its collector-base voltage to zero. In
this mode, the collector-base junction is off
and Q3 operates in the active region.
Assume that Q4 also operates in the
forward-active region. Then IEE= IC4 is
controlled by VBE4, which is equal to VBE3
by KVL. (VBE4 = VBE3)

VBE 4 VT ln(

VCC
IREF
E

Rref

IEE

IC3

IB3

Q3

IC 4
) = VBE 3 VT ln( I C 3 )
I Co 4
I Co3

VBE3

IC4

IB4
+
VBE4
-

Q4

If the transistors are identical, ICO3 = ICO4 and from the above equation shows that the current
flowing in the collector of Q3 is mirrored to the collector of Q4 ( IC4=IC3).
Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
2

4. Simple Current Source (or Mirror)

VCC

By applying KCL at node (1)

I REF I EE

I EE

I REF

2
(1 )

2 I EE

IREF

I EE I REF

IEE

(1)
IEE
if

Where

I REF

Rref

IEE/
Q3
+

VBE3

IEE/
+
VBE4
-

Q4

(VCC VBE 3 ) (VCC 0.7)

Rref
Rref
Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
3

Complete Differential Amplifier with

actual Current Source
VCC

RC

RC

Rref

vo1

vo 2
Q2

Q1

IREF

vi1

vi 2
VDC1 VICM

Q3

IEE

VDC 2 VICM

Q4

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
4

5. Active Loads
The differential mode gain Adm is given by :

Adm

BJT

g m RC

1
( I C * RC )
VT

To achieve large voltage gain, the above equations shows that the

( I C * RC )

BJT

product must made large which in turn requires a large power-supply voltage.
Furthermore, large values of resistance are required. As a result the required die
area for the resistors can be large.

To overcome this problem and provide large gain without large power supply
voltages or resistances, the ro of a transistor can be used as a load element.
Since the load element in such a circuit is a transistor instead of a resistor,
the load element is said to be active load.
Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
5

Example:

Active load

Biasing of Active load

VCC

VCC

VCC

Vbias

RL

Q2

(DC Voltage)

ro2

Q1

vi

Q2
vout
vi

Q1

Rout

Rout
Rin

Q3

vout

vout
vi

Active load

Q1

Rref

Rout
Rin

Rin

CE with Resistive Load

CE with Active Load biased

by a DC voltage

CE with Active Load biased

by a current source

Rin r 1 & Rout RL // ro1

Rin r 1 & Rout ro 2 // ro1

Rin r 1 & Rout ro 2 // ro1

vout
n ( RL // ro1 )

vin
r 1

vout
(r // r )
n o 2 o1
vin
r 1

vout
(r // r )
n o 2 o1
vin
r 1

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
6

Complete Differential Amplifier with Actual

Current Source and Active Loads
VCC

Circuit Description:
Q7

1. Q1 and Q2 :
Differential pair transistors

Rref1

vo1

IREF1

Q5

vo 2
Q2

Q1

2. Q3, Q4 and Rref1:

Current source of the
differential pair transistors
3. Q5, Q6, Q7 and Rref2 :
Active loads and the
biasing of the active loads

Q6

vi 2

vi1
VICM

IEE

VICM
Rref2
IREF2

Q3

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

Q4

ELCT 604, Electronic Circuits

Spring 2007
7

Differential input- Single ended output Amplifier with

Actual Current Source and Active Loads
VCC

Circuit Description:
Q5

1. Q1 and Q2 :
Differential pair transistors

Q6

Rref1

2. Q3, Q4 and Rref1:

Current source of the
differential pair transistors

vo
+

Q2

Q1

vin
-

IREF1

V ICM

IEE

3. Q5 and Q6:
Active loads and the
biasing of the active loads

Q3

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

Q4

ELCT 604, Electronic Circuits

Spring 2007
8

Example:

VCC

For the shown differential input

single output amplifier, find:
1.
2.
3.
4.
5.

Q5

The input resistance

The output resistance
The ac output current
The transconductance Gain
The voltage Gain

I C 1 I C 2 I C 5 I C6

I C 3 I C 4 I ref
ro1 ro 2

iout

Rref1

vo

Q2

Q1

vin
-

Assumptions:
1. Q1, Q2 are matched
2. Q3, Q4 are matched
3. Q5, Q6 are matched
4. n and p are large
Therefore,

Q6

IREF1

Rout

V ICM

IEE

Rin
Q3

Q4

I ref 1
2

VAn
VAp
VAn
ro 3 ro 4
and
r

o
5
o
6
( I C1 I C 2 ) ,
(IC3 IC 4 ) ,
(IC5 IC 6 )

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

r 1 r 2

( I C1 I C 2 )
}
VT

ELCT 604, Electronic Circuits

Spring 2007
9

1. The input resistance

r 2
Rin r 1 (1 n )( ro 4 //(
)
1 n

Q5

iout

Rref1

vout

v in

Rin r 1 r 2 2r 1 2r 2

Q2

Q1

+
-

ro4

2. The output resistance

Rout ro 6 //{ro 2 (1 g m 2 ro 2 )( ro 4 //

Q6

r 1
)}
(1 n )

Rout

Rin
Q3

Q4

Rout ro 6 // 2ro 2

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
10

3. The ac output current

iout 2 nib1
nib1

vin ib1 * Rin 2r 1ib1

iout

n
r 1

Q6

vin g m1vin

v in

vout

nib1

nib1
Q2

Q1

nib1

3. Transconductance gain

nib1

iout

Rref1

ib1

nib1

Rout

0
Rin

iout
GM g m1
vin
4. Voltage gain

Q5

Q3

ro4

Q4

vout iout Rout

GM Rout
vin
vin
Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
11

Differential Amplifiers, Current Mirrors

and Active Loads
Objective:
The objective from this chapter is:
1. Define and characterize MOS differential amplifier.
2. Show the large signal and small signal performance of
MOS differential amplifier.
Outlines(2nd lecture):
1. Large Signal Currents and Voltages Transfer Function
of MOS differential amplifier.
2. Small Signal performance of MOS differential amplifier.
3. Simple MOS Current Source (Or Mirror).
5. MOS Active loads

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
12

1. Large Signal Currents and

Voltages Transfer function of MOS
Differential amplifier
Consider
the
following
NMOS
differential amplifier (sometimes called an
source-coupled pair)
Objectives:
(1) Calculation DC currents ID1 and ID2 as
a function of the biasing current source
ISS and the input differential voltage
Vid=Vi1-Vi2.
(2) Calculation output differential voltage
Vod= Vo1- Vo2 as a function of biasing
current source ISS, drain resistors RD
and input differential voltage Vid=Vi1Vi2.
Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

ID1

ID2
S

ISS

RSS

ELCT 604, Electronic Circuits

Spring 2007
13

Assumptions:
1. Assume M1 and M2 are identical and
operating in the saturation region.
Therefore:

K1 K 2 K

&

VT 1 VT 2 VT

K
I D1 (VGS 1 VT ) 2
2

I D2

2 I D1
K

ID2

K
(VGS 2 VT ) 2
2

&

VGS 1 VT

ID1

ISS

VGS 2 VT

RSS

2I D 2
K

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
14

The Basic equation of the SCC is :

VS Vi1 VGS 1 Vi 2 VGS 2

Therefore

Vi1 V i 2 Vid VGS 1 VGS 2

ID1

ID2

2
( I D1 I D 2 )
K

Definition:
The output current of the NMOS Differential pair :
ISS

I out I D1 I D 2

RSS

The currents of M1 and M2 can be written as:

K
K 2
2
I D1 (VGS 1 VT ) A
2
2

&

I D2

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

K
2

(VGS 2 VT ) 2

K 2
B
2

ELCT 604, Electronic Circuits

Spring 2007
15

Therefore:

I out

K 2
K
2
( A B ) ( A B)( A B )
2
2

Where

A B VGS 1 VGS 2 Vid

And

I D1 I D 2

ID1

ID2

K 2
( A B 2 ) I SS
2

Note

( A B) 2 ( A B) 2 2( A 2 B 2 )

ISS

RSS

Therefore:

I SS
( A B) 4
V 2 id
K
2

I SS
V 2 id
( A B) 4
( 1
)
K
4 I SS / K

I out

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

V 2 id
I SS K Vid ( 1
)
4 I SS / K
ELCT 604, Electronic Circuits
Spring 2007
16

I out I D1 I D 2

V 2 id
I SS K Vid ( 1
)
4 I SS / K

and

I D1 I D 2 I SS

ID1

ID2

Therefore:

I SS 1
V 2 id
I D1

I SS K Vid ( 1
)
2 2
4 I SS / K

I D2

ISS

RSS

I SS 1
V 2 id

I SS K Vid ( 1
)
2 2
4 I SS / K
Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
17

I SS 1
V 2 id
I D1

I SS K Vid ( 1
)
2 2
4 I SS / K

&

I D2

I SS 1
V 2 id

I SS K Vid ( 1
)
2 2
4 I SS / K

Notes:
Vid

1. At

Vid

2 I SS
K
2 I SS
K

I D1 I SS & I D 2 0

(M1 is ON & M2 Is Off)

I D1 0 & I D 2 I SS

(M1 is Off & M2 Is ON)

2 I SS
K
The nonlinear term of output current can be neglected and the output
current is given by:

2. If

Vid

I SS 1
I D1

I SS K Vid
2 2
and

I out

I D2

I SS 1

I SS K Vid
2 2

I SS K Vid

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
18

I SS 1
V 2 id
I D1

I SS K Vid ( 1
)
2 2
4 I SS / K

&

I D2

I SS 1
V 2 id

I SS K Vid ( 1
)
2 2
4 I SS / K

ID1, ID2
ISS
ID2

2 I SS
0.1V
K
2 I SS
0.25V
K

ID1

0.5 ISS

2 I SS
0.5V
K

2 I SS
0.1V
K
2 I SS
0.25V
K
2 I SS
0.5V
K

Source-coupled pair Drain currents as a function of differential input voltage.

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
19

Notes :

3. We can now compute the output voltages as:

Vo1 VDD I D1 RD
Vo 2 VDD I D 2 RD

Vod [ RD

Vod ( I D1 I D 2 ) RD I out RD

V 2 id
I SS K ( 1
) ]Vid
4 I SS / K

If Vid

2 I SS
K

Vod RD I SS K Vid

Vod
ISS RD

0
Slope RD I SS K

- ISS RD
Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

2 I SS
0.1V
K
2 I SS
0.25V
K
2 I SS
0.5V
K

ELCT 604, Electronic Circuits

Spring 2007
20

Optimum DC operating Point

From the previous Figure, the optimum DC operating for linear operation
between the output and the input differential voltage is at Vid =0.
At Vid =0, we have

I D1 I D 2

I SS

rds1 rds 2

1
2

1or 2 I D1or 2 I SS

g m1 g m 2 2 KI D1or 2 KI SS

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
21

2. Small-Signal Analysis of MOSDifferential Amplifiers

VDD

Objectives :

(1)Calculation differential
mode gain (Adm)
(2)Calculation common
mode gain (Acm)
(3)Calculation common
mode rejection ratio
(CMRR)

RD

RD

v o1

vo 2
Q2

M1

vi1
VDC1 VICM

vi 2
ISS

RSS

VDC 2 VICM

Using Half Circuit Concept

(HCC)
VSS

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
22

VDD

RD

RD

v o1

vo 2

vo1

Q2

M1

vod
voc
2

RD

RD

M1

vi1
VDC1 VICM

vo 2

vod
voc
2

M2

vi 2
ISS

RSS

VDC 2 VICM

vi1

vid
vic
2

vi 2
RSS

vid
vic
2

VSS

v od
2

RD

RD

M1

vid
2

Differential
mode
circuit

vod
2

RD

RD

voc

v oc

M2

M1

v
id
2

vic

Common
mode
circuit

2 RSS

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

M2
2 RSS

vic

ELCT 604, Electronic Circuits

Spring 2007
23

Differential Mode Gain Adm, Common Mode Gain Acm

and Common Mode Rejection Ratio CMRR

RD

RD

v od
2

voc

rds is neglected
M1

M1

vid
2

2 RSS

vic

v
Adm od g m RD
vid

A
CMRR dm 1 2 g m RSS
Acm

Acm

voc
g m RD

vic
1 2 g m RSS

Note that increasing the output resistance of

the biasing current source improves the
common-mode-rejection ratio

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
24

3. Simple Current Source (or Mirror)

The simplest form of a current mirror
consists of two transistors. The shown
Figure shows a NMOS version of this
mirror. Transistor M3 is diode connected,
forcing its Drain-Gate voltage to zero. In
this mode, M3 operates in the sat. region.
Assume that M4 also operates in the
saturation region. Then ISS= ID4 is
controlled by VGS4, which is equal to VGS3
by KVL. (VGS4 = VGS3)

VGS 4

VDD
IREF
S

Rref

ISS

ID4

ID3
M3

2 I DS 4
2 I DS 3
VT
= VGS 3 VT
K4
K3

VGS3

M4

VGS4
-

If the transistors are identical, K3 = K4 and from the above equation shows that the current
flowing in the Drain of M3 is mirrored to the Drain of M4 ( ID4=ID3=Iref).
Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
25

Complete Differential Amplifier with

actual Current Source
VDD

RD

RD

Rref

vo1

vo 2
M2

M1

IREF

vi 2

vi1
VDC1 VICM

M3

ISS

VDC 2 VICM

M4

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
26

3. Active Loads
The differential mode gain Adm is given by :

Adm

MOS

g m RD 2 K ( I D * RD )

To achieve large voltage gain, the above equations shows that the ( I D * RD )

MOS

product must made large which in turn requires a large power-supply voltage.
Furthermore, large values of resistance are required. As a result the required die
area for the resistors can be large.

To overcome this problem and provide large gain without large power supply
voltages or resistances, the rds of a transistor can be used as a load element.
Since the load element in such a circuit is a transistor instead of a resistor,
the load element is said to be active load.
Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
27

Example:

Active load

Biasing of Active load

VDD

VDD

VDD

Vbias

RL

(DC Voltage)

M2

vout
vi

M2

M3

vout
vi

M1

M1

Rref

Rout

Rout
Rin

rds2
vout

vi

M1

Active load

Rout
Rin

Rin

CS with Resistive Load

CS with Active Load biased

by a DC voltage

CS with Active Load biased

by a current source

Rin & Rout RL // rds1 Rin & Rout rds 2 // rds1 Rin & Rout rds 2 // rds1

vout
g m1 ( RL // rds1 )
vin

vout
g m1 (rds 2 // rds1 )
vin

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

vout
g m1 (rds 2 // rds1 )
vin
ELCT 604, Electronic Circuits
Spring 2007
28

Complete Differential Amplifier with Actual

Current Source and Active Loads
VDD

Circuit Description:
M7

1. M1 and M2 :
Differential pair transistors

Rref1

vo1

IREF1

M5

vo 2
M2

M1

2. M3, M4 and Rref1:

Current source of the
differential pair transistors
3. M5, M6, M7 and Rref2 :
Active loads and the
biasing of the active loads

M6

vi 2

vi1
VICM

IEE

VICM
Rref2
IREF2

M3

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

M4

ELCT 604, Electronic Circuits

Spring 2007
29

Differential input- Single ended output Amplifier with

Actual Current Source and Active Loads
VDD

Circuit Description:
M5

1. M1 and M2 :
Differential pair transistors

M6

Rref1

2. M3, M4 and Rref1:

Current source of the
differential pair transistors

iout
vo

M2

M1

vin
-

IREF1

Rout

V ICM

ISS

3. M5 and M6:
Active loads and the
biasing of the active loads

Rin
M3

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

M4

ELCT 604, Electronic Circuits

Spring 2007
30

Example:

VDD

For the shown differential input

single output amplifier, find:
1.
2.
3.
4.
5.

M5

The input resistance

The output resistance
The ac output current
The transconductance Gain
The voltage Gain

Rref1

rds1 rds 2

M2

M1

vin
-

IREF1

Rout

V ICM

ISS

Rin

Therefore,

M3

I D 3 I D 4 I ref 1

iout
vo

Assumptions:
1. M1, M2 are matched
2. M3, M4 are matched
3. M5, M6 are matched

I D1 I D2 I D 5 I D6

M6

M4

I ref 1
2

1or 2 ( I D1 I D 2 ) , rds3 rds 4

3or 4

1
( I D3 I D 4 )

and

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

rds5 rds6

5or 6 ( I D 5 I D 6 )

ELCT 604, Electronic Circuits

Spring 2007
31

VDD

1. The input resistance

M5

Rin

M6

Rref1

iout
vo

M2

M1

vin
-

IREF1

Rout

V ICM

rds4

Rin
M3

M4

2. The output resistance

Rout rds6 //{rds 2 (1 g m 2 rds 2 )( rds 4 //

1
)}
g m1

Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian

Electronics and Electrical Engineering Department

Rout rds 6 // 2rds 2

ELCT 604, Electronic Circuits
Spring 2007
32

VDD

3. The ac output current

iout 2 g m1vgs1

M5

g m1vgs1 g m 2 vgs 2

gm1 vgs1 iout

Rref1
gm1 vgs1

gm1 vgs1

1
gs

vin

M2

M1

-v

vin1 vgs1 vgs 2 2vgs1

+v

gs
2

iout g m1vin

vo

vgs vgs 2

Rout

IREF1

3. Transconductance gain

rds4

Rin

iout
GM g m1
vin

4. Voltage gain

M6

gm1 vgs1

M3

M4

vout iout Rout

GM Rout
vin
vin
Associate Prof. Dr. Soliman Mahmoud & Dr. Ahmed Madian
Electronics and Electrical Engineering Department

ELCT 604, Electronic Circuits

Spring 2007
33