ITSE4201 Machine and Assembly Language

8086 Programs
Practical Appendix

Index
Sno

Program

Page No

8-Bit addition using Immediate Addressing mode

8-Bit addition using Direct Addressing mode

8-Bit addition using Indirect Addressing mode

8-Bit subtraction using Immediate Addressing mode

10

8-Bit subtraction using Direct Addressing mode

11

8-Bit subtraction using Indirect Addressing mode

12

8-Bit multiplication using Immediate Addressing mode

13

8-Bit multiplication using Direct Addressing mode

14

8-Bit multiplication using Indirect Addressing mode

15

10

8-Bit division using Immediate Addressing mode

16

11

8-Bit division using Direct Addressing mode

17

12

8-Bit division using Indirect Addressing mode

18

13

16-Bit addition using Immediate Addressing mode

19

14

16-Bit addition using Direct Addressing mode

20

15

16-Bit addition using Indirect Addressing mode

21

16

16-Bit subtraction using Immediate Addressing mode

22

17

16-Bit subtraction using Direct Addressing mode

23

18

16-Bit subtraction using Indirect Addressing mode

24

19

16-Bit multiplication using Immediate Addressing mode

25

20

16-Bit multiplication using Direct Addressing mode

26

21

16-Bit multiplication using Indirect Addressing mode

27

22

16-Bit division using Immediate Addressing mode

28

23

16-Bit division using Direct Addressing mode

29

24

16-Bit division using Indirect Addressing mode

30

25

Addition of 8-Bit array elements

31

26

Check if the given value is positive, negative or zero

32

27

Addition of 8-Bit array elements

33

28

Addition of series 1 + 2 + 3 + + n (8- bit hexadecimal values)

34

29

Printing / Generating series on memory locations ( 0, 1, 2, 3 UPTO N TERMS)

35

30

Printing / Generating series on memory locations ( 0, 2, 4, 6 UPTO N TERMS)

36

31

Finding Largest value from array

37

32

Finding Smallest value from array

38

33

Block Move (Moving a block of data from one location to another)

39

Steps to execute an assembly program using

EMU8086
Step 1: Select empty work space and type the program
Step 2: Compile the program

Step 3: Run the program

Step 4: Observe the changes in the registers during program execution

Step 5: Observe the changes in the memory locations during program execution

Step 6: Observe the changes in the flag register during program execution

Step 7: Run till program halts and note the values in registers and memory locations

1.

8-Bit addition using Immediate Addressing mode

ORG 100H
MOV AL, 05DH
MOV BL, 0A3H
ADD AL, BL
HLT

Input is already hard coded in the program.

AX

BX

CX

DX

Input
AH

AL

BH

5D

AX

BL

CH

CL

DH

DL

3A

BX

CX

DX

Output
AH

AL

BH

BL

CH

CL

DH

DL

Registers
00

Output

ZF

Flags

3A

SF

AF

PF

CF

2. 8-Bit addition using Direct Addressing mode

ORG 100H
MOV AL, V1
MOV BL, V2
ADD AL, BL
MOV V3, AL
HLT
V1 DB 05DH
V2 DB 0A1H
V3 DB 000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

5D

AX

BL

CH

CL

DH

DL

A1

BX

CX

DX

Output
AH

AL

BH

BL

CH

CL

DH

DL

Registers
FE

Output
Flags

ZF

A1

SF

AF

PF

CF

3. 8-Bit addition using Indirect Addressing mode

ORG 100H
LEA SI, V1
LEA BX, V2
LEA DI, V3
MOV AL, [SI]
MOV BL, [BX]
ADD AL, BL
MOV [DI], AL
HLT
V1 DB 05DH
V2 DB 0A2H
V3 DB 000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

5D

AX

BL

CH

CL

DH

DL

SI

A1

BX

CX

DX
ZF

Output
AH

AL

BH

DI

BL

CH

CL

DH

SF

AF

PF

CF

DL

Registers

1
FE

A1

Output
Memory

None

4. 8-Bit subtraction using Immediate Addressing mode

ORG 100H
MOV AL, 0FDH
MOV BL, 0A3H
SUB AL, BL
HLT

Input is already hard coded in the program.

AX

BX

CX

DX

Input
AH

AL

BH

FD

AX

BL

CH

CL

DH

DL

A3

BX

CX

DX

Output
AH

AL

BH

BL

CH

CL

DH

DL

Registers
5A

Output
Flags

ZF

3A

SF

AF

PF

CF

10

5. 8-Bit subtraction using Direct Addressing mode

ORG 100H
MOV AL, V1
MOV BL, V2
SUB AL, BL
MOV V3, AL
HLT
V1 DB 0EDH
V2 DB 0A1H
V3 DB 000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

ED

AX

BL

CH

CL

DH

DL

A1

BX

CX

DX

Output
AH

AL

BH

BL

CH

CL

DH

DL

Registers
4C

Output

ZF

A1

SF

AF

PF

CF

Flags

11

6. 8-Bit subtraction using Indirect Addressing mode

ORG 100H
LEA SI, V1
LEA BX, V2
LEA DI, V3
MOV AL, [SI]
MOV BL, [BX]
SUB AL, BL
MOV [DI], AL
HLT
V1 DB 0E4H
V2 DB 0A2H
V3 DB 000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

E4

AX

BL

CH

CL

DH

DL

SI

A2

BX

CX

DX
ZF

Output
AH

AL

BH

DI

BL

CH

CL

DH

SF

AF

PF

CF

DL

Registers

1
42

A2

Output
Memory

None

12

7. 8-Bit multiplication using Immediate Addressing mode

ORG 100H
MOV AL, 011H
MOV BL, 003H
MUL BL
HLT

Inputs are given using Immediate addressing mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

11

AX

BL

CH

CL

DH

DL

SI

03

BX

CX

DX
ZF

Output
AH

AL

BH

DI

BL

CH

CL

DH

SF

AF

PF

CF

DL

Registers
33

03

Output
Memory

None

13

8. 8-Bit multiplication using Direct Addressing mode

ORG 100H
MOV AL, V1
MOV BL, V2
MUL BL
MOV V3, AL
HLT
V1 DB 022H
V2 DB 004H
V3 DB 000H

Inputs are given using vectors V1, V2, V3 mentioned in the program.
AX

BX

CX

DX

Input
AH

AL

BH

22

AX

BL

CH

CL

DH

DL

SI

04

BX

CX

DX
ZF

Output
AH

AL

BH

DI

BL

CH

CL

DH

SF

AF

PF

CF

DL

Registers
88

04

Output
Memory

None

14

9. 8-Bit multiplication using Indirect Addressing mode

ORG 100H
LEA SI, V1
LEA BX, V2
LEA DI, V3
MOV AL, [SI]
MOV BL, [BX]
MUL BL
MOV [DI], AL
HLT
V1 DB 033H
V2 DB 003H
V3 DB 000H

Inputs are given using vectors V1, V2, V3 mentioned in the program.
AX

BX

CX

DX

Input
AH

AL

BH

33

AX

BL

CH

CL

DH

DL

SI

03

BX

CX

DX
ZF

Output
AH

AL

BH

DI

BL

CH

CL

DH

SF

AF

PF

CF

DL

Registers
99

03

Output
Memory

None

15

10. 8-Bit division using Immediate Addressing mode

ORG 100H
MOV AL, 00EH
MOV BL, 003H
DIV BL
HLT

Inputs are given using immediate data mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

0E

AX

BL

CH

CL

DH

DL

SI

DI

03

BX

CX

DX

ZF

SF

AF

PF

CF

Output
AH

AL

02

04

BH

BL

CH

CL

DH

DL

Registers
03

AH remainder, AL Quotient

Output
Memory

None

16

11. 8-Bit division using Direct Addressing mode

ORG 100H
MOV AL, V1
MOV BL, V2
DIV BL
MOV V3, AX
HLT
V1 DB 019H
V2 DB 004H
V3 DW 0000H

Inputs are given using vectors V1, V2 data mentioned in the program.
AX

BX

CX

DX

Input
AH

AL

BH

19

AX

BL

CH

CL

DH

DL

SI

DI

04

BX

CX

DX

ZF

SF

AF

PF

CF

Output
AH

AL

01

06

BH

BL

CH

CL

DH

DL

Registers
04

AH remainder, AL Quotient

Output
Memory

None

17

12. 8-Bit division using Indirect Addressing mode

ORG 100H
LEA SI, V1
LEA BX, V2
LEA DI, V3
MOV AL, [SI]
MOV BL, [BX]
DIV BL
MOV [DI], AX
HLT
V1 DB 019H
V2 DB 007H
V3 DW 000H

Inputs are given using vectors V1, V2 data mentioned in the program.
AX

BX

CX

DX

Input
AH

AL

BH

19

AX

BL

CH

CL

DH

DL

SI

DI

07

BX

CX

DX

ZF

SF

AF

PF

CF

Output
AH

AL

04

03

BH

BL

CH

CL

DH

DL

Registers
07

AH remainder, AL Quotient

Output
Memory

None

18

13. 16-Bit addition using Immediate Addressing mode

ORG 100H
MOV AX, 0E15DH
MOV BX, 017A3H
ADD AX, BX
HLT

Inputs are given using immediate data mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

E1

15

17

A3

AX

BX

CH

CX

CL

DH

DL

SI

DX
ZF

Output
AH

AL

BH

BL

CH

CL

DH

00

17

SF

AF

PF

CF

DL

Registers
F9

DI

A3

Output
Memory

None

19

14. 16-Bit addition using Direct Addressing mode

ORG 100H
MOV AX, V1
MOV BX, V2
ADD AX, BX
MOV V3, AX
HLT
V1 DW 04A5DH
V2 DW 0A231H
V3 DW 00000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

4A

5D

A2

31

AX

BX

CH

CX

CL

DH

DL

SI

DX
ZF

Output
AH

AL

BH

BL

CH

CL

DH

SF
1

8E

A2

AF

PF

CF

DL

Registers
EC

DI

31

Output
Memory

None

20

15. 16-Bit addition using Indirect Addressing mode

ORG 100H
LEA SI, V1
LEA BX, V2
LEA DI, V3
MOV AX, [SI]
MOV BX, [BX]
ADD AX, BX
MOV [DI], AX
HLT
V1 DW 0EEEEH
V2 DW 01111H
V3 DW 00000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

EE

EE

11

11

AX

BX

CH

CX

CL

DH

DL

SI

DX
ZF

Output
AH

AL

BH

BL

CH

CL

DH

SF
1

FF

11

AF

PF

CF

DL

Registers
FF

DI

11

Output
Memory

None

21

16. 16-Bit subtraction using Immediate Addressing mode

ORG 100H
MOV AX, 0E15DH
MOV BX, 017A3H
SUB AX, BX
HLT

Inputs are given using immediate data mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

E1

5D

17

A3

AX

BX

CH

CX

CL

DH

DL

SI

DX
ZF

Output
AH

AL

BH

BL

CH

DI

CL

DH

SF

AF

PF

CF

DL

Registers

1
C9

BA

17

A3

Output
Memory

None

22

17. 16-Bit subtraction using Direct Addressing mode

ORG 100H
MOV AX, V1
MOV BX, V2
SUB AX, BX
MOV V3, AX
HLT
V1 DW 04A5DH
V2 DW 0A231H
V3 DW 00000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

4A

5D

A2

31

AX

BX

CH

CX

CL

DH

DL

SI

DX
ZF

Output
AH

AL

BH

BL

CH

DI

CL

DH

SF

AF

PF

CF

DL

Registers

1
A8

2C

A2

31

Output
Memory

None

23

18. 16-Bit subtraction using Indirect Addressing mode

ORG 100H
LEA SI, V1
LEA BX, V2
LEA DI, V3
MOV AX, [SI]
MOV BX, [BX]
SUB AX, BX
MOV [DI], AX
HLT
V1 DW 0EEEEH
V2 DW 01111H
V3 DW 00000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

EE

EE

11

11

AX

BX

CH

CX

CL

DH

DL

SI

DX
ZF

Output
AH

AL

BH

BL

CH

CL

DH

SF
1

DD

11

AF

PF

CF

DL

Registers
DD

DI

11

Output
Memory

None

24

19. 16-Bit multiplication using Immediate Addressing mode

ORG 100H
MOV AX, 0FFFFH
MOV BX, 0FFFFH
MUL BX
HLT

Inputs are given using immediate data mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

FF

FF

FF

FF

AX

BX

CH

CL

CX

DH

DX

DL

SI

ZF

SF

DI

AF

PF

CF

Output
AH

AL

BH

BL

00

01

FF

FF

CH

CL

DH

DL

FF

FE

Registers
DX, AX carries the result

Output
Memory

None

25

20. 16-Bit multiplication using Direct Addressing mode

ORG 100H
MOV AX, V1
MOV BX, V2
MUL BX
MOV V3, DX
MOV V4, AX
HLT
V1 DW 0EEEEH
V2 DW 0EEEEH
V3 DW 00000H
V4 DW 00000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

EE

EE

EE

EE

AX

BX

CH

CX

CL

DH

DX

DL

SI

ZF

SF

DI

AF

PF

CF

Output
AH

AL

BH

BL

65

44

EE

EE

CH

CL

DH

DL

DE

FF

Registers
DX, AX carries the result

Output
Memory

None

26

21. 16-Bit multiplication using Indirect Addressing mode

ORG 100H
LEA SI, V1
LEA BX, V2
LEA DI, V3
MOV AX, [SI]
MOV BX, [BX]
MUL BX
MOV [DI], DX
INC DI
INC DI
MOV [DI], AX
HLT
V1 DW 0EEFFH
V2 DW 0EEFFH
V3 DW DUP(0)
Inputs are given using vectors V1, V2 mentioned in the program.
AX

BX

CX

DX

Input
AH

AL

BH

BL

EE

FF

EE

FF

AX

BX

CH

CX

CL

DH

DX

DL

SI

ZF

SF

DI

AF

PF

CF

Output
AH

AL

BH

BL

22

01

EE

FF

CH

CL

DH

DL

DF

1F

Registers
DX, AX carries the result

Output
Memory

None

27

22. 16-Bit division using Immediate Addressing mode

ORG 100H
MOV AX, 0FFFFH
MOV BX, 00009H
DIV BX
HLT

Inputs are given using immediate values mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

FF

FF

00

09

AX

BX

CH

CX

CL

DH

DX

DL

SI

ZF

SF

DI

AF

PF

CF

Output
AH

AL

BH

BL

1C

71

00

09

CH

CL

DH

DL

00

06

Registers
DX, AX carries the result

Output
Memory

None

28

23. 16-Bit division using Direct Addressing mode

ORG 100H
MOV AX, V1
MOV BX, V2
DIV BX
MOV V3, AX
MOV V4, DX
HLT
V1 DW 0EEEEH
V2 DW 00009H
V3 DW 00000H
V4 DW 00000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

EE

EE

00

09

AX

BX

CH

CX

CL

DH

DX

DL

SI

ZF

SF

DI

AF

PF

CF

Output
AH

AL

BH

BL

1A

8C

00

09

CH

CL

DH

DL

00

02

Registers
DX, AX carries the result

Output
Memory

None

29

24. 16-Bit division using Indirect Addressing mode

ORG 100H
LEA SI, V1
LEA BX, V2
MOV DI, V3
MOV AX, [SI]
MOV BX, [BX]
DIV BX
MOV [DI], DX
INC DI
MOV [DI], AX
HLT
V1 DW 0FEEFH
V2 DW 00008H
V3 DW 05000H

Inputs are given using vectors V1, V2 mentioned in the program.

AX

BX

CX

DX

Input
AH

AL

BH

BL

FE

EF

00

08

AX

BX

CH

CL

DH

DL

SI

DI
5000

CX

DX

ZF

SF

AF

PF

CF

Output
AH

AL

BH

BL

1F

DD

00

08

CH

CL

DH

DL

00

07

Registers

Output
Memory

DX, AX carries the result

4FFF 5000 5001 5002 5003

07

DD

1F

30

25. Addition of 8-Bit array elements.

ORG 100H
MOV CX, 05H
MOV AX, 00000H
MOV BX, 00000H
MOV DI, 06000H
NEXT:
ADD AL, ARRAY[BX]
JC CARRY
LOOP NEXT
CARRY:
INC AH
LOOP NEXT
MOV [DI], AX
HLT
ARRAY DB 0FFH, 0FFH, 0FFH, 0FFH, 0FFH
Inputs are given using vectors array mentioned in the program.
AX

BX

CX

DX

Input
AH

AL

BH

BL

CH

CL

00

00

00

00

00

05

AX

BX

CX

DH

DL

SI

6000

DX
ZF

Output
AH

AL

BH

BL

CH

CL

04

FB

00

00

00

00

DH

SF

Memory

AF

PF

CF

DL

Registers

Output

DI

5FFF 6000 6001 6002 6003

04

FD

31

26. Check if the given value is positive, negative or zero

ORG 100H
MOV AH, 011H
MOV AL, VALUE
CMP AL, 000H
JZ ZERO
ROL AL, 001H
JC NEGETIVE
JMP STOP
ZERO:
MOV AH, 00H
JMP STOP
NEGETIVE:
MOV AH, 0FFH
JMP STOP
STOP:
HLT
VALUE DB 84H

; IF AH IS 11H THEN WE ASSUME POSITIVE

; IF AH IS 00H THEN WE ASSUME ZERO

; IF AH IS FFH THEN WE ASSUME NEGETIVE

Inputs are given using vector VALUE mentioned in the program.

AX
Input

BX

AH

AL

11

84

AX

BH

BX

CX
BL

CH

CX

DX
CL

DH

DL

SI

DX
ZF

Output
AH

AL

FF

09

BH

BL

CH

DI

CL

DH

SF

AF

PF

CF

DL

Registers

Output
None
Memory

32

27. Addition of 8-Bit array elements.

ORG 100H
MOV CX, 05H
MOV AX, 00H
MOV BX, 04000H
MOV DI, 05500H
NEXT:
ADD AL, [BX]
JC CARRY
INC BX
LOOP NEXT
JMP STOP
CARRY:
INC AH
INC BX
LOOP NEXT
STOP:
MOV [DI], AX
HLT
Inputs are given using to specified memory locations mentioned in the program.
AX
Input

BX

CX

DX

AH

AL

BH

BL

CH

CL

00

00

40

00

00

05

AX

BX

CX

DH

DL

SI

5500

DX
ZF

Output

AH

AL

BH

BL

03

3D

40

05

CH

DI

CL

DH

SF

AF

PF

CF

DL

Registers

Input /
Output
Memory

Input Memory

Output Memory

4000 4001 4002 4003 4004 .

AA

91

69

FC

9D

54FF 5500 5501 5502 5503

3D

03

33

28. Addition of series 1 + 2 + 3 + + n (8- bit hexadecimal values)

ORG 100H
MOV AX, 0000H
MOV CX, 000FH
MOV BX, 1111H
AGAIN:
ADD AX, CX
LOOP AGAIN
MOV [BX], AX
HLT
Inputs are given using to specified register 5 terms locations mentioned in the program.
AX
Input

BX

DX

AH

AL

BH

BL

CH

CL

00

00

11

11

00

0F

AX
Output

CX

BX

CX

DH

DL

SI

DI

DX
ZF

AH

AL

BH

BL

CH

CL

00

78

11

11

00

00

DH

SF

AF

Memory

CF

DL

Registers

Input /
Output

PF

Output Memory

Input Memory

1110 1111 1112 1113 1114

none
78

34

29. Printing / Generating series on memory locations ( 0, 1, 2, 3 N)

ORG 100H
MOV AX, 0000H
MOV CX, 0009H
MOV BX, 1111H

; STARTING LOCATION TO PRINT SERIES

AGAIN:
MOV [BX], AX
INC AX
INC BX
LOOP AGAIN
HLT
Inputs are given using to specified register 9 terms locations mentioned in the program.
AX
Input

BX

DX

AH

AL

BH

BL

CH

CL

00

00

11

11

00

09

AX
Output

CX

BX

CX

DH

DL

SI

DI

DX
ZF

AH

AL

BH

BL

CH

CL

00

09

11

1A

00

00

DH

SF

AF

PF

CF

DL

Registers

Input /
Output
Memory

Output Memory

Input Memory

1111 1112 1113 1114 1115 1116 1117 1118 1119

none
00

01

02

03

04

05

06

07

08

35

30. Printing / Generating series on memory locations ( 0, 2, 4, 6 UPTO N TERMS)

ORG 100H
MOV AX, 0000H
MOV CX, 0009H
MOV BX, 1111H

; STARTING LOCATION TO PRINT SERIES

AGAIN:
MOV [BX], AX
INC AX
INC AX
INC BX
LOOP AGAIN
HLT
Inputs are given using to specified register 9 terms locations mentioned in the program.
AX
Input

BX

DX

AH

AL

BH

BL

CH

CL

00

00

11

11

00

09

AX
Output

CX

BX

CX

DH

DL

SI

DI

DX
ZF

AH

AL

BH

BL

CH

CL

00

09

11

1A

00

00

DH

SF

AF

PF

CF

DL

Registers

Input /
Output
Memory

Output Memory

Input Memory

1111 1112 1113 1114 1115 1116 1117 1118 1119

none
00

02

04

06

08

0A

0C

0E

10

36

31. Finding Largest value from array

ORG 100H
MOV CX, 00009H
MOV SI, 02000H
MOV DI, 03000H
MOV AL, 00H
LOOP:
CMP AL, [SI]
JC SWAP
INC SI
DEC CX
JNZ LOOP
JMP STOP
SWAP: MOV AL, [SI]
INC SI
DEC CX
JNZ LOOP
STOP:
MOV [DI], AL
HLT
Inputs are given using to SI register 10 terms locations mentioned in the program.
AX
Input

AH

BX
AL

BH

CX
BL

00

AX

DX

CH

CL

00

09

BX

CX

DH

DL

SI

DI

2000

3000

DX
ZF SF AF PF CF

Output

AH

AL

BH

BL

CH

CL

00

00

DH

DL

Registers

1
09

Input /
Output
Memory

Input Memory

Output Memory

2000 2001 2002 2003 2004 2005 2006 2007 2008

21

02

AE

06

08

AA

BC

9E

9D

2FFF

3000 3001
BC

37

32. Finding Smallest value from array

ORG 100H
MOV CX, 0000AH
MOV SI, 02000H
MOV DI, 03000H
MOV AL, 0FFH
; ASSUMING THE SMALLEST IS FFH
LOOP:
CMP AL, [SI]
JNC SWAP
; THIS INSTRUCTION IS THE ONLY DIFFERENCE
INC SI
DEC CX
JNZ LOOP
JMP STOP
SWAP: MOV AL, [SI]
INC SI
DEC CX
JNZ LOOP
STOP:
MOV [DI], AL
HLT
Inputs are given using to SI register 10 terms locations mentioned in the program.
AX
Input

AH

BX
AL

BH

CX
BL

00

AX

DX

CH

CL

00

09

BX

CX

DH

DL

SI

DI

2000

3000

DX
ZF SF AF PF CF

Output

AH

AL

BH

BL

CH

CL

00

00

DH

DL

Registers

1
09

Input /
Output
Memory

Input Memory

Output Memory

2000 2001 2002 2003 2004 2005 2006 2007 2008

21

02

AE

06

08

AA

BC

9E

9D

2FFF

3000 3001
02

38

33. Block Move (Moving a block of data from one location to another)
ORG 100H
MOV CX, 00005H
MOV SI, 02000H
MOV DI, 03000H
LOOP:
MOV AL, [SI]
MOV [DI], AL
INC SI
INC DI
DEC CX
JNZ LOOP
HLT
Inputs are given using to SI register 5 VALUES mentioned in the memory.
AX
Input

AH

AX
Output

BX
AL

BH

CX
BL

BX

DX

CH

CL

00

05

CX

ZF
AH

AL

BH

BL

SI

DI

2000

3000

CH

CL

00

00

DH

SF

AF

PF

CF

DL
1

EE

Memory

DL

DX

Registers

Input /
Output

DH

Input Memory

Output Memory

2000 2001 2002 2003 2004

3000 3001 3002 3003 3004

AA

BB

CC

DD

EE

AA

BB

CC

DD

EE

39