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Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 4, April 2014)
Post Graduate Scholar, Department of ECE, PPG Institute of Technology, Coimbatore, Thamilnadu, India.
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Assistant Professor, Department of ECE, PPG Institute of Technology, Coimbatore, Thamilnadu, India.
I. INTRODUCTION
Developing new circuit is preferable for low voltage
operation, especially if they do not increase the circuit
complexity. The circuit of a low voltage low power double
tail comparator [1] is modified for area efficient and double
edge triggered operation while delay and power
consumption. The structure of double tail dynamic
comparator first proposed based on designing a separate
input and cross coupled stage. This separation helps in fast
operation over a wide common mode and supply voltage
range.
The comparator compares the voltages that appear at
their inputs and outputs a voltage representing the sign of
the net difference between them. The comparator is a
circuit that compares an analog signal with another analog
signal or reference and outputs a binary signal based on the
comparison. If the +, INP, the input of the comparator is at
a greater potential than the -, INN, input, the output of the
comparator is a logic 1 and vice versa.
Comparators are important elements in modern mixed
signal systems. Speed and resolution are two important
features which are required for high speed applications
such as on-chip high frequency signal testing, data links,
sense amplifiers and analog-to-digital converters.
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Performance
Parameter
Existing
Comparator
Proposed
Comparator
Average Power
1.7710-4 W
8.3710-8 W
Maximum Power
2.2710-3 W
6.0610-5W
Minimum Power
1.7710-10 W
8.4610-11 W
Static Current
1.26 10-3A
3.37 10-5A
-8
4.5410 Ws
12.1210-10 Ws
9.0810-13 Ws2
24.2410-15 Ws2
Area
704m2
528m2
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[2]
[3]
[4]
[5]
[6]
[7]
Fig. 4 Simulation Result of Proposed Comparator.
[8]
[9]
[10]
[11]
[12]
V. CONCLUSIONS
[13]
[14]
[15]
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AUTHORS PROFILE
Greeshma A G received the B.Tech degree in
Electronics and Communication Engineering
(ECE) from SNMIMT Engineering College,
Maliankara, India in 2010. She is currently
pursuing the Master Degree from PPG Institute
of Technology, Coimbatore, Anna University,
Chennai. Her current research interest includes
low power, high speed and area efficient design
of comparators for low supply voltages.
Sajithra. S. I. completed B.E in Electronics and Communication
Engineering from Vins Christian College of Engineering under
Anna University in 2012. She is currently pursuing the Master
Degree from PPG Institute of Technology, Coimbatore, Anna
University, Chennai. Her current research interest includes
clinical diagnosis of malignant melanoma.
Surya kumari . V received her B.E in
Electronics and Communication Engineering
from SNS college of Coimbatore, India in
2010 and Masters Degree in VLSI Design
from Government College of Technology,
Coimbatore India in 2012. She has 1 year 9
months of teaching experience and currently
working as Assistant Professor in the
Department of Electronics and Communication Engineering, PPG
Institute of Technology, Coimbatore, affiliated to Anna
University, Chennai, India.
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