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INTRODUCTION TO
MICROPROCESSOR
Chapter 1
8/7/2013
BASIC COMPONENTS OF A
COMPUTER SYSTEM
CPU
Secondary Memory
Main Memory
Memory
I/O
unit
Central Processing Unit
(CPU)
Input Unit
Output Unit
DEFINITIONS
Central Processing Unit (CPU)
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DEFINITIONS
(CONT)
WHAT IS A MICROPROCESSOR
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COMPUTING SYSTEMS
Rapid pace of information technology is
due to introduction of new
microprocessors.
Most of us think of desktop computers
PC
Laptop
Mainframe
Server
Maybe at most handheld computer (PDA).
In this course, we will look at another type
of computing system which is far more
common that you ever imagined
CLASSIFICATION OF COMPUTERS
Servers:
Big, expensive, available 24x7 (read 24 by 7 or 24 hours
a day, 7 days a week. Mainframes are old servers made by
IBM.
Desktops:
computers on your desk
Laptops:
computers you carry in your bag
Embedded systems:
computers that dont look like computers!
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EMBEDDED SYSTEMS
EMBEDDED SYSTEMS
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EMBEDDED
End-user programmable
Differentiating features:
Speed (need not be fully
predictable)
Software compatibility
Cost (eg RM3k vs RM5k per
laptop)
Differentiating features:
Power
Cost (eg RM2 vs RM2.50)
Speed (must be predictable)
IC MANUFACTURING
PROCESS
From Sand to Silicone
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MANUFACTURING PROCESS
MANUFACTURING PROCESS
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MANUFACTURING PROCESS
MANUFACTURING PROCESS
http://www.nikon.com/products/precision/soc
iety/story0202/index.htm
8/7/2013
HISTORY OF COMPUTERS
Vacuum
Tube
G2
Transistor
G3
IC
G4
Better IC
technology
HISTORY OF COMPUTERS
First Generation (1954-1956):
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Vacuum Tubes
HISTORY OF COMPUTERS
Second
Generation (1956-1963):
After invention of transistors.
Smaller, faster, cheaper.
Limited to military and business use.
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Transistor circuit
HISTORY OF MICROPROCESSORS
Description of SSI,
MSI, LSI, VLSI
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Laptop
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HISTORY OF COMPUTERS
Fourth
Generation (1971-now):
Improvements in IC technology, P design.
More transistors more processing power.
Very Large Scale Integration (VLSI).
- Intel Montecito Itanium: 1 bln. transistors.
Reduced Instruction Set Computers (RISC).
32, 64-Bit microprocessors.
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Speed
Memory
Cost
UNIVAC
(1st Gen.)
1.3 kHz
1 MB
$1.6 million
IBM 1401
(2nd Gen.)
2.2 kHz
1.4 kB
$47,900
DEC PDP-8
(3nd Gen.)
1 MHz
6 kB
$20,000
Pentium III
(4th Gen.)
500 MHz
128 MB
$700
MICROPROCESSOR SYSTEMS
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MICROPROCESSOR SYSTEMS - PC
ROM
Floppy
RAM
CD-ROM
CPU
Supporting
Circuitry
Keyboard
Mouse
HDD
Memory
Power Supply
CPU
LCD Display
Keypad
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Unidirectional:
Signals flow in
one direction.
Bidirectional:
Signals flow in
both direction
(one at a time).
SYSTEM BUS
A P-based system consists of many components:
CPU.
Memory.
I/O: disk drives, keyboard, mouse.
System Bus.
All components communicate using System Bus.
Communication highway for all components.
A group of wires is called bus.
Contains:
Data bus.
Address bus.
Control bus.
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Data bus
CPU
Control
signal is
READ
R/W
Data bus
Input
(from
Memory or
I/O devices)
CPU
Control
signal is
WRITE
R/W
Output
(to Memory
or I/O
devices)
Example:
Motorolla 68000 microprocessor has 8 bits data bus,
thus:
Data size n = 8 bits,
Data lines/bus are labelled Dn : D0, D1, .. D6, D7
The size of data bus is determined by the number of lines
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ADDRESS BUS
CPU to other
elements
CPU
I/O Devices
Memory
Example:
Motorolla 68000 has 16 bits of address bus:
n = 16 bits (Size of address bus)
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0 to 65535 locations,
addressed as 0000h to
FFFFh
EXAMPLE 1
Memory location
28 = 256
Address
A0, A1,..A7
00h to FFh
28 = 256 byte
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EXAMPLE 2
Memory location
232 = 4,294,967,296
Address
A0, A1,..A31
00000000h to FFFFFFFFh
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THE CPU
THE CPU
CU (Control Unit):
Responsible to retrieve instructions, analyze, then execute.
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CPU REGISTERS
Data Register
Temporarily stores data for immediate processing
Address Register
Temporarily stores address of data in memory
Instruction Register
Stores the instruction currently being executed or decoded
Includes ALU operation and address of operand
Program Counter
Keeps track of program execution
Address of next instruction to read from memory
May have auto-increment feature or use ALU
Some manufacturers call this register the Instruction Pointer (IP)
Status Register
Stores the result of the current data manipulation (negative,
zero etc)
MICROPROCESSOR IN BITS
The number of bits of a microprocessor dictates the maximum
data width of the memory address and data units.
For example a 4-bit microprocessor can only address up to 16
memory cells and process a maximum data size of 4 bits width.
Year
Application
Intel 4004
740kHz
1971-1981
General Computing
HP Saturn
640kHz
1980s
Intel 8008
0.5-0.8MHz
1972-1983
Zilog Z80
2.5MHz
Motorola
68000
16
8-20MHz
Calculator
General Computing
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MICROPROCESSOR IN BITS
Microprocessor
Bits
Clock Speed
Year
Application
Intel 80286
16
6Mhz-25Mhz
1982-1990s
General computing,
embedded systems
Intel Pentium
32
Varies
1993-present
General computing,
embedded systems
MIPS R3000
32
33MHz
1988
General computing,
embedded systems
Sony Playstation
AMD Athlon 64
64
1.0GHz
3.2GHz
2003
General Computing
Intel Core 2
64
1.06GHz
3.33GHz
2006 present
General Computing
MICROPROCESSOR
VS
MICROCONTROLLER
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Microcontroller
Less flexibility
More flexible
Less powerful
Binary (base 2)
0000, 0001, 0010, 0011
Octal (base 8)
0, 1, 2, 3, 4, 5, 6, 7, 10, 11 ,12 16, 17, 20
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Data type :
Bit (B)
Nibble
Word (W)
Longword (L)
Byte
One byte is 8 bits long.
Range from 00000000 11111111 (0 255)
Eg. 00000011, 00001111, 11100011
Word
One word is two bytes long.
Longword
One longword is two bytes long.
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EXAMPLE
Everything is controlled by, what else, the control unit in the CPU.
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Fetch
Decode
Execute
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FETCH STEP 1
CPU
Memory
Control
Instruction Register
Data Registers
Program Counter
$1000
$1000
Instruction #1
$1001
Instruction #1
$1002
Instruction #2
$1003
Instruction #2
$1004
Empty
$1005
Empty
$1006
Empty
$1007
Data #1
$1008
Data #2
$1009
Data #3
CPU gets
instruction address
from PC
FETCH STEP 2
CPU
Memory
Address Bus
Control
$1000
Instruction Register
Data Registers
CPU outputs
instruction address
through Address Bus
Program Counter
$1000
$1001
$1002
$1003
$1004
$1005
$1006
$1007
$1008
$1009
Instruction #1
Instruction #1
Instruction #2
Instruction #2
Empty
Empty
Empty
Data #1
Data #2
Data #3
$1000
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FETCH STEP 3
CPU
Memory
Data Bus
Control
Instruction #1
Instruction Register
Data Registers
$1000
$1001
$1002
$1003
$1004
$1005
$1006
$1007
$1008
$1009
Instruction #1
Instruction #1
Instruction #2
Instruction #2
Empty
Empty
Empty
Data #1
Data #2
Data #3
$1000
FETCH STEP 4
CPU
Memory
Control
Instruction Register
Instruction #1
Data Registers
CPU stores
instruction in
Instruction Register
Program Counter
$1000
$1001
$1002
$1003
$1004
$1005
$1006
$1007
$1008
$1009
Instruction #1
Instruction #1
Instruction #2
Instruction #2
Empty
Empty
Empty
Data #1
Data #2
Data #3
$1000
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FETCH STEP 5
CPU
Memory
Control
Instruction Register
Instruction #1
Data Registers
$1000
$1001
$1002
$1003
$1004
$1005
$1006
$1007
$1008
$1009
Instruction #1
Instruction #1
Instruction #2
Instruction #2
Empty
Empty
Empty
Data #1
Data #2
Data #3
$1002
DECODE STEP 1
CPU
Memory
Control
Instruction Register
Instruction #1
Data Registers
CPU analyzes
instructions before
executing it.
Program Counter
$1002
$1000
$1001
$1002
$1003
$1004
$1005
$1006
$1007
$1008
$1009
Instruction #1
Instruction #1
Instruction #2
Instruction #2
Empty
Empty
Empty
Data #1
Data #2
Data #3
Type of instruction.
Does the instruction require any data to perform calculations?
Where are the data located?
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EXECUTE STEP 2
CPU
Memory
Control
Instruction Register
Instruction #1
Data Registers
Data #1
Program Counter
$1000
$1001
$1002
$1003
$1004
$1005
$1006
$1007
$1008
$1009
Instruction #1
Instruction #1
Instruction #2
Instruction #2
Empty
Empty
Empty
Data #1
Data #2
Data #3
$1002
EXECUTE STEP 3
CPU
Memory
Address Bus
Control
$1005
Instruction Register
Instruction #1
Data Bus
Data Registers
Data #1
Result #1
Program Counter
$1002
Result #1
If instruction wants to
write data to memory,
CPU puts its data and
address on the bus.
$1000
$1001
$1002
$1003
$1004
$1005
$1006
$1007
$1008
$1009
Instruction #1
Instruction #1
Instruction #2
Instruction #2
Empty
Empty
Empty
Data #1
Data #2
Data #3
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EXECUTE STEP 4
CPU
Memory
Control
Instruction Register
Instruction #1
Data Registers
Data #1
Result #1
Program Counter
Memory receives
instructions and puts
data in the location.
$1000
$1001
$1002
$1003
$1004
$1005
$1006
$1007
$1008
$1009
Instruction #1
Instruction #1
Instruction #2
Instruction #2
Empty
Result #1
Empty
Data #1
Data #2
Data #3
$1002
On program start:
0. Load the program counter (PC) with the address of the first
instruction
Fetch phase:
2. Read the instruction and put it into the instruction register (IR)
3. Control unit decodes the instruction; updates the PC for the next
instruction
Execute phase:
3. Find the data required by the instruction.
4. Perform the required operation.
5. Store the results.
6. Repeat from Step 1.
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TUTORIAL QUESTION
36