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IEEE TRANSACTIONS ON EDUCATION, VOL. 52, NO. 4, NOVEMBER 2009

Power Electronics Design Laboratory Exercise


for Final-Year M.Sc. Students
Lena Max, Graduate Student Member, IEEE, Torbjrn Thiringer, Member, IEEE, Tore Undeland, Fellow, IEEE,
and Robert Karlsson

AbstractThis paper presents experiences and results from a


project task in power electronics for students at Chalmers University of Technology, Gteborg, Sweden, based on a flyback test
board. The board is used in the course Power Electronic Devices
and Applications. In the project task, the students design snubber
circuits, improve the control of the output voltage, improve the
gate drive of the main MOSFET transistor and study the influence
of stray inductance. The project goals (the circuit improvements)
are given, but the procedure for solving the problems and obtaining the results is not specified. Instead the students have to
make their own specification in order to reach the goals. Tools
that are given to the students are the hardware, measurement
equipment, an example of the circuit in the circuit simulation
software PSpice, and lastly lectures covering the material needed
in order to attain the project goals. The project design builds on
the ideas from the CDIO (Conceive, Design, Implement, Operate)
initiative, where students are encouraged to consider the complete
process structure. The result found was a substantial engagement
by the students, who had both positive and negative reactions. The
negative reactions were mainly that the project specification was
too vague, in other words in the (C=Conceive)-phase of the CDIO
structure. Further, the teachers observed increased learning,
which also was noticeable for the students performing their M.Sc.
thesis within the power electronics design area. Finally, it was
found that a final written exam is definitely still needed to assess
students adequately in the course.
Index TermsCDIO (Conceive, Design, Implement, Operate),
education, flyback converter, power electronics, project orientation.

I. BACKGROUND

B. Courses in Power Electronics


In the area of power electronics, the students can participate
in 2 courses. First, a basic course, Power Electronic Converters,
a 7.5 European Credit Transfer System (ECTS) credit point
course with approximately 60 participating students (1.5 ECTS
point is equivalent to 1 full-time week) covers basics in dc/dc,
ac/dc, and dc/ac converters. An advanced course, Power Electronic Devices and Applications, a 7.5 ECTS credit point course
(with approximately 45 students), treats, among other themes,
snubber circuits, driver circuits, thermal aspects and control of
dc/dc-converters. Due to a final adaption to the Bologna Curriculum, the total content of the courses was increased from
10.5 ECTS to 15 ECTS in 2008. In order to give the students
an opportunity to perform practical work with the theoretical
material they had been taught, a test board with a flyback converter was constructed, and a project assignment was designed
to exploit this. The task text can be found in Appendix B. Carrying out practical work based on the material taught increases
students understanding of the subject, as well as giving them
some actual practical experience. This experience can be provided by offering practical laboratory exercises [1], [2] or by
using a web-based power electronics laboratory if there are no
facilities available for experimental work [3]. Another possibility is to have an experimentally oriented course consisting
of both simulations and experimental work [4].
C. Conceive, Design, Implement, Operate (CDIO)

A. Electrical and Electric Power Program at Chalmers


T CHALMERS UNIVERSITY OF TECHNOLOGY,
Gteborg, Sweden, about 60 students follow the Electrical Engineering five-year curriculum. Years one to three
consist of general studies up to a B.Sc. level, at which point students can apply for a Masters program. One of these programs
is the Electric Power Engineering Masters program which
approximately 20 of these students follow. In addition, there
are also about 35 international students participating per year.

Manuscript received January 04, 2008; revised July 14, 2008. First published
July 21, 2009; current version published November 04, 2009.
L. Max, T. Thiringer, and R. Karlsson are with the Department of Energy and
Environment, Chalmers University of Technology, 412 96 Gteborg, Sweden
(e-mail: lena.max@chalmers.se).
T. Undeland is with the Department of Electric Power Engineering, Norwegian University of Science and Technology (NTNU), Trondheim, Norway.
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TE.2008.930513

The CDIO-initiative provides a structure for learning, in


which students are trained to think in a complete process
structure instead of just being trained to solve well specified
examples.
The CDIO-initiative proposes that teaching can be arranged
in the following four steps:
Conceive: The students formulate the given task/goals into
what needs to be performed in order to fulfill the assignment.
Design: The students make designs/calculations for the
constructions that need to be made.
Implement: Based on the design, the derived construction is implemented practically.
Operate: The completed construction is analyzed and evaluated.
The inspiration for CDIO comes from the way in which engineers act when they are to solve a task, or to create a system
or a product. More about the CDIO-initiative can be found in
[5][7]. The CDIO-initiative also offers an approach to the evaluation of the teaching process using 12 principles. Principle 5

0018-9359/$26.00 2009 IEEE

MAX et al.: POWER ELECTRONICS DESIGN LABORATORY EXERCISE

Fig. 1. Photo of the flyback converter.

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The flyback converter is already operational as students begin


the project, but they are given certain goals to improve its performance:
The switching losses are higher than expected due to the
turn-on and turn-off of the MOSFET transistor being too
slow, which the students have to improve.
There is a connection point where a 2-m cable can be connected to add stray inductance to the design. The students
have to analyze the influence of this additional stray inductance and add a snubber to reduce the oscillations.
The voltage control is not properly tuned so the students
have to study the control circuit in order to improve the
control of the output voltage level.
In the 2008 course offering, two theoretical tasks were added;
to calculate the losses in the transformer and to calculate the
dynamical behavior of the control-loop.
The flyback converter can work with both the secondary and
primary side galvanically connected and separated. An optocoupler is used in the galvanically isolated mode.
The transformer is mounted in such a way that it easily can be
replaced, and various transformer designs investigated. So far,
for the first years the course has been offered (2006, 2007 and
2008), only the original transformer has been used.
There are three choices of load resistance available, leading
to operation in both continuous and discontinuous conduction
mode.
B. Measurement and Analysis Tools

Fig. 2. Circuit diagram for the flyback converter.

in the CDIO-evaluation states that there should be at least two


DBT (design-build-test)-projects in an engineering education;
although the present project is fairly small, it is at least an effort
in this direction.
D. Purpose of the Paper
The purpose of this paper is to present a practical project
task for students studying power electronics, based on the concepts of CDIO, which it is hoped can serve as inspiration for
other teachers within a practical electrical engineering area. In
order to complement traditional laboratory work included in
power electronic courses where the measurements are described
in handouts, the students here have to identify the problems
themselves and also suggest solutions to these problems. This
paper presents the idea behind the project task, describes the
hardware used and finally analyzes the results that the students
achieved and their reactions.
II. TEST SETUP
A. Flyback Converter
A photo of the flyback converter used in this project task
is shown in Fig. 1, and the circuit diagram of the converter is
shown in Fig. 2, including a turn-off snubber that the students
typically added during the project.

Measurements are taken with Tektronix TSD 2004B oscilloscopes, with USB-connection to transmit the acquired data to a
computer.
The students also have a PSpice model available of the flyback converter. The students used PSpice in their first power
electronics course, so they are familiar with the program. PSpice
is a very popular tool for this purpose and some other experiences of using this program in the education can be found in [8]
and [9]. In [9] PSpice was used for snubber design, just as in one
of the tasks of the present design. Fixed capacitor values of the
capacitance between the gate and drain, as well as between
the gate and source are included in the MOSFET switch model
used in the flyback PSpice simulation model.
The students worked in groups of two to five students per
setup. It would have been better to have only two students per
group, but due to practical reasons (number of students versus
payment for the course) this was not possible.
C. Course Layout and Examination
Lectures, tutorials and self exercises were scheduled, in addition to the project task. The course textbook was Power ElectronicsConverters, Applications and Design by Mohan, Undeland, and Robbins [10]. There was an ordinary written exam
at the end of the course. The material dealt with in the first half
of the course was covered in the project.
The final grade was based 70% on the exam results and 30%
on the project. It would have been desirable to have a higher percentage for the project, but since there were up to five students
per group, the lower ratio was used.

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Fig. 3. (a) Measurement and (b) simulation of


setup.

IEEE TRANSACTIONS ON EDUCATION, VOL. 52, NO. 4, NOVEMBER 2009

and

using the original

III. PROJECT CONDUCTION, RESULTS, AND OBSERVATIONS


A. General Measurements
Although not explicitly stated as a goal in the project task list,
it was suggested to students that the first project task would be
to get familiar with the circuit by studying the simulations and
making measurements on the circuit. Fig. 3 presents measurements and simulations on the original setup of the converter,
without the stray inductance cable, showing the drain-source
and the drain current
for the transistor. In the
voltage
upper part of Fig. 1 a coaxial connector can be seen where the
stray inductance cable can be connected to the positive dc-link
rail.
In this measurement, the load is low so the converter operates
in the discontinuous conduction mode.
Further, the switching waveforms at turn-on and turn-off were
studied, and the results are found in Fig. 4(a) for turn-on and in
Fig. 4(b) for turn-off.
From the figures, it can be found that there are switching
losses at turn-off but only small losses at turn-on due to the discontinuous conduction mode. The time needed to get familiar
with the circuit and the measurement equipment differed between the groups depending on their previous experience with
practical work.
B. Measurement and Simulation of the Gate Resistances
In the next task, the turn-on and turn-off should be made
quicker. Measurements from the circuit with the original value
of the gate resistance 100 are shown in Fig. 4(a) for turn-on
and in Fig. 4(b) for turn-off.
It was stated in the assignment paper that the switching losses
were higher than expected since the switching was too slow,
and the students were supposed to suggest a way to decrease

Fig. 4. Measured (a) turn-on and (b) turn-off for the original circuit.

these losses. Perhaps not too surprisingly, using the original


task description, most groups figured out quite quickly that the
gate resistance should be lowered to achieve a faster switching.
However, in the 2008 course offering only the information that
the switching losses were too high was given, and not that the
switching was too slow. From this starting information, no
group came up with the idea that the gate resistance should be
lowered; instead the first suggestion from the students was to
add a snubber circuit.
In order to achieve the right value for the resistance, the maximum output current capability from the control circuit had to
be considered. This information was not given in the assignment, but instead was discussed with the students during the
Design (D) process. The lack of such information is a typical
deliberate omission, which can prove annoying to a student unfamiliar with CDIO methods of teaching. From the data sheets
it could be found that a maximum current of 1 A was suitable,
and accordingly, with an output voltage of 12 V, the minimum
value of the resistance was 12 . Most groups choose a resistance between 12 and 20 to have some safety margin. The
measured turn-off waveforms are shown for the original gate resistance of 100 in Fig. 5(a) and with a gate resistance of 13.8
in Fig. 5(b). The same cases are shown for the simulation model
in Fig. 6.
From the figures, it can be seen that the rise time of the voltage
at turn-off is shorter with the low gate resistance. On the other
hand, the voltage oscillations are larger. The principle with a
faster voltage rise for the lower value of the gate resistance is
the same for the measured values and the simulated values, but
the waveforms are quite different. From this, it was clearly noticed that the simulations are approximations of the real circuit
behavior and that results from simulations and measurements
should not be expected to be exactly the same.

MAX et al.: POWER ELECTRONICS DESIGN LABORATORY EXERCISE

527

Fig. 5. Measured turn-off with gate resistance: (a) 100


. (b) 13.8
.

Fig. 7. Measured V

at turn-off: (a) without long cable; (b) with long cable.

The values for the conduction losses obtained for all groups
were approximately 30 mW. The switching losses were calculated from the measured waveforms of the current and voltage
for the switching instants that are shown in Fig. 5. It should
be mentioned that the switching frequency is fairly low, about
16 kHz. The instantaneous power loss can be obtained by multiplying the voltage and the current, and the turn-off losses are
given by integrating over the turn-off time. This calculation was
done in different ways by the different groups, giving a wide
range of results between 10 and 90 mW. Some groups observed
a large decrease in the turn-off losses due to the faster switching
and some groups just got a small change. This result lead to
some disappointment that no clear results could be observed for
this case.
Further, the junction temperature of the transistor should be
calculated for the two cases. The students seemed a bit disappointed, which is completely understandable, when there was
no detectable temperature reduction due to the more rapid on-off
transitions.
C. Removing Overvoltages Using a Snubber Circuit
Fig. 6. Simulated turn-off with gate resistance: (a) 100
. (b) 13.8
.

From the waveforms of the drain current and the voltage


across drain-source for the transistor, the switching losses and
conduction losses were to be calculated. The conduction losses
were calculated with (1) using the rms-value
of
the drain current and the on-state resistance of the transistor
from the data sheet for the transistor.
(1)

It was now time to study the effect of a non-tight construction


of the dc-link. To achieve an extra inductance, a 12 m cable was
added in series with the positive dc-link rail.
All groups easily found that this gave increased oscillations
in the drain-source voltage
, from the case without a cable
in Fig. 7(a) to the case with the long cable in Fig. 7(b). For the
simulations, the same case is shown in Fig. 8.
The students quickly figured out that what was needed was to
add a snubber to reduce the oscillations and the overvoltage. The
students completed the design of the snubber quite quickly, but
they experienced difficulties in determining appropriate values
for the capacitance and the resistance. One reason for this was

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Fig. 8. Simulated V

IEEE TRANSACTIONS ON EDUCATION, VOL. 52, NO. 4, NOVEMBER 2009

at turn-off: (a) without long cable; (b) with long cable.

Fig. 9. Measured V

at turn-off: (a) without snubber; (b) with snubber.

that the turn-off snubber presented in the lectures and in the textbook was designed to reduce the turn-off losses of the transistor.
The equation given in the textbook for the capacitor value could
not be directly applied in this case. Instead, the value of the capacitor must be estimated and chosen to be larger than the capacitance of the transistor but small enough not to give more
than 0.5 W additional losses. The measured waveform for the
voltage without a snubber in Fig. 9(a) is compared to the measured value of the voltage using a snubber in Fig. 9(b), and the
simulated figures are found in Fig. 10. In the snubber circuit, the
value of the resistance is 100 and the value of the capacitance
is 6 nF. The mismatch between the design procedure in the textbook and the steps needed in the present project also caused a
bit of disappointment for the students. However, it is good for
the students to discover that the theory in the textbook is not always directly applicable to actual practical problems.
D. Control Loop
When changing the value of the load resistance, a change in
the output voltage could be noticed even though a closed-loop
control was used. (The feedback loop had too low an amplification and no integral part.) The output voltage level control was
to be improved and the sensibility towards load voltage variations was to be removed. The solution was to add a capacitor
in the feedback of the control loop that added an integrating part
to the control and thereby removed the remaining fault. Another
possibility was to increase the regulator gain by changing a resistor.
The output voltage at different loads with and without capacitor are shown in Table I.
It should be mentioned that the task during the courses given
in 2006 and 2007 only dealt with steady-state voltage level
keeping, since dynamic design of the control loop was not covered during either of the power electronic courses, the preceding

Fig. 10. Simulated V

at turn-off: (a) without snubber; (b) with snubber.

TABLE I
OUTPUT VOLTAGE AT DIFFERENT LOADS RESISTANCES R
WITHOUT CAPACITOR C

WITH AND

one or that discussed here. The students fairly easily figured


out the possible solutions, partly because the control circuit had
been covered in the lectures. The fact that the dynamic design

MAX et al.: POWER ELECTRONICS DESIGN LABORATORY EXERCISE

of the control loop had not been covered, made calculations


determining the value of the regulator capacitor impossible,
which was a drawback. In the 2008 course, the dynamic design
was dealt with in the first power electronics course. Then, the
task was added to determine theoretically a suitable value of the
inserted capacitance based on the dynamic behavior.

E. Final Comments From the Students


The laboratory exercise was an appreciated part of the course;
in the course evaluations many of the students identified the laboratory work as being the best part. The students appreciated
doing something in reality, and dealing with real problems.
Most of the students thought the project was hard and some
thought that the effort was average, but it was still appreciated.
There was a large difference between the groups depending
on their previous experience with electric circuits. Some groups
were familiar with the equipment and started measuring quite
fast, while other groups needed more time to get started. There
was also an opinion that the laboratory exercise sessions should
be four hours long, instead of two, thereby halving the number
of sessions. It takes some time to get the measurement setup
ready and to recall what happened the previous week, which
can occupy a significant part of a two hour session. In the 2008
course, each group had the same number of sessions, but these
were four hours long instead of two (two hours supervised and
two hours with limited supervision). Generally, it took quite a
long time for the students to get started with the measurements,
but once under way the measurements went quite fast and most
groups completed all subtasks within the scheduled sessions.
However, some groups needed extra time to finish the project.
The longer laboratory sessions made available in 2008 did not
result in fewer sessions being needed, which can partly be explained by the increased number of tasks.
Negative reactions on the part of student were mainly during
the initial Conceive (C)-phase, with the typical reaction being
that the tasks lacked specificity. This reaction was expected,
since one point of not specifying the questions too precisely was
that the students should think about what measurements would
be interesting and what could be a good result. However, the students accepted the argument that presenting the project in this
way corresponded more closely to what they would encounter
as engineers later in their careers. The department also offers a
course for first year electrical engineering students, which includes a project structured according to the CDIO initiative. If
feedback from the students of these two courses is compared, the
complaints about a lack of specificity in tasks were much less
for the present project, given that students have become somewhat more used to the principle during their 3.5 years of previous study.
Some students wanted to have the laboratory exercise more
closely connected to the theoretical material covered in the lectures, since some new theory was introduced in the project. A
single valid solution to all the values needed could not be calculated by a formula from the lectures. Instead some estimations
and assumptions had to be made, and the simulation file was

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useful in finding appropriate values for the components. However, in the end most students were satisfied with this way of
working.
F. Equipment Robustness
In most test circuits, everything worked without any failures.
For one group, the control circuit broke, probably because of a
short circuit caused by careless probe usage. There were several
test points to avoid these failures, but in this case, measurements
were made at other points on the board. One other failure was
that of a dry electrolytic capacitor located in the output filter.
This failure was due to there being only 1 k resistors in series
with the test-points, and the students probably shortcircuited the
feedback of the output voltage leading to overvoltage.
G. Examination Results
During the 2006 course, 32 out of the 34 students attended the
first occasion of the written exam, and all completed a report.
The quality of the reports varied. All reports passed, two got the
highest grade, seven reports got the grade good, and none got
the grade sufficient. 12 students failed on the written exam,
but five of these passed the examination thanks to the project
report. The final result was accordingly 25 passed and seven
failed. The written exam was formulated in such a way that it
was fairly easy to pass the exam with knowledge of the project
task and the exercises covering the same topics. Although this
had been clearly stated at the beginning of the course, some students seemed to be fairly passive while carrying out the project
task, and these students had a high failure rate at the exam.
During the 2007 course, the number of students taking the
course was 45. All of the students took part in the project but
only 33 attended the written exam. In this year, all reports
were approved, four got the highest grade and six got the grade
good. Ten students failed on the written exam but six of them
were approved since the project report increased their grade.
During the 2008 course, 44 students participated in the
project and 36 students attended the exam. Of the students
attending the exam, just three students failed. However, without
a written exam these three students would probably have passed
the course, which would have been unacceptable. The low
number of students failing on the exam can be explained by the
fact that the exam was based on the material in the project and
in the computer exercises in the course. For the project, five of
the nine groups got the highest grade and four groups got the
grade good.
IV. FUTURE IMPROVEMENTS
A good idea for the project in the future would be to increase
the switching losses in the transistor to give a clear difference in
temperature when the turn-off time is decreased. This improvement is planned to be implemented by changing the transistor
to one with higher switching losses, but other options would be
to increase the transferred power or increase the switching frequency. Also, the MOSFET can be thermally isolated in order
to increase the temperature of the MOSFET. Since it is not possible to have fewer students per group, additional efforts must be
made to see that all students participate in the work sufficiently.

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IEEE TRANSACTIONS ON EDUCATION, VOL. 52, NO. 4, NOVEMBER 2009

V. CONCLUSION
In this paper, the conduction of a laboratory assignment on
the design of a switching converter is described. The project is
designed according to the CDIO principles and was performed
for the first time 2006 and then again in 2007 and 2008.
Especially with respect to the beginning of the project, some
of the students complained about the lack of detailed specification of the tasks. These comments were expected, but still a little
disappointing to hear. Nevertheless, these reactions were considered to be a natural consequence of the Conceive (C)-phase.
The message that it is not possible to arrive at a final design
of power electronic equipment using only theoretical methods
was quite clear for the students after the course. In particular,
the comparisons between measurements and simulations on the
various used gate resistors certainly conveyed this insight to the
students. The project also taught students that calculations and
simulations are approximations of the real circuit behavior, and
that results from simulations and measurements should not be
expected to be exactly the same. Although this stated during the
lectures, it is much more effective that the students realize this
fact themselves.
For the project conducted according to the CDIO initiative,
there were different reactions from the students at each of the
four steps. In the first Conceive phase, the students were supposed to formulate the given task, which lead to some confusion
and even irritation before the task became more clear. In the Design phase, the solution to the problem was found and the students became more satisfied, but still there were some negative
comments to the effect that the necessary detailed information
was not given, but instead had to be found from datasheets, etc.
Finally, in the Implement and Operate phases, there were mainly
positive comments since the students were satisfied when they
implemented the solution on the test board and evaluated the results. The only negative reactions at this stage concerned the fact
that the decision as to whether the results were adequate was left
up to the students when producing their report. An obvious observation is that the students are not used to take an active role in
a problem formulation. Accordingly, it was of great value for the
students learning that they experienced this obstacle by being
forced to formulate the problem before solving it.
The result from the examination shows that a written exam
is definitely necessary. To rely only on project examination
will not guarantee that all students have learnt the material they
worked with.
APPENDIX A
EQUIPMENT PACKAGING
The circuit was mounted on an aluminum metal plate, see
Fig. 11, where load resistors were also mounted. On the back
side of this metal plate, laboratory assignments used in the
Power Electronic Converter course were mounted. The same
kit could then be used for the two power electronics courses.
In this first course, a setup from the University of Minnesota is
used, for more information see [11]. The test boards, together
with the needed laboratory power supply, cables and a multimeter were then put in a suitcase so it was easy to start and
stop the experiments. This capability is a requirement, since

Fig. 11. The circuit mounted on the aluminum plate, inserted into the suitcase.

the laboratories are used for several other courses continuously.


Ten suitcases with test circuits were available.
APPENDIX B
ASSIGNMENT GIVEN TO THE STUDENTS IN 2006, 2007, AND
2008
You are to finalize the design of a flyback converter and
study the operation of the converter. A laboratory board with
the flyback converter is available. In order to control the flyback
converter, a controller circuit UCC3800 will be used. At the
home webpage a PSpice file containing a flyback converter is
given which can be used in the analysis of the circuit. The input
voltage to the converter is around 22 V and the output voltage
around 15 V. Relevant data sheets can be obtained from the
course web page.
NOTE! Before you do any modification to the test board, the
modifications have to be approved by the laboratory assistant.
Task 1: Make yourself familiar with the test circuit and the
PSpice simulation file.
Task 2 (2006 and 2007): The turn-on and turn-off of the
transistor is too slow right now. Measure the turn-on and
turn-off current and voltage wave-shapes, compare the rise
times with calculations and simulations. Suggest how the
turn-on and turn-off can be made quicker. Implement the
changes on the board and and verify the assumptions with
measurement.
Task 2 (2008): The switching losses of the converter are
larger than expected and a modification has to be made to
lower these losses. Suggest a suitable modification. Measure the required wave shapes and compare the interesting
values with calculations and simulations. Implement the
changes on the board and verify the assumptions with measurements.
Task 3: Determine the losses and the temperature in the
transistor using the 50 load. Determine the fraction between the on-state conduction losses and the switching
losses before and after the modification of the gate driver
circuit. How quickly could this transistor be switched before the junction temperature reaches 60 C?

MAX et al.: POWER ELECTRONICS DESIGN LABORATORY EXERCISE

Task 4: Study the effect of having a non-tight construction


of the dc-link. (Use a 12 m cable at the coaxial contact)
Task 5 (2006 and 2007): Suggest and add a snubber circuit
for the transistor, in order to damp the oscillations occurring with the 12 m cable. Avoid a higher loss than 0.5 W
in the snubber resistor. Recalculate the losses for the transistor and also determine the losses in the snubber circuit.
Task 5 (2008): Suggest a modification to the circuit that
will damp the oscillations occurring when the long 12 m
cable is connected. Avoid a higher loss than 0.5 W in any
of the components used for the modification. Recalculate
the losses for the transistor and also determine the losses
in the inserted components.
Task 6: Study the output voltage when you change the
output load (SW4), and suggest and implement an improvement in the control of the output voltage so that the
converter can keep a constant output voltage. Added 2008:
Design a feedback control so that the output voltage can
handle a load disturbance and get back to its original value
in 10 ms.
Task 7: Calculate the time that this circuit can keep the
output voltage within 20% during a power outage and
verify with experiments. Assume a 50- load.
Task 8 (2008): Determine the losses in the transformer.
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Lena Max (S07) received the M.Sc. degree in electrical engineering from
Chalmers University of Technology, Gteborg, Sweden, in 2003.
She is currently pursuing the Ph.D. degree in electrical power engineering at
Chalmers University of Technology. Her main interest is power electronics for
wind power applications.

Torbjrn Thiringer (M96) received the Ph.D. degree in 1996 from Chalmers
University of Technology, Gteborg, Sweden.
Currently, he is a Professor with the Department of Energy and Environment,
Division of Electric Power Engineering, Chalmers University of Technology.
His area of interest is power electronic applications for wind energy, automotive,
and telecom applications, as well as grid integration of wind energy converters.

Tore Undeland (F00) received the Ph.D. degree from the Norwegian Institute
of Technology, Trondheim, Norway, in 1977.
Since 1984, he has been a Professor of Power Electronics with the Department
of Electric Power Engineering, NTNU, Trondheim, Norway. He is devoted to
teaching and is coauthor of the textbook Power Electronics (New York: Wiley,
2003). His research includes new converters for UPS, induction heating, SMPS,
PV, and wind energy.
Prof. Undeland was Chairman for the EPE 97 Conference in Trondheim and,
later, was President of the EPE.

Robert Karlsson received the B.Sc. degree in electrical engineering from


Chalmers University of Technology, Gteborg, Sweden, in 1983.
He started working in 1983 as a Research Assistant with Chalmers University
of Technology, and since 1987, he has been working as a Research Engineer. His
main interest is design of power electronics for a large variety of applications.