Buck converter

A buck converter is a voltage step down and current step

up converter.

IL

VL

The simplest way to reduce the voltage of a DC supply

S
L
is to use a linear regulator (such as a 7805), but linear
Vo
R
D
regulators waste energy as they operate by dissipating exVi
VD C
cess power as heat. Buck converters, on the other hand,
can be remarkably ecient (95% or higher for integrated
circuits), making them useful for tasks such as converting
the main voltage in a computer (12 V in a desktop, 12-24
V in a laptop) down to the 0.8-1.8 volts needed by the Fig. 3: Naming conventions of the components, voltages and
current of the buck converter.
processor.

Theory of operation

Fig. 1: Buck converter circuit diagram.

Fig. 4: Evolution of the voltages and currents with time in an
ideal buck converter operating in continuous mode.

On-State

on and zero current ow when o and the inductor has

zero series resistance. Further, it is assumed that the input and output voltages do not change over the course of
a cycle (this would imply the output capacitance as being
innite).

O-State

2 Concept
The conceptual model of the buck converter is best understood in terms of the relation between current and
Fig. 2: The two circuit congurations of a buck converter: On- voltage of the inductor. Beginning with the switch open
state, when the switch is closed, and O-state, when the switch
(in the o position), the current in the circuit is 0. When
is open (Arrows indicate current according to the conventional
the switch is rst closed, the current will begin to increase,
current model).
and the inductor will produce an opposing voltage across
The basic operation of the buck converter has the cur- its terminals in response to the changing current. This
rent in an inductor controlled by two switches (usually a voltage drop counteracts the voltage of the source and
transistor and a diode). In the idealised converter, all the therefore reduces the net voltage across the load.
components are considered to be perfect. Specically, Over time, the rate of change of current decreases, and
the switch and the diode have zero voltage drop when the voltage across the inductor also then decreases, in1

2 CONCEPT

creasing the voltage at the load. During this time, the Conversely, the decrease in current during the O-state
inductor is storing energy in the form of a magnetic eld. is given by:
If the switch is opened while the current is still changing,
then there will always be a voltage drop across the induc T =ton +toff
tor, so the net voltage at the load will always be less than
VL
Vo
I
=
dt = toff , toff = (1D)T
Loff
the input voltage source.
L
L
ton

When the switch is opened again, the voltage source will

be removed from the circuit, and the current will decrease. The changing current will produce a change in
voltage across the inductor, now aiding the source voltage. The stored energy in the inductors magnetic eld
supports current ow through the load. During this time,
the inductor is discharging its stored energy into the rest
of the circuit. If the switch is closed again before the inductor fully discharges, the voltage at the load will always
be greater than zero.

2.1

Continuous mode

A buck converter operates in continuous mode if the current through the inductor (IL) never falls to zero during
the commutation cycle. In this mode, the operating principle is described by the plots in gure 4:

If we assume that the converter operates in steady state,

the energy stored in each component at the end of a commutation cycle T is equal to that at the beginning of the
cycle. That means that the current IL is the same at t=0
and at t=T (see gure 4).
So we can write from the above equations:
Vi Vo
Vo
ton toff = 0
L
L
The above integrations can be done graphically: In gure
4, ILon is proportional to the area of the yellow surface,
and ILoff to the area of the orange surface, as these surfaces are dened by the inductor voltage (red) curve. As
these surfaces are simple rectangles, their areas can be
found easily: (Vi Vo ) ton for the yellow rectangle and
Vo toff for the orange one. For steady state operation,
these areas must be equal.

When the switch pictured above is closed (on-state,

top of gure 2), the voltage across the inductor is As can be seen on gure 4, ton = DT and toff = (1D)T .
VL = Vi Vo . The current through the inductor Where D is a scalar called the duty cycle with a value
rises linearly. As the diode is reverse-biased by the between 0 and 1. This yields:
voltage source V, no current ows through it;
When the switch is opened (o state, bottom of gure 2), the diode is forward biased. The voltage
across the inductor is VL = Vo (neglecting diode
drop). Current IL decreases.
The energy stored in inductor L is

(Vi Vo )DT Vo (1 D)T = 0

Vo DVi = 0
Vo
D=
Vi

From this equation, it can be seen that the output voltage

of the converter varies linearly with the duty cycle for a
given input voltage. As the duty cycle D is equal to the
1
E = L IL2
ratio between tO and the period T, it cannot be more
2
than 1. Therefore, Vo Vi . This is why this converter
Therefore, it can be seen that the energy stored in L in- is referred to as step-down converter.
creases during On-time (as IL increases) and then decreases during the O-state. L is used to transfer energy So, for example, stepping 12 V down to 3 V (output voltage equal to one quarter of the input voltage) would refrom the input to the output of the converter.
quire a duty cycle of 25%, in our theoretically ideal cirThe rate of change of IL can be calculated from:
cuit.

VL = L

dIL
dt

2.2 Discontinuous mode

With VL equal to Vi Vo during the On-state and to Vo In some cases, the amount of energy required by the load
during the O-state. Therefore, the increase in current is too small. In this case, the current through the inductor
falls to zero during part of the period. The only dierduring the On-state is given by:
ence in the principle described above is that the inductor
is completely discharged at the end of the commutation
ton
cycle (see gure 5). This has, however, some eect on
VL
(Vi Vo )
ILon =
dt =
ton , ton = DT
the previous equations.
L
L
0

2.3

From discontinuous to continuous mode (and vice versa)

ILM ax =

Vi Vo
DT
L

Substituting the value of IL in the previous equation

leads to:

Io =

(Vi Vo ) DT (D + )
2L

And substituting by the expression given above yields:

Fig. 5: Evolution of the voltages and currents with time in an

ideal buck converter operating in discontinuous mode.

Io =

(
(Vi Vo ) DT D +

Vi Vo
Vo D

2L

This expression can be rewritten as:

We still consider that the converter operates in steady
state. Therefore, the energy in the inductor is the same
1
at the beginning and at the end of the cycle (in the case
Vo = Vi 2LIo
of discontinuous mode, it is zero). This means that the
D 2 Vi T + 1
average value of the inductor voltage (VL) is zero; i.e.,
that the area of the yellow and orange rectangles in gure It can be seen that the output voltage of a buck converter
5 are the same. This yields:
operating in discontinuous mode is much more complicated than its counterpart of the continuous mode. Furthermore, the output voltage is now a function not only
of the input voltage (V) and the duty cycle D, but also of
(Vi Vo ) DT Vo T = 0
the inductor value (L), the commutation period (T) and
So the value of is:
the output current (I).
Vi Vo
D
Vo

2.3 From discontinuous to continuous

mode (and vice versa)

The output current delivered to the load ( Io ) is constant,

as we consider that the output capacitor is large enough to
maintain a constant voltage across its terminals during a
commutation cycle. This implies that the current owing
through the capacitor has a zero average value. Therefore,
we have :

IL = Io
Where IL is the average value of the inductor current. As
can be seen in gure 5, the inductor current waveform has
a triangular shape. Therefore, the average value of IL can
be sorted out geometrically as follow:

1.00
D=0.9
0.80
D=0.7
Normalized Voltage

0.60
D=0.5
0.40
discontinuous
0.20

D=0.3
continuous
D=0.1

0.00
0.00

0.05

0.10

0.15

0.20

0.25

Normalized current

1
1
ILmax DT + ILmax T
2
2
ILmax (D + )
=
2
= Io

IL =

1
T

Fig. 6: Evolution of the normalized output voltages with the normalized output current.

As mentioned at the beginning of this section, the converter operates in discontinuous mode when low current
is drawn by the load, and in continuous mode at higher
The inductor current is zero at the beginning and rises load current levels. The limit between discontinuous and
during t up to IL . That means that IL is equal to: continuous modes is reached when the inductor current

2 CONCEPT

falls to zero exactly at the end of the commutation cycle. the current at the limit between continuous and disconUsing the notations of gure 5, this corresponds to :
tinuous mode is:

DT + T = T

Vi
D (1 D) T
2L
Io
=
D (1 D)
2 |Io |

Iolim =

+D+ =1

Therefore, the output current (equal to the average inductor current) at the limit between discontinuous and continuous modes is (see above):
Therefore, the locus of the limit between continuous and
discontinuous modes is given by:
Iolim =

ILmax
IL
(D + ) = max
2
2

(1 D) D
=1
2 |Io |

Substituting IL by its value:

These expressions have been plotted in gure 6. From

this, it is obvious that in continuous mode, the output
voltage does only depend on the duty cycle, whereas it
On the limit between the two modes, the output voltage is far more complex in the discontinuous mode. This is
obeys both the expressions given respectively in the con- important from a control point of view.
tinuous and the discontinuous sections. In particular, the
former is

Iolim =

Vi Vo
DT
2L

2.4 Non-ideal circuit

Vo = DVi
So I can be written as:

Iolim =

Vi (1 D)
DT
2L

Lets now introduce two more notations:

the normalized voltage, dened by |Vo | =
zero when Vo = 0 , and 1 when Vo = Vi ;

Vo
Vi

. It is

the normalized current, dened by |Io | = TLVi Io .

The term TLVi is equal to the maximum increase of
the inductor current during a cycle; i.e., the increase
of the inductor current with a duty cycle D=1. So,
in steady state operation of the converter, this means
that |Io | equals 0 for no output current, and 1 for the
maximum current the converter can deliver.
Using these notations, we have:
in continuous mode:
|Vo | = D
in discontinuous mode:
|Vo | =
=

1
2LIo
D 2 Vi T

+1

Fig. 7: Evolution of the output voltage of a buck converter with

the duty cycle when the parasitic resistance of the inductor increases.

The previous study was conducted with the following assumptions:

The output capacitor has enough capacitance to supply power to the load (a simple resistance) without
any noticeable variation in its voltage.
The voltage drop across the diode when forward biased is zero
No commutation losses in the switch nor in the diode

1
2|Io |
D2

+1

D2
=
2 |Io | + D2

These assumptions can be fairly far from reality, and the

imperfections of the real components can have a detrimental eect on the operation of the converter.

2.4

Non-ideal circuit

2.4.1

Output voltage ripple

Both static and dynamic power losses occur in any switching regulator. Static power losses include I 2 R (conduction) losses in the wires or PCB traces, as well as in the
switches and inductor, as in any electrical circuit. Dynamic power losses occur as a result of switching, such as
the charging and discharging of the switch gate, and are
proportional to the switching frequency.

Output voltage ripple is the name given to the phenomenon where the output voltage rises during the Onstate and falls during the O-state. Several factors contribute to this including, but not limited to, switching frequency, output capacitance, inductor, load and any current limiting features of the control circuitry. At the most
It is useful to begin by calculating the duty cycle for a
basic level the output voltage will rise and fall as a result
non-ideal buck converter, which is:
of the output capacitor charging and discharging:

dVo =

idT
C

D=

Vo + (VSYNCSW + VL )
Vi VSWITCH + VSYNCSW

During the O-state, the current in this equation is the where:

load current. In the On-state the current is the dierence
VSWITCH is the voltage drop on the power switch,
between the switch current (or source current) and the
load current. The duration of time (dT) is dened by the
VSYNCHSW is the voltage drop on the synchronous
duty cycle and by the switching frequency.
switch or diode, and
For the On-state:
VL is the voltage drop on the inductor.
dTon = DT =

D
f

The voltage drops described above are all static power

losses which are dependent primarily on DC current, and
can therefore be easily calculated. For a diode drop,
VSWITCH and VSYNCHSW may already be known,
based on the properties of the selected device.

For the O-state:

dTof f = (1 D)T =

1D
f

Qualitatively, as the output capacitor or switching frequency increase, the magnitude of the ripple decreases.
Output voltage ripple is typically a design specication
for the power supply and is selected based on several factors. Capacitor selection is normally determined based
on cost, physical size and non-idealities of various capacitor types. Switching frequency selection is typically determined based on eciency requirements, which tends
to decrease at higher operating frequencies, as described
below in Eects of non-ideality on the eciency. Higher
switching frequency can also reduce eciency and possibly raise EMI concerns.

VSWITCH = ISWITCH Ron = DIo Ron

VSYNCSW = ISYNCSW Ron = (1 D)Io Ron
VL = IL RDCR
where:
Ron is the ON-resistance of each switch, and
RDCR is the DC resistance of the inductor.

The duty cycle equation is somewhat recursive. A

rough analysis can be made by rst calculating the valOutput voltage ripple is one of the disadvantages of a ues VSWITCH and VSYNCSW using the ideal duty cycle
switching power supply, and can also be a measure of its equation.
quality.
For a MOSFET voltage drop, a common approximation
2.4.2

Eects of non-ideality on the eciency

is to use R from the MOSFETs datasheet in Ohms

Law, V = I *R . This approximation is acceptable
because the MOSFET is in the linear state, with a relatively constant drain-source resistance. This approximation is only valid at relatively low V values. For more accurate calculations, MOSFET datasheets contain graphs
on the V and I relationship at multiple V values. Observe V at the V and I which most closely match what
is expected in the buck converter.[1]

A simplied analysis of the buck converter, as described

above, does not account for non-idealities of the circuit
components nor does it account for the required control
circuitry. Power losses due to the control circuitry are
usually insignicant when compared with the losses in
the power devices (switches, diodes, inductors, etc.) The
non-idealities of the power devices account for the bulk In addition, power loss occurs as a result of leakage currents. This power loss is simply
of the power losses in the converter.

2 CONCEPT
VF is the forward voltage of the body diode, and

Pleakage = Ileakage V
where:
Ileakage is the leakage current of the switch, and
V is the voltage across the switch.
Dynamic power losses are due to the switching behavior
of the selected pass devices (MOSFETs, power transistors, IGBTs, etc.). These losses include turn-on and turno switching losses and switch transition losses.
Switch turn-on and turn-o losses are easily lumped together as

PSW =

V Io (trise + tfall )
6T

tno is the selected non-overlap time.

Finally, power losses occur as a result of the power
required to turn the switches on and o. For MOSFET switches, these losses are dominated by the gate
charge, essentially the energy required to charge and discharge the capacitance of the MOSFET gate between the
threshold voltage and the selected gate voltage. These
switch transition losses occur primarily in the gate driver,
and can be minimized by selecting MOSFETs with low
gate charge, by driving the MOSFET gate to a lower voltage (at the cost of increased MOSFET conduction losses),
or by operating at a lower frequency.

PGATEDRIVE = QG VGS fSW

where:

where:
V is the voltage across the switch while the switch is
o,

QG is the gate charge of the selected MOSFET, and

VGS is the peak gate-source voltage.

trise and tfall are the switch rise and fall times, and

It is essential to remember that, for N-MOSFETs, the

high-side switch must be driven to a higher voltage than
Vi. To achieve this, MOSFET gate drivers typically
But this doesn't take into account the parasitic capac- feed the MOSFET output voltage back into the gate
itance of the MOSFET which makes the Miller plate. driver. The gate driver then adds its own supply voltage to
the MOSFET output voltage when driving the high-side
Then, the switch losses will be more like:
MOSFETs to achieve a Vgs equal to the gate driver supply voltage.[3] Because the low-side Vgs is the gate driver
V Io (trise + tfall )
supply voltage, this results in very similar Vgs values for
PSW =
high-side and low-side MOSFETs.
2T
T is the switching period.

When a MOSFET is used for the lower switch, additional

losses may occur during the time between the turn-o
of the high-side switch and the turn-on of the low-side
switch, when the body diode of the low-side MOSFET
conducts the output current. This time, known as the
non-overlap time, prevents shootthrough, a condition in
which both switches are simultaneously turned on. The
onset of shootthrough generates severe power loss and
heat. Proper selection of non-overlap time must balance
the risk of shootthrough with the increased power loss
caused by conduction of the body diode. Many MOSFET based buck converters also include a diode to aid the
lower MOSFET body diode with conduction during the
non-overlap time. When a diode is used exclusively for
the lower switch, diode forward turn-on time can reduce
eciency and lead to voltage overshoot.[2]

A complete design for a buck converter includes a

tradeo analysis of the various power losses. Designers balance these losses according to the expected uses
of the nished design. A converter expected to have a
low switching frequency does not require switches with
low gate transition losses; a converter operating at a high
duty cycle requires a low-side switch with low conduction
losses.

2.5 Specic structures

2.5.1 Synchronous rectication

A synchronous buck converter is a modied version of the

basic buck converter circuit topology in which the diode,
D, is replaced by a second switch, S2 . This modication
Power loss on the body diode is also proportional to is a tradeo between increased cost and improved eswitching frequency and is
ciency.
PBODYDIODE = VF Io tno fSW
where:

In a standard buck converter, the yback diode turns on,

on its own, shortly after the switch turns o, as a result
of the rising voltage across the diode. This voltage drop
across the diode results in a power loss which is equal to

2.5

Specic structures

7
more than the freewheeling diode. Second, the complexity of the converter is vastly increased due to the need for
a complementary-output switch driver.

Fig. 8: Simplied schematic of a synchronous converter, in

which D is replaced by a second switch, S2

PD = VD (1 D)Io
where:
VD is the voltage drop across the diode at the load
current Io,
D is the duty cycle, and

Such a driver must prevent both switches from being

turned on at the same time, a fault known as shootthrough. The simplest technique for avoiding shootthrough is a time delay between the turn-o of S1 to the
turn-on of S2 , and vice versa. However, setting this time
delay long enough to ensure that S1 and S2 are never both
on will itself result in excess power loss. An improved
technique for preventing this condition is known as adaptive non-overlap protection, in which the voltage at the
switch node (the point where S1 , S2 and L are joined) is
sensed to determine its state. When the switch node voltage passes a preset threshold, the time delay is started.
The driver can thus adjust to many types of switches without the excessive power loss this exibility would cause
with a xed non-overlap time.
2.5.2 Multiphase buck

Io is the load current.

By replacing diode D with switch S2 , which is advantageously selected for low losses, the converter eciency
can be improved. For example, a MOSFET with very
low RDSON might be selected for S 2 , providing power
loss on switch 2 which is
PS2 = Io2 RDSON (1 D)
In both cases, power loss is strongly dependent on the
duty cycle, D. Power loss on the freewheeling diode or
lower switch will be proportional to its on-time. Therefore, systems designed for low duty cycle operation will
suer from higher losses in the freewheeling diode or
lower switch, and for such systems it is advantageous to
consider a synchronous buck converter design.
Without actual numbers the reader will nd the usefulness of this substitution to be unclear. Consider a
computer power supply, where the input is 5 V, the output is 3.3 V, and the load current is 10A. In this case,
the duty cycle will be 66% and the diode would be on for
34% of the time. A typical diode with forward voltage
of 0.7 V would suer a power loss of 2.38 W. A wellselected MOSFET with RDSON of 0.015 , however,
would waste only 0.51 W in conduction loss. This translates to improved eciency and reduced heat loss.

Fig. 9: Schematic of a generic synchronous n-phase buck converter.

The multiphase buck converter is a circuit topology where

basic buck converter circuits are placed in parallel between the input and load. Each of the n phases is turned
on at equally spaced intervals over the switching period.
This circuit is typically used with the synchronous buck
topology, described above.

This type of converter can respond to load changes as

quickly as if it switched n times faster, without the inAnother advantage of the synchronous converter is that crease in switching losses that would cause. Thus, it can
it is bi-directional, which lends itself to applications re- respond to rapidly changing loads, such as modern microquiring regenerative braking. When power is transferred processors.
in the reverse direction, it acts much like a boost con- There is also a signicant decrease in switching ripple.
verter.
Not only is there the decrease due to the increased efThe advantages of the synchronous buck converter do not fective frequency,[4] but any time that n times the duty
come without cost. First, the lower switch typically costs cycle is an integer, the switching ripple goes to 0; the rate

4 IMPEDANCE MATCHING

3 Eciency factors
Conduction losses that depend on load:
Resistance when the transistor or MOSFET switch
is conducting.
Diode forward voltage drop (usually 0.7 V or 0.4 V
for schottky diode)
Inductor winding resistance
Capacitor equivalent series resistance
Fig. 10: Closeup picture of a multiphase CPU power supply for
an AMD Socket 939 processor. The three phases of this supply can be recognized by the three black toroidal inductors in the
foreground. The smaller inductor below the heat sink is part of
an input lter.

Switching losses:
Voltage-Ampere overlap loss
Frequency *CV2 loss
Reverse latence loss

at which the inductor current is increasing in the phases

which are switched on exactly matches the rate at which
it is decreasing in the phases which are switched o.
Another advantage is that the load current is split among
the n phases of the multiphase converter. This load splitting allows the heat losses on each of the switches to be
spread across a larger area.
This circuit topology is used in computer power supplies
to convert the 12 VDC power supply to a lower voltage (around 1 V), suitable for the CPU. Modern CPU
power requirements can exceed 200W,[5] can change very
rapidly, and have very tight ripple requirements, less than
10mV. Typical motherboard power supplies use 3 or 4
phases, although control IC manufacturers allow as many
as 6 phases[6]

Losses due driving MOSFET gate and controller

consumption.
Transistor leakage current losses, and controller
standby consumption.[7]

4 Impedance matching
A buck converter can be used to maximize the power
transfer through the use of impedance matching. An application of this is in a "maximum power point tracker"
commonly used in photovoltaic systems.
By the equation for electric power:

Vo Io = Vi Ii

One major challenge inherent in the multiphase converter

is ensuring the load current is balanced evenly across the where:
n phases. This current balancing can be performed in a
V is the output voltage
number of ways. Current can be measured losslessly
by sensing the voltage across the inductor or the lower
I is the output current
switch (when it is turned on). This technique is considered lossless because it relies on resistive losses inherent
is the power eciency (ranging from 0 to 1)
in the buck converter topology. Another technique is to
V is the input voltage
insert a small resistor in the circuit and measure the voltage across it. This approach is more accurate and ad I is the input current
justable, but incurs several costsspace, eciency and
money.
By Ohms Law:
Finally, the current can be measured at the input. Voltage
can be measured losslessly, across the upper switch, or
using a power resistor, to approximate the current being
drawn. This approach is technically more challenging, Io = Vo /Zo
since switching noise cannot be easily ltered out. HowI = Vi /Zi
ever, it is less expensive than emplacing a sense resistor i
where:
for each phase.

9
Z is the output impedance
Z is the input impedance
Substituting these expressions for I and I into the power
equation yields:

[2] Jim Williams (1 January 2009). Diode Turn-On Time

Induced Failures in Switching Regulators.
[3] NCP5911 datasheet. http://www.onsemi.com''.
Semiconductor. Retrieved 25 January 2015.

ON

[4] Guy Sguier, lectronique de puissance, 7th edition,

Dunod, Paris 1999 (in French)

Vo2 /Zo = Vi2 /Zi

As was previously shown for the continuous mode, (where
IL > 0):

[5] Toms Hardware: Idle/Peak Power Consumption Analysis

[6] NCP5316 4-5-6-phase converter datasheet

Vo = DVi
where:
D is the duty cycle
Substituting this equation for V into the previous equation, yields:

(DVi )2 /Zo = Vi2 /Zi

which reduces to:

D2 /Zo = /Zi
and nally:

D=

Zo /Zi

This shows that it is possible to adjust the impedance ratio

by adjusting the duty cycle. This is particularly useful
in applications where the impedance(s) are dynamically
changing.

See also
Boost converter
Buck-boost converter
Split-Pi (Boost-Buck Converter)
General DC-DC converters and Switched-mode
power supplies

References

[1] Power MOSFET datasheet list. http://www.magnachip.

com''. MagnaChip. Retrieved 25 January 2015.

[7] iitb.ac.in - Buck converter. 090424 ee.iitb.ac.in

P. Julin, A. Oliva, P. Mandolesi, and H. Chiacchiarini, Output discrete feedback control of a DCDC Buck converter, in Proceedings of the IEEE
International Symposium on Industrial Electronics
(ISIE97), Guimaraes, Portugal, 7-11Julio 1997, pp.
925930.
H. Chiacchiarini, P. Mandolesi, A. Oliva, and P.
Julin, Nonlinear analog controller for a buck converter: Theory and experimental results, Proceedings of the IEEE International Symposium on Industrial Electronics (ISIE99), Bled, Slovenia, 12
16 July 1999, pp. 601606.
M. B. DAmico, A. Oliva, E. E. Paolini y N.
Guerin, Bifurcation control of a buck converter
in discontinuous conduction mode, Proceedings of
the 1st IFAC Conference on Analysis and Control
of Chaotic Systems (CHAOS06), pp. 399404,
Reims (Francia), 28 al 30 de junio de 2006.
Oliva, A.R., H. Chiacchiarini y G. Bortolotto Developing of a state feedback controller for the synchronous buck converter, Latin American Applied
Research, Volumen 35, Nro 2, Abril 2005, pp. 83
88. ISSN: 0327-0793.
DAmico, M. B., Guerin, N., Oliva, A.R., Paolini,
E.E. Dinmica de un convertidor buck con controlador PI digital. Revista Iberoamericana de automtica e informtica industrial (RIAI), Vol 4, No
3, julio 2007, pp. 126131. ISSN: 1697-7912.
Chierchie, F. Paolini, E.E. Discrete-time modeling
and control of a synchronous buck converter .Argentine School of Micro-Nanoelectronics, Technology
and Applications, 2009. EAMTA 2009.12 October 2009, pp. 5 10 . ISBN 978-1-4244-4835-7
.

10

External links
Interactive Power Electronics Seminar (iPES) Many
Java applets demonstrating the operation of converters
Model based control of digital buck converter Description and working VisSim source code diagram
for low cost digital control of DC-DC buck converters
SPICE simulation of the buck converter
Tutorial video explaining buck converters with example buck converter circuit design
Switch-Mode Power Supply Tutorial - Detailed article on DC-DC converters which gives a more formal and detailed analysis of the Buck including the
eects of non-ideal switching (but, note that the diagram of the buck-boost converter fails to account
for the inversion of the polarity of the voltage between input and output).
DC-DC Power Converter Case study
On the Power Eciency Optimization

EXTERNAL LINKS

11

Text and image sources, contributors, and licenses

8.1

Text

Buck converter Source: http://en.wikipedia.org/wiki/Buck%20converter?oldid=648483388 Contributors: Glenn, BenFrantzDale, Everyking, Discospinster, Rich Farmbrough, Plugwash, Evand, Savvo, Hooperbloob, Jehos, Wtshymanski, Woohookitty, Galwhaa, Melesse, GregAsche, Alejo2083, Jidan, Wavelength, Erebor, Crazytales, Esco, Jengelh, Peter Delmonte, Moe Epsilon, Mikeblas, Light current, JLaTondre, SmackBot, Bmearns, Oli Filth, Colonies Chris, Can't sleep, clown will eat me, Frap, Zack112358, Ohconfucius, Shadowlynk, CyrilB,
Naumz, JoeBot, Yves-Laurent, Mikiemike, CmdrObot, Requestion, Electron9, FourBlades, Luna Santin, Nagarroth, MER-C, Txomin,
Jimmyswimmy, Kylealanbrown, STBot, GrahamDavies, K22rock, STBotD, Aramoe, Abeaud, Grambo355, TXiKiBoT, Spinningspark,
AlleborgoBot, Pdfpdf, Reinderien, Aitias, Analogkidr, Jovianeye, Addbot, MrOllie, Chzz, Semiwiki, Zorrobot, Cesaar, Yobot, Jordsan,
TestEditBot, Jbn01, GliderMaven, Prari, FrescoBot, Efadae, DigitalPowerExpert, DSP-user, Sm00th101, EmausBot, Tinss, Fchierchie,
ZroBot, Dicsee, Widr, Titodutta, DBigXray, MusikAnimal, Piguy101, Trevayne08, Grshhh, ChrisGualtieri, JYBot, Kasuncs, Mogism,
WikiDig, Kaushal kk555, Lonely.V, E1Represent, Englishkay and Anonymous: 117

8.2

Images

File:300px-Synch_buck.PNG Source: http://upload.wikimedia.org/wikipedia/commons/9/9f/300px-Synch_buck.PNG License: CCBY-SA-3.0 Contributors: ? Original artist: ?

File:Buck_chronogram.png Source: http://upload.wikimedia.org/wikipedia/commons/6/63/Buck_chronogram.png License: CC-BYSA-3.0 Contributors:
Buck_chronogram.svg Original artist: Buck_chronogram.svg: efadae
File:Buck_chronogram_discontinuous.png Source:
http://upload.wikimedia.org/wikipedia/commons/c/c6/Buck_chronogram_
discontinuous.png License: CC-BY-SA-3.0 Contributors: ? Original artist: ?
File:Buck_circuit_diagram.svg Source: http://upload.wikimedia.org/wikipedia/commons/3/33/Buck_circuit_diagram.svg License:
Public domain Contributors: Self; conversion of File:Buck_circuit.gif by Zack112358. Original artist: TyIzaeL
File:Buck_continuous_discontinuous.svg
Source:
http://upload.wikimedia.org/wikipedia/commons/8/83/Buck_continuous_
discontinuous.svg License: CC-BY-SA-3.0 Contributors: original work by Cyril Buttay, published on Commons at Image:Boost continuous
discontinuous.png, SVG version by Alessio Damato Original artist: Cyril Buttay and Alessio Damato
File:Buck_conventions.svg Source: http://upload.wikimedia.org/wikipedia/commons/f/f0/Buck_conventions.svg License: CC-BY-SA3.0 Contributors: ? Original artist: ?
File:Buck_operating.svg Source: http://upload.wikimedia.org/wikipedia/commons/5/52/Buck_operating.svg License: CC-BY-SA-3.0
Contributors: ? Original artist: ?
File:Buck_resistance.png Source: http://upload.wikimedia.org/wikipedia/commons/3/33/Buck_resistance.png License: CC-BY-SA-3.0
Contributors: ? Original artist: ?
File:CPU_supply.jpg Source: http://upload.wikimedia.org/wikipedia/commons/b/bb/CPU_supply.jpg License: CC-BY-SA-3.0 Contributors: ? Original artist: ?
File:Commons-logo.svg Source: http://upload.wikimedia.org/wikipedia/en/4/4a/Commons-logo.svg License: ? Contributors: ? Original
artist: ?
File:Multiphase_buck.PNG Source: http://upload.wikimedia.org/wikipedia/commons/b/b8/Multiphase_buck.PNG License: CC BY-SA
2.5 Contributors: ? Original artist: ?
File:Question_book-new.svg Source: http://upload.wikimedia.org/wikipedia/en/9/99/Question_book-new.svg License: Cc-by-sa-3.0
Contributors:
Created from scratch in Adobe Illustrator. Based on Image:Question book.png created by User:Equazcion Original artist:
Tkgd2007

8.3

Content license

Creative Commons Attribution-Share Alike 3.0