Académique Documents
Professionnel Documents
Culture Documents
EE 503, SP
Widely used IC
It can run in:
Monostable mode (one stable state) - it can
produce accurate time delays from micro-secs to
hours
Astable mode ( no stable states) it can produce
Rectangular waves with variable duty cycle
Bistable Mode (two stable states)
And lots of other circuits
EE 503, SP
Pin Configuration
EE 503, SP
Pin Configuration
EE 503, SP
Upper comparator
_
Q
Q
Lower comparator
Discharge Transistor
Reset Transistor
EE 503, SP
555 IC comprises of :
Two op-amp comparators
A flip-flop
A discharge transistor
A reset transistor
Three identical resistors (e.g 5 k)
Output stage
The resistors set the reference voltage levels at
the non-inverting I/P of the lower comparator &
inverting I/P of the upper comparator at +Vcc/3
& +2Vcc/3
EE 503, SP
Main Features
1.
2.
3.
4.
5.
6.
7.
8.
9.
When O/P is low:
(i) If the load is connected between pin 3 &
1(gnd):
The current through the load is zero normally off
load
(ii) If the load is connected between pin 3 &
8(+Vcc):
The current through the load flows into the O/P
terminal & is called sink current. The load
connected between pin 3 & +Vcc is called
normally on load
EE 503, SP
When O/P is high:
(i) If the load is connected between pin 3 &
1(gnd):
The output terminal supplies the current to the
normally off load. This current is called source
current
(ii) If the load is connected between pin 3 &
8(+Vcc):
The current through the load is zero
EE 503, SP
EE 503, SP
EE 503, SP
R2
EE 503, SP
=0.01F
EE 503, SP
EE 503, SP
EE 503, SP