Registration Number: MT1769

2007 Microchip 16bit Embedded Control Design Contest

dsPIC LCR Meter

Registration Number: MT1769
Eligible Part(s) Used:
dsPIC30F4012 28Pin Motor Control MCU
Bonus Part(s) Used:
MCP6022 10MHz Dual Op-Amp
Additional MICROCHIP Part(s) Used:
MCP23S08 8Bit SPI GPIO
MCP41010 10K SPI Digital Pot
MCP6S91 SPI Binary PGA Op-Amp
MCP1525 2.5V Precision Voltage Reference

Abstract:
The LCR meter is not a tool commonly found in the electronics hobbyists workshop. Traditionally these
tools have been limited to professional design labs and production line quality assurance activities.
Despite this the increase in popularity of SMD components, including unmarked chip capacitors, and the
prevalence of inductor based switching power regulator systems makes the LCR meter a useful tool.
The design presented utilizes up to date digital methods to analyze the analog performance of the device
under test (DUT). The design uses direct digital synthesis (DDS) techniques to generate the test
waveform and digital signal processing (DSP) methods to condition the resulting voltage and current
signals. Three test frequencies are implemented (100Hz, 1kHz, 10kHz) and both parallel and series
circuit models are evaluated; automatic selection of both frequency and circuit model is available. Basic
accuracy is better than 1%.
The prototype system is built around Microchips 16bit 28pin development board. Programming of flash
memory was achieved using Microchips USB PICKITII programmer. Firmware code was written in C and
compiled using the competition version of C30, developed in MPLAB v7.50. Coefficients for DSP filtering
were created using Momentum Data Systems dsPIC FD Lite. The analog anti aliasing filters were
designed with Microchips Filter Lab v2.0.

dsPIC LCR Meter Operating Specification

Test Frequency
100Hz, 1kHz, 10kHz, (Auto)
Measurement Model
Series, Parallel, (Auto)
Drive Signal
1V pp via 1k
Maximum Impedance
10M
Minimum Impedance
100m
Basic Accuracy
1% ( 0.1 )
Displayed Parameters
Z(), R(), X(), C(F), L(H), Q, D, ()
Supply Voltage
9V
Supply Current
180mA (385mA with LCD Back Light)
Fig 1 : Basic Operation Specifications

Page 1 of 10

Registration Number: MT1769

Fig 2 : Complete dsPIC LCR Meter Prototype System.

Fig 3 : User Interface Board.

Fig 4 : Analog Stage Board - Top.

Page 2 of 10

Registration Number: MT1769

Theory of Operation:
The dsPIC LCR generates a sine wave of known frequency and applies this to the DUT via a source
resistance. Signals representing the current through and voltage across the DUT are conditioned and
amplified before being simultaneously acquired by the ADC module. The acquired signals are further
conditioned by DSP filters to reduce the influence of numerous error sources. By accurately determining
the zero crossings of the acquired waveforms the amplitude and phase can be calculated.
Once the amplitude and relative phase between the voltage and current waveforms is known all of the
device paramaters can be evaluated using standard text book electrical fomulas. The exact formula to be
used is determined by the nature of the component (i.e. leading or laging) and the type of circuit model to
be used (i.e. series or parallel).

DUT
Voltage

DUT
Current

1K Source
Resistance
+

1K
Device Under Test
(DUT)

Fig 5 : Simplified Test Circuit.

DSP Implementation:
In order to effectively implement the mathematics used in this project the signals had to predominantly
consist of the frequency under consideration. For this reason the signals were filtered to reduce any error
sources becoming present in the data set. The analog stage includes an 6th order Butterworth anti
aliasing filter designed using Microchips Filter Lab v2.0. This was specified to ensure Nyquist
requirements were met.
Further filtering was implemented using DSP functions. For test frequencies lower than 10kHz FIR low
pass filtering was implemented in association with decimation to effectively down-sample the signal and
reduce the data set size. The resulting data was band-pass filtered around the frequency of interest using
an 8 tap IIR filter.

Page 3 of 10

Registration Number: MT1769

dsPIC30F4012
User Interface

GPIO
128x64 GRAPHIC LCD

SPI Module

Control Buttons (x3)

Resistor Ladder
Arrangement

10Bit ADC

Analogue Input Stage

(PGA)

Anti Aliasing Filters

Device Under Test

(DUT)

Direct Digital Synthesis

Waveform Generator

Fig 6 : System Block Diagram.

Hardware:
The prototype system was built around Microchips 16bit 28pin development board. In addition to this
three other boards were manufactured. One board carries the user interface components, graphic LCD
and control buttons. The SPI GPIO chip is mounted on this board, close to the LCD header. This board
was manufactured on proto board and mounted on an acrylic stand to allow better viewing of the LCD
Another board supports the analog measurement components. Due to the low noise requirements and
SMD components used, this double sided board was etched rather than using proto board. Whilst most
component packages were able to be directly soldered to this board (SOIC etc) the AD9833 DDS signal
generator is only available is an MSOP package that required a DIP adaptor board due to its fine pitch.
The final board constructed contains the anti aliasing filters. This was built using proto-board and
reserves some space for future development of the battery power supply stage. Signal connections to and
from this board are made with shielded cable to reduce additional noise pick-up.
The device under test is connected via a set of test leads to the analog board. In the prototype the
connectors between the 4 wire test leads and PCB are two RCA plugs, the cable shielding is connected to
the analog ground plane by a pair of screw terminals.

Page 4 of 10

Registration Number: MT1769

Firmware:
The code for this device was written in C, compiled with the contest version of C30 and MPLAB was used
as the IDE. DSP filter coefficients were included as assembly files (*.s) generated by Momentum Data
Systems dsPIC FD Lite. Code was compiled without any optimization levels in anticipation of the limited
license period ending.
Code was developed as many small individual functions which could be tested in isolation. Developing
the code in small manageable pieces was a necessary approach because the programming tool being
used (PICKITII) did not support debugging of dsPIC devices.
The code submitted with the contest consumes 41,466 bytes of program space and 2,526 bytes of RAM.
This result is with no code optimization; tests revealed that using optimization level five reduced the
program code size to 32,775 bytes, although no extensive tests were made of functionality. Coefficients
for DSP filter functions are stored in PSV Variable space to reduce RAM consumption. The fractional
arrays holding the measured and filtered voltage and current data were the key users of RAM.

Performance:
The prototype systems performance is very pleasing. The user interface is easy to use, the push button
operation has a positive feel and the Graphic LCD is clear and easy to read. Measurements appear to
meet the required accuracy (<1%) and repeatability is excellent. The system is able to automatically
choose the most suitable frequency and circuit type, making basic measurements very easy.
Currently the program implements a five cycle averaging function on the result to improve stability and
accuracy. Whilst this is a useful function it has the disadvantage of increasing the overall test cycle time,
a test on automatic will take up to five seconds to finish. A fast test feature is needed in the next
iteration to allow quick sorting of parts at a lower accuracy.

Conclusion:
The development of the dsPIC LCR Meter has been an excellent introduction for the author to Microchips
16bit DSP controllers. The tool chain and development tools supplied by Microchip make coding this type
of controller quick and painless, especially important as I was moving on from years of coding 8bit PIC
processors in assembly. The compiler was easy to use and all of the library files were well documented.
Somewhat surprisingly, the DSP filter functions were the easiest part of the firmware to code, mostly due
to the dsPIC FD Lite program and Microchip documentation.
The SPI communication protocol was a savior in terms of functionality to pin count ratio. This is especially
true for the LCD which if not handled by the SPI GPIO would have consumed half of the microprocessors
available pins.
Once some additional features are added, the dsPIC LCR Meter will make a welcome addition to tools on
my desk. With some insight into the possibilities of these processors, I am already thinking of the next
project.

Page 5 of 10

Registration Number: MT1769

D1
1N4148

VR1
LM2937IMP

C2

R1

1K 1%

GND
4

0.1F

+
C1

10F

OUT
GND
2

D2

C3

IN

J1

+5v

+5v
3

10F

PWR
ON

GRN

R2

+5v

R3

1K 1%

REFER NOTE #2

C10

RES_LADDER
APGA_SPI_CS

PWM1L/RE0

AN2/SS1/LVDIN/CN4/RB2

PWM1H/RE1

AN3/INDX/CN5/RB3

PWM2L/RE2

AN4/QEA/IC7/CN6/RB4
AN5/QEB/IC8/CN7/RB5
VSS
OSC1/CLKI
OSC2/CLKO/RC15

20pF

6MHz

C7
20pF

EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13

dsPIC30F4012

A_SE_SIG

EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14

X1

VDD

PWM3L/RE4
PWM3H/RE5
VDD

LCD_WR
PWG_FMCLK

+5v

LCD_CD
LCD_CE
LCDPOT_CS

VSS
PGC/EMUC/U1RX/SDI1/SDA/RF2
PGD/EMUD/U1TX/SDO1/SCL/RF3
FLTA/INT0/SCK1/OCFA/RE8
EMUC2/OC1/IC1/INT1/RD0

SPI_SDI
SPI_SDO
SPI_SCK
DDS_SPI_CS

VPGA_SPI_CS

J2
VPP

PWM2H/RE3

LCD_CONT

C9

100nF

EMUD2/OC2/IC2/IN2/RD1

+5v

AVSS

100nF

V_SE_SIG

AVDD

C13

R5
10 1%

IC1

EMUD3/AN1/VREF-/CN3/RB1

R7

C6

10F

C5

100nF

EMUD3/AN0/VREF+/CN2/RB0

C11

MCLR

10 1%

0
10F

R4

C8

R6

100nF

REFER NOTE #2

C12

RESET

MCLR

C4

0.1F

1F

SW1

+5v

10K 1%

+5v

+5v
MCLR

VDD
VSS
PGD

SW_GA

PGC

SW_GV

NC

NOTES:

X1
D2
D1
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
R7
R6
R5
R4
R3
R2
R1
SYMBOL

6MHz Crystal
LED Green
1N4148
0.1F Ceramic
1F Tantalum
10F Tantalum
0.1F Ceramic
0.1F Ceramic
20pF Ceramic
20pF Ceramic
1F Tantalum
0.1F MKT
0.1F Ceramic
1F Tantalum
0.1F Ceramic
1F Tantalum
0R 1% W
0R 1% W
10R 1% W
10R 1% W
1K 1% W
10K 1% W
1K 1% W
DESCRIPTION

1. UNLESS NOTED, ITEMS ON THIS

PAGE ARE STANDARD SECTIONS OF
THE 16-BIT 28-PIN MICROCHIP
DEVELOPMENT BOARD.
2. ITEMS HIGHLIGHTED ARE NOT
STANDARD PARTS OF THE
DEVELOPMENT BOARD.
MODIFICATIONS MADE FOR 1MSPS
ADC OPERATION AS PER DATA
SHEET.
J2
J1
IC1
VR1
SW1

3. THE FOLLOWING 0 RESISTORS

WERE REMOVED FROM THE
DEVELOPMENT BOARD: R14, R15,
R16, R18

ICSP 6-Pin Single Inline RA Male

2.5mm Female DC Jack
dsPIC30F4012
LM2937IMP 5V REG
SPST Mom Switch

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DATE:

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PAGE DESCRIPTION:

MICROPROCESSOR (28Pin Dev Board)

Page 6 of 10

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SIZE:

A4

PAGE:

1/5

Registration Number: MT1769

+5v

+5v
LCD_CON

1K 1%

LCD_WR

R8

C
B
E

15kHz PWM

Schottky
1N5819

470 1%

D2

R10

BC547
NPN

Q1
FG/Vee

J3

+5v

Vss
Vdd

+5v

Vo
WR
RD
CE

LCD_CE

+5v

C/D

LCD_CD

Reset
DB0

RES_LADDER

DB1
DB2
DB3
DB4
DB5

SW2

DB6

39K 1%

DB7
FS

R28

MODE

A
20

+5v
+5v
SW3
4

18K 1%

470 1%

R29

R13

FREQ

NC

SW4
4

10K 1%

LCDPOT_CS

+5v

R23

2.2K 1%

SPI_SI

R30

TEST

IC2

R30
R29
R28
R27
R26
R25
R24
R23
R22
R21
R20
R19
R18
R17
R16
R15
R14
R13
R12
R11
R10
R9
R8
SYMBOL

2.2K 1% W
18K 1% W
39K 1% W
82K 1% W
22K 1% W
10K 1% W
10K 1% W
10K 1% W
10K 1% W
470R 1% W
470R 1% W
470R 1% W
470R 1% W
470R 1% W
470R 1% W
470R 1% W
470R 1% W
470R 1% W
10K 1% W
10K 1% W
470R 1% W
10K 1% W
1K 1% W
DESCRIPTION

10K 1%

SPI_SO

R24

SPI_SCK

NOTES:
J3
IC2
Q1
SW4
SW3
SW2
C9
D3
C18
C17
C16
C15
C14

1. INTERFACE FOR TOSHIBA T6963C

LCD INTERFACE.

20-Pin Single Inline Female Socket

MCP23S08 8-BIT SPI GPIO
BC547 NPN
SPST Mom Switch
SPST Mom Switch
SPST Mom Switch
1N5819 Schottky
0.1F MKT
0.1F MKT
1F Tantalum
0.15F MKT
0.1F MKT
1F Tantalum

2. SCREEN RESOLUTION: 128 x 64.

3. FONT SELECT BIASED HIGH FOR
8x6 FONT SET.
4. MCP23S08 ADDRESS: A0 = 0, A1 = 0

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PAGE DESCRIPTION:

USER INTERFACE

Page 7 of 10

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Registration Number: MT1769

+5v

+2.4v
0.1F

ANALOG

J3

C32

0.1F

100K 0.1%

R35

C20
IC5
33 1%

220 1%

22 1%

R31

R32

R33

J4

100K 0.1%

IC3

R36

+
AD8629

J5

47pF

C31

0.1F

DUT_V_NEG

C33

DUT_V_POS

-2.4v

+2.4v

DDS_SPI_CS

0.1F

SPI_SCK

+5v

SPI_SDO
1MHZ PWM 50% DUTY

+2.4v
+

IC4

LCDPOT_CS

1M 1%

DUT_V_POS

R37

SPI_SDO

+2.4v

R38

220K 1% 27K 1%

0.1F

-2.4v

R39

MCP41010

150K 47.5K 953

0.1% 0.1% 0.1%

C34

47pF

R40
-2.4v

C36

IC8

+
AD8629

1M 1%
0.1F

SPI_SCK

DUT_V_NEG

R41

+
AD8629

100K
0.1%

R51

24.3
0.1%

R52 R53

750
0.1%

100K
0.1%

R46 R47

R48

24.3
0.1%

R42 R43

-5v

C27
750
0.1%

100K
0.1%

R56 R57

R58

24.3
0.1%

24.3
0.1%

750
0.1%

47pF

R65 R54 R55

750
0.1%

C25

IC7

150K 47.5K 953

0.1% 0.1% 0.1%

C26

47pF

R66 R44 R45

C24
100K
0.1%

47pF

C33

IC6

PWG_FMCLK

V_PRE_G

DG418L

A_PRE_G

+5v

+5v

0.1F

IC9

C35

47pF

-5v

47pF

C29

C28

100K 0.1%

R61

+5v

100K 0.1%

IC10

DG418L

R63

+
AD8629

SW_GV

VREF_A

VREF_V

R56
R55
R54
R53
R52
R51
R50
R49
R48
R47
R46
R45
R44
R43
R42
R41
R40
R39
R38
R37
R36
R35
R34
R33
R32
R31
SYMBOL

24.3R 0.1% W
953R 0.1% W
47.5K 0.1% W
24.3R 0.1% W
750R 0.1% W
100K 0.1% W
100K 0.1% W
100K 0.1% W
100K 0.1% W
750R 0.1% W
24.3R 0.1% W
953R 0.1% W
47.5K 0.1% W
24.3R 0.1% W
750R 0.1% W
100K 0.1% W
27K 1% W
220K 1% W
1M 1% W
1M 1% W
100K 0.1% W
100K 0.1% W
1.8K 1% W
22R 1% W
220R 1% W
33R 1% W
DESCRIPTION

C27
C26
C25
C24
C23
C22
C21
C20
C19
R66
R65
R64
R63
R62
R61
R60
R59
R58
R57

47pF Ceramic
47pF Ceramic
47pF Ceramic
47pF Ceramic
10nF MKT
0.1F MKT
10F Tantalum
0.1F MKT
0.1F MKT
150K 0.1% W
150K 0.1% W
100K 0.1% W
100K 0.1% W
100K 0.1% W
100K 0.1% W
100K 0.1% W
100K 0.1% W
100K 0.1% W
750R 0.1% W

J3
IC10
IC9
IC8
IC7
IC6
IC5
IC4
IC3
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28

Gold RCA Socket

AD8629 Low Offset Op-Amp
DG418L Analog Switch
AD8629 Low Offset Op-Amp
DG418L Analog Switch
AD8629 Low Offset Op-Amp
AD8629 Low Offset Op-Amp
MCP41010 10K SPI Digital Pot
AD9833 DDS Signal Generator
0.1F MKT
0.1F MKT
0.1F MKT
0.1F MKT
0.1F MKT
0.1F MKT
47nF Ceramic
47nF Ceramic
47pF Ceramic
47nF Ceramic

NOTES:
1. GROUND CONNECTIONS MARKED
ANALOG SHOULD BE PLACED ON A
SEPARATE PLANE AND LINKED TO
DIGITAL\GENERAL GROUND IN ONE
POINT ONLY.
2. CHIP SELECT (CS) SIGNAL FOR
DIGITAL POT (IC4) IS SHARED WITH 8
BIT SPI GPIO (IC2). INSTRUCTION
MASKING ENSURES CORRECT
INDEPENDENT OPERATION.

J5
J4

2007 Microchip \ Circuit Cellar Design Contest

Screw Terminal
Gold RCA Socket

REGISTRATION NO:

dsPIC LCR METER

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DATE:

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PAGE DESCRIPTION:

ANALOG STAGE (1/2)

Page 8 of 10

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PAGE:

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Registration Number: MT1769

+5v

+5v

IC12

IC11
V_PRE_G
VREF_V

SPI_SCK

A_PRE_G

SPI_SDO

VREF_A

SPI_SCK
SPI_SDO

VPGA_SPI_CS

MCP6S91

APGA_SPI_CS

MCP6S91

+5v
820pF
820pF

IC13

C38
10K 1%

20K 1%

R67

R68

C39
+

20K 1%

10K 1%

R69

R70

MCP6022

+5v

+5v

430 1%

2K 1%

430 1%

2K 1%

R82

R81

R83

R84

IC14
+

IC15
+

MCP6022

V_SE_SIG

C39
C38
R90
R89
R88
R87
R86
R85
R84
R83
R82
R81
R80
R79
R78
R77
R76
R75
R74
R73
R72
R71
R70
R69
R68
R67
SYMBOL

820pF Ceramic
820pF Ceramic
620R 1% W
2K 1% W
3K 1% W
620R 1% W
2K 1% W
3K 1% W
430R 1% W
2K 1% W
430R 1% W
2K 1% W
1.3K 1% W
13K 1% W
1.3K 1% W
13K 1% W
680R 1% W
200R 1% W
6.8K 1% W
680R 1% W
200R 1% W
6.8K 1% W
10K 1% W
20K 1% W
20K 1% W
10K 1% W
DESCRIPTION

MCP6022

A_SE_SIG

NOTES:

IC14
IC14
IC13
IC12
IC11
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40

1. GROUND CONNECTIONS MARKED

ANALOG SHOULD BE PLACED ON A
SEPARATE PLANE AND LINKED TO
DIGITAL\GENERAL GROUND IN ONE
POINT ONLY.

MCP6022 Dual Op-Amp

MCP6022 Dual Op-Amp
MCP6022 Dual Op-Amp
MCP6S91 SPI PGA
MCP6S91 SPI PGA
680pF Ceramic
680pF Ceramic
680pF Ceramic
680pF Ceramic
12nF MKT
12nF MKT
1.5nF MKT
1.5nF MKT
680pF Ceramic
680pF Ceramic

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DATE:

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PAGE DESCRIPTION:

ANALOG STAGE (2/2)

Page 9 of 10

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Registration Number: MT1769

+5v

-5v

VR2
TPS60403

-5v

+2.4v

330 1%

R91

+2.4v

+5v

330 1%

R93

+5v
IC16

VREF_V
+2.5v Reference

+5v

VREF_A

+2.5v Reference

MCP6022

MCP1525

IC16
VR3
VR2
D5
D4
C55
C54
C53
C52
C51
C50
R94
R93
R92
R91
SYMBOL

MCP6022 Dual Op-Amp

MCP1525 Precision 2.5V Reference
TPS60403 60mA -5V Charge Pump
2.4V Zener
2.4V Zener
1F Tantalum
1F Tantalum
1F Tantalum
1F Tantalum
1F Tantalum
1F Tantalum
10K 1% W
330R 1% W
10K 1% W
330R 1% W
DESCRIPTION

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PAGE DESCRIPTION:

POWER CONDITIONING

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