Silicon Photonics:

Heterogeneous integration for

high bandwidth, efficient
computing
Luke Theogarajan
ltheogar@ece.ucsb.edu

Outline
q Motivation
q System Description
q Circuits
q Wafer-Scale Integration
q Future Work

The Growth of Data Consumption

Data traffic continues to grow
Data centers become key growth drivers

Kilper et, al., Power Trends in Communication Networks, J.

Selected Topics in Quantum Electronics, March/April 2011

C. Lange et al., Energy Consumption of Telecommunication

Networks and Related Improvement Options, J. Selected
Topics in Quantum Electronics, March/April 2011

Data Center Carbon Footprint

http://www.mckinsey.com/clientservice/bto/pointofview/pdf/BT_Data_Center.pdf

Power Consumption Breakdown

Source: Energy Logic: Reducing Data Center Energy Consumption by

Creating Savings that Cascade Across Systems, Emerson Power

The Cascade Effect

Source: Energy Logic: Reducing Data Center Energy Consumption by

Creating Savings that Cascade Across Systems, Emerson Power

Data Center Switches

Demand is
outpacing capacity
by more than 10x

Energy Savings Opportunities

Big Opportunities!
http://www1.eere.energy.gov/industry/datacenters/pdfs/vision_and_roadmap.pdf

Electronic Switch for Data Centers

Full IP routing
Enhanced security
Scalable by parallelism
Cisco CRS-3, 4.48Tbps, Power ~ 10kW
Scalable up to 322Tbps, but would consume 700kW!

Difficult to scale and satisfy demand due to power constraints

CISCO. (2010). CISCO CRS-3 carrier routing system. http://www.cisco.com/

en/US/products/ps5763/products_data_sheets_list.html

CMOS Scaling

S.J. Ben Yoo, J. Selected Topics in Quantum Electronics,

March/April 2011

Kilper et, al., J. Selected Topics in Quantum Electronics,

March/April 2011

Electrical vs Optical Interconnect

Exceeds ITRS Roadmap!

Limit of the ITRS Roadmap

Proposed Solution
q Electronic switch difficult to scale to meet demand and satisfy
power constraints
q Optical switching can solve bandwidth requirement

Current generation MEMS based switch is slow

Semiconductor Optical Amplifier based switch fabric is fast but power

hungry

q We propose deep integration of CMOS electronic with Hybrid

silicon photonic switch to achieve both capacity and low power
solution

Research Goals
q Develop Highly Integrated CMOS Circuits To Enable Energy
Efficient Fast Optical Packet Switching

Area efficient, Low-power Switch Driver

Novel Fully Differential Transimpedance Amplifier Circuit

Multi-Channel Integrated Optical Frontend (TIA/Limiting Amp/CDR)

q System Demonstration of 4x4, 8x8 Optical Packet Switch (in

collaboration with Aurrion Inc.)

Output Power Equalization

Routing using CMOS+FPGA

Demonstrate Feasibility and Energy Efficiency of Wafer-scale

Integration of CMOS and Photonic IC (With Collaboration)

An Integrated Approach

System Architecture

PD

PD

TIA

PD

Limiting
Amplifier

25 MHz

Data
Recovery

16 X 625 Mbps

FPGA Switch
Configuration Logic

Switch Drivers

PLL

2.5 Gbps Optical Packet Header/Ack

Switch Fabric

Gain Control

ADC to
Look-up Table

4 X 625Mbps

PD

Low Frequency
TIA

PD

PD

PD

PD

The Optical Switch

"High-Speed Hybrid Silicon Mach-Zehnder Modulator and

Tunable Microwave Filter"
Hui-Wen Chen, Ph. D. Thesis UC, Santa Barbara

Optical Switch w/CMOS Driver

Input at Port 1, Out at Port 3

CMOS Driver

Hybrid Silicon
Optical Switch

Reverse Bias 3.5V

Trise ~ 6ns
600

1mV/div
20ns/div
Amplitude (V)

500
400

Optical
response

300
200
100
0

P1

P3

-100
-200
-300
18.06

Time (S)
18.07
18.08

18.09

Power Comparisons
l

Optical amplifiers and FPGA dominate the power consumption

10X Reduction at comparable throughput compared to commercial part

Power is independent of data rate can scale to much higher data rate

Channels

36

TIA/LA/CDR

10

20

40

180

Laser Driver

100

200

400

1800

FPGA

100

200

400

1800

Switch Driver

OA

200

400

800

3600

Calibration

10

20

90

Total (W)

0.416

0.831

1.661

7.471

*Commercial Electronic
Switch 36x36 (W)

85

Stabilizing Photonics with Electronics

TIA for Power detection

Test setup

Programmable SOA Drivers

Result with automatic

power equalization

231-1 PRBS 10Gb/s eye

diagram at 10dBm input
power

Electronic Photonic Integration

o Current Approaches
o Heterogeneous Integration
o Future Work

What Can Electronic-Photonic

Integration achieve?

RF IC
Narrow Linewidth Laser

EO
Modulator
CMOS IC

Control and Stabilization of Photonics

Advanced Architectures for low power

data transmission

Front-End of the Line Integration

Prototype 10-Gb/s transceiver from Luxtera Corporation

Luxteras Electronic Photonic

Integration

Source: http://members.infinibandta.org/kwspub/Luxtera.pdf

Technology
All devices are co-fabricated on a standard CMOS line

Key Components

Limitations
Development cost is very high
Does not leverage the latest advances in CMOS

Optical Waveguides below metallization

Wafer-Scale Approach
Photonics and Electronics function at different length
scales so a better approach would be post fabrication
integration
Can we take a parallel rather serial approach?
Can we integrate foundry CMOS die with foundry
photonics?
Advantages:
Leverage best CMOS and photonic technology

Disadvantage
Larger package size
Possible issues with waveguides

Photonic CMOS Chip Integration

CMOS Foundry Chips

Slot in and Wire

Hybrid III-V Photonics Silicon Wafer

side view

Electronic-Photonic Integration
RDL First Process to ensure surface flatness
Photonic

Electronic
IC

20m pitch and density

5m pitch and density

Wafer

Uncured BCB
Sacrificial Layer (PMGI)
Handle Wafer
Place Etched Photonic Chip and Electronic IC
Photonic

Electronic
BCB
IC

Wafer

Sacrificial Layer (PMGI)

(a)

(c)

Handle Wafer
Release assembly from Sacrificial layer
Photonic

Electronic
BCB
IC

EIC-PIC Interface
EIC-PIC Interface

Wafer

Etch electrical pad access and wire

Photonic

Electronic
BCB
IC

Wafer

(d)

(d)

Example of Electronic-Photonic
Integration

Process is versatile: Heterogeneous

Technology Integration: GaAs and Si
25GHz Distributed Modulator Driver (TriQuint
130nm pHEMT TQP-13N)

40m Lines
Ground
pad
28 m diameter
via
10 m Gaps
20m Lines

Future Work
q Design and Integration of CMOS processing circuits
with Photonic switches
q Integration of distributed GaAs MZI driver with MZM

Conclusions
There is plenty of power savings to be had that can
have tremendous impact on data centers
Photonic interconnect is the most promising approach
to achieving these goals
Close heterogeneous integration of CMOS will enable
the next generation of integrated photonic switches.

Acknowledgements
Prof. John Bowers
Aurrion- Greg Fish, Alex Fang and Eric Hall
Graduate Students - Luis Chen, Ashfaque Uddin,
Avantika Sodhi
Funding: DARPA E-PHI, iARPA