(SOLVED) 74LS74 D Flip Flop State Changing Automatically

6/13/2015
[SOLVED]74LS74Dflipflopstatechangingautomatically
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3rdApril2014,17:27
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#1
74LS74
D
flip
flop
state
changing
automatically
Hello,
Ihave
a
casca
dedD
flip
flop
circuit
.
Sche
matic
attach
ed.I
am
sendin
gthe
data
and
clock
pulse
from
aPIC
micro
contro
ller.
What
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happe
nsis,
when
the
data
and
clock
pulses
are
sent
the
leds
glow
proper
lyas
expect
ed.
But
after
a
minut
eor
two,
the
flip
flop
states
get
chang
ed
autom
aticall
yand
the
leds
also
glows
accord
ingly.
Iam
not
sendin
gany
data
clock
pulse
after
the
first
one.
But
still
the
flip
flops
gets
chang
2/63
6/13/2015
ed.
DFT,RFDesignSolutions,VLSIJobsWorldWide,
VLSI&DESIGNTECHNOLOGY,PVTVariationsinIC
Design,RFcircuitsandsystemsdesign,IndiaVLSI
Group,VLSI,VLSIPDdiscussion,VLSI
Openings,India
Please
help!
ReplyWithQuote
Sponsor
3rdApril2014,18:05
SunnySkyguy
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(19),milan.rajik(16)
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SendamessageviaSkypeto
SunnySkyguy
#2
Re:
74LS74
D
flip
flop
state
changing
automatically
Noise
pulses
(eg
ESD)
on
long
wires
onthe
output
or
groun
dcan
feedb
ack
intern
ally.
Decou
pling
caps
on
chips
are
essent
ial,
somet
imes
a
buffer
,
althou
ghthe
transi
stor
ought
toact
asa
buffer
.So
My
3/63
6/13/2015
guess
is
condu
cted
or
radiat
ed
noise
on
long
wires.
The
best
question
deserves
a
better
answer.
To
show
appreciation
use
helpedme
&
[solved]
Ifyou
don't,
what
does
that
say
about
you?
...Tony
Stewart
EE
since
1975
ReplyWithQuote
3rdApril2014,19:15
RohanDey
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#3
Re:
74LS74
D
flip
flop
state
changing
automatically
4/63
6/13/2015
Yes,I
am
using
long
wires,
about
4
inches
long,
for
data
and
clock.
Actual
lymy
PICis
onan
EVK
and
the
flip
flops
areon
a
bread
board.
Sodo
you
sugge
stthat
Iput
allthe
things
ona
PCB
and
then
try?
What
about
decou
pling
caps?
Shoul
dI
use
them?
Where
should
I
conne
ct
them?
Thank
s
5/63
6/13/2015
ReplyWithQuote
3rdApril2014,19:22
SunnySkyguy
SuperModerator
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7
SunnySkyguy
#4
Re:
74LS74
D
flip
flop
state
changing
automatically
at
least
one
ceram
ic
0.01
to0.1
uFis
typical
.close
to
chips
from
a
clean
supply
,then
bewar
eof
transi
ent
enviro
nment
al
noise
like
welde
rsor
line
noise
or
triac
dimm
ers.IF
there
is
radiat
ed
noise,
twiste
dpair
helps
reduc
6/63
6/13/2015
e
differe
ntial
noise,
but4"
is
fairly
short.
ISthis
batter
y
operat
ed?
When
in
doubt,
alogic
probe
or
scope
probe
witha
short
groun
dlead
and
manu
al
trigge
ris
somet
imes
neede
dto
find
the
source
of
spurio
us
noise.
Bewar
eof
source
imped
ances
and
stray
coupli
ngof
magn
eticor
electri
cfield
impuls
esor
dyna
7/63
6/13/2015
mic
loads.
The
best
question
deserves
a
better
answer.
To
show
appreciation
use
helpedme
&
[solved]
Ifyou
don't,
what
does
that
say
about
you?
...Tony
Stewart
EE
since
1975
ReplyWithQuote
3rdApril2014,19:22
3rdApril2014,19:40
RohanDey
Memberlevel2
JoinDate:
Location:
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India
#5
Re:
74LS74
D
flip
flop
8/63
6/13/2015
Posts:
Helped:
Points:
Level:
42
0/0
577
5
state
changing
automatically
Noit
isnot
batter
y
operat
ed.I
am
using
a
transf
ormer
based
linear
power
supply
.Iwill
add
the
caps
and
check
what
happe
ns.
ReplyWithQuote
4thApril2014,11:45
RohanDey
Memberlevel2
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577
5
#6
Re:
74LS74
D
flip
flop
state
changing
automatically
Hello
Sunny
Skygu
y,
Itried
with
ceram
ic
caps
of
0.1uF.
I
conne
9/63
6/13/2015
cted
the
caps
betwe
en
VCC
and
GND
lines
andto
each
flip
flop's
data
gnd,
and
clock
gnd
pins.
But
the
proble
mstill
exists.
When
everI
switch
ONor
OFF
an
electri
cal
conne
ction
(Fan
or
Light)
inmy
room,
the
flip
flop
chang
es
states
.Any
idea
how
tofix
this?
Thank
s
ReplyWithQuote
10/63
6/13/2015
4thApril2014,19:01
SunnySkyguy
SuperModerator
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7
SunnySkyguy
#7
Re:
74LS74
D
flip
flop
state
changing
automatically
Perha
psthe
LEDs
are
the
anten
na
pickin
gup
large
electri
cfield
transi
ent.
Witho
utbig
pictur
eof
your
layout
and
conne
ctions,
Ican
only
guess
how
to
best
protec
tit.
If
everyt
hingis
floatin
gwith
respec
tto
groun
d,
adding
a
groun
d
11/63
6/13/2015
conne
ction
can
often
suppr
ess
stray
noise.
ALso
using
a
torroi
dal
comm
on
mode
choke
with
the
long
wires
to
LEDs
wrapp
ed
witha
few
turns
aroun
dthe
torroi
dor
some
CM
choke.
At
least
you
have
rules
out
condu
cted
noise
and
identif
ied
the
source
as
radiat
ed
noise.
Anoth
er
trick
12/63
6/13/2015
isto
puta
small
capon
output
Qto
identif
yif
the
noise
is
gettin
gin
there,
(Qhas
intern
al
input
conne
ctions
)
The
best
question
deserves
a
better
answer.
To
show
appreciation
use
helpedme
&
[solved]
Ifyou
don't,
what
does
that
say
about
you?
...Tony
Stewart
EE
since
1975
ReplyWithQuote
5thApril2014,05:10
#8
13/63
6/13/2015
zorro
AdvancedMemberlevel4
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Argentina
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23
Re:
74LS74
D
flip
flop
state
changing
automatically
Maybe
thisis
not
relate
dwith
the
anom
aly
you
descri
be,
but
take
into
accou
ntthat
theQ
ouputs
ofthe
flip
flops
are
seriou
sly
loaded
in
your
circuit
.
Curre
nt
capabi
lityof
LS
TTL's
in
High
state
islow
and
voltag
ecan
be
bad,
then
"H"
level
canbe
14/63
6/13/2015
insuffi
cient
for
theD
input.
I
would
chang
ethe
output
circuit
that
lights
the
LED.
An
easy
possib
ilityis
put
the
LEDin
the
colect
or
circuit
and
increa
sethe
Rs
from
100
ohms
to
10k.
Better
would
beto
use
the/Q
output
anda
PNP
transi
stor.
Regar
ds
Z
ReplyWithQuote
5thApril2014,05:10
15/63
6/13/2015
5thApril2014,17:27
SunnySkyguy
SuperModerator
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7
SunnySkyguy
#9
Re:
74LS74
D
flip
flop
state
changing
automatically
I
consid
ered
the
load
tobe
margi
nal.
Ifitis
a
74LS,
the
specs
areas
follow
s
Voh=
2.7Vm
in@
0.4m
A
Consid
er
Vf=2.
0Von
Redor
Yellow
LED@
20mA
and
assum
e
Vbe=0
.7,
16/63
6/13/2015
with
hFE=1
00the
load
curren
twill
be
limite
dby
the
base
drive
curren
twith
Emitte
r
follow
er
transi
stor.
Also
the
emitte
rload
curren
twill
rise
rapidl
y
above
Vf=2V
or
base
voltag
e>
2.7V,
but
the
driver
imped
ance
of
LS74
rises
rapidl
y
above
2.7V
asits
output
isa
Darlin
gton,
emitte
r
follow
erfor
17/63
6/13/2015
Voh,
which
has
100R
collect
or
curren
t
limitin
g,
intern
ally.
Assum
ing
hFEof
100
for
the
2N222
2,if
Voh=2
.7Vit
can
supply
400uA
x100
=
40mA
tothe
emitte
r,and
the
base
resist
ance
of
100R
only
drops
0.1k*
0.4mA
=
0.04V.
Which
isnot
much.
..to
worry
about,
so
loadin
gis
not
exces
sive.
LED
18/63
6/13/2015
curren
t
could
be
anythi
ng
from
5to
40
mA,
dueto
Vf
junctio
n
voltag
e
tolera
nces.
20x
more
curren
ton
low
state
then
invert
with
Comm
on
emitte
rlow
side
drive
toLED
cathod
ewith
curren
t
limitin
gRon
collect
or.
There
isa
noise
susce
ptibilit
y
issue
here
and
one
needs
to
identif
yif
19/63
6/13/2015
interfe
rence
is
condu
cted
or
radiat
ed
then
deter
mine
where
the
margi
nis
least
for
ingres
sand
fix
that.
Sofar
there
is
insuffi
cient
inform
ation
to
track
this
down.
My
last
guess
was
radiat
ed
noise
from
some
where
picked
upmy
long
(?)
LED
lines
than
condu
cted
back
intoQ
to
toggle
state
every
20/63
6/13/2015
few
minut
es,
but
we
don't
know
how
interfe
rence
starts.
Last
edited
by
SunnySk
yguy
5thApril
2014at
17:32.
The
best
question
deserves
a
better
answer.
To
show
appreciation
use
helpedme
&
[solved]
Ifyou
don't,
what
does
that
say
about
you?
...Tony
Stewart
EE
since
1975
ReplyWithQuote
14thJune2014,14:07
RohanDey
Memberlevel2
#10
Re:
21/63
6/13/2015
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577
5
74LS74
D
flip
flop
state
changing
automatically
Sorry
for
sucha
late
reply.
Iwas
stuck
up
witha
differe
nt
projec
t.
Ihave
setup
the
entire
circuit
ona
vero/s
trip
board.
My
new
circuit
is
attach
ed.
NowI
have
a
relay
atthe
output
ofthe
Dflip
flop.I
also
have
a
small
delay
circuit
in
betwe
enthe
relay
and
22/63
6/13/2015
theD
FF
output
.Itis
justa
requir
ement
ofmy
applic
ation.
Atthe
output
ofthe
relayI
have
conne
cteda
230V,
60
Watt
light
bulb.
Norm
ally
everyt
hing
happe
nsas
expect
ed.
When
Igive
neces
sary
pulse
tothe
DFF,
the
relay
turns
ON/OF
Fin
effect
turnin
gthe
light
bulb
ON/OF
F.But
somet
imes
when
the
relay
is
turned
off,
23/63
6/13/2015
theD
FF
(74LS
74)
turns
ON
autom
aticall
yjust
after
being
turned
OFF,
i.e.it
stays
OFF
mome
ntarily
and
then
the
flip
flop
output
'Q'
toggle
sits
state.
Ihave
seen
onthe
oscillo
scope
that
when
the
relay
is
gettin
g
turned
OFF,a
noise
spike
is
gener
ated
onthe
DC
side.I
have
attach
eda
photo
ofit.
Here
the
24/63
6/13/2015
red
lineis
the
VCC
and
the
yellow
lineis
the
GND.
This
noise
is
seen
onall
the
pins
ofthe
DFF
(i.e.
data,
clock
and
Q).
This
spike
is
reachi
ng
voltag
esup
to30V
somet
imes,
andit
lasts
about
max.
100to
150
us.
WhatI
under
stand
is
becau
seof
this
noise
spike
the
flip
flopis
changi
ng
state.
25/63
6/13/2015
Iwant
to
know,
what
are
the
possib
le
metho
ds/cir
cuits,
which
I
should
addto
elimin
ate
this
noise
spike,
so
that
the
flip
flop
does
not
chang
e
state?
This
noise
isalso
reachi
ngmy
PIC
micro
contro
ller's
VCC,
GND
and
data
pins.
Canit
dama
gethe
IC?
Thank
sfor
readin
g..
please
help!
26/63
6/13/2015
ReplyWithQuote
14thJune2014,14:07
14thJune2014,15:57
Gorgon
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13
#11
Re:
74LS74
D
flip
flop
state
changing
automatically
The
first
thing
you
should
dois
toadd
a
resist
or
from
base
to
emitte
r(Vcc)
onthe
relay
driver
PNP
transi
stor.
This
driver
geta
margi
nal
base
curren
t(volta
ge)
and
no
27/63
6/13/2015
define
doff
signal,
onlya
floatin
goff.
This
may
cause
relay
bounc
eboth
atON
and
OFF.
The
'delay
circuit'
and
the
zener
diode
inthe
emitte
r
circuit
is
very
iffy.I
think
thisis
done
to
make
an
increa
sed
delay
onthe
output
,but
the
result
isas
said
iffyat
the
best.
Why
do
you
need
this
delay?
Toget
the
best
perfor
28/63
6/13/2015
mance
ofthe
relay
you
should
drive
it
proper
ly.
Since
you
drive
the
PNP
transi
stor
with
only
1.5V
anda
10k
base
resist
or,
the
bleede
r
resist
orto
emitte
rneed
tobe
relativ
ehigh
in
value.
To
rectify
thisI
would
have
reduc
edthe
base
resist
or
(R13)t
o680
ohm,
and
added
a1k
bleede
r
resist
or
from
29/63
6/13/2015
the
NPNs
(Q4)
collect
orto
VCC.
This
resist
orwill
turn
the
PNP
transi
stor
(Q5)O
FF
proper
ly.
I
suppo
seyou
under
stand
that
your
delay
circuit
is
worki
ng
both
atON,
and
OFF,
makin
gthe
flanks
iffy.
ReplyWithQuote
14thJune2014,17:19
RohanDey
Memberlevel2
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India
42
0/0
577
5
#12
Re:
74LS74
D
flip
flop
state
changing
automatically
Ineed
the
delay
30/63
6/13/2015
circuit
becau
seI
am
casca
ding
many
of
these
flip
flops
togeth
erand
drivin
g
them
from
one
source
,i.e.
data
and
clock
signal.
Here
ifIdo
not
add
the
delay
the
output
of
each
flip
flop
will
flicker
ifI
want
to
chang
eonly
the
nth
flip
flop
state.
I
requir
ethe
delay
to
happe
nin
both
ON
31/63
6/13/2015
and
OFF
state.
Iwill
chang
ethe
R13
and
adda
1K
from
the
NPN's
collect
orto
VCC
and
tryas
you
say.
What
about
he
noise?
ReplyWithQuote
14thJune2014,17:43
Gorgon
FullMemberlevel5
JoinDate:
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Norway
277
59/59
3,156
13
#13
Re:
74LS74
D
flip
flop
state
changing
automatically
Ifthis
is
made
asa
bread
board
with
many
long
wires,
you
may
have
a
proble
m
anywa
32/63
6/13/2015
y.
But,
howis
your
actual
circuit
asyou
have
built
it?
Descri
bethe
decou
pling
capaci
tors
you
have
used,
and
where
you
have
placed
them
inthe
circuit
.
Norm
ally
the
noise
is
comin
g
from
wires
acting
as
anten
nas,
and/or
capaci
tive
coupli
ng
betwe
en
eleme
nts,
like
inside
the
relay.
The
noise
33/63
6/13/2015
will
come
from
the
sparks
gener
ated
inthe
relay
contac
ts,
and
the
inducti
ve
spikes
from
the
relayc
oil.
That
iswhy
itis
import
antto
make
the
power
supply
as
stiff
as
possib
le,or
with
aslow
imped
ance
as
possib
le,
using
capaci
tors,
ofthe
right
type
and
value,
placed
atthe
optim
al
places
inthe
circuit
.
34/63
6/13/2015
ReplyWithQuote
#14
16thJune2014,14:37
RohanDey
Memberlevel2
JoinDate:
Location:
Posts:
Helped:
Points:
Level:
Feb2013
India
42
0/0
577
5
Re:
74LS74
D
flip
flop
state
changing
automatically
Hi,
Ihave
made
the
chang
ein
my
circuit
.
Instea
dof
the
680
ohmI
have
puta
1kas
I
didn't
have
the
680
ohm
with
me.
AndI
have
also
added
a1k
bleede
r
resist
or
from
the
NPNs
(Q4)
collect
orto
VCC.
35/63
6/13/2015
My
entire
setup
ison
vero
board.
Ihave
three
differe
nt
vero
board
seach
having
the
same
flip
flops
and
relay
circuit
.The
flip
flops
are
casca
ded
and
the
vero
board
sare
conne
cted
via
conne
ctors.
Isend
the
data
and
clock
pulse
from
aPIC.
Ihave
put
0.1uF
ceram
ic
caps
onthe
vcc
gnd
termin
alsof
36/63
6/13/2015
each
flip
flops.
Ihave
conne
cteda
230V,
60W
light
bulb
only
tothe
first
board.
What
happe
ns
now
is,
when
the
relay
with
light
bulbis
turned
OFFit
toggle
sthe
state
ofthe
other
flip
flops
casca
dedto
it.
This
does
not
happe
n
every
time.
Also,
this
happe
ns
only
when
the
230V
light
bulbis
conne
cted,
when
37/63
6/13/2015
I
remov
ethe
bulb,
everyt
hing
works
fine.
Iam
sure
my
power
supply
is
pretty
stable
.
Soit
seems
thatit
isthe
noise
from
the
relay
thatis
makin
gthe
proble
m.
Can
you
please
tell
what
other
option
s
should
Itry
out?
Isita
vero
board
layout
issue?
Shoul
dI
use
some
additi
onal
circuit
ryto
handle
the
38/63
6/13/2015
noise?
Thank
s..
ReplyWithQuote
16thJune2014,15:44
Gorgon
FullMemberlevel5
JoinDate:
Location:
Posts:
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Nov2005
Norway
277
59/59
3,156
13
#15
Re:
74LS74
D
flip
flop
state
changing
automatically
Could
you
make
a
compl
ete
schem
atics
ofthe
circuit
you
are
using,
exactl
yas
you
have
built
it,and
if
possib
leadd
a
pictur
eof
the
mocku
p
circuit
too.It
is
import
antto
includ
eall
compo
nents
you
39/63
6/13/2015
use.
How
do
you
contro
lthe
FFs,
from
a
micro
contro
lleror
manu
ally?
ReplyWithQuote
17thJune2014,00:03
Allen6502
FullMemberlevel1
JoinDate:
Location:
Posts:
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Points:
Level:
Nov2008
BorneoIsland
106
32/32
1,746
9
#16
Re:
74LS74
D
flip
flop
state
changing
automatically
Yes,
an
updat
eof
your
schem
atic
would
be
nice.
After
so
many
posts,
your
circuit
should
look
very
differe
nt
from
when
itgot
starte
d.
40/63
6/13/2015
Allen
ReplyWithQuote
17thJune2014,18:15
SunnySkyguy
SuperModerator
Achievements:
JoinDate:
Location:
Canada
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Points:
Level:
BlogEntries:
Sep2007
RichmondHill,ON,
4,487
1100/1100
22,852
36
7
SunnySkyguy
#17
Re:
74LS74
D
flip
flop
state
changing
automatically
EMI
issues
are
based
on
physic
sof
inducti
on
and
capaci
tive
coupli
ng
and
condu
ction
noise
spikes
.
A
verob
oard
can
get
pretty
messy
with
inducti
ve
groun
ds,
signal
sand
coupli
ngto
the
high
curren
tbulb,
41/63
6/13/2015
which
arcs
when
contac
tsare
opene
d
causin
g
many
MHz
of
reson
ant
spikes
,
which
couple
easy
thru
stray
capaci
tance
or
induce
large
inducti
ve
voltag
es
across
leads
and
power
.
Two
metho
ds.
1.
elimin
ate
the
noise.
Usea
zero
crossi
ng
switch
triac,
and
snubb
erRC
filter.
Route
all
spike
42/63
6/13/2015
curren
ts
with
twiste
d
pairs
to
reduc
e
uninte
ntiona
l
radiati
on,
such
as6
twists
per
inch
with
care
on
line&
neutra
l.
Apply
small
but
highV
rated
film
caps
across
relay
contac
ts.or
shield
the
relay
or
remov
eit
far
enoug
h
away
from
the
offend
ing
circuit
.(as
in
cars
inthe
corner
under
the
43/63
6/13/2015
hood)
2.
Impr
ove
the
targe
t
immu
nity
for
noise
on
power
,
groun
dsand
signal
sBeef
up
wires,
use
low
imped
ance
batter
yor
power
source
s,
shield
the
board,
use
COm
mon
mode
choke
son
the
contro
l
signal
s(
ferrite
2hole
beads,
torroi
d,
clams
hell
core
etc)
add
feedth
ru
capaci
tive
44/63
6/13/2015
filters
for
in/out
signal
sin
the
box.
3.
Meas
ure
transi
ents
more
accur
ately
with
zero
length
probe
groun
d
using
the
barrel
and
tip.Or
use
two
probe
sinA
minus
Bfor
remot
e
signal
and
groun
dand
wrap
both
identic
al
probe
sas
twiste
d
pairs
with
identic
al
short
groun
d
clips.
When
in
doubt
45/63
6/13/2015
conne
ct
probe
tipto
groun
dto
ensur
eflat
line,
same
with2
probe
sinA
B
conne
cted
to
same
signal,
then
no
stray
noise
should
be
obser
vedif
done
right.
The
best
question
deserves
a
better
answer.
To
show
appreciation
use
helpedme
&
[solved]
Ifyou
don't,
what
does
that
say
about
you?
...Tony
Stewart
46/63
6/13/2015
EE
since
1975
ReplyWithQuote
19thJune2014,12:22
RohanDey
Memberlevel2
JoinDate:
Location:
Posts:
Helped:
Points:
Level:
Feb2013
India
42
0/0
577
5
#18
Re:
74LS74
D
flip
flop
state
changing
automatically
Ihave
attach
edmy
schem
atic
and
photo
ofthe
verob
oard.
The
photos
contai
nthe
assem
bly
circuit
also
where
2
Relay
FF
board
sare
conne
cted
togeth
er
with
the
contro
ller
board.
Iam
using
the
same
power
(vcc)
47/63
6/13/2015
and
gnd
line
for
the
relay
and
the
other
circuit
.Here
VCC=
5V.
Could
this
bea
proble
m?
Please
check
and
comm
ent.
Updated
O
r
i
g
i
n
a
l
l
y
P
o
s
t
e
d
b
y
S
u
n
n
y
S
k
y
g
u
y
1
.
e
l
48/63
6/13/2015
i
m
i
n
a
t
e
t
h
e
n
o
i
s
e
.
U
s
e
a
z
e
r
o
c
r
o
s
s
i
n
g
s
w
i
t
c
h
t
r
i
a
c
,
a
n
d
s
n
u
b
b
e
r
R
C
f
i
49/63
6/13/2015
l
t
e
r
.
R
o
u
t
e
a
l
l
s
p
i
k
e
c
u
r
r
e
n
t
s
w
i
t
h
t
w
i
s
t
e
d
p
a
i
r
s
t
o
r
e
d
u
c
e
u
n
i
n
t
e
n
t
50/63
6/13/2015
i
o
n
a
l
r
a
d
i
a
t
i
o
n
,
s
u
c
h
a
s
6
t
w
i
s
t
s
p
e
r
i
n
c
h
w
i
t
h
c
a
r
e
o
n
l
i
n
e
&
n
e
u
t
r
a
l
.
51/63
6/13/2015
A
p
p
l
y
s
m
a
l
l
b
u
t
h
i
g
h
V
r
a
t
e
d
f
i
l
m
c
a
p
s
a
c
r
o
s
s
r
e
l
a
y
c
o
n
t
a
c
t
s
.
o
r
s
h
i
e
l
52/63
6/13/2015
d
t
h
e
r
e
l
a
y
o
r
r
e
m
o
v
e
i
t
f
a
r
e
n
o
u
g
h
a
w
a
y
f
r
o
m
t
h
e
o
f
f
e
n
d
i
n
g
c
i
r
c
u
i
t
.
(
a
53/63
6/13/2015
s
i
n
c
a
r
s
i
n
t
h
e
c
o
r
n
e
r
u
n
d
e
r
t
h
e
h
o
o
d
)
Your
comm
ents
are
very
inform
ative,
but
somet
imes
gets
difficu
ltfor
meto
under
stand.
Itmay
sound
silly
but,
can
you
please
explai
nhow
54/63
6/13/2015
willa
zero
crossi
ng
triac
anda
RC
snubb
erwill
help
to
remov
e
noise
spikes
?I
have
very
basic
knowl
edge
about
triacs
and
used
itonly
in
dimm
er
applic
ation.
Also,
about
the
film
caps,
Ihave
104K4
00
polyes
ter
cap.
CanI
put
this
value
across
the
relay
termin
als?
Thank
s..
55/63
6/13/2015
ReplyWithQuote
#19
19thJune2014,12:45
KlausST
AdvancedMemberlevel5
JoinDate:
Posts:
Helped:
Points:
Level:
Apr2014
1,828
470/470
9,067
22
Re:
74LS74
D
flip
flop
state
changing
automatically
Hi,
casca
ding
the
SPI
over
sever
alPCB
isnot
agood
idea.
At
least
you
need
avery
solid
(low
ohmic
and
low
induct
ance)
GND
conne
ction.
Best
by
GND
plane
onthe
pcb
and
multip
le
wires
from
board
to
board.
There
may
56/63
6/13/2015
be
noise
onthe
GND
that
cause
syour
proble
m.
My
hint:
Tryto
usea
20k
series
resist
or
from
comm
on
CLK
lineto
FFCLK
input
and
additi
onally
conne
ctan
1nF
capaci
tor
from
the
CLK
input
to
GND.
This
"clean
s"the
clk
line.
Mind
to
conne
ctall
UNUS
ED
inputs
of
your
FFto
a
valid
logical
57/63
6/13/2015
state.
Hope
this
helps.
Klaus
ReplyWithQuote
19thJune2014,13:13
Gorgon
FullMemberlevel5
JoinDate:
Location:
Posts:
Helped:
Points:
Level:
Nov2005
Norway
277
59/59
3,156
13
#20
Re:
74LS74
D
flip
flop
state
changing
automatically
Since
you
are
daisy
chaini
ng
sever
al
modul
es,
you
need
to
decou
ple
each
board
for
itself.
Since
you
are
using
the5V
for
the
relay
too,
you
need
toadd
a
electr
olytic
58/63
6/13/2015
capaci
toron
each
board,
I
would
think
22
47uF
isok.
In
additi
on
you
need
toadd
0.1uF
capaci
torsto
each
board.
Arule
of
thumb
isone
for
each
IC,
directl
yover
the
supply
pins,
oras
close
as
possib
le,
andat
least
one
extra.
Ifyou
are
experi
encing
high
freque
ncy
noise,
you
could
also
adda
0.01uF
tothe
mix.
59/63
6/13/2015
Runni
ngthe
supply
lineas
you
do
with
5V,
you
need
avery
good
conne
ction,
with
large
enoug
harea
ofthe
wire.
A
practi
cal
thing
todo,
isto
make
the
input
and
the
output
conne
ctors
for
your
'bus'
as
close
togeth
eras
you
canon
each
PCB.
This
will
reduc
ethe
effect
ofthe
noise
gener
ated
on
60/63
6/13/2015
other
modul
es,
and
the
sizeof
the
'loop'
for
your
power
lines.
I
would
perso
nally
have
at
least
two
leads
in
your
'bus'
for
the
GND
conne
ction,
to
make
the
groun
d
stiffer
.
Regar
ding
theRC
snubb
er
menti
oned,
you
can
usea
high
voltag
e
capaci
torin
series
witha
low
value
resist
61/63
6/13/2015
or,
like
0.1uF
/
47oh
m,
over
the
relay
contac
t.
Reme
mber
touse
anX2
rated
capaci
tors
with
high
enoug
h
peak
voltag
e.
ReplyWithQuote
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(SOLVED) 74LS74 D Flip Flop State Changing Automatically

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