Projetos Eletronicos

Electronics Projects
Vol. 22
EFY Books & Publications
FOR YOU
EFY is a reputed information house, specialising in electronics and information technology

magazines. It also publishes directories and books on several topics. Its current publications are:
(A) CONSTRUCTION PROJECTS
1. Electronics Projects, Vol. 1: A compilation of selected construction projects and circuit ideas

published in Electronics For You magazines during 1979 and 1980.
2. Electronics Projects, Vol. 2 to 19 (English version): Yearly compilations (1981 to 1998) of

interesting and useful construction projects and circuit ideas published in Electronics For You.
3. Electronics Projects, Vol. 20, 21 and 22 (with CD): Yearly compilations (1999 to 2001).
4. Electronics Projects, Vol. 16 (fgUnh laLdj.k): Yearly compilations (1995) of interesting and

useful construction projects and circuit ideas published in Electronics For You.
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ELECTRONICS
PROJECTS
VOL. 22
EFY Enterprises Pvt Ltd

D-87/1 Okhla Industrial Area, Phase-1
New Delhi 110020
EFY Enterprises Pvt Ltd.

First Published in this Edition, December 2006
All rights reserved. No part of this book may be reproduced in any

form without the written permission of the publishers.
ISBN 81-88152-17-X
Published by Ramesh Chopra for EFY Enterprises Pvt Ltd,

D-87/1, Okhla Industrial Area, Phase-1, New Delhi 110020.
Typeset at EFY Enterprises Pvt Ltd and
Printed at Nutech Photolithographers, B-38, Okhla Industrial Area,
Phase-1, New Delhi 110020
FOREWORD
This volume of Electronics Projects is the twenty second in the
series published by EFY Enterprises Pvt Ltd. It is a compilation
of 21 construction projects and 66 circuit ideas published in
Electronics For You magazine during 2001.
We are also including a CD with this volume, which not only contains the datasheets of major components used in construction projects but also the software source code and related files pertaining
to various projects. This will enable a reader to copy these files
directly to his PC and compile/run the program as necessary, without
having to prepare them again using the keyboard. In addition, the CD
carries useful software, tutorials and other goodies (refer contents
in CD).
In keeping with the past trend, all relevant modifications, corrections
and additions sent by the readers and authors have been incorporated in
the articles. Queries from readers along with the replies from authors/
EFY have also been published towards the end of relevant articles. It
is a sincere endeavour on our part to make each project as error-free
and comprehensive as possible. However, EFY cannot resume any
responsibility if readers are unable to make a circuit successfully, for
whatever reason.
This collection of a large number of tested circuit ideas and
construction projects in a handy volume would provide all classes
of electronics enthusiastsbe they students, teachers, hobbyists or
professionalswith a valuable source of electronic circuits, which
can be fabricated using readily-available and reasonably-priced
components. These circuits could either be used independently or in
combination with other circuits, described in this and other volumes.
We are sure that this volume, like its predecessors, will generate tremendous interest among its readers.
CONTENTS

Section A: Construction Projects
1.
Build Your Own Pentium III PC.................................................................................. 3
2.
Automatic Room Light Controller............................................................................... 17
3.
Intelligent Water Level Controller............................................................................... 21
4.
A Unique Liquid Level Indicator................................................................................. 25
5.
Interface Your Printer with 8085 Microprocessor....................................................... 28
6.
Morse Processor........................................................................................................... 33
7.
Access-Control System................................................................................................ 42
8.
Telephone Line-Interfaced Generic Switching System............................................... 46
9.
Programmable Melody Generator............................................................................... 55
10.
Auto Control for 3-Phase Motors................................................................................ 66
11.
Telephone Remote Control.......................................................................................... 72
12.
Microcontroller-Based School Timer.......................................................................... 75
13.
Digital Capacitance-cum-Frequency Meter................................................................. 80
14.
Fluid-Level Controller with Indicator......................................................................... 84
15.
MGMAA Mighty Gadget with Multiple Applications............................................ 87
16.
Traffic and Street Light Controller.............................................................................. 91
17.
Lead-Acid Battery Charger with Active Power Control.............................................. 98
18.
Amplitude Measurement of Sub-Microsecond Pulses................................................ 101
19.
Automatic Submersible Pump Controller.................................................................... 104
20.
Transistor Curve Tracer............................................................................................... 107
21.
Tripping Sequence Recorder-cum-Indicator................................................................ 113
Section B: Circuit Ideas
1.
Electronic Starter for Single-Phase Motors................................................................. 119
2.
Modem On/Off Indicator.......................................................................................... 120
3.
Touch-Select Audio Source......................................................................................... 121
4.
Precision Attenuator with Digital Control................................................................... 121
5.
Precision Amplifier with Digital Control..................................................................... 122
6.
Random Number Generator Based Game................................................................... 123
7.
9-Line Telephone Sharer.............................................................................................. 124
8.
Electronic Card Lock System...................................................................................... 126
9.
Pulsed Operation of a CW Laser Diode....................................................................... 127
10.
Generation of 1-Sec. Pulses Spaced 5-Sec. Apart....................................................... 128
11.
High-/Low-Voltage Cutout with Timer........................................................................ 129
12.
Automatic Heat Detector............................................................................................. 130
13.
Musical Touch Bell.................................................................................................... 131
14.
Non-Contact Liquid-Level Controller......................................................................... 131
15.
High-Power Bicycle Horn........................................................................................... 133
16.
AC Mains Phase-Sequence Indicator.......................................................................... 133
17.
Luxurious Toilet/Bathroom Facility............................................................................ 135
18.
EEPROM W27C512 (Winbond) Eraser...................................................................... 136
19.
Intelligent Electronic Lock.......................................................................................... 137
20.
Stable 455KHz BFO for SSB Reception..................................................................... 139
21.
Auto Shut-off for Cassette Players and Amplifiers...................................................... 139
22.
House Security System................................................................................................ 141
23.
Simple Water-Level Indicator-cum-Alarm.................................................................. 142
24.
Precision Inductance and Capacitance Meter.............................................................. 142
25.
Under-/Over-Voltage Beep for Manual Stabiliser....................................................... 144
26.
Ultra-Sensitive Solidstate Clap Switch........................................................................ 145
27.
15-Step Digital Power Supply..................................................................................... 145
28.
Microphone for Computer........................................................................................... 147
29.
Versatile Zener Diode Tester........................................................................................ 147
30.
DTMF Proximity Detector.......................................................................................... 149
31.
Stepper Motor Control................................................................................................. 149
32.
Low-Cost Intercom...................................................................................................... 150
33.
High-Power Car Battery Eliminator............................................................................ 151
34.
Automatic Plant Irrigator............................................................................................. 152
35.
Simple Telephone Ring Tone Generator...................................................................... 152
36.
Dual-Input High-Fidelity Audio Mixer....................................................................... 153
37.
Unipolar/Bipolar Triangular and Bipolar Square Wave Generator.............................. 154
38.
Anti-Theft Security for Car Audios............................................................................. 155
39.
PC-Based Dial Clock-cum-Electronic Roulette.......................................................... 156
40.
Long-Range Cordless Burglar Alarm.......................................................................... 157
41.
Water-Level Controller................................................................................................ 158
42.
Invisible Broken Wire Detector................................................................................... 160
43.
PC-Based Multi-Mode Light Chaser........................................................................... 161
44.
Fuse Status Indicators for Power-Supplies.................................................................. 163
45.
A Hierarchical Priority Encoder.................................................................................. 164
46.
Digital Mains Voltage Indicator................................................................................... 165
47.
Electronic Dice............................................................................................................ 166
48.
Light-Operated Organ.................................................................................................. 168
49.
Stereo Tape Head Preamplifier for PC Sound Card..................................................... 168
50.
Heart Beat Monitor...................................................................................................... 169
51.
Digital Fan Regulator.................................................................................................. 170
52.
Running Lights and Running Holes............................................................................ 171
53.
A Simple Transistor Tester........................................................................................... 172
54.
12V, 3A Power Supply................................................................................................. 172
55.
Speller Effect Sign Display.......................................................................................... 173
56.
Darkroom Timer.......................................................................................................... 174
57.
Active Shortwave Antenna.......................................................................................... 174
58.
Long-Range Target Shooter......................................................................................... 175
59.
Power Supply for Walkie-Talkies................................................................................ 176
60.
High-Performance Interruption Detector..................................................................... 177
61.
Digital Relay Tester for RAX and MAX..................................................................... 178
62.
Fastest Finger First Indicator....................................................................................... 179
63.
Decorative Signboard.................................................................................................. 180
64.
Condenser Mic Audio Amplifier.................................................................................. 181
65.
Smoke Alarm............................................................................................................... 182
66.
Overload Protector with Reset Button......................................................................... 183
SECTION A:
CONSTRUCTION PROJECTS
Page = 1
Build Your Own

Pentium III PC
K.c. Bhasin and neeraj Kundra
he procedure presented here

would enable you to assemble
your own multimedia personal
computer. It is assumed that you have a
fundamental knowledge of how a PC functions and some basics of electronics. By
way of tools you only need Philips-head
and flat-blade screwdrivers. A simple multimeter is the only test equipment that
you would ever require during assembly,
for AC and DC voltage measurement.
All the parts needed to assemble
this multimedia PC with processor
speed of 700 MHz are listed under Parts
List. The cost of parts may vary from
dealer to dealer and also with time.
It is suggested to source these items
from authorised dealers who would meet
their warranty obligations. We have also
mentioned the brand names of the parts
that we used during assembly of the basic
unit. It is, however, not necessary to use
identical makes, except, of course, the
main processor and the motherboard,
based on identical chipset mentioned later
in this article.
there must be some slack after these

are installed and connected.) This will
improve the cooling and reduce the
chances of electromagnetic interfer-
ence between them.

The motherboard contains sensitive
components, which can be easily damaged by static electricity. Therefore the
motherboard should remain
in its original antistatic
envelope until it is required
for installation. When it is
taken out from the envelope, it should be immediately placed on a suitable
grounded conductive surface. The motherboard itself
should be held from edges
and the person taking it
Precautions
Before starting the actual assembly of
the PC system, the following precautions
would help you to avoid any mishap during the assembly process:
While the motherboard has to
be fitted at a fixed place inside the
PC cabinet, the locations of add-on
cards (as and when used) and the
drives (hard disk drive, floppy disk
drive, and CD-ROM drive) within
the drives bay of the cabinet can be
changed within certain limits. But it
is better to place them far away from
each other. (Of course, the length of
the cable provided for interconnections to the motherboard or add-on
cards has to be taken into account, as
Fig. 1: Block diagram of motherboard employing 810E chipset

ELECTRONICS PROJECTS Vol. 22
Key Features of Motherboard Using Intel 810/810E Chipset
Processor
Full support for the Intel Pentium III and Celeron processors using PGA370 socket.
Supports 66MHz and 100MHz bus speed including all PGA370.
Supports 133MHz bus speed (810E chipset version only).
VRM 8.2 (Voltage Regulator Modules) On-board
Flexible motherboard design with on-board VRM 8.2, easy to upgrade with future processors.
System Memory
A total of two 168-pin DIMM sockets (3.3V SDRAM types).
Memory size up to 512MB.
Supports SDRAM at 66/100 (PC100) MHz.
Supports symmetrical and asymmetrical DRAM addressing.
Banks of different DRAM types and depths can be mixed.
System BIOS
4-Mbit Intel Firmware hub (with security feature).
PnP, APM, ATAPI, and Windows 95/98.
Full support of ACPI & DMI.
Auto-detects and supports LBA hard disks with capacities over 8.4 GB.
Easily upgradable by end-user.
On-board I/O
Supports two PCI-enhanced IDEs PIO mode 3, mode 4, and ultra DMA 33/66 channels (optional
ultra DMA 66 cable). Twin headers for four IDE devices including IDE HDDs and CDROMs.
One ECP/EPP parallel port (via a header).
Two 16550A UART parallel port (via a header).
One floppy port. Supports two FDDs of 360KB, 720KB, 1.2MB, 1.44MB, or 2.88MB (via a
header).
Four USB ports (via a header, optional).
PS/2 mouse port (via a header, optional).
AT keyboard port (factory option for PS/2 type).
Infrared (IrDA) support.
Plug-and-play
Supports plug-and-play specification 1.1.
Plug-and-play for DOS, Windows 3.X, Windows 95, as well as Windows 98.
Fully steerable PCI interrupts.
On-board VGA
Hardware motion compensation for S/W MPEG2 decode (DVD).
3-D hyper pipelined architecture.
Full 2-D hardware acceleration.
3-D graphics visual enhancements.
Dynamic display memory (DDM) or optional 4MB display cache (810DC100 or 810E chipset
version only).
Resolution up to 1,600x1,200.
Win 95 vxd, Win 98/NT5 mini-port drivers support.
VGA port (via a header).
On-board AC97 Sound
Integrated AC97 controller with standard AC97 CODEC.
Direct Sound and Sound Blaster compatible.
Full-duplex 16-bit record and playback.
PnP and APM 1.2 support.
Win 95, 98, and NT drivers ready.
Line-in, line-out, mic-in and MIDI/game port.
Power Management
Supports SMM, APM and ACPI.
Break switch for instant suspend/resume on system operations.
Energy star Green PC-compliant.
WAKE-ON-LAN (WOL) header support.
External modem ring-in wake-up support.
Expansion Slots
One audio modem riser (AMR).
Four PCI bus master slots (ver 2.1 compliant).
out should wear an antistatic wrist

strap that is properly grounded. In
the absence of a proper wrist strap,
you may make one on your own using
a peeled off multi-strand copper cable
and ground it properly. Similar handling precautions are also required
for DIMMS and cards.

If you are using a motherboard different from the one mentioned in the parts
list, modify the guidelines mentioned here
as per the directions given in the users
manual (which is supplied with the motherboard you may be using), since there
would be some differences between any two

makes of the motherboard.
Start the assembly only after going
through this article at least once. Only
when you feel at ease, start the assembly
of your machine as per the guidelines
included in this article and the applicable
users manuals.
Never try to insert a card in PC slots
or try to plug/unplug a connector with
power supply to the PC on.
Ensure that the mains 3-pin socket
or the socket on your stabiliser/UPS that
you would be using for connection to the
SMPS of the computer and/or the monitor
is correctly wired with live line on your
right hand side. To find out which line is
live (phase) and which one is neutral, use
your multimeter in 250V AC or higher
range. The live line will show full voltage
w.r.t. neutral pin and nearly the same
voltage w.r.t. the ground pin, while the
neutral pin (w.r.t. ground pin) would/
should show very little voltage (less than
10V AC). Else, the mains wiring has a
problem that needs to be set right.
Dont drop any screw or other
conducting material on your PCs motherboard as that might cause shorting of
pins/tracks and consequent damage when
you switch it on.
Make sure that you have a large, flat
surface area to work on. That will reduce
the chances of small screws etc falling and
getting lost.
While screwing components on to
the chassis, do not use excessive force
as that may damage the screws or their
grooves/holes.
Pentium III technology

Some points to be noted about the Pentium III processor being used here are:
Intels Pentium III processors support various clock speeds from 450MHz
to 933 MHz. The one meant for desktop
version goes up to 1.13 GHz. (We are using here a 700MHz version.)
Integrates P6 dynamic execution
architecture and a dual independent bus
(DIB) architecture.
Has a multi transaction system
bus.
Incorporates Intels MMX media
enhancement technology.
Supports Internet streaming
single-instruction multiple data (SIMD)
extensions.
Compared to Pentium II, it has 70
new instructions, enabling advanced 3-D
imaging, streaming audio and video, and

speech recognition.
Has a 32k (16k for instructions and
another 16k for data) as primary (level 1)
non-blocking cache for rapid access to most
heavily used data. In addition, it has 512k
unified, non-blocking (level 2) cache or
256k advanced transfer cache integrated
on die, which runs at the core frequency
of the processor with very low memory
access time.
The motherboard
Fig. 2: PC Partner motherboard layout diagram
Table I
JP1, JP2System Bus Frequency
JP1
JP2
CPU Clock Speed
Open
Open
133MHz (100MHz CPU run at 133MHz Front Side Bus)
Open
1-2
100MHz (66MHz CPU run at 100MHz Front Side Bus)
Close*
1-2*
Auto*
JP15 - BIOS (Firm Ware Hub)

Boot Block Protect
JP4 - CMOS Clear
JP15
Function
JP4
Close*
Unlocked*
1-2*
Normal
Open
Locked
2-3
CMOS Clear
JP34 - On Board Crystal PCI Sound (Optional)
JP34
Function
1-2* PCI Sound Enable*
2-3
PCI Sound Disable
Function
JP29 - Keyboard Power On Select
JP29
1-2* Powered by +5V*
2-3
JP35, JP36 - On Board AC97 Codec Sound
JP35
JP36
Function
1-2* 1
2-3* (S)# AC97 Sound Enable*
2-3
1-2 (P)#
Function
AC97 Sound Disable
Powered by +5V Standby

(Allows Keyboard Power On)
* Default settings
#
P=
Primary AMR,
S = Secondary AMR
While the processor is the most important

part of the motherboard, the motherboard
itself is the most important part of the computer system. Together with the chipset, it
forms the brain of your computer.
The modern motherboards do away
with the large number of controller chips
and cards that were used in the older XT
and AT versions, such as clock generator,
bus controller, timer/counter, monitor/
printer adopter, FDD and HDD controllers, multi-I/O or super IDE controller
card, and DMA controller. All the functions performed by these controllers/cards
(and others) are now performed by just
two or three chips and that too at much
higher speed.
The motherboard based on Intels
810/810E chipset (being used in the
present system) combines the advantage of a multimedia (full-screen, fullmotion video with realistic graphics)
and enhanced Internet performance at
a budget price. With this motherboard,
one does not need separate sound,
video, or graphics enhancement cards.
A block diagram of a motherboard
employing 810E chipset is shown in
Fig. 1.
Key features. The main features
of the PC Partner motherboard used
in this project are shown in the accompanying box. A layout diagram showing
the relative position of the jumpers,
connectors, major components, PCI
slots, and DIMM and CPU sockets is
shown in Fig. 2.
Jumper settings. Positions of various jumpers within the motherboard are
shown in Fig. 3. The jumper settings for
enabling various functions are shown in
Table I. Default settings are shown with
an asterisk mark. (Note. Leave all these
jumpers in their default setting positions for the present project. The processor speed setting is to be done through
CMOS setup as indicated later.)
Fig. 3: Jumper positions within motherboard
manual with 3-year limited warranty. Similarly, ensure that the 64MB SDRAM
DIMM bears the label (such
as PC100) to indicate that it
is compatible with 100MHz
system bus speed.
Checking cabinet and
its accessories. The AT
mini tower PC cabinet
measures approx.180mm (width) x
330mm (height) x 360mm (depth). The
drive bays comprise two 133.35mm
(5.25-inch) exposed, one 89mm (3.5-inch)
exposed, and two 89mm (3.5-inch) internal bays.

It has 200W SMPS of VESTA make
pre-installed (+5V @16A, +12V @6A, -5V
@0.5A, and 12V @0.5A). LEDs with 2-pin
SIP connectors are provided for power on
(green and white twisted wires), HDD
(orange and white twisted wires) activity
indication, and to reset push switch (blue
and white twisted wires), which are required to be connected to the appropriate
pin pairs (Berg type) on the motherboard.
(Please refer Fig. 2 to spot the corresponding connectors near JP34/JP4, but for the
Fig. 4: Power on/off switch wiring
Hardware installation
and checkout
Verifying components. First, carry out
a physical check of all the items as per
the parts list to ensure that there are no
apparent deficiencies and no signs of any
physical damage, and the parts are correct
as indicated by the labels on the items/packages. For example, the Pentium processor
pack should comprise Pentium III processor labeled 700MHz/100MHz system bus,
fan/heat-sink assembly, and installation
Fig. 6: DIMM installation
(a)
(b)
(c)
(d)
Fig. 5: Installation of Pentium III processor in PGA 370 socket
time being, leave them alone.) An 8-ohm,

0.5W speaker (with black and red twisted
wires and 4-pin connector), to go into
corresponding 4-pin speaker connector
on motherboard, also forms part of the
cabinet.
Checking SMPS. The control console on the cabinet also has a DPDT
push-button switch to switch on the
mains (230V AC) to SMPS of the computer and a parallel-wired 3-pin AC socket
on SMPS for connecting AC power to the
monitor used with the PC. At this stage,
slide the shielded connectors of the four
power supply wires of the SMPS into the
corresponding connectors on the DPDT
switch as per the diagram provided on
the SMPS case (top side). The same is
reproduced in Fig. 4. The white and
black wires have a return path via blue
and brown wires, respectively, when the
power supply switch is flipped on. Connect the 3-pin power cord provided with
the cabinet to the socket at the back
of SMPS and plug 3-pin plug into the
female power
connectors with
Item Description
Make
projection in the
AT cabinet with SMPS, power cord,
middle. If these
power switch, reset switch, speaker,
are held such
LEDs, complete with connectors and
installation hardware packet.
IMIL, Chen- that all black
nai
wires are adjaMotherboard with Intels 810
cent to each othchipset PC Partner, USA along with
er, this forms a
users manual, CD (containing
12-pin AT power
drivers for onboard devices) and
supply connecheaders for motherboard connectors.
* (refer check-list)
PC Partner
tor with orange
Pentium PIII-700 Processor
Intel
wire (carrying
64MB (PC 100)SDRAM (168-pin DIMM)
Alpha
power good sigHDD (hard disk drive)
Seagate
nal) emanating
FDD (floppy disk drive) 3.5
Sony
from pin 1.
CD-ROM drive 52X with audio cable
Samsung
Keyboard
Logitech
The voltMouse(3-button)
Logitech
ages on various
Colour Monitor 14
LG
pins of this joint
USB connector bracket with 2 headers 12-pin connector
*list of connectors/brackets forming part of motherboard.
with their colour
Header (connectors with cables) for HDD (40-pin twin)
- one
codes are shown
Header for FDD (34-pin twin)
- one
in Table II.
Header for PS/2 mouse
- one
Port bracket set with headers for:
Check the cor(a) VGA (15-pin D connector ending into 16-pin FRC and
rectness of these
parallel port (25-pin D ending into 26-pin FRC)
- one
voltages within
(b) Com1 and Com2 (two 9-pin D ending into 10-pin FRC) - two
the range as
(c) Onboard AC97 sound codec (line-in, line-out, mic-in and
given in Table
MIDI/game port ending into 26-pin FRC)
- one
II. Then switch
off the power
socket of the mains supply or the UPS,
supply and take out the 3-pin plug
as appropriate.
from the mains socket. If the AT power
Switch on the SMPS. The fan blower
connector voltages are correct, you
inside the SMPS should start running,
can safely assume that voltages in all
indicating availability of +12V supply to
other power connectors [4-pin Molex,
the fan. Now verify all DC outputs of the
carrying +12V (yellow wire) followed
SMPS as follows.
by two black wires (ground) and +5V
There are two distinct 6-pin Molex
Table IV
Parts List
Table II
At Power Connector Pin Voltages
Pin
Voltage
Range
Wire
Pin
Voltage
Range

Colour
1
*P. G.
4.5V (min)
Orange
7
Ground
-
2
+5V
+5%/-4%
Red
8
Ground
-
3
+12V
+5%/-4%
Yellow
9
-5V
+10%/-8%
4
-12V
+10%/-9%
Blue
10
+5V
+5%/-4%
5
Ground
-
Black
11
+5V
+5%/-4%
6
Ground
-
Black
12
+5V
+5%/-4%
*P. G. = Power good signal which is +5V (delayed, 100ms 500ms).
Table III
VGAVGA Out Connector CN34*
Pin Signal Name Pin Signal Name
1
Red signal
9
NC
2
Green signal 10 GND
3
Blue signal
11 NC
4
NC
12 Display data channel data
5
GND
13 Horizontal sync
6
GND
14 Vertical sync
7
GND
15 Display data channel clock
8
GND
*This connector is for the VGA display port. Connect a
VGA or higher resolution display monitor to it.
Wire
Colour
Black
Black
White
Red
Red
Red
Parallel-Port Connector CN6

Pin Signal Name
Pin
Signal Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
AFD
Error
INIT
SLCTIN
GND
GND
GND
GND
GND
GND
GND
GND
GND
Strobe-
Data bit 0
Data bit 1
Data bit 2
Data bit 3
Data bit 4
Data bit 5
Data bit 6
Data bit 7
ACK
Busy
PE
SLCT
Table V
COM1/COM2Serial Connectors CN4*, CN5*

Pin
Signal Name Pin Signal Name
1
DCD
6
DSR
2
SIN
7
RTS
3
SOUT
8
CTS
4
DTR
9
RI
5
GND
10
NC
*These connectors are for the serial port
bracket. Both connectors have the same pinouts.
(red wire)] meant for various drives are

also correct.
Motherboard fitment. The chassis
on which motherboard is to be mounted
can be easily removed from the PC
cabinet. Unscrew it and gently slide it
out from the main casing. Lay it flatly
on the antistatic workbench (properly
grounded conductive surface). Mark the
side facing the keyboard connecter cutout
on the chassis.
All motherboards have standard
mounting holes. The hardware supplied
comprises plastic and metallic motherboard retaining fasteners/screw-holders.
Metal-type screw-holders are better as
these have better strength and also these
ground the motherboard to the chassis.
You may use four metallic screw-holders
for the four corner holes in the motherboard, while the plastic fasteners may be
used for the middle
holes of the motherboard.
Before attempting
fitment of the motherboard, align it on the
chassis such that the
keyboard connector
on the motherboard
is towards the side
marked earlier for
this purpose. Now
Table VI
Table IX
Audio & Game Port Pin Header CN341*
Floppy Connector Pin Definitions (JP26)

Pin Function
Pin Function
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
1
2
3
4
5
6
7
VCC
VCC
SWC
SWA
XTC
XTA
MSOUT
8
9
10
11
12
13
14
GND
XTD
GND
SWB
XTB
MSIN
SWD
15
16
17
18
19
20
21
NC
VCC
Line-out
Line-out
GND
GND
MIC-in
22
23
24
25
26
MIC-in
NC
GND
Line-in
Line-in
*This header is for the audio port bracket. It connects audio ports-stereo line-out, stereo line-in
and microphoneand a game port (for a joystick or MIDI device) to your system.
fit all the screwholders/fasteners,

CN7: USB Port
as discussed above,
Pin Assignment
on the chassis, oppo1
VCC
site the holes on the
2
GND
motherboard, using
3
USBP1Philips screws pro4
USBP0+
vided in the hard5
USBP1+
6
USBP0ware packet. Align
7
GND
the motherboard
8
VCC
above the fasteners
and push it down,
so that the self-retaining heads of plastic
fasteners pop out from the respective
holes. For the metallic screw-holders, use
Philips screws to secure the motherboard
to the chassis firmly without using excessive force.
Pentium processor mounting (refer Fig. 5). The processor is to be fitted
into the PGA370 (pin grid array with
370-pin recesses) socket, which is a ZIF
(zero insertion force) socket. Take out
the processor and its heat sink fitted with
cooling fan and heat sink retainer clip D.
Now proceed as follows:
1. Lift handle A to its vertical position [refer Fig. 5(a)].
2. Align the processor pins with the
socket holes and insert the processor into
its socket [refer Fig. 5(b)].
3. With the processor in its socket,
lower handle A and bring it to its closed
(horizontal) position [refer Fig. 5(c)].
4. Orient the heat sink (with fan on
top) such that the depression on one side
of the heat sink matches the corresponding projection on PGA370 socket, and
place it (along with fan) over the processor [refer Fig. 5(c)].
5. On the PGA370 socket, there are
two small projections on opposite sides,
in which the heat sink clip has to be
inserted. While it is fairly easy to insert
one side, it is rather tricky to insert the
left-out side as it needs to be pulled down
with considerable force to engage it into
the projection. You may use the flat
Table VIII
Table VII
IDE Connector Pin Definitions (J18, J19)

Pin Function
Pin Function
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
Reset IDE
Host data 7
Host data 6
Host data 5
Host data 4
Host data 3
Host data 2
Host data 1
Host data 0
GND
DRQ3
I/O Write-
I/O Read-
IOCHRDY
DACK3-
IRQ14
Addr 1
Addr 0
Chip select 0
Activity
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
GND
Host data 8
Host data 9
Host data 10
Host data 11
Host data 12
Host data 13
Host data 14
Host data 15
Key
GND
GND
GND
BALE
GND
IOCS16GND
Addr 2
Chip select 1GND
screwdriver tip to do this, but be careful

that screwdriver does not slip and damage the tracks on the motherboard [refer
Fig. 5(d)].
6. Connect the 3-pin fan connector to
the corresponding connector CN17 marked
CPU Fan on the motherboard.
DIMM installation (Fig. 6). There
are two 168-pin SDRAM DIMM sockets
on the motherboard with socket 1 marked
1 and socket 2 left unmarked. The
two sockets can together accept 512MB
SDRAM (i.e. up to 256 MB each). We
propose to install a single 64MB DIMM,
which is quite adequate for current type
of applications. It can be inserted into any
of the two sockets and the same will be
automatically suitably configured during
setup. Remove the DIMM from its antistatic envelope, holding it by its edges.
Proceed as follows:
1. Using fingertips, push the retainer
clips on either side of the DIMM socket
slightly away from the socket.
2. Position the DIMM to be installed
above the socket, aligning the two small
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
GND
GND
Key
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
FDHDIN
Reserved
FDEDIN
IndexMorot enable
Drive select BDrive select AMotor enable
DIRSTEPWrite dataWrite gateTrack 00Write protectRead dataSide 1 selectDiskette
Table X
PS/2 Mouse Connector*
Pin
Description
Pin
Description
1
Mouse data
2
NC
3
Ground
4
+5V
5
Mouse clock
6
NC
*This connector is for the optional PS/2 mouse
port bracket.
notches at the bottom edge of DIMM with

the corresponding keys in the socket.
3. Push the DIMM vertically down,
inserting its bottom edge into the socket.
4. Once seated properly, push DIMM
down from the top edge until the retainer
clips snap into place and the DIMM is
firmly held into its position.
Cable set installation. While the
motherboard chassis is still not replaced
into the case, you could install one of the
ends of all the cables originating from the
motherboard. The installation of cables,
which originated from SMPS and the control panel of the case (LEDs, reset switch,
and the speaker), would be completed
after the motherboard chassis is screwed
back into the PC case.
The cables to be connected to the
FRC-type male connectors/headers on the
motherboard are listed below, and the pin
assignments are shown in the referred
tables. On the motherboard, normally,
only start pin 1 is indicated. In an FRC
connector, all odd number pins are in one
row while even number pins are in the
opposite row; pin 2 is opposite pin 1, pin 4
is opposite pin 3, and so on.
Pin 1 on the mating FRC female connector can be identified by an arrow mark
over it. Ribbon cable wire going into pin
1 is of red (sometimes blue) colour. Some
of the FRC connector pairs have a notch
to floppy drive (DS1 in

Fig.7).
Let us configure the
HDD as primary master
and CD-ROM drive as
primary slave using a single cable emanating from
CN1 (IDE-1 header) on the
motherboard (refer Fig. 8).
Fig. 7: Floppy drive cable for connecting up to two FDDs
(We could alternatively configure CDROM drive as secondary master and
connect it directly to CN2 (IDE-2 connector) in motherboard, using another
40-pin cable/connector.)
The jumper on HDD should be used
to short pins 7 and 8 on the jumper block
at the rear of HDD (refer Fig. 9). Similarly, there is a jumper block at the rear
of CD-ROM drive with the pairs of pins
marked as CS (cable select), SL (slave),
and MA (master). Ensure that jumper
is used in the middle to select the slave
mode for CD-ROM. The cable connection
arrangement for HDD and CD-ROM is
Fig. 8: Connection of HDD and CD-ROM drive
shown in Fig. 8.
using IDE-1 header
Before installation of drives, note
down pin-1 orientation/position of the
and the corresponding projection, which
34-/40-pin interface cable connectors on
serves as a key so that they can go only
the drives.
the correct way. The cables used for the
The CD-ROM drive may be installed
drives have an additional connector in
in the topmost position for 13.33cm
the middle (for slave in case of HDD and
(5.25-inch) drive, after pushing out the
drive B in case of FDD, which will be explastic piece (used for protection) coverplained later). Using the tips given here,
ing the cutout in this drives bay. Align
you can install the motherboard end of
it from the front side of the case to enthe following cables:
sure that it is flush with the cabinets
16-pin VGA connector CN34 (refer
external surface. Using four Philips
Table III).
screws (6-32 UNC) secure it in proper
26-pin parallel-port connector CN6
horizontal position. The screws should
(refer Table IV).
not be allowed to go more than 3.5 mm
10-pin serial/com ports 1 and 2, CN4
into the threaded holes.
and CN5 (refer Table V).
Suitable cutout also exists in the drive
26-pin sound cable connector CN31
bay for installing the 8.9cm (3.5-inch)
(refer Table VI).
floppy drive. Before fitting, ensure that
8-pin USB connector CN7 (refer
drive door in the front opens downward
Table VII).
(hinged towards top). For installing floppy
40-pin IDE-1 connector for HDD/CDdrive follow the same procedure as used
ROM drive CN1 (refer Table VIII).
for fixing CD-ROM drive.
34-pin FDD connector CN3 (refer
Table IX).
6-pin PS/2 mouse connector CN8
(refer Table X).
Installation of drives in drives
bay. Before proceeding with the physical
installation of CD-ROM drive, hard disk
drive, and floppy drive in the drives bay,
you have to plan their configuration. We
propose to use only one floppy drive. This
drive will be configured as floppy drive
A. The 34-pin floppy drive cable end with
twisted wires, emanating from CN3 on
the motherboard, needs to be connected
The HDD can now be installed at the

lowest closed (without any cutout in front)
position in the drive bay. Secure it like the
other drives using four Philips screws.
Completing the hardware installation. After having completed the
installation of drives and the cable set
of the motherboard, install back the assembled motherboard chassis (complete
with its cable/connector set) into the PC
cabinet and then complete the cabling
as follows.
You may start with AT power supply
connectors. By now you are familiar with
two 6-pin Molex connectors from SMPS
used for powering the motherboard (refer paragraph under heading Checking
SMPS in Part I). Take connecter with
orange wire (PG signal) first and align it
over pin 1 of PW1 connector on motherboard. Projections on Molex connector of
SMPS would engage into corresponding
holes in PW1 connector. Once you have
engaged the connector in this fashion,
make it vertical and then simply slide it
down. It will snap into its position. (Be
careful not to bend the pins and ensure
that you have not engaged the wrong
pins.) Similarly, insert the other 6-pin
Molex connector in the adjacent pins of
AT power connector. On installation, all
black coloured wires will be adjacent to
each other.
Some of the connectors originating
from the motherboard (e.g. COM1, COM2,
and VGA connectors) can be secured into
the cutouts provided on the case below the
SMPS. Thus secure the D connectors for
COM1, COM2, and VGA into the respective cutouts using Philips screws. This
saves the precious space inside the PC
case and gives it an ethical look.
For accommodating the panel/bracket
for 25-pin D connector of parallel port and
PS/2 mouse as well as audio panel/bracket,
remove two of the cutouts from the rear
of the case by just forcing them out with
hands, and secure these brackets in the
vacant positions using Philips
screws.
Now you may terminate
the connectors originating from
control panel on the cabinet at
the motherboard. Connect the
loudspeaker connector to CN14,
power-on LED connector to
CN12, HDD LED connector to
CN13, and reset switch connector
to CN11. (Correct orientation
can be ensured by matching
the pin connected to coloured
(not white) wire to go into pin 1 of the

connectors in motherboard.)
Now connect the 40-pin middle connector (in the ribbon cable) originating
Fig. 9: Back-panel connector details of HDD

and CD-ROM drives
from CN1 in the motherboard to CD-ROM

drive and its end connector to HDD, ensuring that pin 1 of connector pairs correctly
match. (Projection/slot in the middle of
connectors will help you in proper orientation of the connectors, unless you try
to force it in with wrong orientation.)
Follow it up by connecting the 34-pin
floppy drive end-connector (at the end of
twisted cable) to the interface connector
of floppy drive. This header originates
from CN3 on the motherboard.
The 4-pin Molex-type power supply
connectors now remain to be connected
to the drives. Ensure that rounded
shoulder on the female connectors mate
correctly with the corresponding male
power connectors on CD-ROM drive and
HDD. In all cases you will observe
that yellow wire (+12V) pin faces
the PC case cover.
For FDD, use the 4-pin mini
power supply connector. This connector, if inserted properly, will
lock itself into position. To take
out this connector, you should
press the retaining lever with
your fingertip. Connect one of the
4-pin connectorsCN24 or CN33
or CN32to analogue audio output connector on CD-ROM drive,
Screenshots CMOS setup menus
Table XI
Pin Assignment Internal Audio
Connector Internal Audio Connector
CN25 : AUX-IN

Pin
Assignment

1
AUX-L

2
GND

3
GND

4
AUX-R
CN24 : CD-IN

Pin
Assignment

1
CD-L

2
GND

3
GND

4
CD-R
CN33 : CD-IN

Pin
Assignment

1
CD-R

2
GND

3
CD-L

4
GND
CN32 : CD-IN

Pin
Assignment

1
GND

2
CD-L

3
GND

4
CD-R
after correctly matching the ground pin G

marked over the analogue audio connector on CD-ROM drive (refer Fig. 10) and
those of CN24 or CN33 or CN32 as given
in Table XI.
If you have followed all the tips religiously, your hardware assembly is complete on closing the cover of the cabinet
using four to six Philips screws. But before
you do that, have a look again to ensure
that no loose wires are hanging around.
After closing the cover, you may connect
the keyboard cable to the keyboard connector, mouse cable to COM1 connector,
and amplified speakers banana-type
stereo jack into the line-out plug on the
audio bracket.
Now that hardware assembly part of
the basic unit is over, installation of other
cards, such as LAN card (for networking),
internal modem card (for Internet access),
and TV tuner card, into the PCI slots,
using the software drivers supplied with
them, can be attempted subsequently.
Creating a startup disk
Continued
10
Eventually you will be using Windows

operating system (say, Windows 98), and
for that you should be having Microsoft
Windows 98 installation CD. Use some
other PC having Windows 98 operating
system to create a startup disk. The idea
is to have all important files, including
system files, Fdisk.exe, and Format.com
files, in hand, so that you may proceed
with hardware partitioning and formatting of hard disk once you switch on your
newly assembled PC for the first time.
To make a startup disk, get a new
formatted 8.9cm (3.5-inch) floppy. On the
working computer, click start button,
select settings, double click on icon add/
remove programs, select startup disk,
insert formatted floppy in floppy drive, and
click over the create disk button seen on
monitors screen.
The program would prompt you for
insertion of original Windows 98 CD in
CD-ROM drive. Insert the same and click
on OK button. Even if you do not have
the original CD, but have all programs
in Win98 directory in C: drive, you can
give the proper path and the appropriate
programs will be copied to the startup
floppy disk.
CMOS setup
Switch on the newly assembled PC. It
performs power-on-self-test (POST). During POST you will find Num Lock, Caps
Lock, and Scroll Lock LEDs flashing. A
single short beep during POST indicates
that motherboard is OK.
Certain messages will keep appearing
on the screen of your monitor, including
Press Del to enter CMOS setup. When
this message appears, press Del key to
enter setup. The CMOS Setup Utility
screen appears on monitor screen (refer
screenshot 1). There are seven items on
the left, which can be selected using arrow keys on your keyboard. On the right,
it shows certain options that are quite
obvious and can be interactively executed
when required.
Select the first item on the left,
Standard CMOS Features, and press
enter to see its screen (refer screenshot 2).
Use arrow keys to move between the items
and Page Up or Page Down key to edit
or select the options. You may correct the
date, including year and century, and the
time to their current values.
Continued
You would notice from screenshot

2 that during power up, the BIOS has
identified the primary master (Seagates
10GB hard disk ST310211A), 52X Samsungs CD-ROM Drive SC-15, floppy
drives, video, and RAM address range
(including its breakdown). This
latest Award BIOS 1984-2000 does
not contain Auto Detect Hard Disk
as a separate utility in the CMOS
setup options.
To select any other screen/setup
utility option, press Esc, select
the next item from setup utility
menu, and press Enter. The next
screenshot (screen shot 3) pertains
to Advanced BIOS Features. Here
you may edit and change the first,
second, and third boot devices to read

CD-ROM, HDD-0, and floppy, respectively. This will enable you to boot/run
the computer from CD-ROM (if you have
a Windows installation), CD, HDD (after
formatting and transferring the system
files), or floppy drive (using the startup
floppy created earlier), in that priority.
Press Esc to come back to the opening screen. For the time being, skip
utilities/screens 4 through 7 with their
default values. Select the last Frequency/Voltage Control menu item. Edit
CPU clock/spread spectrum item to read
100MHz/On. Thereafter press Esc and
select Save and Exit Setup or F10 key,
and then Y and Enter for saving the
edited BIOS selections.
11
HDD partitioning and

formatting
Assuming that you have Windows 98

installation CD in CD-ROM drive, the
PC will boot from the CD and start the
Windows 98 setup program. Press function
key F3 to come out of the setup program
and come to the prompt D:\Win98>. Type
Fdisk and press Enter for starting with
the partitioning of HDD. (Note. We could
have used the start up floppy in Drive
A instead of inserting Windows CD in
CD-ROM drive and come to A:\> prompt
for running the Fdisk program from A
drive, if desired.)
On pressing Enter key, the following
FDISK main menu appears:
Current fixed disk drive: 1
Choose one of the following:
1. Create DOS partition or logical DOS drive
2. Set active partition
3. Delete partition or logical DOS
drive
4. Display partition information
Enter choice: [ ]
Press Esc to exit FDISK
Enter choice 1 above and press Enter
key. The next menu on page 2 appears as
follows:
1. Create primary DOS partition?
2. Create extended DOS partition?
3. Create logical DOS partition?
Type 1 and press Enter key. The
program verifies integrity of the disk and
then displays.
Do you wish to use max. size for a
primary DOS partition and make it active. Y/N?
Type N and press Enter. (Because,
we propose to create two DOS partitions
of equal size.) Once again the program
verifies integrity of the disk and prompts
you to enter/specify partition in megabytes
or percentage of disk space. Type 50%
and press Enter. The program complies.
Now press Esc key to return to the main
FDISK menu.
Now enter choice 2. (The primary DOS
partition created earlier becomes active.)
The program will ask you to enter the
number of partitions. As it is currently 1
on C drive, therefore type 1 and press
Enter.
Again press Esc. (Do not press Esc
key more than once, else it will come out
of FDISK.) Again you are led to main
FDISK menu.
Enter choice 1. You will come to menu
on page 2. Now enter choice 2 to create
extended DOS partition. The program
12
will again verify the integrity of the disk

and show availability of 50% of the disk
space for extended DOS partition. Type
50% for extended DOS partition and press
Enter.
Again press Esc (only once). The program will ask you to specify the disk space
for logical drive. Simply press Enter and
then press Esc to come back to the main
FDISK menu. Choose option 4 to display
the information. After looking at the partition information that it has been correctly
done, press Esc to come out. Press keys
CTRL+ALT+DEL or RESET button for
settings to take effect. The PC will boot
from CD-ROM drive as per settings done
in the CMOS setup. On booting you will
again come to the setup part of Windows
98 program. Hence to come out of it, press
F3. Now your drives are designated as

under:
C: First partition on hard disk
D: Extended partition on hard disk
E: CD-ROM drive
Now you will be able to access CDROM drive by typing E:. After the prompt
E:\>, type Format C:/S/U/V and press
Enter. (Here C: refers to drive to be formatted, S to system (transfer of system
files to C drive during formatting), U to
unconditional, and V to verification.) After formatting C drive, you will come back
to the prompt E:\Win98>. Type setup
and press Enter to install Windows 98
on C drive.
As the program is interactive, keep
answering the questions logically. Choose
typical while selecting the Windows ver-
sion. Various messages like enter computer name, workgroup, etc keep appearing,
which you may reply suitably. Against
date/time zone selection, choose India.
Computer will show the Agreement
format that you are bound to accept.
Hence click on the appropriate button.
Before proceeding with the Windows
installation, the program prompts you for
entering the key number of Windows 98
product, which accompanies each original
copy. You must type the key number accurately. It will then copy the Windows
98 files to C drive in Win98 directory.
This will obviate use of Windows CD
for creating a startup file, whenever
required.
To format drive D, double click on
My Computer icon, click the right button
on drive D:, choose Format, and in Format D: menu box, choose full and click
on Start button. After completion of the
formatting of D drive, it is accessible for
read/write operations. This completes partitioning and formatting of the hard disk.
Loading
motherboard drivers
On-board VGA display driver. When
the PC is running, insert the motherboard
driver CD that came with the motherboard
(PCPartner drivers CD, in our case) into
CD-ROM drive. Select drive E, select Intel Chipset Products, 810, VGA , Win9X,
and Graphics, in that order, and double
click on its Setup.exe icon and follow the
instructions on screen. After finishing,
shut down the PC as per Windows shutdown procedure and restart to allow the
drivers to take effect.
On-board AC97 Codec sound
driver. Click on Start button, select settings, select control panel, double click on
System icon, click on Device Manager,
go to Other Devices, double click on PCI
multimedia, select PCI Audio, click on
Remove button (since compatible software drivers have not yet been installed to
avoid conflicts), and then click on refresh
button.
Go back to control panel and, click
on Add new H/W. A wizard guides you
through rest of the process, and in due
course, a message Found new hardware
PCI multimedia audio, display, sound
video appears. The program asks if you
have disk (drivers). Click the Browse
button, select E:, Intel Chipset Products,
810 , AC97 Sound, CS4299, Win98, in that
order, and run Setup.

During the setup, when the
program prompts you for selection of device, choose Crystal
Audio Codec and click OK.
Again during the course of driver
installation for Crystal Audio
Codec, the program will prompt
you for location of Windows 98
files, which you may browse
and point towards C:\Win98
directory or towards Windows
CD as E:\Win98 and click OK
button. After finishing, you may
verify, via Device Manager (refer
preceding para) by clicking on
Sound, Video and Game controller icon, that Crystal Audio Codec as also Crystal Audio Codec
with Game Device appear under
it. (A sound icon will concurrently
appear on the bottom line of your
desktop.)
Intel Firmware Hub
configuration. In Device Manager under Other Devices, an
Unknown Device would still appear. This
concerns Intels Firmware Hub. To correct
this problem, again go to 810 subdirectory
on the CD, double click on INF_install,
and then on Setup.exe within that subdirectory. A message Found New Device
Intel Firmware Hub appears on the
screen. This device will be automatically
configured when you follow the instructions appearing on the screen properly. To
confirm that there are no unknown devices
now, open Device Manager and check all
the items under Other Devices.
With installation of drivers for onboard devices, hardware and software
configuration of your multimedia PC
is complete. Other secondary functions
such as power management functions
APM (advanced power management) or
ACPI (advanced configuration and power
management interface)can be incorporated later through
CMOS Power Management Setup facility. Similarly,
you can install
Ethernet card for
LAN and modem
card for the Internet, fax, and e-mail
accessibility via
telecom lines. A
brief information
on these additional
functions is given
below.
APM. APM caters to the PC to enter
an energy-saving standby mode. BIOS
enables APM by default. It can be initiated
in the following ways:
1. By specifying time-out period in
BIOS setup program.
2. By connecting a hardware suspend/
resume switch to CN10 on the motherboard.
3. From Suspend menu item in Windows.
ACPI. ACPI provides direct control
to the operating system over the power
management as well as plug-n-play functions. Features include:
1. Power management control of
individual devices, add-on cards, video
display, and HDD.
2. Methods for achieving less than
30W operation in Power-on Suspend
Sleeping State and less than 5W in Suspend to Disk Sleeping State.
3. A soft-off feature to power off the
PC.
4. Support for multiple wake-up events
for the PC to resume normal operation.
5. Support for front-panel power and
sleep mode switch.
Ethernet card for LAN. Ethernet
cards capable of running at 10Mbps to
100Mbps, of different makes such as
Intel, Real Tek, Mercury and Dax, as
Ethernet PCI adapter are available in
the market.
Each card comes with a bracket, driver
13
diskette, and user manual. The bracket

would have an LED and RJ-45 jack.
This jack is used for running a twistedpair unshielded cable (max. length 100
metres) between the card and the hub/
concentrator (10Base-T or 100Base-Tx)
to which other computers LAN cards are
similarly connected. Once the cable is
connected to the hub, the LED on Ethernet card would light up. Before installing,
remove a cutout opposite the PCI slot to
make space for the bracket of Ethernet
card. When you install the card, the
power to the PC should be off.

When you switch on the computer,
it automatically detects its presence
and New Hardware Wizard appears
on the screen to guide you through the
installation process. It asks for location
of the drivers. The drivers floppy can be
inserted in A drive and path can be indicated. You can then proceed further, as
per instructions appearing on the screen,
to complete its installation.
Modem. 56kbps PnP (plug-n-play
compatible) and Windows 95/98 compat-
ible internal modem cards are available

from different manufacturers for installation in any of the PCI slots. The modem
card will have a telephone line jack for
connection of telephone line from wall
socket, a parallel phone jack for connecting a telephone set, and Mic and speaker
jacks for external mic and speakers for use
with voicemail and speakerphone facilities, respectively.
For installing the drivers, the procedure would be similar to that used for
installation of the Ethernet card.
Readers comments:
Q1. The authors have shown irresponsibility by planning to install a Pentium III
processor on a PGA 370 socket meant for
a Celeron or lower processor.
Adarsh Soodan
Through e-mail
Q2. The article is really interesting and
useful. Please clarify the following technical terms:
1. PS/2 mouse connector
2. Energy Star, Green PC
3. Audio modem riser (AMR)
R. Sreerekha Hareendran
Kollam, Kerala
Q3. I request the authors to clear the following doubts.
1. Is there any single and reliable
dealer in Chennai, Bangalore or Kerala
from where I can procure all the components.
2. Is the PC available in kit form?
3. Instead of a 35.5 cm (14-inch) colour
monitor, can I use a 43.2 cm (17-inch) colour monitor with this PC, without making
any alterations. Further, is there any 43.2
cm LCD, colour monitor available for this
PC. In that case what are all the alterations required to be made?
A. Venugopalan Unny
Palakkad
Q4. Please clarify:
1. What is the difference between a
boot disk and a start-up disk?
2. How can I increase the HDD capacity to 20 GB? Further, how can I partition
HDD into four sections (logical drives) and
CD-ROM drive as the fifth drive?
3. Define primary master/slave and
secondary master/slave.
4. How can I configure HDD as secondary master and CD-ROM drive as secondary slave?
5. Provide a few tips for attaching a
CD-writer and also a DVD drive to the
system.
T. K. Hareendran, Kadakkal
Q5. I have successfully assembled the

PC as per the given procedure using a
128MB RAM instead of a 64MB RAM.
Please answer the following regarding
this project:
1. How should I proceed to partition
my hard disk into four logical drives?
2. The booting speed of my PC is lower
than that of my colleagues PC that uses
500MHz Celeron processor and 64MB
RAM. Why so?
3. What is the difference between AMI
BIOS and AWARD BIOS?
Narla Sankar
Through e-mail
Q6. Following the guidelines in the article,
I have successfully assembled my PC using
altogether a different processor (500MHz
AMD K6-2) and a different motherboard
(Tomato with SIS 530 Chipset) with
Award BIOS. All is well except that during the first switching, it flashes CMOS
checksum error and CMOS battery
failed. The former message Checksum
error does not appear on restarting the
PC. Is this problem due to wrong orientation of BIOS chip?
Vinod D. Buchia
Gandhidham
Authors, K.C. Bhasin and Neeraj Kundra, state:
A1. We have not only planned but
also installed the Intels Pentium III
processor in PGA 370 socket, and the
system is up and running superbly at
EFY ever since.
In fact, Fig. 5 showing its installation
in PGA 370 socket is from Intel Pentium
III processor installation notes which accompany the Intel Pentium III processor.
So the remarks made by the reader are
totally unwarranted.
A2. 1. PS/2-compatible keyboard and
mouse connector are miniature 6-pin
DIN connectors unlike the PCAT 5-pin
keyboard and 9-/25-pin (comport) connector for the mouse. The pin signals are: 1.
Data; 2. N/C (not connected); 3. Ground;

4. Vcc; 5. Clock; and 6. N/C.
2. Label Energy Star is awarded by
Environmental Protection Agency (EPA),
USA, for products which meet its specifications. It was introduced in 1992. Green
PC is Energy Star program developed
by EPA for minimising unnecessary energy consumption and release of harmful
chemicals during production, especially
chlorofluorocarbons (CFCs) that cause
depletion of ozone layer.
3. The AMR (audio modem riser) card
is a new modular specification that integrates the audio/modem functions on the
motherboard by assigning the analogue
I/O functions to a riser card. Integration
of the audio/modem function enhances
system capabilities while reducing costs.
The AMR interface is based on an AC-link
that is compliant with Intel audio codec
97 version 2.1 specification. It supports
data, fax, and voice modes. The pin details
of its 46-pin edge connector are given in
Table I.
The general features of the card include:
Transmission protocols supported
(ITU-T V.90 and K56flex, V.34, V.32is,
V.22bis, V.21, Bell 212A, and Bell 103)
Maximum download speed of 56,000
bps
Virtual COM Port throughput
460.8 kbps
Call progress monitor
On-/off-hook control
DTMF detection and generation
Distinctive ring for data, fax, and
voice
Call ID support (optional)
We will try to publish troubleshooting procedures for the PC, in EFY, very
soon.
A3. 1. We have not carried out a market survey of the cities/states mentioned
by you and as such we cannot provide you
any related information.
14
2. For complete kit or parts, you may

contact EFY associates, M/s IT Solutions
(India) Pvt Ltd for quotations at itsolutions@pcbonanza.com.
3. One can connect any VGA/SVGA
compatible colour monitor or LCD monitor
to this PC. For example, LG Electronics'
38.4 cm LCD monitor 500 LC (Windows
95 plug-n-play compatible) can be directly
connected.
A4. 1. A bootable disk is one that
contains the basic system files, namely,
the two hidden files (IO.SYS and MSDOS.
SYS) and command.com file. These files
provide I/O resources for application
programs as well as an environment to
execute programs and interact with the
operating system.
You can make a floppy bootable by just
adding the system files. To do this, use
Windows Explorer, select 3 floppy, and
right-click on + sign on its left. Now from
the pull-down menu, select format. Select
copy system files only and click on its
start button to copy the above-mentioned
files to make the floppy bootable.
If you desire to view hidden files in
the disk, click view on the menu bar of
Windows Explorer and select view in the
folders option. Then under hidden files,
select show all files and click apply. You
can now see all files including hidden files
on the disk.
A start-up disk on the other hand
has, in addition to the above-mentioned
system files, a few other utilities such

as Chkdsk.exe, Fdisk.exe, and Scandisk.
exe to help you optimise and maintain
the system.
2. To increase the HDDs capacity to
20 GB, you can simply replace the existing HDD with either a higher-capacity
(20GB) HDD or use an additional HDD in
one of the two IDE channels (primary or
secondary, connected to IDE1 and IDE2
connectors, respectively, on the motherboard) with each channel capable of
supporting two devices (anyone as master
and the other as slave).
The names master and slave have
no sanctity in real terms. For configuring a drive as master and the other as
slave, the position of jumpers at the rear
on each HDD device should conform to
the settings for jumper block in Fig. 2
above. The setting at serial No. 3 is not
applicable to the newer PCs that are all
compatible with ATA (advanced technology attachment) packet interface. The
fourth setting (cable select) is meant
for computers that use CSEL option for
master and slave device by selecting or
deselecting pin 28 of the interface bus, by
jumpering pins 5 and 6.
One can use the IDE HDD auto
detect option from the main menu for
auto-detection of HDD parameters. In
most cases, the BIOS will auto-detect the
HDD(s). If it does not, select the User
option to manually enter the drives parameters by referring
Table I
to its documentation
AMR Connector Pin Definitions (AMR)
that gives the values for
Pin
Signal
Pin
Signal
cylinders, heads, and so
number
number
on. The mode should be
B1
Audio mute#
A1
Audio_PWRDN
set to LBA (logical block
B2
GND
A2
Mono_phone
addressing).
B3
Mono_out_/PC_beep
A3
The procedure for
B4
A4
creating one active
B5
A5
B6
Primary_DN#
A6
GND
(bootable) primary parB7
-12V
A7
+5V dual/+5V SB
tition (drive C:) and one
B8
GND
A8
USB_OC#
extended DOS partition
B9
+12V
A9
GND
(drive D:) has already
B10
GND
A10
USB+
been covered in the
B11
+5VD
A11
USB
(Key)
(Key)
article. Assume that we

(Key)
(Key)
want a primary partiB12
GND
A12
GND
tion of 50 per cent and
B13
A13
S/P-DIF_IN
three extended DOS
B14
A14
GND
B15
+3.3VD
A15
+3.3V dual/3.3V SB
partitions of equal size
B16
GND
A16
GND
of the leftover disk space
B17
AC97_SDATA_OUT
A17
AC97_SYNC
for drives D:, E:, and
B18
AC97_RESET#
A18
GND
F:, respectively. (Note.
B19
AC97_SDATA_IN3
A19
AC97_SDATA_IN1
Drive letter G: will be
B20
GND
A20
GND
B21
AC97_SDATA_IN2
A21
AC97_SDATA_IN0
automatically assigned
B22
GND
A22
GND
to CDROM drive in the
B23
AC97_MSTRCLK+RST A23
AC97_BITCLK
process.) In effect, we
will be creating three logical partitions in

the extended DOS partition of 50 per cent
drive space. Thus in the first line seen on
page 49 of February issue, type 33% for
the leftover disk space instead of pressing
Enter. You will observe from the screen
that drive D: has been created.
Press Esc to return to the menu on
page 1 and repeat the procedure for creating the next drive, with the exception
of typing 50% of the leftover drive space.
For creating the last drive, follow the procedure given in the starting paragraph on
page 49 (February) in toto.
You would thus create all the required
drives of required capacities. Note that if
you install two HDDs in place of a single
HDD, then drive letter D: is automatically kept reserved by the DOS for the
primary drive in the next HDD, and in
that case your four drives on the first HDD
will be named C:, E:, F:, and G:. The last
drive name after partitioning of the next
HDD will be assigned to the CD-ROM
drive. In the case of two physical HDDs,
the page 1 of menu in Fdisk will show an
additional choice 5. Change current fixed
disk drive.
3. The two devices connected to IDE1
connector (refer the motherboard in Fig.
2 of the article) are termed primary
and those associated with IDE2 connector secondary. Master and slave will be
configured as per the shorting links positions. It is a normal practice to configure
the drive at extreme connector as master
and the one connected to middle connector as slave. (You can also configure them
vice-versa.)
4. The shorting link in jumper block
of CD-ROM drive (Fig. 9) will need to
short pins marked SL. For HDD, follow the guidance given in the preceding
paragraph. Both the devices should be
connected to the cable terminating on
IDE2 connector.
5. Attaching a CD-R (CD-recorder/
burner/r-drive). There are various versions. Some can be attached externally
while the others can be installed like a
CD-ROM itself inside the PC. Some will
be IDE-compatible and can be configured
using IDE cable referred above. Some versions will be SCSI compatible (for higher
speed), but for that you will need an extra
SCSI adapter card in one of the vacant
PCI slots. The latest ones are USB (universal serial bus) port-compatible. (The
USB port is available on your Pentium
motherboard.) Some external recorders
can be connected via the printer port.
15
The newer models can write as well as

read, and as such they can also function
as CD-ROM drives. Some of the recording software accompanying these writers
would also have a verification feature
called pre-mastering for comparing the
recorded data against source file. Necessary documentation including software
drivers for installation, configuration, and
utilities will accompany the CD-R. Going
through this literature, you can buy the
CD-R that suits you the best.
Attaching a DVD to the system. The
minimum system requirements for installing a DVD in the same place where
CD-ROM goes include Pentium with bus
speed of 133 MHz (supported by 810E
chipset) or better (200 MHz is required
for maintaining 30 frames/second rate),
Windows 95 or later version (Windows 98
has in-built DVD support), 16MB/32MB
RAM, graphics resolution of 800x600 pixels with 16-bit colour, and sound blastercompatible card. You also need to install
an MPEGII decoder card in a spare PCI
slot for decompression of video and audio.
(Software-based MPEG decoders are comparatively much slower.)
While a CD can store around
650MB/700MB, a single-sided DVD can
store 4.7 to 9 GB and a double-sided DVD
up to 18 GB. (A double-sided DVD needs
to be flipped to read the second side as
existing drives can read from a single
side only.) The DVD kit would comprise
ATAPI/EIDE-compatible controller (SCSIcompatible are also available in the market), an MPEGII decoder card, cables, and
software including sample titles. Considering an ATAPI/EIDE-compatible controller,
configure DVD drive as primary slave by
placing the shorting link across SL pins
on its jumper block at the rear in the same
fashion as described above.
Read your DVD installation manual
carefully, since there are various ways to
cable together the DVD drive, MPEG card,
existing sound card, and existing CD-ROM
drive (if any). You should follow the documentation for audio and video connections.
However, here is a typical approach:
Connect the internal audio cable from
the rear of the DVD drive to the first
audio-in connector on the MPEG card. If
you find an internal audio cable from your
existing CD-ROM drive fastened to your
sound card, disconnect that cable from
the sound card and plug it into the MPEG
cards secondary audio-in connector.
Next connect an audio cable from the
audio-out connector on the MPEG card to
16
1.
2.
3.
4.
Fig. 2: Settings for jumper block
the sound cards internal audio-in connector. Remove the monitor connector
from your graphics card and plug it into
the appropriate connector on the rear of
your MPEG card. Find the VGA loop-back
cable included in your DVD kit. Attach
its one end to your graphics card and
the other to the input connector on your
MPEG card.
If you want to use a TV monitor with
your DVD drive, link the video-out connector on your MPEG board to the monitors
video-in connector. Now proceed to install
the drivers and DVD software. Power up
your PC. Windows will detect the MPEG
board and ask you for a driver. Insert the
driver floppy from your DVD kit and click
OK. You may need to restart your PC
before proceeding.
A5. 1. The first question has already
been answered above.
2. The slow booting operation in PC
may be attributable to some other reason
rather than the processor. The booting
process in the PC involves a number of
steps. Some of the probable reasons and
the suggested remedies are given below:
The power good (PG) signal may
not be building fast to its specified value
(4.5Vmin). For that, you need to check
your PCs SMPS. The specified power rating of the power supply to support Intels
810 chipset is 145 watts for a typical
configuration.
In the CMOS setup utility (refer
screenshot 4), edit the field against System BIOS Cacheable and Video BIOS
Cacheable to read Enabled in place of
Disabled.
Ensure that 3.3V SDRAM sticks
(DIMMs) used by you are 100MHzcompatible.
Ensure firm connections from motherboard to all peripherals. Improper connections can result in BIOS taking time
in identifying them/their settings during
POST operations. As time-out margins

are fairly long, a lot of time could get
wasted that way.
Reload command.com file to make
sure that it is not corrupt. Also check for
presence/removal of any virus using Norton or other anti-virus program.
We suggest you to refer the BIOS
FAQs posted by Pheonix at www.
pheonix.com/platform/awardbios.html
before coming to any conclusion.
3. AMI (American Megatrends Inc.)
and AWARD (AWARD Softwares, which
merged with Pheonix Technologies Ltd
in Sept.1998) are the two renowned BIOS
suppliers. There are a few other suppliers
also in the field (e.g. Microid Research
Inc., Chips & Technologies, etc). At the
users level, one does not directly interface
with the BIOS, except via the CMOS setup options that are more or less similar,
irrespective of the BIOS supplier. BIOS
is chipset-/hardware-specific. Hence it will
generally differ from one motherboard
manufacturer to another. Even the same
manufacturer may upgrade his BIOS by
some hardware modifications to make it
compatible with the new hardware. Only
options can be changed via the CMOS
set-up utility.
A6. The BIOS chip orientation is
correct, else you would not even see the
initial setup screen or any message.
Battery-backed CMOS chip orientation is
also correct if your system time is changing correctly, since battery-backed CMOS
chip is used for retaining the system
set-up data as well as the RTC (real-time
clock) data.
It seems that either your batterybacked CMOS chip is faulty or some of its
pins are not making proper contact with
the base and hence its integrity is not getting verified during POST. Check if this
CMOS chip has popped up from its base
or any of its pins are bent and rectify the
same. Else, try changing this IC. There
could also be a track discontinuity problem
on your motherboard.
Check proper setting of jumpers, especially the CPU core voltage selection.
For AMD K6-2, this voltage setting is
2.2V. This can be achieved by shorting
pins 7-8 of JP5, while leaving all others open, in your Tomato motherboard.
Shorting is achieved by moving the link
to 1-2 and opening is achieved by moving the link over 2-3. This information
may be included in the user manual of
your motherboard. Else, you may get it
fromhttp://www.zida.com/js_t530b.htm.
Automatic Room Light

Controller
rejo g. parekkattu
Parts List
Semiconductors:
IC1, IC2, IC3 - NE555, timer
IC4
- 74LS192, up/down decade
counter
IC5
- 74LS85, 4-bit magnitude
comparator)
IC6
- 7447, BCD to 7-segment
decoder/driver
IC7
- MCT2E, opto-coupler
IC8
- 7805, +5V regulator
IC9(N1-N4)
- 74LS00, quad 2-input
NAND gate
IC10(N5-N10) - 74LS14, hex schmitt
inverter gate
T1, T2
- BC548, npn transistor
T3
- SL100, npn transistor
D1-D3
- IN4001, rectifier diode
IRLED1, IRLED2 - Infrared LED
Resistors (all -watt, 5% carbon, unless
stated otherwise):
R1
- 3.3-kilo-ohm
R2
- 10-kilo-ohm
R3
- 100-ohm
R4, R5, R21
- 1.2-kilo-ohm
R6, R7, R12
- 33-kilo-ohm
R8, R9
- 180-kilo-ohm
R10, R11
- 1-kilo-ohm
R13-R19
- 470-ohm
R20
- 100-kilo-ohm
VR1
- 10-kilo-ohm preset
Capacitors:
C1
- 0.001F, ceramic disk
C2, C3, C4
- 0.01F, ceramic disk
C5, C6
- 4.7F, 16V electrolytic
C7, C8
- 10F, 16V electrolytic
C9
Miscellaneous:
M1, M2
- IR sensor modules
DS1
- LT542 (common anode
display)
RL1
- 12V, 200 ohm, 2 C/O.
LDR1
- LDR (Dark resistance > 120
kilo-ohm)
L1
- 230V, 100W electric bulb

- 12V power supply

- Printed circuit board

- IC sockets
sually, when we enter our room

BCD output of the counter, at any time,
in darkness, we find it difficult
represents the number of persons inside
to locate the wall-mounted switchthe room. The output of the up/down
board to switch on the light. For a
counter is decoded by 7-segment decoder/
stranger, it is tougher still as he has no
driver and displayed on 7-sement display.
knowledge of the correct switch to be
Simultaneously, the output of counter is
turned on. Here is a reliable circuit that
compared by 4-bit magnitude comparatakes over the task of switching on and
tor.
switching off of the light(s) automatically
The output of comparator remains
when somebody enters or leaves the room
high as long as BCD output of counter is
during darkness. This circuit has the folgreater than zero. A logic gate is used to
lowing salient features:
initiate energisation of a relay to switch
It turns on the room light whenever
on the light when comparator output is
a person enters the room, provided that
high and it is dark outside.
the room light is insufficient. If more than
one person enters the room, say, one after
The circuit
the other, the light remains on.
The light turns off only when the
The detailed section-wise description of
room is vacant, or, in other words, when
the circuit shown in Fig. 2 is as follows:
all the persons who entered the room
IR transmitter. The IR transmitter
have left.
circuit consists of an astable multivibra A 7-segment display shows the
tor built around NE555 timer IC1. The
number of persons currently inside the
output of IC1 at pin 3 is a rectangular
room.
waveform of around 36kHz frequency.
The circuit is resistant to noise and
This output is used to drive two IR LEDs,
errors since the detection is based on inwhich transmit modulated IR light at
frared light beams.
36kHz frequency. Modulating frequency
The circuit uses commonly available
of 36 kHz is used because the IR receiver
components and is easy to build and test.
modules used in this circuit respond to IR
The functional block diagram of the
signals modulated at 36kHz frequency.
circuit is shown in Fig.1. It comprises
The multivibrator frequency can be cor36kHz IR transmitter, two IR detector
rectly adjusted with the help of preset VR1
modules, two monostable multivibrators,
(10 kilo-ohm). Resistor R3 is a current
up/down-counter, 4-bit magnitude comlimiting resistor that keeps the IR LEDs,
parator, 7-segment decoder display, light
current within the required range.
sensor, and relay driver.
IR detector modules. The IR deTwo pairs of IR transceivers are emtector modules used in the circuit are
ployed in order to detect whether the
person is entering or leaving the room.
When a person enters the room, IR
detector 1 gets triggered, followed by
triggering of IR detector 2. Conversely,
when a person leaves the room, IR
detector 2 gets triggered, followed by
triggering of IR detector 1.
A priority detector circuit determines which of the two detectors is
triggered first and then activates an
up/down counter accordingly. The Fig. 1: Block diagram of automatic room light controller
17
Fig. 2: Schematic diagram of automatic room light controller
Fig. 3: Timing waveforms
18
commonly available in
the market. These have
three terminals for Vcc
(+5V, here), ground, and
the output signal, respectively. In the normal
state, the output pin
(pin 3) of this detector
remains at high state,
and when an IR light
of correct modulating
frequency is detected,
its output pin goes low.
The pin configuration
of the IR modules may
vary from one manufacturer to the other. (Pin
configuration of module
TSOP 1136 for 36 kHz
used by EFY is shown in
Fig. 2.) (Articles based
on the IR sensor module
have been published in
Nov. 2000 (also in Electronics Projects Vol. 21)
and some other previous
issues of EFY. Readers
may refer the same for
more information about
the module.)
Since the IR transmitter in this circuit is
continuously on, emitting IR light, in the normal condition, the output
pins of both IR modules
will be at low state.
Therefore transistors T1
and T2 will remain cutoff. When a person enters
or leaves the room, the infrared light

beams are interrupted one-by-one and the
output of each IR sensor module, in turn,
goes high, which results in conduction of
associated transistors T1 and T2. Which
transistor will turn on first depends on
whether the person is entering or leaving
the room.
In the circuit, two NE555 timer ICs
(IC2 and IC3) wired as monostable multivibrators are used. The pulse width of the
output waveform (on time) for these multivibrators is fixed at about 0.9 seconds
by suitably selecting the values for the
timing capacitors C5 and C6 in conjunction with their associated resistors R8 and
R9. These monostable multivibrators get
triggered when their trigger input pins
(pin 2) go low. Thus the multivibrators are
triggered only when the IR light beams
are interrupted. Although the output
pulse width of both the multivibrators is
approximately the same, there is, however, a phase difference corresponding to
the elapsed time between the successive
interruptions of the IR beams. Refer to
the waveforms shown in timing diagram
of Fig. 3.
Priority-detector logic circuit. The
priority detector circuit uses three NAND
gates, five inverter gates, and two differentiators. The timing diagram given in Fig.
3 helps in understanding as to how the
priority-detector circuit detects a person
going out of the room.
At first the outputs from the monostable multivibrators are NANDed
by gate N1 and its polarity is inverted
again by gate N7. At the same time, the
outputs of monostable IC3 and IC2 get
differentiated by the capacitor-resistor

combinations of C7-R10 and C8-R11,
respectively. Each differentiated output
is passed via Schmitt inverter pairs of
N5-N6 and N10-N9 to convert the differentiated pulses into rectangular pulses.
The rectangular pulses obtained at the
output of gates N6 and N9 are again
NANDed with the output of gate N7 in
NAND gates N2 and N3, respectively.
The rectangular pulse at pin 4 of NAND

gate N2 ends before the output of gate
N7 goes high and hence the output of
NAND gate N2 stays high, while both
inputs to NAND gate N3 are simultaneously high for the duration of rectangular output of gate N9. As a result, the
output of gate N3 applied to countdown
clock pin 4 of IC4 causes the counter to
count down on its trailing edge (low-to-
Fig. 4: Actual-size, single-sided PCB layout for the circuit
Fig. 5: Component layout for PCB
high transition) and the output count

goes down by one count.
Similarly, when a person enters
the room, pin 4 of counter IC4 remains
high, while its pin 5 (count up) gets a
low-going pulse resulting into counter
output advancing by one count. Values
of capacitors C7 and C8 and resistors
R10 and R11 can be varied for optimum
performance.
Up/down counter. Up/down decade
counter 74LS192 (IC4) is used as the
counter. When the power is turned on,
its outputs Q0 through Q3 are in the
low state. Whenever a person enters the
room, a low-going pulse is applied at its
count-up pin 5, while its count-down
pin 4 is held at logic 1 and its output
count advances by one. Similarly, when
the person leaves the room, a similar
pulse is applied at its countdown input
(pin 4) while its countup pin 5 is held at
logic 1 and its output decreases by one.
Thus the 4-bit output always represents
the number of persons still inside the
room. The output of the decade counter
is connected to 7-segment decoder/driver
IC6 (7447) that displays the number on
common-anode 7-segment LED display
(LT542).
Magnitude comparator. The output
of the up/down counter is also applied to
4-bit magnitude comparator that acts
as zero detector, i.e. it detects whether
the number of persons inside the room
is greater than zero or not. The 4-bit
output of the decade counter is always
compared with a reference 4-bit number
(0000), and if a match occurs, the output
at pin 5 (P>Q) of the comparator goes
low to represent an empty room condition. In all other cases (when the number
of persons in the room is greater than
zero), P>Q output will be at high state.
This output is given as one of the inputs
to NAND gate N4 (followed by inverter
gate N8). Thus, as long as the room is
not empty, one of the inputs to N4 gate
will be high.
The second condition for the light to
get switched on is yet to be satisfied.
Whether there is sufficient light in the
room or not is checked by the light sensor
circuit.
Light sensor. The light sensor is
wired around the opto-coupler MCT2E.
The resistance of the LDR depends upon
the amount of light in the room. An LDR
with resistance below 5 kilo-ohm in normal light and more than 120k resistance
in darkness is required. When there is
19
Fig. 6: Proposed layout of IR transmitter

and receiver pairs
sufficient ambient light, the transistor

inside the opto-coupler is turned on and
the input of NAND gate (pin 3) is driven
to low state. Thus the output of NAND
gate remains at high state and that of inverter gate N8 at low. However, when the
light is insufficient, the resistance of the
LDR increases, turning off the transistor
inside the opto-coupler. The sensitivity
can be controlled by adding a high-valued
variable resistance (about 680k) across
the LDR.
When both conditions are satisfied
20
(that is one or more persons are inside

the room and the ambient light is insufficient), the output of NAND gate goes low
and that of inverter gate N8 goes high to
turn on transistor T3, thereby energising
relay RL1. A 230V, 100W electric bulb is
connected via the relay to the AC mains.
Once the relay gets energised, the LDR is
effectively removed from the circuit (since
the LDR is connected to the N/C contact of
the two pole relay) to prevent the flickering of the lamp with changing resistance
of the LDR.
Assembly and testing

The full circuit, with the exception of the
IR transmitter, can be assembled on a
single general-purpose PCB. However,
an actual-size, single-sided PCB for the
circuit in Fig. 2 is shown in Fig. 4. The
component layout for the PCB is shown
in Fig. 5.
The receiver-transmitter pairs are
placed about a metre apart as shown in
Fig. 6. The distance between the two sensors (receiver modules) is about 40 cm.
A steel pipe of 5mm diameter and 3cm
length can be placed in front of the IR
module in order to improve its directivity. After assembling the circuit, adjust
preset VR1 (10k) until pin 3 of both the IR
sensor modules go high (5V). If the circuit
still does not function properly, adjust the
distance between the sensors. The metal
cabinets of the IR modules must be connected to ground.
Note that the circuit works with a
regulated +5V supply, except the power
supply to the relay coil. The circuit has
no off-time memory, and so its working is
interrupted during power failure.
Another disadvantage is that the circuit can count only up to 9. But it is quite
unusual to have more than nine people in
a normal living room.
Take care about the IR sensor module
pin connections. It may be damaged if connected wrongly.

Intelligent
Water Level Controller
Sadhan Chandra Das
n coming years, the drinking water

is going to be one of the scarce commodities. This would partly be attributable to our mismanagement of
water supply and its wastage. In normal
households, where pumps are used to fill
the overhead tanks (OHT), it is usually
observed that people switch on the pump
and forget to switch it off even when the
tank has become full. As a result, water

keeps overflowing until the household
people notice the overflow and switch
the pump off. As the OHT, in general, is
kept on the topmost floor, it is not quite
convenient to go up frequently and see
the water level in the OHT.
This problem can be solved by using
the intelligent digital liquid level control-
ler circuit presented here. It has the following features:

It can automatically switch on the
pump when the tank is empty and switch
it off when the tank becomes full.
It can check the ground tank (sump
tank) water level from which the water is
pumped into the overhead tank (OHT).
If the sump tank water level is below the
Fig. 1: Circuit diagram of water level controller

21
Fig. 2: Power supply
Digital display
circuit (refer Fig. 1.)
This circuit comprises a
quad 2-input XOR gate
IC1 (CD4030) for sum
outputs, decimal to BCD
code converter using
diode matrix of diodes
D3 through D7, a BCD
to 7-segment decoder/
driver IC2 (74LS47),
Fig. 3: Construction details of probes for mineral water
and common-anode type
7-segment display LTS 542R.
When only
the tip of sensor
probe (cathode)
No. 1 is in touch
with the water,
the voltage at
pin 3 of IC1 becomes logic high
(i.e. +5V), and
hence voltage at
line No. 1 (L-1)
also becomes
high. Now due
to conduction of
Fig. 4: Construction details of probes for non-conducting liquids
diode D3, the BCD code
0001 (Q3 Q2 Q1 Q0) is
predetermined level, the unit switches off
generated and converted to equivalent
the pump to protect the pump from dry7-segment code by IC2 (74LS47) to disrun, even though the overhead tank may
play the decimal digit 1.
be completely empty.
Similarly, when the tips of the both
It includes under- and over-voltage
sensors 1 and 2 are in touch with water,
cutout to switch off the pump if the voltage
the voltage at pin 3 becomes logic low
is not within specified low (200V) and high
(0V) while the voltages at pin 4 and line
(250V) limits.
2 (L-2) become logic high (i.e. +5V). Now
It includes a circuit for digital disdue to conduction of diode D6, the corplay of the overhead tank level to indicate
responding BCD code 0010 is generated
water levels 0 through 4 as per positions
and decimal digit 2 is displayed on the
of the tips of the sensors inside the over7-segment display.
head tank.
When the tank is completely empty,
The sensors used in this project have
the outputs of all XOR gates of IC1 are
a lifetime of more than five years.
22
low and the display shows decimal digit

0. In this way the display circuit works
to show decimal digits 0 through 4, corresponding to the level of the water, as
defined by the position of the sensors at
different heights. Here the resistors R9
through R12 and R19 through R21 have
been used for passive pull-down.
Controller circuit. The controller
circuit is built around three quad 2-input
NOR ICs (IC3 through IC5) to switch
the pump motor on or off when certain
conditions are fulfilled. The conditions
to be met for switching-on/running of the
pump are:
1. The mains supply should be within
certain low and high cut-off limits (say
between 200V AC and 250V AC).
2. The water level in the sump (ground
tank) is above certain optimum level (2'
in Fig. 1).
3. Water in the overhead tank (OHT)
is below the minimum level.
Once all the above-mentioned three
conditions are satisfied, the pump motor
would start running. The corresponding
logic level at point A will be low (point B
will also be low automaticallynot being
in touch with the liquid), point C will also
be low and point D will be high.
Once running, the pump will continue
to run even when the water rises above
the minimum level in the OHT (i.e. when
point A subsequently goes high), provided
the first condition is still fully satisfied
and the water level in the sump has not
fallen below that of sensor 1'. It will stop
only when either the maximum specified
level in the OHT has been reached or the
water level in the sump has fallen below
sensor 1' position.
Here the NOR gate pairs of N2 and
N3, and N6 and N7, form NOR-latches.
When the ground tank (sump) water level
is above the defined level 2', the voltage
at pin 11 of gate N6 is low. So diode D12
cannot conduct. Also, if the mains voltage
is within acceptable limits of 200-250V,
the voltage at output pin 3 of gate N12 is
high and the voltage at collector of transistor T2 is low. Diodes D8 and D11 are
thus cut off. So the voltage at input pin
8 of gate N4 is pulled down to logic low
level by passive pull-down resistor R18
(56 kilo-ohm).
Now if overhead tank is empty, i.e.
water level is below level 1, voltage states
at input pins 1 of gate N2, and pins 12
and 13 of gate N1, are pulled down to
logic low by passive pull-down resistors
R13 and R14 respectively. Hence volt-
Parts List
Fig. 5: Actual-size, single-sided PCB for water level controller
Fig. 6: Component layout for the PCB
ages at output pin 11 of gate N1 and

input pin 5 of gate N3 become logic high
to force the output at pin 4 of gate N3 to
be latched low. This logic level will not
change until voltages at input pins 5 and
6 of gate N3 become low (0V) and voltage
at pin 1 of gate N2 goes high (+5V). Since
both inputs of gate N4 are low, hence its
output at pin 10 goes logic high to drive
transistor T1 into conduction. Relay RL1
is thus energised and the pump motor is
switched on.
The water level of the overhead tank
starts rising. When the water level reaches
the tip of the topmost sensor 5, voltage at
pin 1 of gate N2 goes high. Already, the

voltage levels at pin 11 of gate N1 and
input pin 5 of gate N3 are low. So the voltages at output pin 4 of gate N3 and input
pin 9 of gate N4 become logic high to turn
the output pin 10 of gate 4 to logic low level.
Thus relay RL1 is de-energised, to switch
the pump off.
When line voltage is within the specified limits and ground water level goes
below the defined level 1', the voltage at
output pin 11 of gate N6 becomes logic
high to make diode D12 conduct. As a
result, the voltage at pin 8 of gate N4
becomes logic high to make its output pin
Semiconductors:
IC1
- CD4030 quad 2-input XOR
gate
IC2
- 74LS47 BCD to 7-segment
decoder/driver
IC3-IC5
- CD4001 quad 2-input NOR
gate
IC6
- LM7812 regulator 12-volt
IC7
- LM7805 regulator 5-volt
T1-T2
- SL100 npn transistor
D1-D15,
D17-D20
- 1N4001 rectifier diode
D16
- Red LED
DIS1
- LTS542R 7-segment common
anode display
stated otherwise):
R1-R8
- 33-kilo-ohm
R9-R18
- 56-kilo-ohm
R19-R21
- 1.5-kilo-ohm
R22, R24
- 2.2-kilo-ohm
R23
- 1.2-kilo-ohm
R25
- 1-kilo-ohm
R26, R27
- 220-kilo-ohm
R28-R34
- 330-ohm
VR1, VR2 - 100-kilo-ohm preset
Capacitors:
C1-C4, C7 - 0.01F ceramic disc
C5
- 470F, 35V DC electrolytic
C6
C8,C9
Miscellaneous:
RL1
- 12V, 200-ohm 2 C/O relay
X1
- 230V AC primary to
(a) 0-15V, 750 mA, and
(b) 0-12V, 100 mA secondary
transformer
S1
- Push-to-on button
S2
- On/Off switch

- IC sockets

- Heat sinks for regulator ICs

- SS304, 5mm dia. stainless
steel rod for anode and 3mm
dia. for all cathodes - of appropriate length

- Multi-core feed wire
10 go low. Transistor T1 is cut off and the

relay is kept disabled, even though the
overhead tank is fully empty. The relay
will be enabled only when the water level
in the sump tank is above level 2'.
When the ground tank water level is
above level 2' but the line voltage is out of
range, gate N12 output pin 3 goes low to
cut off transistor T2, making diode D11
conduct. In this state the output of gate
N6 and the output of gate N2 become logic
low. Although diode D12 does not conduct,
diode D11 conducts and the output of gate
N4 goes low to cut off transistor T1. This
disables relay RL1 and the pump remains
off, even though the overhead tank is completely empty.
Here two cathode sensors for sensing
ground tank water level have been used
23
instead of one, to provide some hysteresis

in the system. When ground water level
is below level 1', the output of gate N6
becomes logic high (5V). When water level
is above level 2', the output of gate N6 is
logic low (0V). If the water level is in between levels 1' and 2', there is no change
of state at output of gate N6, i.e. output
remains at the last/previous state.
Power supply (Fig. 2). The power
supply circuit consists of step-down
transformer X1 (having two secondaries
with ratings of 12V, 100 mA and 15V,
750 mA), a bridge rectifier (using four
1N4001 diodes), a capacitor of 2200 F for
filtering purpose, regulator IC 7812 for
feeding the anode probes as well as relay
RL1, and regulator IC 7805 for feeding
regulated +5V supply to all digital ICs,
LEDs, and 7-segment display. The 12V
secondary is used for sampling the mains.
24
One of its terminals is grounded while its

other terminal, marked G, is connected
to point G of high/low cutout circuit in
Fig. 1. The other secondary rated at 15V,
750 mA is used for deriving the regulated
DC supplies required for operation of the
circuit.
Construction of sensors (Fig. 3).
The highlight of the circuit are its electrodes (Fig. 3) used for mineral/conductive
water, which are made of stainless steel
(grade SS-304) rods. These electrodes have
a life span of more than five years. Anode
is a rod of 5 mm diameter and each of the
cathodes is of 3 mm diameter, as shown
in the figure.
The cathodes and the anode should be
long enough so that their soldered terminals are not in contact with water, even
when the tank is full. The joints should be
covered with insulation in such a way that
rain water does not come in contact with

the soldered joints. One has to use orthophosphoric acid or zinc-chloride to make a
soldered joint between stainless steel and
conducting part of the flexible feed wire.
The distance between the anode and
the cathodes should not be more than 60
cm. Arrangement should be made in such a
way that no electrode touches the other.
The circuit can also be used for nonconductive liquids such as pure distilled
water by using floats in conjunction with
micro switches, as shown in Fig. 4. This
arrangement can be used for distilled water plants, research laboratories, and for
other nonconductive liquid level sensing
applications.
An actual-size, single-sided PCB for
the circuits in Figs 1 and 2 is shown in Fig.
5, and the component layout is shown in
Fig. 6.
a unique
Liquid Level Indicator
Sadhan Chandra Das
separate alternative circuit of a

unique liquid level indicator
to provide a display in terms of
the percentage of full-scale level in OHT
is shown in Fig. 7. It can either be used
to replace the digital display circuit
included in Fig. 1 (by simply connecting
the 10% and 100% sensor probes of Fig. 7,
additionally, to points marked A and B
respectively in Fig. 1, apart from connection of +5V and +12V supplies and ground
points) or it can be used in conjunction
with an audio alarm unit shown in Fig. 8
and the power

supply circuit
in Fig. 2 independantly.
The latter
configuration
can be used
when you do
not desire to
have automatic control
for switching
the pump mo- Fig. 8: Audio alarm unit
Fig. 7: Unique liquid level indicator

25
Fig. 9: Actual-size, single-sided PCB for the unique liquid level indicator
Fig. 10: Component layout for the above PCB
tor on and off but need only to be warned

when water reaches 100% and also when
its level drops to 10% so that you may
manually switch the pump motor on or off,
as the case may be.
This level indicator can show the discrete levels in percentage from 0 to 100%
with 10% resolution. An audio alarm
circuit has been incorporated to generate
audio alarm when the tank level reaches
100% and also when the level drops to
10%. The input to the audio alarm circuit
26
(Fig. 8) is tapped from line-1 and line-10

representing 10% and 100% levels respectively in Fig. 7.
If, in place of displaying the liquid level in percentage, one wants to display only
the digits 0 through 10, then 7-segment
display DIS1 and LEDs (LED1 through
LED4) for % symbol can be removed. This
circuit can be used for premises which
have overhead tanks and the water supply
is provided by municipalities or corporations etc.
Display circuit. The

basic elements of the circuit, as shown in Fig.
7, comprise three quad
2-input XOR gates (IC1
through IC3) to get only the
sum outputs, a hardwired
decimal-to-BCD converter
(using diodes D1 through
D16), and a 74LS47 BCDto-7-segment decoder/driver (IC4). When the tip of
sensor-1 is in touch with
the water, the line (L-1)
connected to pin 3 of IC1
(CD 4030) goes to logic 1
state (+5V).
When the tips of sensors 1 and 2 both touch the
water, pin 3 of IC1 goes to
logic 0 (0V), while line L-2
connected to pin 4 of IC1
becomes high (+5V). Thus
which one of the lines (L-1
through L-10) will be at
logic 1 would depend on
which last sensor (counted
from bottom of the tank) is
in touch with the water. If
the tank is totally empty,
all the lines, L-1 through
L-10, would be at logic 0.
These lines (L-1
through L-10) represent the
decimal numbers 1 through
10. If line L-1 is at logic 1,
BCD code 0001 is generated due to conduction of
diode D9 only. Similarly, if
line L-3 is at logic 1, BCD
code 0011 is generated due
to conduction of diodes D6
and D16.
The voltages, corresponding to their BCD
codes, are fed to the inputs of IC 74LS47 (7-segment decoder/driver) to
drive 7-segment display DIS2. When
line L-10 is high, display DIS3 is driven
by transistor T1 (SL100) for decimal
number 1.
Since all the time the unit place digit
of the percentage display is 0, the cathodes of corresponding segments of DIS1
have been permanently connected to
0V (ground) through current-limiting
resistors of 330 ohms each. In this way
the circuit displays 0 to 100 per cent
of liquid level with 10 per cent resolution.
One may or may not use diode D1. In
Parts List
Semiconductors:
IC1-IC3
- CD 4030 quad 2-input X-OR
gate
IC4
- 74LS47 BCD to 7-segment
decoder/driver
IC5
- UM66 melody generator
DIS1-DIS3 - LTS 542 common anode
7-segment display
T1, T3, T4 - SL100 npn transistor
T2
- BC 108 npn transistor
D1-D16,
D21, D22
ZD1
- 3.1 volt zener diode
LED1-LED4 - Red LED
stated otherwise):
R1
- 3.3-kilo-ohm
R2-R5
- 1.5-kilo-ohm
R6-R24
- 330-ohm
R25-R34
- 56-kilo-ohm
R35-R44
- 33-kilo-ohm
R45
- 100-kilo-ohm
R46
- 2.7-kilo-ohm
R47, R48
- 680-ohm
Capacitor:
C1
Miscellaneous:
LS
- 8-ohms speaker 7.5 cm dia

- SS 304, 5 mm dia and 3mm
dia stainless steel rods of
appropriate length for anode
and cathodes respectively.

- Multi-core feed wire
this circuit the resistors of 56-kilo-ohm

are connected across the inputs of XOR
gates and ground, while resistors from
R2 to R5 have been used for passive pulldown action.
Audio alarm unit. Fig. 8 shows
the circuit for audio alarm. The base of
transistor T2 (BC108) is connected to the
terminals of lines L-10 and L-1 via diodes
D21 and D22 respectively and a common
resistor of 100-kilo-ohm.
When water touches the topmost sensor probe, transistor T2 conducts and transistor T3 is cut off. As a result 3.1V developed across zener ZD1 becomes available
across pins 1 and 2 of melody generator
IC7 (UM66). The amplified musical alarm
is heard from the speaker.
When the tank is neither 100% full
nor it is above 10% (but less than 20%),
transistor T2 cuts off while transistor T3
is saturated to make the voltage across
pins 1 and 2 of IC7 at almost 0V, and
hence no sound is produced by the unit.
A separate parts list and actual-size
PCB layout as well as component layout
(Figs 9 and 10 respectively) are included
after integrating the power supply of Fig. 2
with liquid level indicator circuit of Fig. 7
and audio alarm unit of Fig. 8.
Readers comments:
Q1. I have noticed, when the water level
reaches the probe No 4, the C' segment
LED of DIS 2 (LT542) does not glow.
The same is the case even when the
water level reaches probe No. 5 and
probe No 6. Kindly suggest the corrective actions.
M. Raja
Bangalore
Q2. I have constructed the circuit which
is working perfectly. Instead of eleven
roads, I want to use a stainless-steel
hollow pipe that is sealed at one end
and contains ten normally-open type
done for resistors R19, R20, and R21.

The anode voltage should be +12V to
+15V, which may or may not be regulated.
You may also follow the modifications
shown in Fig. 1 (component numbers
shown for Intelligent Water-Level Controller) to correctively display the water-level.
It is due to the fact that the output of
the CMOS ICs (4030) are loaded by 1.5k
resistors.
EFY: The circuit works satisfactorily without resistors R2 to R5.
A2. Sensors using a stainless steel hollow
pipe cannot be used in this circuit. Imagine the float is in between 5th and 6th
Fig. 1: Modification to level controller
magnetic reed switches on the inside

and one floating magnet on the outside
as the sensor. Could you suggest me the
changes required in the circuit if this
type of sensor is used?
J.P. Thakkar
Through e-mail
The author, Sadhan Chandra Das,
replies:
A1. Check IC1, IC2, and IC3 (4030),
and the continuity of the wires connected to the sensors. If you find these
alright, replace resistors R2 through R5
by 5.6k in the circuit before you switch
on the power. If you wish to construct
the circuit Intelligent Water Level
Controller' published in February issue
of EFY, the same replacement may be
reed micro switches, then no switch will be

closed and the display will show only 0,
although the water level is in between 5th
and 6th sensors. Moreover, the number
of wires from the reed switches remains
the same.
Nowadays for non-conductive liquid, coaxial or parallel-plate type capacitors are used with a suitable circuit
that employs a frequency-to-voltage
converter and displays the level of nonconductive liquid. But for conductive
liquid like water, it is not advisable because due to electrolysis the sensors get
damaged soon. The value of resistors R2
through R5 is 1.5k. Use 4.7k or 5.6k resistors instead to avoid loading effect of
ICs 4030.
27
Interface Your Printer

with 8085 Microprocessor
Shaila Ghanti
t is very convenient to interface a

printer to print 8085 programs. Here
a simple hardware interface circuit
with its driver software is described that
would enable student to take printout of
the 8085 programs in hexadecimal codes
along with their memory locations in the
format: xxxx DD, where XXXX is the 4-bit
hexadecimal address and DD is 2-bit hexadecimal data.
For most types of printers, the data to
be printed is sent to the printer as
Fig. 1: Timing diagram
Fig. 2: System's block diagram
ASCII characters on eight parallel

lines. The printer receives the characters
to be printed and stores them in an internal buffer. When the printer detects a carriage return (odH), it prints out the first
row of characters from the printer buffer.
When the printer detects a second carriage return, it prints out the second row
of characters. The process continues until
the desired characters are printed.
Transfer of ASCII codes from the
microprocessor to a printer needs to be
done on a handshake basis because the
microprocessor can send characters much
faster than the printer can print them.
The printer must in some way let the mi-
28
croprocessor know that its buffer is full,

and it cannot accept any more characters
until it prints out some of the already
stored characters. A common standard for
interfacing with parallel printers is the
Centronics interface.
Centronics interface
TABLE 1
Pin Assignments of Centronics
Interface Connector
Pin No. Signal
Direction
2
Data bit 0 (D0)
In
3
Data bit 1 (D1)
In
4
Data bit 2 (D2)
In
5
Data bit 3 (D3)
In
6
Data bit 4 (D4)
In
7
Data bit 5 (D5)
In
8
Data bit 6 (D6)
In
9
Data bit 7 (D0)
In
1
Strobe (STR)
In
14
Auto Feed (AF)
In
36
Device Select (DSL) In
31
Initialise (INIT)
In
11
Busy (BSY)
Out
13
Select (SEL)
Out
32
Error (ERR)
Out
12
Paper end (PE)
Out
19 to
30, 33
Ground
Centronics printers usually have a 36-pin

interface connector. The pin assignments
of the significant pins of Centronics interface connector, used in this project, are
given in Table 1.
Fig. 1 shows the timing waveforms
for transferring data characters to
the printer using the basic handshake
signals. Assuming that the printer has
been initialised, first check the busy
signal pin to see if the printer is ready
which is used for connecting 8255 to the
to receive data. If this signal is low (not
printer, should normally have a 26-pin FRC
busy), send an ASCII code on the eight
connector to meet with the corresponding
parallel data lines. After at least 0.5 s,
connector on the kit, and the other end
assert the STROBE
should have a 36-pin male Centronics consignal low to tell the
nector to go into the corresponding connecprinter that a chartor on the printer.
acter has been sent.
Port A of 8255 is used for transferring
The strobe signal
the data to the printer. Port B is used for
going low causes the
checking the status signals coming from
printer to assert its
the printer. Port C is used for sending the
Busy signal high. Afcontrol signals required to activate the
ter a minimum time
printer. The interface signals between
of 0.5 s the strobe signal can be raised
8255 and the printer should be connected
high again. Note that the data must be
as show in Table 1.
held valid on the data lines for at least 0.5
(EFY Lab note. The maximum curs after the strobe signal is made high.
rent that an 8255 output pin can source
When the printer is ready to receive the
and sink is limited to 400 A and 2.5 mA,
next character, the BUSY signal will be
respectively. To enhance this capability,
low. The process continues.
open-collector hex buffers/drivers 7407
The 8085 microprocessor is interfaced
shown in Fig. 3 were used for all output
to the printer through 8255 programmable peripheral
interface device as
Table II
Port B of 8255(Input) Status Signals
shown in the block
32
13
11
diagram (Fig.2) and Cent. Pin no b2
PE
ERR
SEL
BSY Comments
the detailed inter- Signal
B3
B2
BI
B0
face diagram (Fig.3). Data

0
1
1
0
=06H (status OK)
One end of the cable,

signal (DSL*)
to select the
printer. Read
the status to
find out whether the printer
is selected
and the Busy
signal is low.
Now send the
ASCII character to print
the character,
followed by
the STROBE*
pulse for 0.5
s. The process continues
Fig. 4: Actual-size, single-sided PCB for the
till the end of printer interface circuit
the program.
The end of the
program is indicated using
RST1 (CFH).
The starting location of
the program
to be printed
should be
stored in D
and E registers. The eight
MSBs and
eight LSBs of
memory location should
be stored in
D register and Fig. 5: Component layout for the PCB
Fig. 3: Schematic diagram of the printer interface circuit
E register, report pins. For input port pins, there is no
Parts List
spectively. The complete software
danger of overloading, and hence these
program is given with comments as
Semiconductors:
ICI, IC2
- 7407 hex buffer/driver (open
pins were connected directly from the
necessary.
collector type)
printer to the kit.)
(EFY Lab note. The original program
Resistors (all -watt, 5% carbon, unless stated
was tried many times, but we did not sucotherwise):
ceed. Finally, the program was extensively
R1-R12
- 1-Kilo-ohm (or use one-/twoPrinter driver program
resistor networks
modified and successfully run using Epson
overview
Miscellaneous: - Centronics connector and
9-pin printer. The program, along with
cable
During initialisation, some memory locaTables II and III showing the status and
tions are kept aside to
Table III
store the ASCII equivaPort B of 8255(Input) Status Signals
lent of the characters that
Cent pin no NU
14
31
1
NU 36
NU
NU
are to be printed. This is Signal
AF
INIT STR
DSL
Comments
followed by configuration Data C7
C6
C5
C4
C3
C2
C1
C0
X
0
1
1
X
0
X
X
=30H
(initialisation) of 8255 by
X
0
0
1
X
0
X
X
=10H
Printer
sending the mode con-

long delay
initialisation
trol world to its control
X
0
1
1
X
0
X
X
=30H
register. To initialise
X
0
0
1
X
0
X
X
=20H
the printer first send ini-
Short delay
strobe
tialisation (INIT*) pulse

X
0
1
1
X
0
X
X
=30H
for a few microseconds.
NU=Not Used
Then send the select
29
Memory
Location
Instructions
Code
7110
LXI H, 7000
21
7111
00
7112
70
7113
LXI D2A20
11

7114
20
7115
2A
7116
MOV A, H
7C
7117
CALL 70FC
CD
7118
FC
7119
71
711A
MOV A, H
7C
711B
CALL7100
CD
711C
00
711D
71
711E
MOV A,L
7D
711F
CALL 70FC
CD
7120
FC
7121
70
7122
MOV A, L
7D
7123
CALL 7100
CD
7124
00
7125
71
7126
MOV A, M
7E
7127
CALL 70FC
CD
7128
FC
7129
70
712A
MOV A, M
7E
712B
CALL 7100
CD
712C
00
712D
71
712E
INX H
23
712F
MOV A, M
7E
7130
CPI CF
FE
7131
CF
7132
JNZ 7116
C2
7133
16
7134
71
7135
MVIA, 43
3E
7136
43
7137
STAX D
12
7138
INX D
13
7139
MVI A, 46
3E
713A
46
713B
STAX D
12
713C
DCX D
1B
713D
LXI H 2A20
21
713E
20
713F
2A
7140
MVI A, 82
3E
7141
82
7142
OUT 0B
D3
7143
0B
7144
MVI A, 0B
3E
7145
0B
7146
OUT 0B
D3
7147
0B
7148
CALL 7200
CD
7149
00
714A
72
714B
MVI A, 05
3E
714C
05
714D
OUT 0B
D3
714E
0B
714F
IN 09
DB
7150
09
7151
ANI 02
E6
7152
02
7153
CPI 02
FE
7154
02
7155
JNZ 714F
C2
30
8085 Assembly Language Listing
Comments
Initialise memory locations to Store

ASCII codes of the program.
To get the ASCII codes of address

of memory location of the program to
be printed using the subroutine.
To get the ASCII codes of the

contents of the program to be
printed using the subroutine.
Increment pointer to mem. location

Move contents of mem, into acc.
Whether it is end of the program.
If not, start executing from 7116
If it is end of the program,

transfer the code for CF.
Initialise mem. Pointer to block

(2A20) where ASCII code of characters to be printed are stored.
Initialise 8255
Write control word in control register
of 8255
Reset printer.
Delay for a few microseconds.
Send SELECT signal.
Read the status of printer to find

out whether the printer is selected.
IF printer is not selected, again read
Memory
Location
Instructions
7156
7157
7158
MVI B, 04
7159
715A
CALL 7220
715B
715C
715D
INX H
715E
DCR B
715F
JNZ 715A
7160
7161
7162
MVI A, 20
7163
7164
OUT 08
7165
7166
MVI A, 09
7167
7168
OUT 0B
7169
716A
MVI A, O8
716B
716C
OUT 0B
716D
716E
MVI C, 02
ter
716F
7170
CALL 7220
7171
7172
7173
INX H
7174
DCR C
7175
JNZ 7170
7176
7177
7178
MVIA, 0A
7179
717A
OUT 08
717B
717C
MVIA, 0D
717D
717E
OUT 08
717F
7180
MVIA, 09
7181
7182
OUT 0B
7183
7184
MVIA, 08
7185
7186
OUT 0B
7187
MOV A,E
7188
XRA L
7189
JNZ 7158
718A
718B
718C
MOV A,D
718D
XRA H
718E
JNZ 7158
718F
7190
7191
RST 1
Code
Comments
4F
71
06
04
CD
20
72
23
05
C2
5A
71
3E
20
D3
08
3E
09
D3
0B
3E
08
D3
0B
0E
the status of printer
02
CD
20
72
23
0D
C2
70
71
3E
0A
D3
08
3E
0D
D3
08
3E
09
D3
0B
3E
08
D3
7B
Ad
C2
58
71
7A
AC
C2
58
71
CF
to print 2 codes.
Use subroutine to transfer data.
in polling mode.
Else counter of 4 is initialised in B

register to print 4 digits of memory
address (use subroutine to transfer
data to printer in polling mode).
Get next memory location
check whether 4 characters are
transferred.
send to (20) blank space to printer
to generate STROBE pulse to printer
Counter of 2 is initialised in C regis-
Get next memory location.

Check whether 4 characters are
transferred.
send LF code to printer
send CR code to printer
Check wheter the full program

code are transferred to printer
If not, continue to transfer next
codes.
Else, stop executing the program
Subroutine for converting hexadecimal to ASCII codes

70FC
RRC
OF
Rotate right 4 times to get 4 MSB.
70FD
RRC
OF
70FE
RRC
OF
70FF
RRC
OF
7100
ANI OF
E6
Mask 4 LSBs
7101
OF
7102
CPI 0A
FE
Compare with 0A
7103
0A
Memory
Location
Instructions Code Comments
7104
JC 7109
7105
7106
7107
ADI 07
7108
7109
ADI 30
710A
710B
STAX D
710C
INX D
710D
RET
DC
C6
70
C6
07
C6
30
12
13
C9
8085 Assembly Language Listing

Memory
Location
If it is less than 0A,
Add 07 to data
Else add 30H to data to convert data
into ASCII code.
Subroutine to transfer data in polling mode:

7220
MVI A 09
3E
To generate the STROBE signal.
7221
09
7222
OUT 0B
D3
7223
0B
7224
IN 09
DB
Find whether the printer is not Busy
7225
09
7226
ANI 01
E6
7227
01
7228
CPI 00
FE
7229
00
722A
JNZ 7224
C2
722B
24
722C
72
Instructions Code Comments
722D
MOV A,M
722E
OUT 08
722F
7230
MVI A,08
7231
7232
OUT 0B
7233
7234
MVI A,09
7235
7236
OUT 0B
7237
7238
MVI A,O8
7239
723A
OUT 0B
723B
723C
RET
7E
D3
08
3E
08
D3
0B
3E
09
D3
0B
3E
08
D3
0B
C9
Get the ASCII code from memory

locations, send the data to printer to
print.
Send the strobe pulse with min
0.5 duration.
Subroutine for delay:

7200
MVI C, FF
7201
7202
DCR C
7203
JNZ 7202
7204
7205
7206
RET
0E
FF
0D
C2
02
72
C9
Load C register with data FF.

Decrement the contents of C reg.
if the contents of C is not zero, goto
7202.
modified program used by EFY

Addr. Hex code Label
Mnemonics
9000 310095
LXI SP, 9500H
9003 11209D
LXI D,9D20H
9006 EB
XCHG

9007 11209A
LXI D, 9A20H

900A 7C
X1
MOV A,H
900B CDFC90
CALL 90FCH
900E 7C
MOV A,H
900F CD0091
CALL 9100H
9012 7D
MOV A,L
9013 CDFC90
CALL 90FCH
9016 7D
OV A,L
9017 CD0091
CALL 9100H
901A 7E
MOV A,M
901B CDFC90
ALL 90FCH
901E 7E
MOV A,M
90IF
CD0091
CALL 9100H
9022 23
INX H
9023 7E
MOV A,M
9024 FECF
CPI CFH
9026 C20A90
JNZ X1
9029 3E43
VI A,43H
902B 12
STAX D
902C 13
NX D
902D 3E46
MVI A,46H
902F 12
TAX D
9030 1B
CX D
9031 21209A
XI H,9A20H

9034 3E82
VI A,82H
9036 D30B
UT 0BH
9038 3E30
VI A,30H
903A D30A
UT 0AH
903C 3E10
VI A,10H
903E D30A
UT 0AH
9040 CD0092
ALL 9200H
9043 3E30
VI A,30H
9045 D30A
UT 0AH
Remarks
Addr. Hex code
;Initialise stack pointer

;Store location where
;data to be printed starts
;into register pair DE
;Location where ASCII
;stored
9047 3E02
VI A,02H
9049 D308
UT 08H
904B CD5092
ALL 9250H
904E CD7092
ALL 9270H
9051 0604
X4:
MVI B,04H
9053 CD249
X2:
CALL 9224H
9056 23
INX H
9057 05
DCR B
9058 C25390
JNZ X2
905B 3E20
MVI A,20H
905D D308
OUT 08H
905F CD5092
CALL 9250H
9062 CD7092
CALL 9270H
9065 0602
VI B, 02H
9067 CD2492
X3:
CALL 9224H
906A 23
INX H
906B 05
CR B
906C C26790
JNZ X3
906F CD9092
CALL 9290H
9072 7B
MOV A,E
9073 AD
XRA L

9074 C25190
JNZ X4
9077 7A
MOV A,D
9078 AC
XRA H
9079 C25190
JNZ X4
907C 3E03
MVI A,03H
907E D308
OUT 08H
9080 CD5092
CALL 9250H
9083 CD7092
CALL 9270H
9086 3E04
MVIA,04H
9088 D308
OUT 08H
908A CD5092
CALL 9250H
908B CD 7092
CALL 9270H
9090 76
HLT
;Convert data to be
;printed into ASCII
;End of data?
;ASCII code of C
;ASCII code of F
;Initialise mem. Pointer

;to start of ASCII codes
;Initialise 8255
;Initialise Printer
;Call delay
Label
Mnemonics
;Subroutine for converting hex to ASCII

90FC 0F
RRC
90FD OF
RRC
Remarks
;ASCII code for start of text
;Call status
; Call strobe
;Counter of 4 for printing
;four digits of addresses
;of memory location
;Send blank space to printer

;Call status
; Call strobe
;Counter of 2 for printing
;two digits of data
;Call LFCR
;Check whether all data
;has been transfered for
;printing
;ASCII code for end of text

;Call status
; Call strobe
;ASCII code for end of
;transmission
;Call status
; Call strobe
;Rotate four times to get MSB
31
Addr. Hex code

90FE
90FF
9100
9102
9104
9107
9109
910B
910C
910D
Label
OF
OF
E60F
FE0A
DA0991
C607
C630
X5:
12
13
C9
Mnemonics
Remarks
RRC
RRC
ANI 0FH
PI 0AH
C X5
DI 07H
ADI 30H
STAX D
INX D
RET
;Output Subroutine
9224 7E
9225 D308
9227 CD5092
922A CD7092
922D C9
MOV A,M
OUT 08H
CALL 9250H
CALL 9270H
RET
;Delay subroutine
9200 C5
9201 06FF
9203 0EFF
X7:
9205 0D
X6:
9206 C20592
9209 05
920A C20392
920D C1
920E C9
PUSH B
MVI B,FFH
MVI C,FFH
DCR C
JNZ X6
DCR B
JNZ X7
POP B
RET
;Status subroutine
9250 C5
9251 06FF
X9:
9253 0EFF
XS:
9255 DB09
9257 E60F
9259 FE06
PUSH B
MVI B,FFH
MVI C,FFH
IN 09H
ANI 0FH
CPI 06H
control signals that have been used in

program implementation, is included for
the benefit of readers, who may try both
the programs, if desired.)
Address map of devices used:
RAM locations used: 9000H to 92AEH
(70FCH onwards used by author)
32
;Mask four bits of LSB
;Output one byte of data

;Call status
;Call strobe
;In port B
;Compare with 06H
Addr. Hex code

925B
925E
925F
9262
9263
9266
9267
Label
CA6692
0D
C25392
05
C25192
C1
X11:
C9
;Strobe subroutine
9270 3E20
9272 D30A
9274 C5
9275 0EFF
9277 0D
X10:
9278 C27792
927B C1
927C 3E30
927E D30A
9280 C9
Mnemonics
JZ X11
DCR C
JNZ X8
DCR B
JNZ X9
POP B
RET
MVI A,20H
OUT 0AH
PUSH B
MVI C,FFH
DCR C
JNZ X10
POP B
MVI A,30H
OUT 0AH
RET
;Line feed and Carriage return Subroutine

9290 3E20
MVI A,20H
9292 D308
OUT 08H
9294 CD5092
CALL 9250H
9297 CD 7092
CALL 9270H
929A 3E0A
MVI A,0AH
929C D308
OUT 08H
929E CD5092
CALL 9250H
92A1 CD7092
CALL 9270H
92A4 3E0D
MVI A,0DH

92A6 D308
OUT 08H
92A8 CD5092
CALL 9250H
92AB CD 7092
CALL 9270 H
92AE C9
RET
Port A (output): 08H

Port B (input): 09H
Port c (output): 0AH
Control word register: 0BH
Important memory location:
Stack pointer initialised: 9500H
Data to be printed is stored at: 9D20H
Remarks
;ASCII code for space

;Call status
;Call strobe
;ASCII Code for Line feed
;Call status
;Call strobe
;ASCII code for Carriage
;Return
;Call status
;Call strobe
onward ASCII conversion of data to be

printed starts at 9A20H. Data to end with
CFH as the last byte.
The actual-size, single-sided PCB layout of the printer interface circuit and the
component layout are shown in Figs 4 and
5, respectively.
MORSE PROCESSOR
Junomon Abraham
Mo
rse code, introduced by Samuel

Morse, is still used universally
even though better modes of
communication are now available Following are the main reasons for its preference
over other means of communication.
1. It enables communication with
distant stations, using low-power transmitters.
2. It avoids the problem of regional
accents and pronunciation.
3. It has the ability to override noise
as it occupies only a fraction of the
bandwidth
required for
a radio telephony signal.
The circuit presented
here converts
text into the
corresponding Morse
code, and vice
versa. The
high light of
this circuit is
that is can interpret Morse
signals available in the
form of sound
from ham
radio or any
other source.
It is very useful for not
only learning
but also for transmission and reception of
Morse code. It can find application in ham
radio, telegraphy, etc.
been used, which relieves the microprocessor from scanning the keyboard
and display. Here, 25 keys, including SHIFT and CTRL keys, and six
7-segment common cathode character
displays are used. Though 7-segment
displays are not suitable for alphanumeric characters, these have been
used here with some compromise for
reducing the overall cost. (Note: The
use of dot-matrix LCD display avoids
the difficulty in displaying characters
in 7-segment format. One can go for a
microcontroller design, if needed.) The
TABLE II
Address Distribution
Device
Address
EPROM
0000 to 03FF
RAM
1000 to 17FF
8279:
Command Port

21
Data Port
20
7-segment display pattern employed

for different characters is shown in
Table I.
Two hardware interrupts, RST5.5
and RST6.5, are used for reading the key
entries. These are driven by the IRQ line
from the keyboard/display interface IC
8279.
A buffer (IC8) is connected at the
display output of 8279 to drive the
7-segment displays. The encoded scan
lines (SL2-SL0) are decoded by an octal
decoder 74LS138 (IC9), whose outputs
drive the common cathode of displays
via transistor switches. The keys are
wired in such a way that those can be
represented by the seven higher order
rate of the keyboard data.
Morse signals in the form of sound are
converted to microprocessor-compatible
signals. The arrangement comprises condenser microphone, preamplifier, and
retriggerable monostable multivibrator
Hardware
The circuit is configured around the
basic 8085 microprocessor. For simplifying the overall design, a programmable
keyboard/display interface 8279 chip has
33
PARTS LIST
Semiconductors:
IC1
- 8085A microprocessor
IC2
- 74LS373 octal D-type latches
IC3
- 6116 RAM (2 kB)
IC4
- 27C32 EPROM (4 kB)
IC5
- 8279 keyboard/display decoder
IC6, IC9
-
74LS138 3-bit binary
decoder
IC7
- 74LS123 retriggerable monostable multivibrator
IC8
- 74LS244 octal bus driver
IC10
- 7805 +5 volt regulator
T1
- BC548 npn transistor
T2
T3-T8
- BC558 pnp transistor
Dl
- 1N4148 switching diode
LED1
- LED
DIS1-DIS6-
LTS543 common-cathode
display
Resistors (all watt, 5% carbon, unless
and also acts as a stack. One can enter/store a maximum of approximately

1,750 characters in the RAM. This is
adequate for normal applications.
In case one needs to store lengthy
text, one should use a larger capacity RAM. Battery backup may be
used for avoiding loss of data due to
power failure. The low-level address/
data lines of 8085 are demultiplexed
using an octal transparent latch
IC 74LS373.
The address bits A12 and A13 are decoded by IC6 to generate chip select (CS)
signals to various ICs. The address map of
devices is indicated in Table II.
stated otherwise)
Rl
- 68-kilo-ohm
R2
- 3.3-kilo-ohm
R3
- 2.2-kilo-ohm
R4
- 5.6-kilo-ohm
R5
- 1-mega-ohm
R6
- 15-kilo-ohm
R7, R8 - 1-kilo-ohm
R9-R16 - 68-ohm
R17-R22 - 220-ohm
R23
- 180-ohm
VR1
- 2.2-kilo-ohm preset
VR2
- 100-ohm preset
Capacitors:
C1
- 2.2uF, 16V electrolytic
C2, C4, C6 -
0.luF ceramic disc
C3
- 10uF, 16V electrolytic
C5
- 0.001uF ceramic disc
C7
- 10pF ceramic disc
Miscellaneous:
PZ1
- Piezo buzzer
MIC
- Condenser microphone
S1-S26
-
Tactile switches for
keyboard
XTAL
- 6.144 MHz crystal
The software driver routines for the circuit, along with their Assembly language
code, are listed in Appendix A. Basically,
the following functions are performed by
the software program:
1. Initialisation of the peripherals.
2. Reading the depressed key data and
its storage in RAM.
3. Writing data into the display RAM
in 8279.
4. Generation of Morse code.
5. Recognition of Morse code from its
sound.
6. Giving proper messages at appropriate time.
Since Morse code is a time-dependent
code, the program contains many jump
instructions. The program has been
make interactive and user-friendly. The
74LS123 (IC7). The output of IC7 drives SID pin

of 8085 and it is in high
logic state when a sound
is detected by the microphone. The sensitivity of
the amplifier can be adjusted by preset VR2.
The converted Morse
code drives a piezo buzzer
via a transistor connected
at the SOD line of 8085
microprocessor. Intensity
of the sound can be controlled by potentiometer
VR1.
The firmware is
stored in 27C32 (4k
EPROMonly 1 kB
is needed for the program). RAM 6116 stores
the keyboard entries
34
Firmware
firmware is divided into the following

modules: (a) booting, (b) keyboard, (c)
transmit, (d) receive, (e) play, and (f)
lookup table.
The logic of the program can be generally understood from the Assembly language listing given in Appendix A. A brief
description of each module is, however
given below:
(a) Booting: The section initializes
stack pointer 8279 and the interrupts. It
also fixes defaults speed for Morse code.
It is the first module executed when you
switch on the power supply.
(b) Keyboard: When a key is
pressed, IRQ pin of 8279 interrupts
8085. The ISR (interrupt service routine) reads the keyboard data and, if
needed, does some manipulations. It also
displays the entered characters in the
7-segment display. (Table III has been
included by EFY for ready reference by
the readers to know the hex data generated by 8279 when any key is either
pressed alone or in combination with
SHIFT or CTRL key.)
(c) Transmit. This module converts
each character in the RAM to its corresponding Morse code signals which are
output through the SOD line. The speed
of transmission or words per minute depends on the value entered in the setup
menu.
(d) Receive. The acquisition of
Morse code is done by checking the
presence of sound with time. The
module continuously monitors the SID
pin of 8085 microprocessor, where the
Table IV
Lookup Table
Chr/word
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
G
H
I
*Notes:

Address
0300
0304
0308
030C
0310
0314
0318
031C
0320
0324
0328
032C
0330
0334
0338
033C
0340
0344
0348
Hexcode
Chr/word Address Hexcode
Chr/word
3FAA0E00 J
034C
IE A9 03 00 .
06 A9 0E 00 K
0350
70 E6 00 00 ,
5BA5OEOO L
0354
38 59 03 00 ;
4F95 0E00 M
0358
55 3A 00 00 ?
66 55 0E 00
035C
46
-
6D55 0D00
7D 56 0D 00 N
0380
54 36 00 00 EOM*
07 5A0D00 O
0384
5C EA 00 00 WAIT*
7F 6A 0D 00 P
0388
73 69 03 00 BT*
6F AA 0D 00 Q
038C
67 9A 03 00 SK*
77 39 00 00 R
0390
50 D9 00 00 SELECt
7C 56 03 00 S
0394
6D D5 00 00
39 66 03 00 T
0398
78 0E 00 00 trAnst
5E D6 00 00 U
039C
3E E5 00 00 M oVEr
79 0D 00 00 V
03A0
2A 95 03 00 rECEIE
7165 03 00 W
03A4
6A E9 00 00
3D DA 00 00 X
03A8
52 96 03 00 SEtup
76 55 03 00 Y
03AC
6E A6 03 00
30 35 00 00 Z
03B0
4B 5A 03 00
1. EOM=End of message= 3
2. WAIT= 8
3. BT=Sentence separation=
4. SK=End of work= 3
3
Address
03B4
03B8
03BC
03C0
03C4
03C8
03CC
03D0
03D4
03D8
03DC
03E0
03E4
03E8
03EC
03F0
03F4
03F8
03FC
Hexcode
80 99 39 00
04 5A 3A 00
84 66 36 00
D3 A5 35 00
08 56 39 00
00 3F 00 00
OF 99 0D 00
7E 59 0D 00
49 56 0E 00
4F 95 39 00
6D 79 38 79
39 78 78 50
77 54 6D 78
55 00 5C 2A
79 50 50 79
39 79 30 79
6D 79 78 3E
73 00 00 00
00 00 00 00
35
Size 215100 mm
sound-converted logic level (depending

on whether the sound is present or not)
is available. It compares this logic level
with a prefixed time value and accordingly decides whether the sound was
due to dot or dash. Moreover, it displays
characters corresponding to the entered
Morse code.
(e) Display. This module displays
characters in the moving display format
as per the entered message. The speed
of movement is fixed to approximately
three characters per second.
(f) Lookup table (Table IV). This
is a block of data, which contains the
7-segment data for every character
and the data needed for Morse code
generation or reception. Each character
takes four EPROM locations. The first
location indicates the 7-segment data,
while the second and third locations
hold the Morse data code. The fourth
location is unused. (EFY Note. We
have included Table IV showing the
hex data generated by depression of
any key alone or in combination with
SHIFT or CTRL keys, for ready reference by the readers.)
Control-key functions
Before going to the operating procedure,
we have to know the functions of key associated with CTRL key.
CTRL+SETUP (8EH). The default
speed is initialized for approximately
5 words/minute. If you want to change
this setting, you can do so by using this
control key combination. When you press
this combination k, the message SEtUP
is displayed. Here you can enter any
one of the characters ranging from 1
through 9 and A through K to change
the speed. Note that the minimum speed
is associated with K and the maximum
with 1.
CTRL+CLEAR (98H). It clears the
RAM content.
CTRL+PLAY (84). CTRL+PLAY is
used for displaying the RAM content in
moving format. You can interrupt any
process by pressing any control key that
has no function.
CTRL+CONT (86). It is used for
continuing the play operation if it were
interrupted.
Operating procedure
1. Switch on the power supply. A message
36
Fig. 2: Actual-size, single sided PCB for the Morse processor
APPENDIX A: 8085 ASSEMBLY LANGUAGE PROGRAM LISTING

Addr. Opcode
Label
Mnemonics
Comments
Booting
0000

31FF17
LXI SP.17FFH
Initialise stack pointer
0003

3E10
MVIA.10H

Initialise 8279
0005

D321
OUT 21H
0007

3E40
MVI A.40H
0009

D321
OUT 21H
000B

3E0D
MVI A.0DH
000D

30
SIM

Activating RST6.5
000E

325017
STA 1750H

Updating mode and position
data
0011 211D00
LXI H.001DH
0014

225117

SHLD 1751H
0017

21246C
LXIH.6C24H

Fixing
default setup
001A

227017
SHLD 1770H
001D 11DC03
LXI D.03DCH
0020 CDE000
CALL DISPLAY Display SELECt
0023

FB

El
0024 76
HLT
Halt
RST 5.5
002C C3F700
JMP 00F7H
Go to ISR of RST5.5
RST 6.5
0034 DB20
IN 20H
Reading keyboard data from

IC 8279
0036 F5
PUSHPSW
Store it in the stack
0037 FE8A
CPI8AH
Checking CNTL+ RECEIVE

key
0039 CA0002
JZ RECEIVE
003C FE8C
CPI8CH
Checking CNTL+

TRANSMIT key
003E CA8001
JZ KEYBOARD
0041 FE84
CPI 84H
Checking CNTL+PLAY key
0043 CAD001
JZ PLAY
0046 FE86
CPI 86H
Checking CNTL+

CONTINUE key
0048 CAD501
JZ 01D5H
004B

FE98
CPI98H

Checking CNTL+ CLEAR
kev
004D

C26000
JNZ 0060H
0050 210010
LXIH.1000H
Clearing the RAM
0053 36C8
MVI M.C8H
0055

23
INXH
0056 7C
MOV A, H
0057 FE17
CPI 17H
0059 DA5300
JC 0053H
005C 2A5117
LHLD 1751H
Return to mode from
005F E9
PCHL
where clearing action is

called
0060 FE8E
CPI8EH
Checking CNTL+ SETUP

key
0062 C27700
JNZ 0077H
0065 3E0E
MVIA.0EH
Activating RST5.5
0067 30
SIM
0068 11F403
LXI D.03F4H
006B CDE000
CALL DISPLAY Display the message SEtUP
006E FB
El
006F 76
HLT
0070 3E0D
MV1A.0DH
Activating RST6.5
0072 30
SIM
0073 2A5117
LHLD 1751H
0076 E9
PCHL
Return to mode from where

setup action is called
Addr. Opcode
Label
Mnemonics
0077 3A5017
LDA 175OH
007A B7
ORAA

007B CA8000
JZ 0080H

007E FB
El
007F 76
HLT
0080 F1
POPPSW

0081 FE92
CPI92H
0083 C28900
JNZ 0089H
0086 2B
DCXH
0087 2B
DCXH
0088 C9
RET
0089 FE90
CPI90H
008B C8
RZ

008C FE80
CPI80H
008E C29600
JNZ 0096H
0091 110500
LXID.0005H

0094 19
DAD D
0095 C9
RET
0096 FE82
CPI 82H
0098 C2A000
JNZ 00A0H
009B 11F9FF
LXI D.,FFF9H

009E 19
DAD D
009F C9
RET
00A0 FE88
CPI88H

00A2 CA1001

00A5 FE96
CPI 96H
00A7 C2BA00
JNZ 00BAH
00AA E5
PUSH H
00AB 46
MOV B,M

00AC 2B
DCX H
00AD 70
MOV M,B
00AE 23
INX H
00AF 23
INX H
00B0 7C
MOVA.H
00B1 FE17
CPI 17H
00B3 DAAB00
JC 00ABH
00B6 El
POPH
00B7 2B
DCX H
00B8 2B
DCX H
00B9 C9
RET
00BA FE94
CPI 94H
00BC C2D100
JNZ 00D1H
00BF 2B
DCX H

00C0 E5
PUSH H
00C1 46
MOVB.M
00C2 36C8
MVI M.C8H
00C4 23
INX H
00C5 7E
MOV A,M
00C6 70
MOV M,B
00C7 47
MOV B,A
00C8 7C
MOVA.H
00C9 FE17
CPI 17H
00CB DAC400
JC 00C4H
00CE E1
POPH
00CF 2B
DCX H
00D0 C9
RET
00D1 FE7F
CPI7FH

00D3 D2CF00
JNC 00CFH
00D6 07
RLC
Comments
The following CNTL
key functions are only for
TRANSMIT mode
Checking whether we were
in the TRANSMIT mode
Getting key closure data

which is stored in stack
Checking CNTL+<key
Shifting the characters
right by one place
Checking CNTL+key
Shifting the characters by
one place
Checking CNTL+TABR key
Shifting the characters left
by six places
Checking CNTL+TABL key

Shifting the characters right
by six places
Checking CNTL+ START

key
JZ TRANSMIT
Checking CNTL+DEL key
Delete one character in the

left most position of the display
Checking CNTL+INS key

Inserting a space for adding
character
Checking whether key data

is valid character
37
Addr. Opcode
Label
00D7 77
00D8 C9
Mnemonics
Comments
Addr. Opcode
MOVM,A
RET
Enter it into the RAM

Return
0156
0159
015A
015D
015E
0161
0162
0163
0164
0165
0168
DISPLAY SUBROUTINE:
00E0 0E06 DISPLAY:
MVI C,06H

00E2 1A
LDAX D

00E3 D320
OUT 20H
00E5 13
INX D
00E6 OD
DCR C
00E7 C2E200
JNZ 00E2H
00EA CDCOO1
CALL DELAY2
00ED CDC001
CALL DELAY2
00F0 C9
RET

Display six characters taken

from lookup table
Lookup table is pointed to
by DE -reg pair
Wait for some time

Return
VECTOR RST 5.5

00F7 DB20
IN 20H
Reading key closure data

from 8279
00F9 E63F
ANI3FH
00FB 07
RLC
00FC 327017
STA 1770H
Storing clot value
00FF 47
MOV B,A
0100 80
ADD B
0101 80
ADDB
0102 327117
STA 1771H
Storing dash value
0105 C9
RET
Return
TRANSMIT SUBROUTINE:
0110 31FF17 TRANSMIT: LXI SP.17FFH
0113 7C
MOVA.H
0114 FE17
CPI17H
Checking end of mem.
0116 D2B301
JNC 01B3H
0119 1603
MVID.03H
011B 5E
MOVE.M
011C 1A
LDAX D
011D D320
OUT20H
Display character in the

RAM
011F F3
DI
0120 E5
PUSHH
0121 0EO4
MV1C.04H
Morse code generation
0123 13
INXD
0124 1A
LDAX D
0125 F5
PUSHPSW
0126 217017
LXIH.1770H
0129 E603
ANI 03H
012B FE01
CPI01H
012D CA4801
JZ 0148H
0130 23
INXH
0131 FE02
CPI02H
0133 CA4801
JZ 0148H
0136 FE03
CPI 03H
0138 CA5901
JZ0159H
013B Fl
POPPSW
013C El
POPH
0131

FB
El
013E 7E
MOVA.M
013F 23
INXH
0140 FECC
CPICCH
Checking end of message

character]
0142 C21001
JNZ0110H
0145 C3B301
JMP01B3H
0148 3ECD
MVIA,CDH
Setting SOD line
014A 30
SIM
014B 46
MOVB.M
014C CD7001
CALLDELAY1 Waiting
014F 05
DCRB
0150 C24C01
JNZ 014CH
0153 3E4D
MVIA.4DH
Resetting SOD line
0155 30
SIM
38
Label
217017
46
CD7001
05
C25A01
Fl
0F
0F
0D
C22501
C32101
Mnemonics
Comments
LXI H.1770H
MOVB.M
CALL DELAY1 Waiting
DCRB
JNZ015AH
POPPSW
RRC
RRC
DCRC
JNZ 0125H
JMP 0121H
DELAY1 SUBROUTINE:
0170 E5 DELAY1:
PUSH H

0171 21CF01
LXIH.01CFH
0174 2B
DCXH
0175 7C
MOVA.H
0176 B5
ORAL
0177 C27401
JNZ0174H
017A E1
POPH
017B C9
RET
Executing these instructions

require approximately
3 msec
KEYBOARD SUBROUTINE:
0180 AF
KEYBOARD: XRAA
Updating mode and positing

data
0181 325017
STA 1750H
0184 218001
LXIH.0180H
0187 225117
SHLD 1751H
018A 11E203
LXI D.03E2H
Displaying message
018D CDE000
CALL DISPLAY trAnSf for indicating the

TRANSMIT mode
0190 31FF17
LXI SP.17FFH
0193 210610
LXIH.1006H
Entering keyboard data to

the RAM
0196 11FBFF
LXI D.FFFBH
0199 19
DADD
019A 0E06
MVI C.06H
019C 1603
MVID.03H
019E 5E
MOV E,M
019F 1A
LDAX D
01A0 D320
OUT20H
01A2 23
INX H
01A3 0D
DCRC
01A4 C29E01
JNZ 019EH
01A7 7C
MOVA.H
01A8 FE17
CPI17H
01AA DAB301
JC 01B3H
01AD 11E803
LXI D.03E8H
01B0 CDE000
CALL DISPLAY If mem. is over display

MoVEr
01B3 FB
El
01B4 76
HLT
01B5 C39601

JMP 0196H
DELAY2 SUBROUTINE:
01C0 0E9F
DELAY2: MVIC.9FH

01C2 CD7001
CALL DELAY1
01C5 0D
DCRC
01C6 C2C201
JNZ 01C2H
01C9 C9
RET
PLAY SUBROUTINE:
01D0 1603 PLAY:
01D2 210510
01D5 F3
01D6 23
01D7 7C
MVI D.03H
LXI H.1005H
DI
INXH
MOVA.H
Wait approximately
400 msec
Addr. Opcode
Label
Mnemonics
01D8 FE17
CPI 17H
01DA D2EB01
JNC 01EBH
01DD 5E
MOVE.M
01DE 1A
LDAX D
01DF D320
OUT20H
01E1 CDC001
CALLDELAY2
01E4 FB
El
01E5 7E
MOVA.M
01E6 FECC
CPICCH

01E8 C2D501
JNZ 01D5H
01EB C3B301
JMP01B3H
Comments
Addr. Opcode
0258

OF
RRC
0259

OF
RRC
025A

B2
ORA D
025B

4F
MOVC,A
025C

ID

DCR E
025D

C22902
JNZ 0229H
0260

El

POP H
0261

71
MOVM.C
0262

23
INX H
0263 C32302
JMP 0223H
0266

79
MOVA.C
0267

OF
RRC
0268

OF
RRC
0269

F6C0
ORIC0H
026B

ID
DCR E
026C

CA7402
JZ 0274H
026F

OF
RRC
0270

OF
RRC
0271

C36B02

JMP 026BH
0274

El

POP H
0275

77

MOV M,A
0276

0638
MVI B.38H

Comparing obtained
0278

21FD02
LXI H.02FDH

moree
code data with
lookup data
027B

3A8017
LDA 1780H
027E

23
INXH
027F

23
INXH
0280

23
INX H
0281

23
INXH
0282

05
DCR B
0283

C29102
JNZ 0291H

If given
morse code is
invalid, display V
0286

FE04
CPI 04H
0288

DA1D02
JC 021DH
028B

215C03
LXI H.035CH
028E

C39F02
JMP 029FH
0291

BE
CMPM
0292

C27B02
JNZ 027BH
0295

3A8117
LDA 1781H
0298

23
INXH
0299

BE
CMP M
029A

2B
DCX H
029B

C27B02
JNZ 027BH
029E

2B
DCX H
029F

Dl
POPD
02A0

7A
MOV A,D
02A1

FE17
CPI 17H

02A3

D2D102
JNC 02D1H
02A6

7E
MOVA.M
02A7

D320
OUT 20H
Display
the character
02A9

7D
MOV A,L

Store
data, corresponding
02AA

12
STAXD

to
displayed character, in
the RAM
02AB

0600
MVI B,00H
02AD

217017
LXI H.1770H
02B0

7E
MOVA.M
02B1

07
RLC
02B2

23
INX H
02B3

86
ADD M
02B4

D2B802
JNC 02B8H
02B7

04
INRB
02B8

4F
MOV C,A
02B9

0B
DCX B
02BA

CD7001
CALL DELAY1
02BD

20
RIM
02BE

07
RLC
02BF

DA1B02
JC 021BH

Check
for space between
02C2

78
MOVA.B

words
02C3

B1
ORAC
02C4

C2B902
JNZ 02B9H
02C7

AF
XRAA
02C8

D320
OUT 20H
Giving
space in display
02CA

13
INX D
02CB

3EC8
MVI A,C8H
02CD

12
STAX D

Store
the apace data in the
RAM
02CE

C31B02
JMP021BH

Repeat
the process
02D1

76
HLT

Halt
Displaying data in RAM

Wait for some time

symbol]
Go to keyboard module
RECEIVE SUBROUTINE:
0200 3EFF RECEIVE:
MVIA.FFH
Updating mode and position

data
0202 325017
STA 1750H
0205 210002
LXI H,0200H
0208 225117
SHLD 1751H
020B 11EE03
LXI D.03EEH
020E CDE000
CALL DISPLAY Display message rECEIE
0211 11FA03
LXI D.03FAH
0214 CDE000
CALL DISPLAY Clear the display
0217 FB
El
0218 110510
LXI D.1005H
Morse code aquisition
021B 13
INXD
021C D5
PUSH D
021D 218117
LXIH.1781H
0220 3600
MVI M.00H
0222

2B

DCX H
0223

E5

PUSH H
0224

0E00

MVI C,00H
0226

1E04

MVI E.04H
0228

61

MOVH.C
0229

0600

MVI B.00H
022B

CD7001

CALL DELAY1
022E

04

INR B
022F

20
RIM

Reading the SID pin
0230

07
RLC
0231

DA2B02
JC 022BH
0234

24

INR H
0235

3A7117

LDA 1771H
0238

BC

CMPH

Checking for the space
between characters
0239

DA6602
JC 0266H
023C

78
MOV A,B
023D

FE02
CPI02H
023F

DA2902
JC 0229H
0242

2600
MVI H.00H
0244

1640
MVI D,40H
0246

3A7117
LDA 1771H
0249

OF
RRC
024A

B8
CMPB

Checking for dot and dash
024B

D25702
JNC 0257H
024E

7A
MOV A,D
024F

07
RLC
0250

57
MOV DA
0251

00
NOP
0252

00
NOP
0253

00
NOP
0254

00
NOP
0255

00
NOP
0256

00
NOP
0257

79
MOVA.C

Constructing morse code
data
Label
Mnemonics
Comments
39
SELECt will be displayed. By depressing

the appropriate key, you can select any
one of the following modes: (a) transmit,
(b) receive, (c) setup, (d) play, (e) continue,
and (f) clear.
2. Press CTRL+TRANSMIT keys
for entering into the transmit mode.
A message trAnSt appears for a second, after which you can enter your
message.
3. At the end of the message you have
to enter ] symbol (by pressing SHIFT+]
keys, i.e. 66H) for invoking the microprocessor.
4. By the use of arrow key ( or
or by TAB (TAB R or TAB L) keys, set
the location in the message at which the
transmission is to start. If you want to
transmit the message from beginning
depress CTRL+TRANSMIT keys again
for getting into the first character.
5. Press CTRL+START keys for getting Morse code of the message.
6. You can go to any other mode by
selecting the correspond mode before finishing the transmission or later.
7. For entering into the receive
mode, press the CTRL+RECEIVE keys.
You will see the rECEIE message for
one second.
8. Generate Morse code using a buzzer,
voice, or some other source (such as ham
radio and recorded tape).
9. The acceptance of sound will
be indicated by LED1 for duration of
Dit/Dash. If LED does not light, adjust
the gain of the amplifier using potmeter
VR2.
10. The converted data can be replayed
by pressing the CTRL+PLAY keys.
Note. 1. The clear and setup control
keys can be used, at any time, if needed.
Construction
PCB designed particularly for this
circuit (as given in Fig. 2, with component layout shown in Fig. 3) is needed
for making this circuit. IC bases are
preferred for fixing the ICs. For continuous operation, provide a heat
sink for the regulator IC. Since this is
based on time comparison, it is necessary to use the correct frequency crystal
(6.144 MHz).
Readers comments:
Q1. In the software part of this project
some steps are missing, due to which
the processor is not functioning properly.
40
Going through the software, we found an

error at the address 003CH, after which
the processor doesnt jump to the transmit
mode and hangs up. Please correct the
anomalies in the software.

Sidharth M. Modi
Mumbai
Q2. The project Morse Processor pub-
lished in March issue correctly outputs in

the initial stages but displays the message
transt on going to the transmit mode.
After this when I press any key, it doesnt
take the input and doesnt display the
same in the 7-segment display. As a corollary, its also not giving the corresponding
Morse code.
Sunil Kumar B.
Through e-mail
Q3. How can I interface CRT display
with 8085 microprocessor? Also provide
me the complete circuit along with the IC
numbers.
Anwar Ali, Hyderabad
The author, Junomon Abraham, replies:

A1. The firmware is correct and the
same was duly tested at EFY. You need
not doubt the code at location 003CH,
where it checks for the Ctrl+Transmit
key. From here, it goes to the keyboard
routine and feeds the message to the
RAM. The actual conversion process
starts when we press Ctrl+Start key,
during which the processor goes to the
transmit routine.
A2. Make sure that you have loaded
the look-up table (Table IV) in the
EPROM and that the entered program
is absolutely correct. If the same conditions still persist, the problem is with
your hardware.
A3. It is possible to add a CRT controller to 8085 by changing the firmware. You
can use the easily available 6845 CRT
controller. The article based on this IC
was published in the book Learn to Use
Microprocessors by K. Padmanabhan published by EFY. The project Video Display
Add-On Board for the 8085 Kit based on
9364 chip was published as a technical
article on page 21 in EFYs Aug. 83 issue.
The same is also reproduced in Chapter XI
of the above titled book.
41
Access-Control System
bhaskar banerjee
he easy-to-construct access control

(code lock) circuit presented here
incorporates the following unique
features:
(a) Many people can use the same system with their own unique 6-digit code.
(b) A single-digit system code has been
included, which is common to all users of
the system. It can be easily changed with
the help of DIP switches.
If any one or more of the six consecutive keyboard-entered digits do not conform to the predetermined code, an alarm
generator sounds the alarm to indicate
wrong code. If the result of final comparison of all the six digits is correct, a mono
multivibrator, serving as lock driver for
opening/closing a lock, gets activated for
a fixed preset duration.
The detailed description of individual
units, as shown in Fig. 2, is as follows:
Keyboard and keyboard encoder.
Description
The keyboard consists of 16 push-to-on
The block diagram of the system shown
type keys in a 4x4 matrix format. It can be
in Fig. 1 provides an overall view of its
made using data switches or one can use
composition and working. A 16-digit keymembrane-type keyboard at some extra
pad is used for sequentially entering six
cost. The keys should be numbered in Hex
Hex numbers, which are decoded by the
as shown in the figure.
keyboard encoder into their equivalent
The encoder is built around 74C922
binary numbers and stored in separate
(IC1), which is a 16-key keyboard encoder.
data latches in binary form.
It generates a 4-bit binary number correThe first three Hex numbers are used
sponding to the key pressed; for example,
as an address for an EPROM, which
shorting pin 1 (R1) with pin 11 (C1) generstores a predetermined code at prefixed
ates the binary equivalent of digit 0.
addresses allocated to separate users or
Whenever a key is pressed, the signal
used for separate purposes. The code data
generated by this encoder IC is available
output from EPROM (one byte/two nibbles)
as logic high output at pin 12 and is used
at a specified address is compared with
to activate a piezo-buzzer (PZ1) via tranthe next two keyboard entries in two 4-bit
sistor T1 (BC547). The continuous tone of
comparators that are cascaded together.
PZ1 indicates that a key is pressed. The
The resultant outputs of these two
key-pressed signal is also used to store
comparators are connected to the next
data in the latches.
comparator stage, in which the last
The output from pin 12 is connected to
keyboard digit (i.e. sixth Hex digit) is
pin 13 of IC5 (CD4017 counter) for clockcompared with the system code selected
ing at its trailing edge. On each clocking,
by DIP switch.
counter IC5 advances by one count and
thereby stores
data in separate
data latches one
after the other.
IC1 also holds
the last number
at its output
pins.
Data latches. There are
six data latches
formed from
three CD4508
ICs (IC2 through
Fig. 1: Block diagram of the access-control system
42
IC4). Each CD4508 contains two completely independent 4-bit data latches having a
common power supply. The 6-digit code is
stored in these latches.
The 4-bit data bus originating from
the output of IC1 is connected to data
Parts List
Semiconductors:
IC1
- 74C922 16-key encoder
IC2-IC4
- CD4508 dual 4-bit latch
IC5
- CD4017 decade counter
IC6
- 27C32 EPROM
IC7-IC9
- CD4063 4-bit magnitude
comparator
IC10
- CD4528 dual retriggerable
monostable
IC11
- NE555 timer
IC12
- CD4069 Hex inverter
T1-T4
T5
T6
- 2P4M SCR
D1, D2, D4 - 1N4148 switching diode
D3
LED1-LED3 - Red LED
LED4
- Green LED
Resistors (-watt 5% carbon, unless stated
otherwise)
R1, R3, R4,
R15,
- 10-kilo-ohm
R2, R5, R8,
R21, R22 - 4.7-kilo-ohm
R6
- 18-kilo-ohm
R7
- 10-mega-ohm
R9
- 2.2-mega-ohm
R10, R11,
R17-R20 - 1-kilo-ohm
R12-R14 - 470-ohm
R16
- 47-kilo-ohm
R23
- 47-ohm
Capacitors:
C1, C7, C8,
C12
- 0.1F ceramic disc
C2
C3, C5, C6,
C9, C10
C4, C13
C11
Miscellaneous:
S1
- Push-to-on switch
S2
- Push-to-off switch

- 4x4 keyboard matrix
PZ1
- Continuous tone-type piezobuzzer
RL1
- 9V, 200-ohm, 1 C/O relay
S3
- 4-way DIP switch

- Regulated 5V power supply
etc
Fig. 2: Schematic diagram of access-control system
43
Fig. 3: Actual-size, single-sided PCB layout for access-control system
input pins of all the six latches in parallel.

For example, pin 17 (QA) of IC1 is connected to the corresponding pins 4 and 16
of all the latches as the LSB of 4-bit binary
output from IC1. Initially, pin 3 of IC5
provides a high output to clear and store
pins 1 and 2 of IC2A, thereby clearing its
4-bit register.
When a key is pressed, the equivalent
binary code is present at data input pins
of all the latches. On releasing the key,
pin 12 of IC1 changes its state from high
to low, thereby generating the required
clock pulse for IC5. This clocking makes
pins 3 and 2 of IC5 low and high, respectively, causing the binary data corresponding to the first Hex digit keyboard entry
44
to be stored and available at the output

of IC2A.
Similarly, when the second key is
pressed, new data is stored in IC2B without affecting the previously stored data in
IC2A. The outputs from first three data
latches are connected to address pins of
EPROM 27C32 (IC6). The outputs from
fourth and fifth data latches are connected
to two 4-bit magnitude comparators IC7
and IC8 (CD4063), and the output from
sixth data latch is connected to a similar
4-bit magnitude comparator IC9 for further processing.
The memory. All 8-bit codes, except
the 4-bit system code, are stored at different locations (addresses) in the EPROM
(IC6). Out of the six Hex digits, first five

digits are used as personalised code, and
out of these five digits, the first three are
used to form an address for EPROM.
The leftmost digit of the code is the
MSD (most significant digit) and the third
digit from left is the LSD (least significant digit) of the 12-bit wide address for
IC6. The fourth and fifth digits from left
are to be the same as the data stored in
IC6 (beforehand) at that particular address. Thus, when a code is entered via
the keyboard, the fourth and fifth digits
are compared with the data stored at the
address formed by the first three digits.
(The EPROM can be programmed with
the help of Manual EPROM Programmer,
and may be replaced by an EEPROM for
better reliability.)
Code comparator. There are three
4-bit comparators (IC7 through IC9)
used in the circuit, which are cascaded
together to form a 12-bit comparator.
Comparators IC7 and IC8 compare the
8-bit data output of EPROM with the corresponding fourth and fifth digits entered
via the keyboard and stored in latches
IC3B and IC4A.
While IC7 compares the upper 4-bit
output of IC6 with the contents of IC3B
(i.e. the fourth digit from left), IC8 compares the lower 4-bit output of IC6 with
the contents of IC4A (i.e. the fifth digit
from left). Similarly, IC9 compares the
last digit (i.e. the contents of IC4B) with
the code entered/formed by 4-way DIP
switch S3 (marked A through D), which is
referred to here as the system code. This
system code digit can be changed from
time to time.
The result of the comparison by the
three comparators is finally available from
IC9. If the entered code matches with the
stored data, pin 6 of IC9 goes high, indicating a correct code. Otherwise, either of
pins 5 and 7 goes high depending upon the
magnitude of the data. Pins 5 and 7 are
connected together via diodes D1 and D2
and used as the trigger for alarm circuit.
The outputs from IC9 are available only
after entering the last digit.
Alarm generator. The alarm generator is built around a 555 timer (IC11).
The logic high output from pin 5 or pin 7
of IC9 triggers the SCR and applies Vcc
supply to IC 555 to make it oscillate. The
output from pin 3 of IC11 is used to drive
transistor T2 (BC547) to generate a longduration alarm tone from PZ1.
A common buzzer is used for key-press
audio indicator and alarm generator to
gering, pin 6 of IC10 becomes high and

remains in that state for a predetermined time period. The output at pin 6
of IC10 drives transistor T5 (SL100) to
operate relay RL1. When the system is
locked, red LED1 glows, and when it is
unlocked, green LED4 glows.
The other half of IC10 is used to keep
the keyboard activated for a predetermined time. The keyboard is activated
by pressing switch S1. This feature improves the security of the system.
Construction
Data input/output pins are to be connected with utmost care because improper connection will force the system
to work unpredictably. Also, care should
be taken while using IC1, as it is quite
costly. The points marked Vcc should be
connected to the power supply directly.
The system can be built on a generalpurpose PCB or a veroboard. A singlesided PCB layout for the circuit is, however, shown in Fig. 3, with its component
layout shown in Fig. 4.
Operation
keep the cost low. The output from pin 3

of timer also drives LED2, which flashes
at the output frequency of the astable
oscillator.
MMV and lock driver. When a valid

code is entered, pin 6 of IC9 becomes high
and triggers monostable multivibrator
CD4528 (IC10) via transistor T3. On trig-
Initially, when IC1 is disabled by IC10,

no code can be entered. To activate the
keyboard, press switch S1 momentarily. This will activate the keyboard for
a predetermined time. The code should
be entered within this time. Using the
4-way DIP switch S3, the system code
can be changed at any time for extra
security.
If wrong code is entered, the buzzer
sounds alarm and the red LED starts
flashing. In this case, you can reset the
circuit by a momentary depression of
switch S2. It is to be noted that no display unit is used, to keep the code secret.
But if you still prefer to have one, the
same could be included.
Readers comments:
Q1. The construction project is very interesting and useful. However, how memory
dump is to be programmed in EPROM
IC6 is not given. Though different people
would like to program different codes, at
least one example should have been given
to illustrate this.
Praveen Shanker, Haridwar

A1. EFY: Though programming of
EPROM is well explained by the author,
here is an example of coding. Let us say
address of the EPROM where a specific
code is stored is 41A (Hex). It is equivatent to 0100 0001 1010, which is used as
address All through AO of the EPROM.
Now assume data stored is B5 (Hex), i.e.

1110 0101 at the above mentioned addresses. Let the system code be E (Hex),
i.e. 1010. For getting this system code
close DIP switches B, C, D, and leave A
open (in S3).Thus access code=41A B5E
(Hex) or MSB.......................LSB 0100
0001 1010 1011 0101 1110 (Binary).
45
Telephone Line-Interfaced
Generic Switching system
ajay subramanian and nayantara bhatnagar
uite a few projects using DTMFto-BCD decoder ASIC MT 8870/

KT 3170 have appeared in EFY
during the past few years. The project
presented here also uses the same ASIC,
but it is used here as part of a circuit in
which a fairly advanced switching logic
with adequate foolproofing and authentication is implemented. The major features
of this circuit are:
Programmable password protection
over a public network
Foolproof mechanisms for events
such as time-out delays, incorrect password, and power-on initialisation
Expandable design
The primary objective of this circuit is
to make a fairly low-cost device for controlling up to a hundred household switches
remotely over any public/private telephone
network.
Description
The block diagram of the system is shown
in Fig. 1. It consists of the following three
units:
1. The interface and control unit
2. The authentication unit
3. The main device selection and
switching circuit
The interface and control unit provides
control signals and BCD data to the other
two units. It handles interfacing with
the telephone line and also generates

control signals for hanging up (HUP) and
a universal reset pulse, which is used by
the authentication circuit for its operation. Its design may be altered to achieve
connectivity to another network, which is
capable of providing certain control and
data signal sequences.
The authentication unit stores four
presettable digits of code data and
compares the same against the 4-digit
DTMF code sent via the telephone lines
before the time-out occurs. If the 4-digit
code is found valid, the authentication
unit issues an authorisation signal to
the main device selection and switching
unit. However if an incorrect password
is entered, the device terminates the
call by returning to the off-hook condition.
The fifth DTMF digit determines the
address of the group to be selected, while
the sixth digit determines the device
number that is to be selected within that
group. The selected device can be switched
on or switched off by a momentary depression of the telephone keypad switches
marked * (code1011 binary) and # (code
1100 binary), respectively. Thus you can
select any one of the hundred devices,
divided into ten groups, to be switched on/
off, as desiredone at a time.
The interface and control unit
(Fig. 2). This unit performs the following
Fig. 1: Block diagram of telephone line-interfaced generic switching system
46
functions:
Detects an incoming call. Counts
up to a programmable number of rings
and then simulates handset off-cradle
condition.
Once off-hook, it must decode DTMF
signals on the telephone line within a
fixed time and generate appropriate BCD
data and StD pulse for indicating a valid
data condition. The positive edge of this
StD pulse is used for subsequent operations.
Generates a universal Reset signal
that includes a time-out and a power-onreset. This Reset signal is an active low
pulse of programmable duration.
Generates a hang-up (HUP) signal
on expiry of the time-out and uses this
signal internally to take the device offline.
When a call arrives, a 75-80V AC ring
signal is available on the lines. This ring
signal is coupled to optocoupler Opto-1
(MCT2E) via DC blocking capacitor C1
and current-limiting resistor R1. LED1
serves as a ring indicator and as an antiparallel diode to the in-built LED of the
optocoupler for working with AC ring
signal. The output of optocoupler triggers
timer IC1, which is configured as a monostable retriggerable flip-flop to provide a
pulse output to be used as a clock for decade counter IC2 (CD4017) with decoded
outputs.
Fig. 2: Circuit diagram of the interface and control unit
The pulse-width of monostable should

be slightly greater than 0.6 second to
ensure that the pulse does not terminate
during the 0.2-second pause between a
pair of ring signals of 0.4-second duration.
Thus the monostable produces one pulse
for each ring (in fact, a pair), which clocks
CD4017 counter.
IC2 will freeze after counting a
pre-programmed number of rings. This
number is determined by its output pin
which is tied to its pin 13. In Fig. 2 pin
9 (O8 output) is shorted to pin 13. Thus
count of IC2 is frozen at the beginning of
the eighth ring.
The first pulse from IC1 also triggers
the first stage of monostable multivibrator 74123 (IC5), which causes the Reset
output to go high. As a result, CD4017
(IC2) is enabled (which was otherwise
reset, when no ring signal was present).
Also, the authentication circuit is enabled to receive BCD data and control signals, as and when generated by MT8870
(IC4).
If the preset count is reached and
the call has not been answered yet (local

telephone handset still on cradle), the
counter (IC2) is frozen and D flip-flop
(IC3A) is set. This activates relay RL1
that places a 220-ohm load across the
lines to simulate handset off-cradle condition and also enables MT8870 (IC4)
by applying a low at its inhibit (active
high) pin 5. This causes the ring signal,
in turn, to be taken off the telephone
lines (by telephone exchange) and establish a connection (analogous to the
maturity of a call). The circuit is now
ready to receive signals from the remoteend telephone.
In case the call is answered from the
local telephone before the preset count of
IC2 is reached, the ring ceases as the local
telephone is in off-hook condition. Since
there is no other way of re-triggering IC5,
a time-out eventually occurs and the device reinitialises all units automatically.
The device is also protected against activation by dialing from a parallel phone
instrument, since the ring signal is necessary to power up the ASIC MT8870 (after
a pre-programmed number of rings).

MT8870 (IC4) generates an StD pulse
whenever fresh data is latched onto its
outputs. This signal is used as a data
valid gate wherever appropriate. Also,
when a key is pressed, an ESt (Early
steering) pulse is generated at its pin 16,
which lasts till the key is pressed. This
ESt pulse is used for clocking IC12B in
the authentication and control unit and
retriggering monostable multivibrator
74123 (IC5), extending the duration of
Reset pulse. This ensures that the circuit
will operate as long as the user presses
keys within preset time intervals, or else
a time-out is decreed and the device is
reset.
The resetting process includes hangup (HUP) state, clearing the authentication circuit status, and consequently
deactivating the main switching circuit,
thus restoring the device to its initial
state. (The flip-flops, which control devices in the main device selection and
switching unit, are allowed to retain
their states.)
47
Fig. 3: The authentication unit circuit diagram
The power-on-reset
circuit comprises resistor
R5 and capacitor C10. It
resets the device when
power to the circuit is
switched on. Since it is low
for some time after power
is switched on, it resets the
flip-flop (IC3A) and decade
counter CD4017 (IC2). Fig.
4 shows the relative timing waveforms pertaining
to this unit.
LED2 through LED5
are used to show the BCD
output for the DTMF code
received over the telephone
lines (decoded after relay
RL1 has energised).
The authentication
unit (Fig. 3). This circuit
receives BCD data and
StD control signal initially.
It outputs authorisation
(Auth) signal only when
the correct security code
has been entered. Control
pulses can reach the main
switching unit only when
this signal is low (implying
that authentication of the
four digit code sent over the
telephone lines has been
verified).
Note that when a
wrong code is received,
IC9A clocks IC9B and a
low is latched by IC9B. As
a result the Q2 output of
IC9B goes high and saturates transistor T2 in the
interface and control unit
and thereby shunts capacitor C10 to ground, thus
simulating a power-on-reset
condition. As a consequence
CLR signal (at output of
IC6A) is activated and
the line interface circuit is
initialised. Also, since the
monoshot IC5 is cleared,
Reset goes low (active) and
resets the authentication
unit also. When the Authentication unit is initialised, IC9A and
9B are set, which causes Q2 output of IC9
to be reset, and thus transistor T2 is cut off
again. Capacitor C10 now charges through
resistor R5 as it did when the circuit was
initially switched on.
The Reset signal is initially low. As
If the time-out period expires, the

Reset pulse falls and the falling edge
is used to trigger the second stage of
monostable multivibrator 74123 (IC5).
The complemented output 2Q of the
second stage of IC5 is a HUP (hang-up)
signal that clears relay driver flip-flop
74LS74 (IC3A), thus causing the device
48
to hang up, and inhibit IC4. It resets

CD4017 (IC2) counter that counts the
number of rings. Also, as a Reset pulse
goes low, it resets the authorisation
circuit.
The additional circuitry around the
input of IC4 protects inbuilt op-amp input
terminals within the chip.
Fig. 4: Signal waveforms of the interface and control unit
Fig. 5: Method of programming code using

DIP switches
a result, this circuit is in its initialised

state, wherein IC13 (CD4017) is reset and
ICs 9A and 9B (7474) are set (i.e. their Q
outputs are high and Q outputs are low).
Also, IC12A has its CLR pin low and it
is in reset state with its Q pin low. As
stated earlier, the Auth signal is initially
high.
The password consisting of four 4-bit
words is applied at the input pins D0-0
through D0-3 to D3-0 through D3-3 of
74LS244 ICs 15 and 14 respectively as
shown in Fig. 3. These words may be
programmed using thumbwheel switches
or arrays of DIP switches with pull-down
resistors as shown in Fig. 5.
As soon as the device establishes
a call (i.e. relay RL1 energises after a
preprogrammed number of rings), the
authentication unit (and not the main
device selection and control unit) is activated due to a high Reset pulse that is
generated as soon as the ring arrives and
also on every pressing of a key due to (ESt)
signal from IC4 via OR gate (IC7A), which
triggers IC5.
Now the caller is expected to enter
the 4-digit password sequence from the
remote telephone set in DTMF mode.
Initially, only the first word (nibble) of
the array of tri-state buffer drivers (ICs
74LS244) is enabled by O0 output of IC13
(CD4017). As a result, the first 4-bit
programmed word is applied to the P
inputs of 4-bit comparator IC 74LS85

(IC8). LED7 through LED10 indicate the
preset data present at P inputs of the
comparator. The other 4-bit Q inputs
for comparison are obtained from the
BCD output decoded by IC4 upon pressing a DTMF telephone key at the remote
end. This comparator result is available
at pin 6 of IC8 before the arrival of StD
pulse.
On the arrival of StD pulse, the output
of the comparator is latched into D flipflop (IC9A). Initially, both flip-flops (IC9A
and 9B) are set, as explained earlier. So
the CLK input of the second flip-flop
(IC9B) is low.
If at any instant, a low is latched into
the first flip-flop IC9A (as a result of a
failed match between the preset code and
the code entered via the remote telephone
set), the second flip-flop (IC9B) is clocked,
and it latches a low at its Q output. This
resets decade counter IC13 via inverter
IC11F. The Q2 output of IC9B is normally low. But when a wrong password is
entered, this output goes high. As a result,
transistor T2 (2N2222) of the interface
and control unit, grounds the power-onreset capacitor C10, as stated earlier.
Thus the unauthorized call is terminated
when the CLR signal (from the output of
IC6A) is activated. As a result, IC2 and
IC3A are reset (asynchronously) and the
off cradle simulation circuit is deactivated.
Also since the Reset signal is low, all other
units are initialised. This feature ensures
that a denial-of-service attack (wherein
unauthorised agents engage the system
and thus prevent authorised users from
using it) is discouraged.
However, if correct codes are entered,
each time when a StD pulse arrives, it
clocks CD4017 (IC13) counter so that
the next word is applied at the input of
the comparator. The result of the current
comparison (high) is latched into the first
D flip-flop (IC9A).
When the user presses all four keys
in the correct sequence, the first flip-flop
always latches a high and the second
flip-flop is never clocked. At the end of
the sequence, when the last digit is com-
pared and the result is latched, O4 output of CD4017 (IC13) goes high, and as
a result, IC12A is clocked and latches
a high at its Q output and the input to
inverter gate IC11E and D2 pin of flipflop IC12B goes high. Simultaneously, signal at the output of gate IC11E goes low.
This low signal at pin 12 of IC10D AND
gate disables the gate from accepting any
further StD pulses. So the authentication
unit is bypassed and subsequent BCD
data and StD pulses are transmitted to
the main switching unit. The ESt pulse
associated with fifth BCD data, latches
the high signal at D2 input of IC12 to
its Q2 output, while its Q2 output (Auth)
goes low to activate the main device selection and switching unit at the start of
fifth code.
When the Reset signal goes high,
the output of inverter gate IC11F goes
low. This enables IC13 (CD4017) again
by taking its MR pin low. At the same
time, the high Preset signal at both the
flip-flops (IC9A and IC9B) keeps them
enabled.
When the code is not entered within
preset period, the Reset signal goes low
on expiry of the time-out period, the
circuit again goes back to its initial state
by taking the preset pin on the flip-flops
(IC9A and 9B) low and MR pin of CD4017
(IC13) high. Simultaneously, IC12A is
cleared (its Q output goes low). As a
result, Auth output goes high and the
main device selection and switching
circuit is initialised and deactivated.
Since the initialised state is maintained
as long as the Reset signal is low, any
possibility of noise triggering is eliminated.
Main device selection and switching unit (Fig. 6). This circuit receives
StD control signal after a successful authentication of the four-digit code by the
authentication unit. The AUTH and its
inverse AUTH signals available on code
authentication are used in this circuit for
enabling various chips such as IC23 and
IC24 (74LS195), IC25 (CD4017), IC27
through IC29 (74LS154), and StD gate
IC19C (7408).
A combinational logic circuit, comprising three 3-input NOR gates inside 7427
(IC16) and two inverter gates (IC17B and
17C) of 7404, has been used to discriminate between an address (numeric digit)
and a switching signal (* for on and #
for off). DTMF digit switches 1 through 9
and 0 (0 on the telephone keypad stands
for decimal 10 and the decoded output
49
from MT8870 is the equivalent binary

number 1010) generate a logic-1, R_EN
(register enable) signal, while keys
marked * and # generate a logic-1,
S_EN (switching enable) signal. Thus
this combinational logic differentiates
between register enable (R_EN) and
device switching enable (S_EN) signals.
The R_EN and S_EN outputs for various
key depressions of the telephone keypad
are shown in Truth Table.
The combinational logic circuit is followed by the RCLK and SCLK generation
circuitry comprising ICs 18, 19, 25, and
26, which allows the following functions
to be performed:
After AUTH signal at Q (pin 8 of
IC12B in Fig. 3) goes low (active), one
can select a group and a device within the
selected group by next two DTMF switch
depressions on the telephone keypad,
while a third key depression of * or #
results into switching on or off of the
desired device.
Multiple devices can be switched on/
off one after the other, once authorisation
signal AUTH becomes active (low) without
a system reset.
The system can be reset after or
before switching on/off of the desired
device with the help of remote telephone
keypad. This feature can also be used for
avoiding switching on/off of a device if
the user perceives that he has selected a
wrong device.
When R_EN signal is logic 1, IC25
(CD4017) is clocked at the leading edge
of StD pulse, while one of the 74LS195
registers (IC23 or IC24, as enabled by
one of the Q outputs of IC25) is latched
at the trailing edge of the delayed Std
pulse (RCLK) as indicated by the direction of arrow on RCLK pulse in Fig.
6. The resistor-capacitor combinations
R26-C11 and R25-C12 wired around
Schmitt inverter gates A through D of
IC26 (7414) provide the necessary delay
for reliable latching of the data in IC23
and IC24. Resistors R27 and R28 across
capacitors C11 and C12, respectively,
serve as bleeders for discharging the
respective capacitors.
When S_EN signal is logic 1, clocking
of 7474 D flip-flops via active 74LS125
gates occurs corresponding to the leading
edge of Std (SCLK) pulses, while the trailing edge resets IC25 via capacitor C14, to
enable receiving of fresh group and device
selection data.
Group selection. When any of DTMF
numeric keys 1 through 9 and 0 on the
50
remote telephone keypad is depressed immediately after AUTH signal goes active
low, R_EN signal goes to logic 1 (while
S_EN is logic 0). As a result, Std pulse
passing through NAND gates IC18B and
IC18C clocks IC25 with its leading edge.
IC25 is in reset condition before code authentication due to high AUTH signal,
and its Q0 (pin 3) is high. On clocking,
shifting of high state from Q0 to Q1
(pin 2) enables AND gate IC19B, while
AND gate IC19 is still disabled. Thus the
trailing edge of RCLK passes through
IC19B to latch the MT8870-decoded data
corresponding to the mentioned numeric
key depression, which is available at the
input of group select register IC24, at its
output. This is the group select address.
The group select address is applied
to the address lines of 4-line-to-16-line
decoder IC29 (group selector). In the
normal telephone keypad, we use only
ten numeric keys (1 through 9 and 0)
and hence only ten outputs (Y1 through
Y10) are available from IC29. The other
six outputs Y0 and Y11 through Y15 are
not used. Thus we can select any of the
groups 1 through 10 via outputs marked
Y1 through Y10 of IC29.
The output corresponding to the address present at IC29s input pins goes
low (active). This low (active) output
selects/enables another IC 74LS154
representing the corresponding group.
(Please note that this is only a demo version circuit, wherein only two groups, out
of ten possible groups, can be accessed
using IC27 and IC28. Pin 19 of IC27 and
IC28 can be connected to any of the group
select pins Y1 through Y10 of IC29, as
desired. Once connected, the specific
group numbers will get allocated to IC27
and IC28.)
Device selection within the selected group. The next DTMF number
key depression (i.e. the sixth after
energisation of relay RL1 or the second
after the 4-digit authentication code)
causes shifting of high on pin 2 (Q1) of
IC25 to pin 4 (Q2) in synchronism with
the leading edge of StD pulse clocking
IC25. As a result, AND gate IC19A
is enabled while AND gate IC19B is
disabled.
The trailing edge of delayed StD
pulse (RCLK) causes the data corresponding to the mentioned numeric key
to be latched at the output of device
select register IC23. This device select
address is applied to address input pins
of all group ICs (IC27 and IC28, here) in
Parts list
Semiconductors:
IC1
- NE555 timer
IC2, IC13, IC25 - CD4017 decade counter
IC3, IC9, IC12,
IC21, IC22
- 7474 dual D flip-flops
IC4
- MT8870 DTMF decoder
IC5
- 74123 dual retriggerable
monostable multivibrator
IC6
- 7411 triple 3-input AND
gates
IC7
- 7432 quad OR gates
IC8
- 74LS85 4-bit magnitude
comparator
IC10, IC19
- 7408 quad 2-input AND
gates
IC11, IC17
- 7404 hex inverters
IC14, IC15
- 74LS244 octal buffers/line
drivers
IC16
- 7427 triple 3-input gates
IC18
- 7400 quad 2-input NAND
gates
IC20
- 74125 quad bus buffers
IC23, IC24
- 74195 4-bit parallel access
shift registers
IC26
- 7414 hex Schmitt inverters
IC27-IC29
- 74LS154 4-line to 16-line
decoders
Opto-1
- MCT2E opto-coupler
T1,T2
- 2N2222 npn transistor
D1,D2
D3, D4
ZD1, ZD2
- Zener diode 5.1V
LED1-LED10 - Red LEDs
Resistors (1/4W 5% carbon, unless specified
otherwise)
R1, R2, R5, R29 - 10-kilo-ohm
R3, R12, R30 - 100-kilo-ohm
R4
- 220-ohm
R6-R9
- 51-kilo-ohm
R10
- 39-kilo-ohm
R11
- 56-kilo-ohm
R13
- 330-kilo-ohm
R14-R18
- 1.2-kilo-ohm
R19
- 20-kilo-ohm
R20, R27, R28 - 1-mega-ohm
R21-R24,
R31-R34
- 470-ohm
R25,R26
- 1-kilo-ohm
R31-R34
- 4.7-kilo-ohm
Capacitors:
C1
- 0.47F, 160V polyester
C2,C4-C6
- 0.01F ceramic disc
C3, C9, C13
C7, C8, C14
- 0.1F ceramic disc
C10
C11, C12
Miscellaneous:
Xtal
- 3.57946MHz quartz crystal
RL1
- Relay 6V, 100-ohm, 1 C/O

- 5V, 1A regulated power
supply

- Berg stick/FRC connectors

- Ribbon cable etc.
parallel. However, since only one group

IC is in selected condition (as explained
earlier), the device control output corresponding to the device select address
present at the active group input is
pulled low. This active low output is used
Fig. 6: Main device selection and switching unit
51
Fig. 7: Actual-size, single-sided PCB for the circuits in Figs 2 and 3
Fig. 8: Actual-size, single-sided PCB for the circuit in Fig. 6
52
as the control signal for a corresponding

tri-state gate of 74LS125 (IC20).
We have shown only four gates, out
of possible 100, in this circuit. The output
pins of tri-state gates are connected to
the clock inputs of the corresponding D
flip-flops (only four out of possible 100 are
shown). The clock pins of IC21 and IC22
have been pulled high to avoid any noise
triggering when tri-state buffers are in
high-impedance state.
Switching the selected device.
Only one device corresponding to
the digit in the registersIC24 for
group address and IC23 for device
addressis enabled to be affected by
the signal (* or #) as the seventh (or
the third after authentication) code.
On pressing DTMF keypad switch *
or #, the selected device is switched
on or switched off depending on the
key pressed. D0 bit of the decoded
switching signals * and # is applied
to data pins of all 7474 flip-flops in
parallel. Only the data corresponding
to the selected device gets clocked via
the corresponding tri-state gate of
74LS125.
The Q2 output of IC25 is still high
when SCLK is generated and, as a result,
AND gate IC18D is enabled to allow application of SCLK to all 74LS125 gates
on depression of either * or # on the
remote keypad. Switching takes place at
the trailing edge of SCLK pulse, while the
trailing edge of SCLK pulse causes resetting of IC25, thereby creating conditions
that were unavailable just before the previous group selection. Subsequently, you
can select any other (or the same) group
and any other (or the same) device. You
can switch on or off the selected device by
following the same procedure.
Switching on or off refers to Q output
of the corresponding D flip-flop (7474)
going high or low, respectively. You may
suitably use the flip-flop outputs to energise a relay or fire a triac or control the
corresponding device/devices.
If you press any number key (1
through 9 or 0) instead of * or # key
on the DTMF keypad, IC25 will receive
a clock pulse via AND gates IC18B and
IC18C, and the high state will shift from
Q2 to Q3 (pin 7 of IC25). Since Q3 output
is coupled to the base of transistor T2 via
diode D4, it will result into a system reset.
A system reset implies that you have to
redial the local telephone number from
remote telephone. When relay RL1 again
energises, redial the four-digit authentica-
Fig. 9: Component layout for PCB-1
tion code, followed by group select, device

select, and switch on (*) or switch off (#)
codes, as explained earlier.
Thus, after dialing two digits identifying the group and the device within
that group, if we press a third numeric
digit instead of * or # on the remote
telephone keypad, a system reset can be
achieved remotely. This feature can also
be utilised to bypass switching operation
if the user realises that he has selected a
wrong group/device.
Operation summary. The entire operation can be summarised as below:
Using the remote telephone keypad,
dial the local number of the telephone to
which the circuit is connected.
If the local handset is lifted before
the programmed number of rings, a normal conversation can be ensured.
If the handset is not lifted before
the programmed number of rings, wait
for simulated off-hook status of the local
telephone handset (indicating energisation
of relay RL1).
Now dial the four digits of the
preset authentication code in a proper
sequence from the remote keypad within
the preset duration. A system reset
will occur in case the 4-digit code is not
dialed within the preset duration or
the code used is wrong, which causes
de-energisation of the relay and creates
conditions similar to on-hook state of
the local telephone handset. So you will
have to repeat all steps from the beginning.
If the 4-digit authentication code
matches the preset code, you can dial the
next two digits identifying the group and
the device within that group selected for
the purpose of switching on or off (or even
as a dummy operation for the purpose of
forcing a system reset).
Dialing * from the remote telephone keypad will result into switching
on of the selected device, while dialing
# will result into switching off of the
selected device. (Dialing any number, 1
through 9 or 0, causes a system reset.
Relay RL1 will be de-energised, and you
will have to restart from the initial step.)
You can proceed with the same procedure
to switch on/off the next selected device.
The procedure can be repeated for any
number of devices (one-at-a-time) without affecting the status of non-selected
devices.
Testing. It is recommended that the
circuit be built in stages, verifying proper
operation at each stage. The main switchELECTRONICS PROJECTS Vol. 22
53
ing circuit may be assembled conventionally, with logic operation tested
at various points.
The authentication
circuit is also selfcontained and may
be assembled and
debugged independently.
H o we v e r, ca re
must be taken while
assembling the interface and control unit.
The ASIC must be
assembled first and
tested for proper operation and output
levels, followed by rigging and testing of
monostable multivibrators in the 74123.
The ring pulse generator and decade

counter, CD4017, comes next. Finally,
interface connections between the various
circuits should be made after verifying
the proper functioning of each circuit in
isolation.
A single-sided PCB for the circuits
in Figs 2 and 3, is shown in Fig. 7, while
another single-sided PCB for the circuit in
Fig. 6 is shown in Fig. 8. The component
layouts for both the PCBs are given in
Figs 9 and 10, respectively. Suitable connectors are provided to enable isolation
and joining of individual circuits using
jumpers/connectors, for easy testing and
fault analysis during assembly.
Readers comments:
We have the following queries regarding
the project:
1. The interface and control section. In
IC2 (CD4017), where would be pins 3, 2,
4, 7, 10, 1, 5, 9, 6, 11, and 12 connected?
Also show the connections of available pin
11 (RST) in IC5 (74123).
2. The authentication section. Show
the connections of pins 1, 5, 6, 9, 10, 11,
and 12 in IC13 (CD4017).
3. The selection and switching unit.
(a) Pins 2 to 11 (Y1 to Y10) of IC27
(74LS154) and IC28 (74LS154) are
connected in parallel. Pins 2 and 11 of
IC27 are connected to pins 1 and 4 of
IC20 (74LS125), respectively, and pins
2 and 11 of IC28 are connected to pins
10 and 13 of IC20 (74LS125), respectively. Pins 2 to 11 (Y1 to Y10) of IC29
(74LS154) are connected to the normal telephone keypad. Are all these connections
correct?
(b) After entering IC16 (7427), four
data lines D0 through D3 go to IC23
(74LS195) and thereafter IC24 (74LS195)
and then go out as shown in the PCB
layout. Please explain which data goes in
IC16 and where does it output in IC24. Are
these connections related to PCB1?
Ranjit Singh
Amravati
EFY: 1. The interface and control section.

Only one of the ten outputs of IC2 decade
counter needs to be connected to its pin
13 [and pin 3 of IC3(A)] to freeze IC2
and create a condition simulating lifting
of handset after waiting for a few rings.
This is well explained in the article. The
maximum number of rings can be nine, to
avoid false ring condition on the line.
RST and Reset outputs are not going
to part II and have been used via IC6(A)
in part I itself. The flags just indicate the
label of these signals.
2. The authentication section. The
mentioned output pins of IC13, excluding
pin 10, are not used/connected. Pin 10 is
Q3 and is used as clock for IC12(A).
3. The selection and switching unit.
(a) The first four digits dialled from the
remote telephone keypad are used for
matching the authentication code. After
authentication, the fifth digit selects the
group. If the fifth digit is 1 then IC27
(group 1) will be selected, and if the fifth
digit is 0 (code 1010 or ten decimal) then
IC28 (group 10) will be selected. The sixth
dialled digit selects the device inside the
selected group. The seventh dialled digit
(* for on or # for off) of the selected
device or 0 through 9 for circuit reset can
be used as desired.
The output pins reflecting the device
number in the selected group are not

connected in parallel and only their
address (input) pins are connected in
parallel, which are controlled by deviceselect outputs from IC23. However, the
selection of a group is dependent on IC29,
which, in turn, is controlled by groupselect IC24.
Output connections Y1 and Y10 from
IC27 pertain to device Nos. 1 and 10,
respectively, of group 1, while connections Y1 and Y10 from IC28 pertain to
device Nos. 1 and 10, respectively, of
group 10. Each device is controlled via
74LS125 gate in conjunction with one
flip-flop from 7474 IC. In the circuit only
two groups (1 and 10), with two devices
(1 and 10) from each group, have been
shown instead of all the ten groups and
a hundred (ten per group) devices. You
should be able to correlate as to which
74LS125 (IC20) gate and 7474 section
(IC21 and IC22 pair) select which device
out of which group.
(b) Data lines D0 through D3 are coming from IC4 and go into pins labelled D0
through D3 of IC8, IC16, IC17, IC23, and
IC24, respectively. They are thus related
to PCB1.
The Auth signal is correctly connected to IC27, IC28, and IC29 in Fig. 7
and there is no ambiguity.
Truth Table for Device Selection and Switching

Keypad
Decoded data input
Switch and register
Key
from MT8870
enable outputs
No.
D3
D2
D1
D0
S_EN
R_EN
1
0
0
0
1
0
1
2
0
0
1
0
0
1
3
0
0
1
1
0
1
4
0
1
0
0
0
1
5
0
1
0
1
0
1
6
0
1
1
0
0
1
7
0
1
1
1
0
1
8
1
0
0
0
0
1
9
1
0
0
1
0
1
0(10)
1
0
1
0
0
1
* (11)
1
0
1
1
1
0
#(12)
1
1
0
0
1
0
54
Programmable
Melody Generator
Vyjesh m.v.
number of melody generator circuits based on chips like UM3481,

UM3482, UM34815A, UM66, etc
have appeared in EFY. All these UMC
chips contain preprogrammed masked
ROM and are not field-programmable as
such.
Here is the detailed design of a typical
melody generator circuit using different
types of memories, including EPROM,
RAM, and ROM (hard-wired).
As soon as the power is switched on
to UMXX series melody generators, a
tune is heard, which stops after a while.
When a switch on the melody generator is
pressed, the second tune is heard. If the
chip is capable of producing twelve tunes,
each successive depression of the switch
results in a new tune being played. After
the twelfth tune has been played, the next
depression of the switch causes the first
tune to repeat, and so on. The circuit presented here can be programmed exactly
the same way.
Basics of music
Generally, an electronic organ or piano
is played with both hands. Now imagine
playing a 32-key organ with a single
finger. In that case, only one key can
be pressed at a time and hence only one
note can be heard. Considering that the
time taken by the finger to move from one
key to another is very short, the required

notes can be played properly and hence
the tune can be heard. The notes can also
have breaks in between. This feature can
be explained by considering five notes
written in the following two ways:
1. Sa Re Ga Ma Pa
2. Sa---Re Ga---Ma Pa
In the first case the notes are continuous. In the second case there are breaks
(no sound), indicated by for a stipulated amount of time, in between Sa and Re
as well as Ga and Ma. Each of the circuits
explained in this project incorporates the
break (no sound) feature.
You should make sure that you have
access to a musician before attempting
any of the circuits. In addition, you would
need a computer and a frequency meter
or a digital multimeter. The computer is
required to test the tunes, i.e. to make
sure that the given notes match the tune
of a given song.
A brief on music from the software
article Generation of Indian Classical
Music on a Microprocessor by Prof. V.V.
Athani, published in April 94 issue of
EFY, is as follows:
Taking into account only one electronic organ (piano), the number of notes
in music are only sevenSa Re Ga Ma
Pa Dha Ni. But these basic notes are
divided into three octaves (refer Fig. 4),
where each octave also has notes called
half notes. So each octave has twelve

notes. On a piano keyboard, black keys
in between white keys produce the average frequency of adjacent keys. For
example, Sa has a frequency of 595
Hz and Re has a frequency of 668 Hz.
When a black key in between them is
pressed, a frequency of 631.5 Hz is produced. These black keys are called halfnote keys.
Here we have selected a total of 28
notes, including all notes from the middle
octave, eleven notes from upper octave,
and a few from the lower octave. All the
28 notes with their respective frequencies
are given in Table I.
Software and testing

of notes
Before moving to the software program,
let us see how the notes for a tune can
be obtained. Give your musician the
song for which you need notes. Write those
notes in terms of Sa Re Ga etc, making
sure that all the notes of the tune lie within the range of the 28 notes given in Table
I. No sound in between the notes, including its duration, as also the duration of
each particular note, should be taken into
account. For example, if in a tune the time
period of a note SA is 500 ms and that of
Re 1500 ms, the two notes can be written
as Sa Re Re Re. Similarly, no sound in
between can be written
as Sa Re-Re-Sa.
The notes so obtained have to be converted into data characters. This can be done
directly by using Table I;
for example, Sa-Re Re
Ga---Ma can be written
as C-E E G---H.
Execute the program
Fig. 1: Block diagram of EPROM-/RAM-based melody generator

55
(refer Appendix A for

the source code of the
program) and enter the
delay value (say, 300).
Now enter the first line
of the tune and press
Enter key. The tune can
be heard. This tune can
be repeated by pressing
R. If this tune needs to
be changed, or a new tune
is to be entered, press any
key. In this way all the
lines in a tune are tested
line by line. After testing
all the lines, enter all
the lines of the tune once
again and recheck the
tunes until you are satisfied. Press E to quit the
program. Now convert the
tunes (data characters) to
hexadecimal values using
Table I. These hexadecimal values are to be entered into EPROM/RAM
at consecutive locations to
get the tune.
Fig. 2: Main circuit of EPROM-/RAM-based melody generator
EPROM-/RAMbased melody
generator
56
Since most parts of the

circuits for EPROM- and
RAM-based melody generators are similar, the
main circuits for both
versions have been integrated in Fig. 2. Relevant
changes have been described appropriately.
The common block
diagram for EPROMand RAM-based melody
generators is shown in
Fig. 1. A low-frequency
oscillator followed by a
binary counter is used to
generate the addresses for
EPROM/RAM.
In the case of EPROM,
the preprogrammed data
output is directly coupled
to two 1-of-16 decoders
(one for upper nibble and
the other for lower nibble
of data).
However, in RAM
based-circuit, a keyboard
Fig. 3: Tone oscillator
Fig. 4: Piano keyboard
is deployed at the time of writing the

data at specified locations (addresses)
into the RAM. Thereafter the keyboard
is detached and data output pins are
connected to two 1-of-16 decoders, as in
EPROM-based circuit. Only 28 outputs
(out of 32 outputs) of the two decoders,
with each representing a unique note, are
used in conjunction with individual presets to control the oscillators frequency
and thus the resulting sound from the
loudspeaker
state (all outputs zero).

The binary outputs of
IC2 serve as the address for memory locations in the EPROM,
where the data for the
notes is stored. For the
EPROM version, the
pins of connector K2(F)
are to be kept shorted to
the corresponding pins
of connector K3(M). Suffixes F and M within
parentheses indicate
female and male connectors, respectively.
Data bits of the
lower nibble (D0
through D3) are connected from EPROM
to the address pins of
1-of-16 decoder IC4
(CD4514) and those of
the higher nibble (D4
through D7) to the address pins of another 1-of-16 decoder IC5
(CD4514).
The Hex value column in Table I
indicates that either the lower nibble
or the upper nibble, or both nibbles, of
stored hex data in memory will always
be zero. It means that at least one of the
two CD4514 (IC4 and IC5) will have

binary 0000 at its address input. The Q0
output of these ICs is not used for generating any note. The hex data 00 (i.e.
0000 0000) is, in fact, used for no sound.
Similarly, hex values 01 (0000 0001) and
10 (0001 0000) are used for Reset and
Stop-clock functions.
The remaining 14 outputs from each
of the two CD4514 (IC4 and IC5) are
used together for generating one of the
28 notes corresponding to the hex data
stored and the output from a specific
memory location. The Q2 to Q15 outputs
of IC4 and IC5 are connected via diodes
D101 (and preset VR101) through diode
D128 (and preset VR 128), respectively,
to the tone oscillator circuit built around
timer NE555 (IC101), as shown in Fig. 3.
(EFY lab note. The numbering of diodes
and other components of this circuit has
been done for convenience.)
IC101 is wired with presets to form
an oscillator. At any time, only one of
diodes D101 to D128, depending on the
current note selected via EPROMs addressed location, will be forward biased
and its corresponding preset will form
part of the oscillator circuit. Each preset
is adjusted to a value (refer Table I) to
obtain the frequency corresponding to
the selected note.
No sound (00 hex). Breaks are
EPROM-based circuit
In Fig. 2, NE555 timer (IC1) is wired in

astable mode, which provides clock pulses
for the 12-stage binary counter CD4040
(IC2). In the EPROM version, jumper J1 is used to
permanently short pin 3
of IC1 and pin 10 of IC2,
while there is no need
to operate push-to-on
switches S2 and S3 and
you can leave them open
(i.e. in off state).
An 8-bit, 4k EPROM
2732 is used for IC3.
Since its pin 21 is address
A11, switch S6 is to be
kept in position a to connect it to O11 output of
IC2. When clock pulses
Fig. 5: Flow
are fed to IC2, it starts
chart of doorbell
counting up from its reset
Fig. 6: Actual-size single-sided PCB-1 layout for circuit of Fig. 2

57
Fig. 7: Actual-size single-sided PCB-2 layout for circuit of Figs 3 and 11
58
necessary
in between
the notes
to make a
tune sound
perfect. The
break period,
termed as
no sound, is
obtained by
outputting
hex value
00 from the
EPROM.
During this
input to the
two 1-of-16
decoder ICs
(IC4 and
IC5), the Q0
outputs of
both decoder
ICs go high.
Since
Q0 outputs
are not connected to the
tone oscillator circuit
(or anywhere
else), no note
or sound is
Parts List
(Common to EPROM, RAM and ROM)
Semiconductors:
IC101
- NE555 timer
IC201
- 7805 +5V regulator
D101-D128
D201-D204
Resistors (-watt 5% carbon, unless otherwise stated)
R101
- 5-kilo-ohm
VR101-VR128 - Refer Table I
VR129
Capacitors:
C101
- 0.1F ceramic disc
C102
C103
C201
C202
Miscellaneous:
LS101
- 8-ohm, 4W loudspeaker
X201
- 230V AC primary to 0-6V,
500mA sec. transformer
(for EPROM and ROM)
Semiconductors:
IC1
- NE555 timer
IC2
- CD4040 counter
IC3
- (1) 2732 EPROM

- (2) 6116 RAM
IC4, IC5
- CD4514 1-of-16 decoder
IC6
- CD4011 quad NAND
gate
T1-T8
D1-D64
LED1-LED20 - Red LED
R1, R7
- 10-kilo-ohm
R2
- 22-kilo-ohm
R3, R8
- 470-ohm
R4
- 1-mega-ohm
R5, R9-R16
- 1-kilo-ohm
R6
- 2.2-kilo-ohm
R17, R18
- 100-ohm
R19
- 330-ohm
VR1
Capacitors:
C1
C2
- 0.1F ceramic disc
C3
C4
Miscellaneous:
S1
S2-S5
- Push-to-on switch
S6
- SPDT switch
J1, J2
- Jumper
K1-K5
- Connectors
produced for hex value 00, and there is

only time elapse. No sound code is used
as break between the notes.
Reset (01 hex). When the data output
of EPROM corresponds to 01 (hex), Q1
output of IC4 goes high. Since Q1 output
of IC4 is connected to MR (master reset)
pin 11 of counter IC2 via resistor-capacitor
network R2-C3, IC2 is reset when data 01
hex appears at the output of EPROM.
Stop-clock signal (10 hex). When
the data output of EPROM corresponds

to 10 (hex), Q1 output of IC5 goes high,
which after inversion
by NAND gate N1 is applied to pin 4 of IC1 via
normally-closed contacts
of push-to-off switch S1.
As a result, IC1 stops oscillating and producing
clock pulses. The active
high Q1 output of IC5
is therefore referred to
as stop-clock signal in
this circuit. Pushing
switch S1 at this stage
removes logic high input from NAND gate N1
and the clock oscillator
starts oscillating.
The flow chart for
a doorbell given in Fig.
5 shows the order in
which the data is entered/read. First, the
data pertaining to the Fig. 10: Flow
first tune is stored. Once chart for reall the notes (including adjustment
breaks/no
sound periods) for the
first tune
are stored,
a stop-clock
data (10 hex)
is stored at
the end of
tune-1 that
stops after
the first
tune. Now
on pressing
push-to-off
switch S1
momentarily, the clock
advances
to start the
second tune
(tune-2).
Thus each
tune is made
to end with
10 hex code
for stop signal. When
all tunes of
the doorbell
are exhausted, the last
stop-clock data is followed by a reset data
(01 hex), so that one goes to the start of
tune-1 (on reset), and the cycle repeats.
For instance, the hexadecimal value
of SA is 70H (refer Table I) or binary
0111 0000, which means that binary
data at the input of IC4 and IC5 is 0000
and 0111, respectively. As a result, only
Q7 output of IC5 goes high. This output
brings the associated preset resistor
tuned to the frequency of SA (595 Hz)
into the oscillator circuit. Simultaneously,
data 0000 at the input pins of IC4 causes
its Q0 pin to go high. But since Q0 is left
Fig. 11: Power supply
open, there is no
effect.
Similarly, when
binary data corresponding to note SA
(05 hex) is output
by the EPROM, Q5
of IC4 and Q0 of
IC5 go high. The Q5
output of IC4 brings
into circuit the corresponding preset
tuned to the frequency of SA (1190 Hz).
The Q0 output of IC5
has no effect, as Q0
is open. In this way
both the ICs (IC4 Fig. 12: Flow chart
and IC5) function in of car-reverse horn
accordance with data
at their inputs to produce the corresponding notes.
Power supply. The circuit shown in
Fig. 11 is used to obtain the regulated 5V
DC using IC 7805.
The actual-size, single-sided PCB
layouts for the circuits of Figs 2 and 3
(common for EPROM and RAM versions
of the melody generator) are shown in
Figs 6 (PCB-1) and 7 (PCB-2), respectively. The component layouts for PCBs of
Figs 6 and 7 are shown in Figs 8 and 9, respectively. The power supply circuit (Fig.
11) has also been integrated in PCB-2.
This circuit can be used as a doorbell, or even as a car-reverse horn. The
flow chart for car-reverse horn is shown
in Fig. 12. The necessary connections
are shown in Fig. 13. When the circuit
is used as a car-reverse horn, data flows
from the next address location to where
it stopped earlier.
Preset adjustment
Connections to join the two PCBs should
be made only after the adjustment of presets on PCB-2 using any of the following
three procedures:
Using frequency
meter. Assemble all the
components of PCB-2.
Connect a probe to the
Vcc using a crocodile
clip at the other end.
Switch on the 5V power
supply and connect the
output from the tone
oscillator on the PCB
to the frequency meter. Now connect the
probe to the anode
59
choose the main notes in the middle octave. Connect the probe to the
respective diode of SA and tell the
musician to adjust the variable resistor
to the frequency of SA. Now connect
the probe to the respective diode of RE
and adjust the variable resistor to the
frequency of RE, and so on. After adjusting main notes, adjust half notes.
Fig. 13: Wiring connections for car-reverse horn
(In Table I, music notes shown in small
letters are half notes.) This method will
of diode D101 and adjust preset resisbe successful only if the musician is well
tor VR101 for 446 Hz (refer Table I).
trained in music.
In this way all the variable resistors
Using digital multimeter. First,
are adjusted one by one by connecting
assemble only preset resistors VR101
+5V from the probe to the corresponding
through VR128. Now adjust the variable
diodes.
resistors to their respective values (shown
With the help of a musician. You
in column 6 of Table I) using a digital
can seek the help of a musician if you
multimeter. Use the variable resistors
dont have access to a frequency meter or
with maximum value as given in column
a digital multimeter. Connect the output
7 of Table I. You can also use the values
from the tone oscillator to the speaker
shown in the circuit diagram of Fig. 3, but
and switch on the power supply. First,
Table I
Music
note

Frequency
Data
Hex
of music
character
value
note
(Hz)
Variable
resistor
(preset)
number
Variable
resistor
in-circuit
value (ohm)
Maximum
value of
variable
resistor
Lower octave
Pa
dha
dha
ni
NI
446
1
472
2
500
3
530 a
561 b
20 vr101
30 vr102
40 vr103
50 vr104
60 vr105
8274
7740
7230
6744
6288
10k
10k
10k
10k
10k
595 c
70 vr106
630 d
80 vr107
668 e
90 vr108
707 f a0 vr109
749 g b0 vr110
794 h c0 vr111
841 i d0 vr112
891 j e0 vr113
944 k f0 vr114
1000 l
02 vr115
1062 m
03 vr116
1120 n
04 vr117
5850
5445
5055
4698
4356
4029
3726
3438
3165
2910
2655
2445
10k
10k
10k
5k
5k
5k
5k
5k
5k
5k
5k
5k
1190 o
1260 p
1335 q
1414 r
1498 s
1588 t
1682 u
1782 v
1888 w
2002 x
2122 y
2220
2016
1824
1644
1473
1308
1158
1014
876
747
624
5k
5k
2k
2k
2k
2k
2k
2k
1k
1k
1k
Middle octave
sa
re
re
ga
ga
ma
ma
pa
dha
dha
ni
ni
Upper octave
sa
re
re
ga
ga
ma
ma
pa
dha
dha
ni
no sound
Reset 01
stop-clock 10
60
adjusting the
variable resistors to lower
values in the
table may be
very tedious.
Any method
may be used to
adjust all the
variable resistors. But after
playing a tune,
it may be felt
that the tune
doesnt sound
proper, even if
it sounded right
with computer.
The reason can Fig. 14: LED indicator
be that the re- circuit
sistors were not
properly tuned or it may be due to
minute imperfections in output voltages
from IC4 and IC5. These imperfections
can be overcome by readjusting the resistors by the method given below.
The imperfections can only be adjusted when data from the EPROM is
heard. But, the notes of a tune will not
be in an increasing frequency sequence.
The sequence should be PA , dha , ----- to
----- DHA , ni . To do this, include at least
two sets of sequence data from Table I
with 2-3 bytes of gap in between successive sequences, after all the tunes, as
shown in the flowchart of Fig. 10. This
method of readjustment is used only to
prevent disconnection of PCB of Fig. 7
from PCB of Fig. 6 and tuning the resistors again and again.
Remove jumpers J1 and J2. Switch
on the power supply. Press switch S4
to provide clock pulses for IC2. Say, if
the EPROM contains 10 tunes, after the
tenth tune release S4. Now keep pressing
S2 momentarily until the first note of the
sequence (PA ) sounds. Now connect the
frequency meter at the speaker terminals
(disconnect speaker if necessary) and adjust VR101 if the value of the frequency
meter reading is not consistent with the
value in the Table I. Press S2 again to
adjust VR102, and so on. After the readjustment process insert jumpers J1 and
J2 and press S3 to reset IC2.
05 vr118
06 vr119
07 vr120
08 vr121
09 vr122
0a vr123
0b vr124
0c vr125
0d vr126
0e vr127
0f vr128
00
RAM-based circuit
The only difference between the EPROMand RAM-based circuits is the use of
RAM chip in place of EPROM and a key-
Fig. 15: Keyboard and probe for programming RAM
board for programming the RAM in

RAM-based circuits. Besides, an LED
panel is used for displaying the selected
RAM address.
Switch S2 is used to manually provide
clock pulses to IC2. Similarly, switch S3
is used to manually reset IC2 before and
after programming. Both switches (S2 and
S3) are integrated into Fig. 2. The connector K1 in between IC2 and IC3 is used
to connect to K5(M) connecter along
with the associated LEDs as shown in
Fig. 14. EPROM 2732 (IC3) is replaced
with an 8-bit, 2k SRAM (6116). Pin 21
of 6116 is WE (write enable active low).

Switch S6 is to be kept in position b while
working with RAM.
At the time of writing (programming)
data into the RAM, there is no connection
between connectors K2(F) and K3(M).
Also, jumper J1 is removed. To program
the RAM, K4(M) is to be mated with
K2(F). After programming is over, K2(F)
is connected to K3(M).
IC6 (CD4011) contains four NAND
gates, of which NAND gate N1 is used for
stop-clock signals. It functions in the same
manner as in an EPROM-based circuit.
The inputs of N1 are shorted and connected

to the ground via resistor R7. So the output
of N1 becomes high, which keeps IC1 oscillating.
After a stop-clock (active high) signal appears at the input of NAND gate
N1, its output goes low. When switch S1
is pressed, the output of N1 goes high
and IC1 starts oscillating again. Gates
N2 and N3 are used to provide read and
write logic for RAM. In read condition,
the output of N3 is at logic 0 because its
inputs are at logic 1. Pressing of switch
S5 provides write condition, since the
Appendix A
#include <stdio.h>
#include <dos.h>
#include <stdlib.h>
#include <conio.h>
#include <ctype.h>
void play(char *str,int d);
void main()
{
int f,d=200;
char ch1[180],ch2;
clrscr();
printf(\n Enter delay value:);
scanf(%d,&d);
while(1)
{
printf(\n enter tune :);
scanf(%s,&ch1);
play(ch1,d);
a:ch2=getch();
if (tolower(ch2)==r)
{ play(ch1,d);
goto a;
}
if (tolower(ch2)==e)
exit(0);
}
}
void play(char *str,int d)
{
int i=0;
while(str[i]!=\0')
{
switch(str[i])
{
case1':sound(446);
break;
case2':sound(472);
break;
case3':sound(500);
break;
caseA:sound(530);
break;
caseB:sound(561);
break;
caseC:sound(595);
break;
caseD:sound(630);
break;
caseE:sound(668);
break;
caseF:sound(707);
break;
caseG:sound(749);
break;
caseH:sound(794);
break;
caseI:sound(841);
break;
caseJ:sound(891);
break;
caseK:sound(944);
break;
caseL:sound(1000);
break;
caseM:sound(1062);
break;
caseN:sound(1120);
break;
caseO:sound(1190);
break;
caseP:sound(1260);
break;
caseQ:sound(1335);
break;
caseR:sound(1414);
break;
caseS:sound(1498);
break;
caseT:sound(1588);
break;
caseU:sound(1682);
break;
caseV:sound(1782);
break;
caseW:sound(1888);
break;
caseX:sound(2002);
break;
caseY:sound(2122);
break;
case-:nosound();
break;
}
delay(d);
i++;
}
nosound();
}
61
tor K4(M) should

be connected to
K2(F) during programming. The
circles shown with
the corresponding
hex values are
Fig. 16: Block diagram of ROM-based melody generator
simple metallic
contacts (or tabs)
that avoid the use of a large number of
output of gate N3 is at logic 1 and that of
switches. To enter the hex data, the probe
gate N2 at logic 0.
is touched to the corresponding metallic
LED connector. A separate male conneccontact tab.
tor K5(M) is fabricated with LEDs as shown in
The keyboard can be easily wired usFig. 14. This connector should be connected to
ing a general-purpose board. To test the
K1(F). The LEDs indicate addresses of memory
keyboard after wiring, connect point A to
locations of RAM. Glowing of LED1 through
the ground via a 100-ohm resistor (R18)
LED11 together means that last RAM locaas shown in Fig. 15. Now touch each and
tion is being addressed. (We are using a 2kB
every tab one by one using the metallic
RAM.)
probe and verify that the data shown by
Keyboard. The circuit diagram of keythe LEDs (LED13 through LED20) is
board is shown in Fig. 15. Male connec-
Fig. 17: Schematic diagram of ROM-based melody generator
62
consistent with the hex value shown on

the tab/circle. After checking, disconnect
resistor R18.
Connector K3 should be soldered to
the PCB by using a ribbon cable of adequate length, so that it could be easily
connected to K2(F) after programming.
The outputs from IC4 and IC5 go to
preset-array part of the tone oscillator.
Wiring is done similar to that in an
EPROM version.
Programming. Connect LED connector K5(M) to K1(F) and keyboard
connector K4(M) to K2(F). Press switch
S3 momentarily to reset IC2. No LED
glows on the LED connector, indicating
the initial address as zero. Now touch the
tab marked 00 with the probe. Press S5
momentarily and lift the probe. Glowing
of no LED on the keyboard indicates that
00 is entered in the initial memory loca-
tion. (It is good to enter 00 in the first

memory location.)
Now get the hex dump values of the
tunes. Press switch S2 to go to the next
memory location, indicated by LED1 (corresponding to address line A0), on the LED
connector strip. Touch the appropriate tab
with the probe to enter the corresponding
hexadecimal value at memory location 1.
Press switch S5 and lift the probe. The
data entered into memory location 1 is
shown by keyboard LEDs in binary form.
Hex data values (refer Table I) are
such that any of the four LEDs corresponding to either D0 through D3
bits or D4 through D7 bits would glow
to show the data entered. So it is easy
to identify whether the data entered is
correct or not. If necessary, make a table
of binary data along with corresponding
hex values.
After entering all the tunes, disconnect keyboard from K2(F) and connect
K3(M) to K2(F). Now connect external
jumper J1 as shown in the circuit diagram.
Switch S4 across jumper J1 terminals is not necessary but it may prove
useful if any readjustment of variable
resistors is needed (as in the case of
EPROM), or for checking each and every
tune one by one.
The programming steps are summarised as below:
1. Press switch S3.
2. Touch tab 00 with the probe.
3. Press and release switch S5.
4. Lift the probe.
5. Press S2 to go to the next memory
PARTS LIST
Semiconductors:
IC1
- NE555 timer
IC2, IC3 - CD4017 decade counter
IC4, IC5 - CD4069 hex inverters
T1-T10 - BC547 npn transistor
T11-T110 - BC558 pnp transistor
R1
- 10-kilo-ohm
R2
- 100-kilo-ohm
R3
- 680-ohm
R4
- 1-mega-ohm
R5
- 1-kilo-ohm
R6
- 68-ohm
Capacitors:
C1
C2, C3 - 0.01 ceramic disc
Miscellaneous:
S1
location.
6. Repeat from step 2 onwards for the
next hex value programming.
7. After last data is entered, press
S3.
8. Keep S4 pressed to check all the
tunes that have been entered.
9. Connect jumper J1 if all tunes are
entered.
The data table (Table I), writing of
musical notes, conversion of notes to hex
values, preset-array alignment, and flow
charts for door-bell and car-reverse tune
are also applicable for the RAM version.
Now we shall study a programmable
melody generator using home-brewed
ROM.
There were only a few differences between the circuits of RAM- and EPROMbased programmable melody generators
and as such we could integrate the common portion of the two circuits into a
single schematic/PCB design. However,
the circuit of a ROM-based programmable

melody generator is totally a new one.
The ROM, as stated earlier, is home-built
using discrete components, which can be
used for storage of 100 bits (100 notes).
The block diagram of the ROM-based
melody generator is shown in Fig. 16.
Note that the last block comprising
variable resistor array is identical to that
used in EPROM/RAM version (refer Fig. 3
in Part I of the article). The power-supply
circuit shown in Fig. 11 can also be used
for ROM-based melody generator. Thus
PCB and component layouts shown in Figs
7 and 9 can be used without any modification in this system.
ROM-based circuit
The circuit diagram of ROM-based melody generator is shown in Fig. 17. Here
timer NE 555 (IC1) is wired as an astable
63
Fig. 20: Flow chart

for repetitive playing
of 99 notes (single
tune)
clock and Reset

functions) from the
100-transistor array. Transistors T1
through T10 are
used to switch on
Vcc to transistors
T11 through T110.
Operation
Initially, when power

is switched on to the
circuit, IC2 and IC3 are
in Reset condition. So
only pin 3 (Q0) of IC2
and IC3 will be at high
logic. These high outputs
are applied to the base
of transistor T1 and the
input of inverter N1. As
a result, transistor T1
is switched on and +5V
Fig. 21:
Flow chart
Vcc is available at the
for repetitive
emitter of transistor T1.
playing of a
number of
This potential is extended
tunes
to the emitters of T11, T21, T31,, T91
multivibrator. The output pulses from

IC1 are used as clock for decade counter
CD4017 (IC2). The ten sequential outputs
from IC2 are applied to npn BC547 transistors T1 through T10.
Similarly, the outputs from another
similar decade counter IC3 are connected
to pnp BC558 transistors T11 through
T110 via inverter gates N1 through N10
of IC3 and IC4 (CD4069). Each of these
100 transistors (T11 through T110)
provides one bit for one note. The outputs are taken from the collectors of
transistors and connected to the variableresistor array and tone oscillator circuit.
(Note: Collectors of transistors representing identical notes are shorted together.)
As in the previous circuits of RAMand EPROM-based melody generators,
here also Stop-clock and Reset signals
are made available. You may program
any/all of the hundred transistors T11
64
through T110 for 28 notes as well as for

the Stop-clock and Reset functions.
However, both Stop-clock and Reset
functions are optional, depending upon
the number of tunes and number of notes.
For Stop-clock function, the output from a
transistor is applied to inverter N11 whose
output is connected to reset pin 4 of IC1.
Similarly, for Reset function, the output
from a transistor is applied to pins 15 of
IC3 and IC4.
The collectors of transistors programmed for each specific note (including
Stop-clock and Reset functions) are to be
strapped (shorted) together for connection
to the corresponding input points of the
variable-resistor array and tone oscillator circuit, while the Stop-clock and
Reset lines are to be connected as shown
in Fig. 17.
We can have a maximum of 30 output
lines (28 for the notes and two for Stop-
and T101. Simultaneously, the output of

inverter N1 will be at logic 0, which is
applied to the bases of pnp transistors
T11 through T20.
Since transistor T11 is the only transistor that
has both Vcc at its emitter and nearly 0V at its base
simultaneously, it gets forward biased and its collector is pulled toward its emitter voltage (Vcc). Thus
initially, on powering the circuit, transistor T11 is
activated and its collector goes high.
The initial state lasts for a few
seconds and as soon as IC1 generates a clock pulse
(which is applied to the clock pin of IC2), Q1 (pin
2) of IC2 goes high and pin 3 goes low, while no
change takes place in IC3. Now transistor T2 is
switched on.
Since the base of transistor T12 is at
low potential, the positive voltage will be
available at its collector. Thus transistors
T11 through T20 will be switched on and
off sequentially with the arrival of each new
clock pulse.
At the beginning of tenth pulse, the
carry-output pulse from pin 12 of IC2 is
applied to clock pin 14 of IC3. Now pin 3
(Q0) of IC2 and pin 2 (Q1) of IC3 go high.
Therefore, transistors T21 through T30 are
now switched on and off in a sequential
fashion. In this way one out of 100 transistors is switched on sequentially to produce
an output to drive the resistor-array tone
oscillator according to the tune data. Thus
when power is switched on, the tune is
produced.
PCB layout and assembly

The PCB design should ideally be doublesided for such types of transistor arrays.
However to keep the cost down, we have
included only a single-sided PCB layout,
which is shown in Fig. 18 with its component layout in Fig. 19.
First, assemble transistors T11
through T110. Solder the transistors,
leaving a length from the PCB. Now take
a thin, bare wire and connect the emitter
leads of transistors T11, T21... T91 and
T101 together from the components side.
Similarly connect emitters of other rows of
transistors. Suitable pads for the purpose
have been provided on the PCB.
Similarly the collectrors of transistors T1 through T10 may be connected
together using bare wire from the
components side. Now assemble all the
remaining components.
Programming
In this circuit, programming means hard

wiring. You should have a lot of patience
to do all the hard wiring. No hexadecimal
values are required. Before starting with
the wiring, label diodes D101 through

D128 of variable resistor array oscillator PCB (Fig. 7 and 9) in terms of
their respective notes i.e. label D101
as PA, D102 as dha, ..., D128 as NI ,
and so on.
Now starting from transistor T11
connect the transistor outputs (refer
PCB of Fig. 18) to diodes D101 through
D128 according to the tune note that
each transistor (T11 through T110)
sequentially represents. Extreme care
should be taken while wiring, because if
any error occurs, it will be very tedious
to find out.
Let us consider the example of five
notes SA REGA SA PA. In this case
programming can be done as under:
Connect
T11SAD6
T12RED8
T13NO connection, leave open (because the data is no sound)
T14GAD10
T15SAD6 (Again to D6)
T16PAD13
Reset. With this circuit a maximum
of 100 notes are feasible. However if all
notes are not utilised, Reset is necessary
after the last utilised note. Because if the
total number of notes is less than 98, for
example, 86, then after 86th note there are
14 more bits to reach for an automatic reset
to occur. (The circuit automatically resets
itself after 100th bit.) So there is a big delay
for the tune to get repeated. To skip the
delay, we use Reset. For this, the output

from the next transistor after the last note
is connected to point marked RESET on
PCB. When the pulse appears at pin 15 of
IC2 and IC3, the circuit resets.
Stop-clock. Stop-clock is used when
more than one tune is to be programmed.
If the clock is to be stopped, say, after the
1st tune, we use stop-clock. For this, the
output from the next transistor after the
last note of the tune is connected to the
stop-clock point in the PCB. Please refer to
flow charts of Fig. 20 and 21, which show
occurance of automatic reset and use of
stop-clock and reset functions.
Housing. There is a lot of wiring in
between the ROM circuit of Fig. 17 and
the resistor-array oscillator. So the enclosure must have enough space for all
the wires to fit properly without getting
detached from the PCB while installing.
[EFY note. To overcome this problem to
some extent, a 28-pin (16+12) SIP connector (with pins projecting towards both
sides of the PCB) may be used. This will
obviate the need to run loose wires between
ROM PCB and variable-resistor array
oscillator PCB. Wires originating from the
collectors of the transistor array may be
connected to one side of the connector on
ROM PCB itself and a ribbon cable with
28-pin SIP connector on both sides can be
used between the two PCBs.]
65
Auto Control for

3-phase Motors
d. dinesh
nduction motors widely used in workshops, irrigation pump sets, etc require a 3-phase supply. Normally,
these motors are connected to 3-phase supply from electricity boards using thermal
bimetal relays and relay contactors. Thermal relays protect the motor from overload. Relay coils having hold-on contacts
with push-to-on and push-to-off switches
are used for activating and deactivating
the relay contacts.
Single-phasing, line dropout, and
reverse phasing are harmful for 3-phase
motors. In the event of line dropout and
single-phasing, the motor draws a heavy
current from the existing phases, and during phase reversal the motor simply rotates
in reverse direction. Further, an operator
(attendant) for switching on/off the motor
is always not possible, especially when the
motor has to be operated round the clock.
Also the protection provided by the thermal
relay in the starter assembly is inadequate,
since it involves some delay in activation.
Thus some damage to the windings of the
motor can take place, especially if overload
conditions occur frequently.
The circuit presented here incorporates the following features to overcome
all the above-mentioned problems:
Electronic sensing of phase sequence
with under-frequency cut-out.
Current sensing for single-phasing
prevention.
Current sensing for overload
cut-out.
Automatic starting/tripping.
Programmable timer with battery
backup to count the motors run time.
Latching circuit to prevent the
motor from frequently starting and tripping.
Easy operation with just two switches for time set and reset.
The phase-sequence detector protects
the motor before starting, while the
current-sensing circuit protects it during
running. This double protection makes the
motor operation really safe.
Circuit description
The schematic circuit diagram of induction

motor controller is shown in Fig. 1.
3-Phase sequence checker. The voltage from each of the three phases is connected to optocouplers IC1 through IC3 via
rectifier diodes D1 through D3. The outputs from the optocouplers are half-wave
rectified DC pulses with a phase difference
of 120 (during the conduction period of
diodes), which are applied to a positiveedge-triggered, dual JK flip-flop IC4.
When the red phase rises, the output
of IC1 goes from low to high, resulting
in clearing of both flip-flops FF1 and FF2
through 0.1F capacitor C1. While the red
phase is still high, the yellow phase rises,
resulting in the output of IC2 going high
and providing a clock pulse to FF1. As a
result, Q output of FF1 goes low (since
J1 input of FF1 is already high when the
clock pulse arrives at CLK1 pin). Now,
when the blue phase rises, the output of
Table I
IC3 goes high, while the output of IC2 is
Phase sequence
Signal OK LED RL1
already high, resulting in the output Q of
Correct
On
On
FF2 going low.
Incorrect
Off
Off
The above process
Table II
repeats once durMotor
Core Core
Primary
Secondary
ing each 50Hz cyHP
size
area
Max SWG Turns
S W G
cle. If Q outputs
Turns
of both FF1 and
(Max)
amps
FF2 are low, the
6
17
0.25
10
14
14
38
170
phase sequence is
20
23
0.56
22
11
9
38
110
66
Parts List
Semiconductors:
IC1-IC3
- MCT2E optocoupler
IC4
- CD4027 J-K flip-flop
IC5, IC6
- NE555 timer
IC7, IC9, IC10 - CD4017 decade counter
IC8
- CD4060 14-stage counter
and oscillator
IC11
- 7805 5V regulator
D1-D30
ZD1, ZD2
- 3.3V zener diode
LED1-LED4
- Red LED
Resistors (1/4W 5% carbon, unless specified
otherwise)
R1-R3
- 100-kilo-ohm, 0.5 watt
R4-R6, R16,
R18-R23, R25,
R30, R31, R38,
R47, R49
- 4.7-kilo-ohm
R7, R24
- 27-kilo-ohm
R8-R10 R17,
R26, R29, R32,
R37, R39, R43,
R44, R46, R48,
R51-R53
- 10-kilo-ohm
R11, R28, R34 - 1-kilo-ohm
R12
- 220-kilo-ohm
R13, R41
- 1-mega-ohm
R14, R35, R36,
R45, R50
- 470-ohm
R15
- 470-ohm, 0.5 watt
R27
- 180-kilo-ohm
R33
- 2.2-kilo-ohm
R40
- 22-kilo-ohm
R42
- 82-kilo-ohm
VR1
VR2
Capacitors:
C1-C3, C6,
C13
- 0.1 ceramic disk
C4, C7, C11, C17 - 100F, 63V electrolytic
C5, C14-C16,
C18, C19
C8, C10, C12 - 47F, 25V electrolytic
C9
Miscellaneous:
X1-X3
- Current-sensing transformers
X4
- 0-230V AC primary to
12V-0-12V, 500mA secondary transformer
S1
- On/off switch
S2
- SPDT switch
S3
- 7-way rotary switch

- 1.5V X4 battery

- Starter assembly

- Cabinet
Fig. 1: Schematic diagram of auto control for 3-phase motor
correct and both diodes D28 and D29 are

in blocking mode. The base of transistor
T1 is pulled towards ground via resistor
R11 and transistor T1 starts conducting.
As a result, IC5 is triggered and hence

sequence OK LED connected to pin 3 of
IC5 via resistor R14, glows.
IC5 is a popular 555 timer wired as a
retriggerable monoshot. Its time period

is set at 25 milliseconds (approx.). If the
monoshot is not retriggered within 25
milliseconds, the sequence OK signal goes
67
low. The circuit operates smoothly at

frequencies up to 42 Hz.
If any of the phase fails, the phase
sequence is disturbed, resulting in the
output of IC5 going low and sequence OK
LED goes off. The LED status in relation
to the phase sequence is shown in Table I.
The output of IC5 is also used for driving
relay RL1 via transistor T2 (SL100).
Normally-open (N/O) contacts of relay
RL1 are wired in series with off switch of
starter assembly as shown in the Fig. 1.
Thus when phase sequence is correct and
the frequency is above 42 Hz, the relay
is in energised state and it is feasible to
switch on the starter by momentary
energisation of relay RL2, whose N/O
68
put of CD4017 (IC7) goes high, relay

RL2 energises through transistor T9
(SL100). N/O contacts of RL2 are connected across on switch of starter
assembly, as stated earlier and the
starters relay coil energises. The next
clock pulse to IC7 deactivates relay
RL2, but starter remains in on state
due to hold-on contact (the fourth contact of contactor in starter assembly).
When Q9 (pin 11) of IC7 goes high, its
CK pin 14 is muted due to conduction of
transistor T8 (which pulls it to ground)
to prevent further counting. The Q9
output of IC7 is also used in the motor
on/off timer circuit, explained later.
The supply to starter is connected
through primaries of three small current transformers used for sensing the
load in each phase. These transformers
can be constructed using common EI
laminations generally used for power
transformers. Core number 23 or 17
may be employed as per details given
in Table II.
The secondaries of these transformers are connected to the current-sensing
circuit wired around transistors T3
through T5. If any phase goes off, it
cuts off the corresponding transistor
and thereby provides forward bias to
transistor T6.
The outputs of transistors T3
through T5 are wired-OR via diodes
D15, D16, and D17. Any excessive increase in load current (overload) results
in forward biasing of transistor T7. The
excess current limit can be set with the
help of preset VR1.
The conduction of transistors T6
and/or T7 causes their common collector junctions to be pulled low. This
low signal is coupled to transistor T2 via
diode D30. As a result, relay RL1 deactivates to trip the starter and thus stop the
induction motor. The above conditions are
summarised in Table III.
contacts are wired in parallel with the

on switch of starter assembly.
Auto-starter and current-sensing
circuit. As soon as the phase sequence is
detected to be correct (as
Table III
explained in the previous
Truth Table of Current Sensing Circuit
section), the output of IC5
T7
RL1
goes high. This output, Phase R Phase Y Phase B T6
(ON)
(ON)
R.B. R.B. Energised
via resistor R15, is used to (ON)
(ON)
(OFF)
F.B. R.B. De-energised
reset IC7 and enable IC6, (ON)
(ON)
(OFF)
(OFF)
besides acting as a clock (OFF)
(OFF)
(ON)
for decade counter IC10.
(OFF)
(ON)
(OFF)
(OFF)
(ON)
IC6 is an NE555 timer (ON)
(ON)
(ON)
wired in astable mode to (OFF)
In case of overloading
provide clock pulses to decin any phase

X
F.B. De-energised
ade counter CD4017 (IC7).
Note:
R.B.
=
Reverse
bias;
F.B.
=
Forward
bias;
X = Dont care
Eventually, when Q8 out-
Motor on/off counter and latch.

Frequent start and stop operations subject
the motor to lot of fatigue due to heavy
currents, which may damage the motor. In
this circuit, automatic restarting of motor
is limited to three attempts for each power
on, by using another decade counter
CD4017 (IC10). It monitors each on-off
cycle of the motor by advancing the count
of decade counter by one on every start.
The clock for IC10 is obtained from
the output of IC5 via resistor R15. This
point i.e. the junction of resistor R15 and
diode D30 is also used as supply point for
transistors T6, T7, T12 and T13 as also
for reset pin of timer IC6. On the third
start, pin 7 (Q3) goes high and transistor T13 gets forward biased. As a result,
CK pin 14 of IC10 is pulled low to stop
any further clock to the decade counter,
which thus gets latched and LED3 glows
to indicate the latched state of the counter.
Simultaneously, this low signal causes
transistor T2 to cut off and de-energise
relay RL1. Thus the motor cannot restart
automatically and only complete resumption of power can reset the latch.
Motor on-off timer. A timer is provided to
run the motor for a predetermined time. It counts
run time of the motor and thereafter switches off
the motor automatically. The signal from pin 11
(Q9) of IC7 is connected to the base of transis-
tor T11 via resistor R38 (as referred

in auto-starter and current-sensing
circuit). Thus the collector of transistor
T11 goes low to activate the oscillator
circuit of CD4060 (IC8), while the motor
is running. Prior to that, the oscillator
circuit of CD4060 was inactive because
its pin 11 was at logic 1, being connected to +ve rails via resistors R39, R40 and
diode D22. The frequency of oscillation
is set by R-C network comprising 47F
capacitor C8 and resistor R42 in series
with preset VR2.
A timing of either 30 minutes or 60
minutes can be selected with the help
of switch S2 for the output of on/off
timer to go from low to high state.
The output from the pole of switch S2
is connected to the clock input of decade
counter IC9. The outputs of IC9 go high
sequentially after 30/60-minute time
intervals, depending on the selection
made via switch S2. Thus multiples
of 30-/60-minute basic timing can be
selected with the help of 7-way rotary
switch S3. (The 7-way rotary switch may
be substituted with decade thumb-wheel
switch, if desired.)
The output available at the pole of
rotary switch S3 goes high after the
selected duration to forward bias transistor T12, which, in turn, causes de-energisation of relay RL1. Also, when the
selected run time is over, the oscillator
of IC8 (CD4060) gets inhibited because
oscillator pin 11 of IC8 goes high due to
the feedback from the pole of switch S3
via resistor R43 and diode D23. LED1
glows to indicate that run time is over.
To restart the motor, IC8 and IC9 can
be manually reset by closing and then
opening switch S1. The timer may be
bypassed by keeping switch S1 closed.
The timer section requires very low
power in standby mode and is powered
by four 1.5V cells as standby supply. A
battery-low indicator is provided to warn
the user about the low battery condition.
Power supply. The normal DC power
supply for the circuit is provided by a
small step-down transformer X4 connected
between R (red) phase and neutral, followed by rectifier and filter capacitor. The
unregulated voltage is used for operation
of the relays, while the 5V regulated supply is used for the remaining circuit.
Construction and testing

An actual-size, single-sided PCB for the
69
Fig. 4: Layout of cabinet for mounting transformer relays and the PCB
motor controller circuit of Fig. 1 is shown

in Fig. 2, with its component layout shown
in Fig. 3. It is recommended to use bases
for ICs.
Before connecting the circuit to starter
assembly, a bench test is required for
the adjustment of timer. Apply 3-phase
power to the circuit. Observe pin 3 of IC5
(NE555), which should go high, provided
the sequence is correct. Else, interchange
any two phase wires. As sequence OK
signal at pin 3 of IC5 goes high, relay RL1
energises and IC6 (IC555) is activated. As
a result, relay RL2 energises after a delay
of 15 seconds for one second.
Readers comments:
Q1. Please clarify the following:
1. Which starter in the circuit starts
the motor?
2. Is the starter manually operated or
automatically?
Ramaswamy Iyer
Through e-mail
Q2. When a 3-phase motor is started, it
takes six times the rated current. So the
current sense circuit will trip the motor
during start-up. If we adjust the overload
current setting for starting current, this
will not trip the motor during normal
running current through the load. Is
there any initial bypass provided for overcurrent trip?
G. Saravana Mohan
Salem
Q3. The contactor-type starter can be used
for starting motors up to 10 HP. As I need
to control motors of 15 to 20 HP, please
clarify the following:
70
Now adjust preset VR2

such that 30-minute-duration pulse train (time
period 60 minutes) is
available at pin 14 of IC8
(CD4060). Flip switch S2
to 30-minute position. Select the required run time
using rotary switch S3. On
completion of the selected
run time, time over LED
should glow and the timer
should stop. Relay RL1 Fig. 5: Creation of virtual neutral from 3-phaes 3-wires
system
should de-energise.
all the wires to the starter point and the
After resetting the timer with the
load. Keep wiper contact of VR1 towards
help of switch S1, relay RL1 should
ground side and switch on the 3-phase
energise once again. Then after a delay
supply. Relay RL1 activates. After 5 secof 15 seconds, relay RL2 should again
onds, relay RL2 also activates and the moenergise for one second. Now short
tor starts running. Now slide the wiper of
momentarily pin 14 of counter CD4017
VR1 and mark the position just before the
(IC10) to ground thrice. On the third
motor trips. (Remember that such trips
touching, Q3 of IC10 will go high and
will be counted by latching counter.)
LED3 will glow, followed by de-energiCaution. Some parts of this circuit
sation of relay RL1. The mains should be
contain
live 3-phase voltages. So avoid
interrupted completely to reset IC10.
touching
the circuit with bare hands.
Current transformers X1 through X3,
Note. In the case of non-availability
step-down transformer X4, and relays
of neutral terminal, assembler a circuit as
RL1 and RL2 may be mounted side by
shown in Fig. 5. Connect N marked wire
side in a compact box as shown in Fig.
(shown in Fig. 1) to two more transformers
4. The PCB may be mounted over the
X5 and X6 that are identical to X4. The
transformers and relays using insulated
secondaries of these transformers (X5 and
spacers. Current transformers are to
X6) are kept open, while the secondary of
be connected before the starter relay
X4 is connected to the power-supply circuit
contacts.
as shown in Fig. 1.
Over-current adjustment can be done
only after connecting the load. Connect

1. Can I use star-delta starter (which
can reduce the starting current and can
be used for motors up to 25 HP) instead of
the contactor-type starter? If no, suggest a
proper alternative as the starting current of
up to 40A may affect other components.
2. Are there any current-reducing
circuits used to withstand the high starting current while using the contactor-type
assembly?
3. At the time of testing, what HP motor was used with contactor-type starter
assembly?
4. The 12V, 300-ohm, 1 C/O relays (RL1
and RL2) specified in the circuit are not
available. The available relays are 12V,
200-ohm, 1 C/O and 12V, 150-ohm, 1 C/O.
So which relay should I use? What is the
purpose of using VR2?
Ramaswamy Iyer
Through e-mail
Q4. I am facing the following problems in
the project:
1. In Table II, the turns ratio of current transformers (CTs) is 12 for both 6HP
and 20HP motors. If the ratio is same, the
secondary currents of CTs work out to be
different, i.e. 1.8A for 20HP motor and
0.8A for 6HP motor.
2. In the phase-sequence indicator circuit, you have connected an RC (1-megaohm-0.1F) combination to the reset pin of
IC5 (NE555). In such a case, can the reset
pin get a high input.
Abhijeet S. Bhosle
Through e-mail
EFY: A1. 1. The starter comprises a contactor, an on button (N/O), and an off
button (N/C). The contactor in Fig. 1 of
the project uses three main N/O contacts
connected to R, Y, and B phases and one
auxiliary N/O contact, which is wired
as shown in Fig. 1. The contactor coil is
rated at 415V AC. At EFY, we used ML1
contactor from L&T to make the starter
assembly.
2. You can manually operate the starter by making use of on and off buttons.
In automatic operation you dont have
to use these switches. The circuit does it
through relays RL1 and RL2 as per the
logic explained in the project.
The author, D. Dinesh replies:
A2. A heavy current flows through
the motor winding for a moment only. A
certain delay is provided by capacitors
C12 (47 F) and C17 (100 F) to account
for this.
A3. 1. One can use star-delta starter
for a higher HP motor, provided that

star-to-delta changeover is done either
on releasing the on pushbutton or after a
fixed time delay. A typical semi-automatic
star-delta starter made by L&T is Mark1
type bearing catalogue No. SS96255.
2. A delay is provided by capacitor C12
to bypass the power-on surge current.
3. The circuit was tested using 6HP
borewell pump.
4. If the specified relay is not available, one can also use 12V, 200-ohm,
1C/O relay.
A4. 1. Current transformers are used

to sense the load current and these draw
only a few milliamperes of current to bias
the transistor. The bigger core is used to
cater to the wire gauge. One can use a
smaller core to hold this gauge by maintaining the specified turn ratio.
2. Pulses at pin 14 of IC08 (CD4060)
should be adjusted to obtain 30-minute
delay by varying preset VR2. Pin 4 of IC5
is wired through RC network for delayed
reset at power-on (starting).
71
Telephone
Remote Control
JUNOMON ABRAHAM
elephone remote control implies

control of devices at a remote
location via a circuit interfaced to
the remote telephone line/device by dialing
specific DTMF (dual-tone multi-frequency)
digits from a local telephone. The telephone remote control system described
here has the following features:
1. It can control multiple channels/
relays.
2. It provides you feedback when the
current is in energized state and also
sends an acknowledgement indicating
action w.r.t. the switching on of each
requested relay and switching off of all
relays (together).
3. It can selectively switch on any
one or more relays one after the other and
switch off all relays simultaneously.
Operation
Instead of straightway proceeding with
the circuit description, we shall start
with the operation as this would help us
in understanding the circuit better. The

A2
L
L
L
L
H
H
H
H
Table I(a)
Input Output
A1
A0 Qn = addressed
L
L Q0
L
H Q1
H
L Q2
H
H Q3
L
L Q4
L
H Q5
H
L Q6
H
H Q7
Table I(B)
WR R
Q Q

addressed un-addressed
L
L
= DATA
hold
L
H
= DATA
L
H
L
hold
hold
H
H
L L
H = High; L = Low
72
operation is as
follows:
1. From the
local telephone,
dial the number
of the remote telephone to which
the circuit is connected. In a short
while you will
hear a musical
note indicating
that the circuit
connected to the
remote telephone
is active.
2. Now if you
want to switch
on a particular
relay/device, press
* button on the
telephone keypad
followed by any
one of digits 1
to 7 corresponding to the device/
relay number
that you desire to
switch on. The
switching on of
the relay will be
acknowledged/indicated by a musical note. Now
you may keep the
handset on the
cradle.
3. If you want
to switch off the
relays, press *
and them press
key for digit 8.
A musical note
is heard, which
indicated that all
the relays have
Fig. 1: Schematic diagram of the telephone remote control
Fig. 2: Actualsize, single-sided PCB for the circuit
been switched off. Keep the handset on

cradle.
The Circuit
At the remote telephone end, the ringing
signal is detected by a high-input-impedance op-amp CA3140E that is wired as a
comparator. Since the op-amp output is
open-controller type, the output pin has
been pulled Vcc via 10-kilo-ohm resistor
R21, IC2 (NE556) comprised two timers
(NE555 type) that have been configured
as monostables.
When a ring is detected by IC1, its

output triggers one of the timers in IC 556.
The output of the timer after inversion by
one of the NAND gates of IC3 (CD4011),
enabled IC4 (CD4060) by taking its reset
pin 12 low. (IC4 is an oscillator-cum-14bit binary counter.) As a result, IC4 starts
counting when the ring signal strikes the
input of the circuit.
After some time, decided by the setting of preset VR3, Q12 output of IC4
goes high. This output coupled to pin 8
of a NAND gate inside IC3 will enable it.
The detected ring signal (if the ring signal
PARTS LIST
Semiconductors:
IC1
- CA3140E op-amp
IC2
- NE556 dual timer
IC3
- CD4011 quad NAND gate
IC4
- CD406014-stage counter/
oscillator
IC5
- NE555 timer
IC6
- UM66 melody generator
IC7
- CM8870 DTMF-decoder
IC8
- CD4099 8-bit addressable
latch
IC9
- 7805 regulator +5V
T1
T2-T9
- BC547 npn transistor (only
T2 and T6 shown)
LED1, LED2 - Green LED
LED3
- Yellow LED
LED4
- Red LED
D1, D2
D3-D10
- 1N4007 rectifier diode (only
D3 and D4 shown)
Resistors (all 1/4-watt, 5% carbon, unless
otherwise stated)
R1, R16. R17 - 150-kilo-ohm
R2. R21
- 10-kilo-ohm
R3
- 33-kilo-ohm
R4
- 680-kilo-ohm
R5
- 560-ohm
R6, R10
- 22-kilo-ohm
R7
- 1-mega-ohm
R8, R15
- 390-ohm
R9, R12
- 15-kilo-ohm
R11
- 270-ohm
R13, R14
- 3.3k-kilo-ohm
R18
- 330-kilo-ohm
R19, R22-R27- 4.7-kilo-ohm (R22-R27 not
shown in the figure)
R20
- 220-ohm
VR1
VR2
- 1-mega-ohm preset
VR3
VR4
Capacitors:
C1
- 0.22uF ceramic disk
C2
- 220uF. 10V electrolytic
C3
C4, C5, C8
- 0.0luF ceramic disk
C6, C11, C12 - 0.1uF ceramic disk
C7
C9
- 0.02uF ceramic disk
CIO
- 0.47uF, 100V polyester
Miscellaneous:
X PAL
- 3.58MHz crystal
RL-RL7
- 9V, 150-ohm 1C/0 relay (only
RL4 shown)
is still persisting) applied to pin 9 of the

same NAND gate (after inversion by another NAND gate) will pass through it to
trigger the second monostable inside IC2
(NE556) as well as IC5 (NE555), which
is again wired as a monostable. This arrangement avoids the circuit of being
triggered by any transients or false ring
signals on the telephone line.
The output of the second monostable
of IC2, available at its pin 9, drives transistor T2 and shunts the telephone line
73
voltage drops to around 10 to 12 volts.

This is equivalent to the lifting of the telephone handset of the remote telephone.
As mentioned earlier, both IC5 and the
second monostable of IC2 are triggered
simultaneously. The output of monostable
IC5 starts melody generator IC6 (UM66)
and the musical note obtained from it is
coupled to the telephone line. This informs
the caller that the remote circuit is in
energized state.
As the remote circuit is in energized
condition, the next step for the operator
at local telephone is to press the * button,
which makes the local telephone to operate in the long-dialing mode. The digits
that are pressed after pressing the * button are converted to DTMF tones.
The tone is decoded by IC7 and its
three LSBs (covering binary equivalent of
decimal digits 0 through 7) are connected

to the address inputs, while the MSB line
is connected to reset pin 2 of IC8 (CD4099,
an 8-bit addressable latch). When a valid
DTMF tone is detected at the input of IC7,
its pin 15 goes high to enable IC8 after
inversion by NAND gate of IC2. At the
same time, it triggers IC5 for informing
the caller that his key-press is accepted.
Numbers 1 to 7 on the local keypad
cause latching of the corresponding relays,
while number 8 causes reset operation,
which means that we can switch on
seven relays independently one by one
and switch off all relays simultaneously
by pressing number 8. The output of IC8
drives the relays via the relay driver
transistor. Truth tables I(A) and I(B) of
CD4099 indicate relay operation.
Readers comments:
Q1. In the circuit, if anyone makes a
call to the connected telephone line
and presses the consecutive switches,
the unauthorised person can also
switch the circuit on/off. Can the circuit
be altered such that switching on/off
the circuit is possible only after entering the authorisation code via telephone
keypad?
Devjyoti Biswas
Through e-mail
The author, Junomon Abraham,
replies:
A1. It is possible to incorporate the
facility as desired by you by using a microcontroller. The microcontroller will
receive the signal from DTMF decoder
and it will verify whether the correct password has been received. The same can
74
Alignment
1. Connect the circuit to the telephone
line.
2. Adjust preset VR1 so the ringing
pulse causes LED1 to flicker. For better
performance, set the voltage at pin 3 of
IC1 at approximately 2 volts.
3. The time required to activate energise the circuit is adjusted by preset VR3
with the help of LED2.
4. The time available for remote
switching action can be set by preset VR2
with the help of LED4. Indirectly, the setting of preset VR2 determines the charge
that will have to be paid to the telecom
department.
5. The period of the musical note can
be controlled by the adjustment of VR4
with the help of LED3.

be achieved with discrete ICs also, but
the microcontroller method is better
and flexible.
EFY: Please refer to Microcontroller-Based
Access Control System and Multichannel
Access Control System projects published
in October and November issues of EFY for
implementation of the password authentication schemes used in such a system.
Microcontroller-based
School Timer
U. B. Mujumdar
he basic requirements of a realtime

programmable timer generally
used in schools and colleges for
sounding the bell on time are:
Precise time base for time keeping.
Read/write memory for storing the
bell timings.
LCD or LED display for displaying
real time as well as other data to make the
instrument user-friendly.
Keys for data entry.
Electromechanical relay to operate
the bell.
We are describing here a sophisticated, yet economical, school timer based
on Motorolas 20-pin MC68HC705J1A
microcontroller.
Description
The pin assignments and main features of
the microcontroller are shown in Fig.1 and
the Box, respectively. The complete system is divided into four sections, namely,
the time keeping section, the input section
(keyboard), the output (display, indicators,
and relay driving) section, and power supply and battery backup.
Fig. 1: MC68HC705J1A pin assignment
The time-keeping section. Accurate time-keeping depends on the

accuracy of time base used for driving
the microcontroller. In this project, the
microcontroller is driven by AT-cut
parallel resonant crystal oscillator that
is expected to provide a very stable clock.
A 3.2768MHz crystal provides a time
base to the controller. The frequency
(fosc) of the oscillator is internally divided
by 2 to get the operating frequency (fop).
This high-frequency clock source is used
to control the sequencing of CPU instructions.
Timer. The basic function of a timer
is the measurement or generation of
time-dependant events. Timers usu-
Main features of mc68h705j1a

14 bidirectional input/output (I/O) lines.
(All the bi-directional port pins are programmable as inputs or outputs.)
10 mA sink capability on four I/O pins (PA0-PA3).
1,240 bytes of OTPROM, including eight bytes for user vectors.
64 bytes of user RAM.
Memory-mapped I/O registers.
Fully static operation with no minimum clock speed.
Power-saving stop, halt, wait, and data-retention modes.
Illegal address reset.
A wide supply voltage range from-0.3 to 7 volts.
Up to 4.0 MHz internal operating frequency at 5 volts.
15-stage multifunction timer, consisting of an 8-bit timer with 7-bit pre-scaler.
On-chip oscillator connections for crystal, ceramic resonator, and external clock.
PARTS LIST
Semiconductors:
IC1
- 68HC705JIACP Microcontroller
IC2
- CD4532 8-bit priority Encoder
IC3
- 74LS138 3-line to 8-line decoder
IC4
- 74LS47 BCD-to-7-segment
decoder/driver
T1-T3
- BC547/BC147 npn transistor
T4-T7
- 2N2907 pnp transistor
D1-D7
- 1N4007 diode
ZD1
- 5.6V, 0.5 watt zener
Resistors (1/4-watt, 5% carbon, unless stated
otherwise)
R1
- 210-ohm, 0.5 watt
R2
- 27-ohm
R3, R12-R14,
R24-R-27
- 1-kilo-ohm
R4-R8
- 100-kilo-ohm
R9-R11,
R23, R29
- 10-kilo-ohm
R15-R22
- 47ohm
R28
- 10-mega-ohm
Capacitors:
C1
C2, C3
C4, C5
- 27F ceramic disk
C6
- 0.1F ceramic disk
Miscellaneous:
S1-S5
- Push-to-on switch (key)
S6
- On/off switch
PZ1
- Piezo buzzer
RL1
- Relay 12V, 300-ohm, 1C/O
XTAL
- 3.2768MHz AT-cut crystal
X1
- 230V AC primary to 12V-012V, 500mA secondary transforer
DIS.1-DIS.4 - LTS542 common-anode display

- 4 x 1.2V Ni-Cd cells
ally measure time relative to the internal

clock of the microcontroller. The MC68HC705J1A has a 15-stage ripple counter
preceeded by a pre-scaler that divides the
internal clock signal by 4. This provides the
timing references for timer functions.
The programmable timer status and
75
Fig. 2: Schematic diagram of the microcontroller-based school timer
control register (TSCR) is used for deciding the interrupt rate. It can be programmed to give interrupts after every
16,384, 3,2768, 65,536, or 131,072 clock
76
cycles. In Table I, the control word is set to

provide the interrupts after every 16,384
cycles. For a 32,768MHz crystal, the
interrupt period will be 10ms. Thus,
timer interrupts will be generated after

every 10 ms (100 Hz). That is, 100 interrupts will make 1 second.
Now time-keeping becomes very simple. As we are having a precise 1-second
time count, a real-time clock can be easily
built.
The MC68HC705J1A has a 64 byte
RAM that is used for data storage, Real
time (in terms of seconds, minutes, hours,
days of a month, and months) is stored in
this RAM. Thus an accurate real-time clock
is generated.
The input section. For setting the
real-time clock and storing operating times,
the timer requires to be programmed externally. Data is fed using the keyboard.
Press-to-on type keys are interfaced to
the microcontroller using an 8-bit priority
encoder CD 4532. This encoder detects
the key-press operation and generates
the equivalent 3-bit binary data. Its truth
table is shown in Table II. The priority
encoder is interfaced to port A of the microcontroller.
Various keys used in the timer,
along with their functions, are described
below:
Time (4): For setting real time in
minutes and hours.
Bell (5): For setting the bells operating timings.
Digit Advance (6): Data setting is
done digitwise (hours digit followed by
minutes digit). The Digit Advance key
shifts the decimal point to the right.
Store (7): For storing the data (real
time or bell time).
Delete (3): For deleting a particular
bell timing.
Here, the figures within parentheses
indicate the decimal equivalents of 3-bit
binary data from the keyboard.
Set and run modes. Data setting is
possible only in set mode. Set mode or
run mode can be selected by toggle switch
S6. By using a lock switch for S6, the
timer can be protected from unauthorized
data entry/storage.
In run mode if you press Bell
key once, the display shows the bells
various operating timings one after the
other, in the same order in which these
had been previously stored. In case you
want to discontinue seeing all the bell
timings, you may press Time key at
any stage to revert back to the display
of real time.
The output section. Seven-segment
displays are used for data display. As
LEDs are brighter, these have been used
in the system. There are two techniques

for driving the displays: (i) driving each
display using a separate driver (like
74LS47 or CD4511) and (ii) using multiplexed displays.
The first technique works well,
but practically it has two problems: it
uses a large number of IC packages and
consumes a fairly large amount of current. By using multiplexed display both
the problems can be solved. In multiplexing only one input is displayed at any
given instant. But if you chop or alter
inputs fast enough, your eyes see the result as a continuous display. With LEDs,
only one digit is lighted up at a time. This
saves a lot of power and also components,
making the system economical.
Generally, displays are refreshed at a
frequency of 50 to 150 Hz. Here, displays
are refreshed at a frequency of 100 Hz
(after every 10 ms). The display-refreshing
program is an interrupt service routine
program. BCD-to-7-segment decoder/driver 74LS47, along with transistor 2N2907,
and 3-line-to-8-line decoder 74LS138
are used for driving
common-anode displays.
In multiplexed
display, the current
through the segments is doubled to
increase the displays
brightness. 74LS47
is rated for sinking
a current of up to 24
mA. As the current
persists for a very
small time in multiFig. 3: Power supply circuit for the school timer
plexed display, it is
peaky and can be as
high as 40 mA per
segment.
The decimal
point is controlled individually by
transistor BC547,
as 74LS47 does not
support the decimal
point. PA0 and PA1
bits of port A are
used for controlling
the electro-mechanical relay and buzzer,
respectively.
Power supply
and battery
backup . T h e
Fig. 4: Actual-size single-sided PCB for the circuits in Figs 1 and 2
microcontroller
and the associated IC packages
require a 5V DC
supply, while the
relay and the
buzzer require
12V DC supply.
A simple rectifier
along with zener
diode-regulated
power supply
is used. The microcontroller is fed
through a battery-
backed power supply, so that in the
case of power supply, so that in the

case of power failure the functioning
of the controllers timer section is not
affected. During power failure the
timer is taken to low power mode (called
wait mode). In this mode the controller
draws a very small current. So small NiCd batteries can provide a good backup.
A simple diode-resistance (27-ohm,
-watt) charger maintains the charge of
the battery at proper charging rate.
Software
Motorola offers Integrated Development
Environment (IDE) software for programming its microcontroller and complete
development of the system. The development board comes with Editor, Assembler,
and Programmer software to support
Motorolas device programmer and software simulator. The ICS05JW in-circuit
simulator and non-real-time I/O emulator for simulating, programming, and
debugging code for a MC68HC705J1A/KJ1
family device.
When you connect the pod to your
host computer and target hardware, you
can use the actual inputs and outputs of
the target system during simulation of
the code. You can also use the ISC05JW
software to edit and assemble the code in
standalone mode, without input/output
to/from pod. The pod (MC68HC705J1CS)
can be interfaced to any Windows 3.x-or
Windows 95-based IBM computer using
serial port.
The software for the timer has been
so developed that the system becomes
as user-friendly as possible. The main
constraint is read/write memory (RAM)
space. As mentioned earlier, the microcontroller has only 64 byte RAM. About
twenty bell operating timings are required
to the stored. So the efficient use of RAM
becomes essential.
The software routines for the timer,
along with their Assembly language codes,
are listed in a folder. (Note: This folder,
containing source code (.asm) and listing
file (.lst) will form part of the EFY-CD
provided with the August 2001 issue. As
files are quite large, it is not feasible to include them here.) Basically, the following
functions are performed by the software
program:
1. Initialisation of ports and the
timer.
2. Reading of keypressed data.
3. Storing of real time and bell
77
Table I
Timer Status and Control Register (TSCR)
Bit
7 6
5
4
3
2
1
0
Signal
TOF RTIF TOIF
RTIE
TOFR RTIFR RTI
RTO
Reset
0 0
0
0
0
0
1
1
TOF: Timer overflow flag
RTIE: Real-time interrupt enable
RTIF: Real-time interrupt flag
RTI and RTO: Real-time interrupt select bit
RTI
RTO
Interrupt period
0
0 fop 214
For 3.2768 MHz crystal
0
1 fop 215
Frequency of operation (fop)
1
0 fop 216
= 3.7268x106/2 = 1.638x106MHz
1
1 fop 217
For RTI=RTO=0

Interrupt period = 10ms (100Hz)
Table II
Truth Table for Priority Encoder CD4532
Keys E1
Store
1
Digit Adv. 1
Bell
1
Time
1
Delete
1
D7
1 X
0 1
0 0
0 0
0 0
D6
X
X
1
0
0
D5
X
X
X
1
0
D4
X
X
X
X
1
timings.
4. Comparison of real time and bell
time. If the two match, the bell rings.
78
D3
X
X
X
X
X
D2
X
X
X
X
X
D1
X
X
X
X
X
D0
1
1
1
1
0
Q2
1
1
0
0
1
Q1
1
0
1
0
1
Q0
5. Display of data.
6. Time-keeping.
For a user-friendly system, the associated software is
required to perform
many data manipulation tricks and internal branching. The
operation and logic
can be understood
from the Assembly
language listings. The
software is mainly divided into the following modules:
Keyboard. When
a key is pressed,
CD4532 sends the
corresponding data.
After reading the
data, the controller
decides on the action.
Set/ Run key (S6)
is connected to port
PA4.
Bell. This part
of the program is
used for displaying
the bell operating
timings stored in the
RAM. The operating
timings are displayed
one by one with a
delay of 5 seconds
between tow consecutive timings.
Set. The real time and bell timings

are stored using this part of the software.
Data is entered digitwise; for example,
08:30 a.m. will be stored a 0, followed by 8,
followed by 3, and finally 0. Data is stored
in 24-hour format.
Data fed from the keyboard is converted into equivalent hex and stored in
RAM. Any particular operating timing can
be deleted from the memory using Delete
key, provided the timing is already stored
in the memory.
Run. Here the real time is compared
with bell operating time. If the two match,
the relay is operated.
DataCon. This part of the software
is used for finding out the decimal equivalent of hex data. The microcontroller
manipulates the hex data and converts it
into BCD format for display.
Timer. The timer of the microcontroller is initialized to give an interrupt after
every 10 ms. A real-time clock is generated using the interrupt. Also the display
is refreshed during the interrupt service
routine.
For real-time systems battery backup
is very essential, because power failure
affects the time keeping. In interrupt
service routine, the availability of
power supply is checked. If the power is
available, displays are refreshed and
the timer operates normally. However,
during the power-failure period, displays are off and system is taken to low
power mode. In this mode only the
timer part of the microcontroller remains
activated while operations of all other
peripherals are suspended. This considerably reduces the power consumption.
When the supply gets restored, the
controller starts operating in normal
fashion.
Operating procedure
When the power is switched on, the
display shows 12.00. Two settings are
required in the timer: (a) setting of real
time and (b) setting of bell operating timings. For setting real-time clock Time
key is used.
Storing of real time. To store real
time, say, 05:35 p.m., flip Run/Set key
(S6) to set mode. The display will show
0.000. Press Time key. Further pressing of Time key will increment the data,
like 0.000, 1.000, 2.000, and thereafter
it will repeat 0.000, etc. To select the
digit, press Digit Advance. This stores
the present digit and the next digit is
selected as indicated by the decimal

pointer. Data is stored in 24-hour format. The time to be stored is 17.35, of
which the first digit will be 1.000. The
second, third, and fourth digits can
be stored in similar fashion. After the
fourthdigit, press Digit Advance key
once more. The display will show 1735
(with no decimal). Now press Store to
store the data.
Storing of bell timings. The procedure to store bell operating timings is
similar to that of setting real time. The
only difference is that here data is changed
by Bell key in place of Time key. Any
number of bell timings (<20) can be stored
in the same fashion. If the number of bell
operating timings exceeds 20, the timer
will not accept any new bell timings

until one of the previously stored timings
is deleted.
Deletion of bell operating timings.
For deleting a particular timing, first store
this timing using the steps given above.
Then press Delete key to delete the specific data from the memory.
Display of real time. If Run/Set
key is taken to run mode, real time will
be displayed.
Checking of bell operating times.
For checking the bell operating times,
press bell key in Run mode only. The
stored bell operating timings will be
displayed one by one with a delay of
5 seconds between two consecutive
timings.
Programming
There are two ways to program the
EPROM/OTPROM (one-time programmable ROM):
1. Manipulate the control bits in the
EPROM programming register to program the EPROM/OTPROM on a byteby-byte basis.
2. Program the EPROM/OTPROM
with Motorolas MC68HC705J in-circuit
simulator.
The author has used the second
method for programming the OTPROM.
An actual-size, single-sided PCB for
the circuits in Figs 2 and 3 is shown in
Fig. 4, with its component layout shown
in Fig. 5.
Readers comments:
Q1. I have assembled this circuit and
found that pins D0 and D1 of IC 4532
are not properly terminated. Will
this affect the keyboard data? Could
you please tell me from where I can
get the programmed controller?
Deep Saraf
Pune
Q2. Does the circuit work by just
assembling it with the IC (MC68HC705J1A) bought from the market,
or do we have to install a software
in it? From where can we get the
software? Give a detailed procedure
about how to install the software in
the IC.
Fig. 1: Modification of display circuit to operate 2.5cm/5cm display
A. Rajasekaran
Chennai
ment kit and IDE (integrated development
present circuit after omitting resistor R1.
Q3. The circuit can be modified as shown
environment) software available through
Somnath Bera
in Fig. 1 for using a brighter and bigger
Motorola distributors/Internet. The same
Through e-mail
display. You can use this modification for
can be purchased through our associate
A1 and 2. EFY: Leaving two of the unone set of 2.5cm (1-inch) or 5cm (2-inch)
KitsnSpares.
used input pins open will not affect the
display. For 5V supply, use 7805 reguA3. EFY: The circuit sent by the reader
circuit performance. The microcontroller
lator in place of the zener diode in the
had anomalies, which have been corrected.
has to be programmed using a develop-
79
Digital Capacitance-cumFrequency Meter

pratap chandra sahu
He
re is an inexpensive circuit of
a digital capacitance-cum-frequency meter that can measure capacitance in the range of 1 pF to
10,000 F and frequency in the range of
0 to 100 kHz. With a slight modification,
this circuit can be used as an article counter or a time meter.
The principle. In a frequency counter, the unknown input is ANDed with a
known time-base period, so that the numbers of cycles passed over the time-base
period are counted. The time period can be
measured similarly if a known frequency
is gated with the unknown time period.
The same instrument can also determine
the time period of a periodic waveform or
the time elapsed between two events.
In this circuit, the capacitance measurement is nothing but the measurement
of the time between two events in a charging capacitor. An R-C (resistor-capacitor)
circuit works as a time generator and the
time is directly proportional to capacitance
value under suitable conditions. In the
present case the condition being satisfied
is that the time period (T) is equal to the
product RxC, where R is the value of the
charging resistor in ohms and C the capacitance value in farads.
Capacitance measurement. One
RxC time (seconds) is required to charge
a capacitor to 63 per cent (approximately
two-third) of its final value (applied voltage).
Consider the following example:
If C = 470 pF and R = 1 mega-ohm,
then one RC time period T = 470x106
seconds = 470 microseconds.
If we select the external frequency for
the counter as 1 MHz (time period = 1 microsecond), the counter progresses by one
count every microsecond and the counter
reading is 470, as the gate will be open for
470 microseconds for the above-mentioned
R and C under testing. We get the capacitance value directly from the readout of
the counter in picofarads.
Similarly, if we take R = 1 mega-ohm
80
and external frequency = 1 kHz, we can

read the value of the capacitor under test
(CUT) directly in nanofarads. With R =
1 kilo-ohm and frequency = 1 kHz, we
can read the value of the CUT directly in
microfarads.
Frequency measurement. This
involves passing the unknown frequency
signal for a known time base period
through the counter. In a 4-digit counter
with a time base of one second, the maximum display will be 9999, which means
that we cannot read a frequency of more
than 9999 Hz (10 kHz). However, if we
reduce the time base to 0.1 second, the
frequency reading can go up by a factor of
ten to 99.99 kHz (100 kHz) as the time
base virtually divides the input frequency
by 10. For low-frequency measurement,
we can increase the resolution by a factor
of ten by increasing the time base period
to 10 seconds, which is equivalent to the
multiplication of the input frequency by a
factor of 10.
Circuit and operation

The capacitance measurement mode.
During the capacitance measurement
mode, switches S1 through S5 are kept
slided towards position C. The unknown
capacitor is placed across CUT terminals.
Ganged switches SR1 and SR2 are used
for capacitance measurement. Position 1
is used for capacitance range of 1 pF to
9999 pF (10 nF), position 2 for capacitance range of 1 nF to 9999 nF (10 F),
and position 3 for capacitance range of 1
F to 9999 F.
Switch SR1 selects 1 mega-ohm charging resistor in its positions 1 and 2, while
switch SR2 selects a frequency of 1 MHz
in position 1 and a frequency of 1 kHz in
position 2 for the counter operation. In position 3, 1-kilo-ohm charging resistor R6 is
selected by SR1, while SR2 selects 1 kHz
as the frequency for counter operation.
Ganged rotary switches SR3 and SR4
are used for frequency measurement mode
Parts List
Semiconductors:
IC1
- NE555 timer
IC2, IC3
- CA3140 high-input impedance op-amp
IC4 (A-D)
- 7408 AND gate
IC5
- MM74C925 4-digit counter/7segment driver
IC6
- 74LS121 monostable MV
IC7-IC9
- 74LS90 decade counter
(divide-by-10)
IC10
- 7476 JK flip-flop
IC11
- 7805 regulator +5V
D1-D5
D6
LED1
- Red LED
T1-T5
- BC547B npn transistor
T6
- BS107 FET
Resistors (all watt, 5% carbon, unless
stated otherwise)
R1
- 2.2-kilo-ohm
R2, R5
- 1-mega-ohm
R3, R8, R24 - 4.7-kilo-ohm
R4, R20
- 10-kilo-ohm
R6, R7, R18
R21
- 1-kilo-ohm
R9-R16
- 220-ohm
R17
- 20-kilo-ohm
R19
- 100-kilo-ohm
R22, R23
- 560-kilo-ohm
VR1
- 1-kilo-ohm preset
Capacitors:
C1
C2
- 0.01F ceramic disk
C3
- 10nF ceramic disk
C4
C5
- 1000 F, 25V electrolytic
C6
C7, C8
- 22 pF ceramic
C9
- 0.01F ceramic
Miscellaneous:
X1
- 230 AC primary to 9-0-9 volt,
500mA secondary transformer
XTL
- 1MHz quartz crystal
S1-S5
- Slide switch
S6, S7
- Push-to-on switch
SR1-SR2
- Ganged 3-way, 2-pole rotary
switch
SR3-SR4
- Ganged 3-way, 2-pole rotary
switch
DIS1-DIS4 - LT543 common-cathode,
7-segment display
only. (EFY note. As decimal indication

is not required during capacitance measurement, one might have an additional
off position for SR3/SR4 ganged rotary
switch.)
Fig. 1: Circuit diagram for digital capacitance-cum-frequency meter
81
IC1 is a monostable multivibrator

based on timer NE555 and is meant for
capacitance measurement only. In normal
condition, the low output of the monostable
turns on the FET (BS107) switch. So the
capacitor under test gets shorted via the
FET switch. As and when triggered by the
momentary push-to-on operation of start
switch S6, the monostable provides a pulse
of 15-second duration. As soon as its output goes high, it switches off FET switch.
Simultaneously, it takes pin 5 of AND
gate IC4A high.
Now let us examine the conditions at

IC2 and IC3 (both CA3140 op-amps). The
voltage across CUT, after being buffered
by IC2, is fed to the inverting input of IC3
wired as a comparator. The non-inverting
Fig. 2: Internal block diagram and functional description for IC 74C925
Fig. 3: Actual-size, single-sided PCB layout for digital capacitance-cum-frequency meter
82
input of IC3 is biased at 0.63Vcc, which is

set accurately by 1-kilo-ohm preset VR1.
Now the capacitor begins to charge. As
soon as the voltage across the capacitor
crosses 0.63Vcc (i.e. 3.15 volts with Vcc
= 5 volts), the output of IC3 goes low.
Thus the output of IC3 and also that of
AND gate IC4A remains high until the
capacitor charges to 63 per cent of Vcc in
one RC time.
Latch-enable (LE) pin 5 of counter
IC5 (74C925) connected to pin 6 of IC4A
remains high to pass the clock selected
via rotary switch SR2 and coupled to
CL (clock) pin 11 of IC5 via AND gate
IC4B. It goes low after one CR time to
latch its count as the output of IC3 goes
low. Thus the number of cycles from the
frequency source passed over one CR
time is recorded in the counter and gets
displayed.
For precise generation of 1MHz frequency, a 1MHz crystal oscillator is wired
around Schmitt inverter gates N3 and N4.
The oscillator output is routed via AND
gate IC4C to slide switch S2 and rotary
switch SR2 position 1. In capacitance (C)
position of switch S2, this signal, after
division by three decade counters IC7, IC8,
and IC9 (7490), which are common to both
frequency and capacitance meter modes,
provides 1kHz signal at pin 12 of IC9,
which, in turn, is extended to positions 2
and 3 of switch SR2. (Note. The outputs
of IC10 are not used during capacitance
measurement. IC10 comes into play only
during the frequency measurement as
explained later.)
The NE555 timer used as a monoshot
ensures the capacitance measurement in
an easy and automatic manner. The LED
connected to AND gate IC4D glows during
the charging of the capacitor. During the
measurement of high-value capacitances,
it may take several seconds to charge to
0.63Vcc. For low-value capacitances, the
LED glows for just a moment after pressing start switch S6. If the LED goes off after the start button is pressed, it indicates
that the measurement is over.
You can reset NE555 timer using
switch S7 if you want to make another
measurement. If this switch is not provided/operated, you would have to wait
for at least 15 seconds until NE555 timer
becomes normal. Alternatively, you will
have to switch off the complete circuit and
then switch it on again.
Frequency counting. In place of
1MHz oscillator, a 100Hz full-wave rectified (pulsating DC) after being shaped by
Schmitt inverter N2, is used as the master

clock to provide the required time bases.
The voltage divider network of resistors
R20 and R21 protects gate N2 against
high voltage.
R21 is test selected to get proper 100
Hz rectangular wave form at the output
Readers comments:
Q1. A provision to include inductance
measurement by using an FET-based
tank oscillator circuit (as shown in
Fig. 1) would enhance the utility of the
circuit. The tank circuit could be tuned by
trimmer CT for a frequency of, say, 1 MHz
with a standard inductor of 1 H. Decade
dividers can be used for other ranges for
direct readout.
Fig. 1: FET-based tank oscillator circuit
of gate N2. This 100Hz signal is divided

by decade counters IC7, IC8, and IC9 to
obtain 10Hz, 1Hz, and 0.1Hz frequencies.
The frequency selected via rotary switch
SR3 is then divided by 2 by JK flip-flop
7476 (IC10) so as to provide a gate time of
0.1 second, 1 second, or 10 seconds in positions 1, 2, and 3, respectively, of switch
Praveen Shankar
Haridwar
Q2. I have the following queries:
1. Are ICs DM74LS121 and SN74LS121
the same? Can I use DM74LS121 or
SN74LS121 as IC6?
2. Can I replace 15F, 25V capacitor
C1 with a 22F, 25V capacitor?
Chang Heen Loong
Through e-mail
The author, Pratap Chandra Sahu, replies:
A1. Such a tank oscillator is
not suitable for this circuit as
the frequency in such a circuit
is inversely proportional to the
value of inductance and there
is an offset frequency. The
circuit proposed by the reader
could, however, be used in conjunction with moving coil type
SR3. Q output of IC10 is used to enable

counter IC5.
The resetting of counter-cum-display
IC5 is accomplished by the narrow output
pulse from IC6 (74121), which is generated
by the leading (rising) edge of Q output of
IC10 connected to its B input (pin 5) via
switch S5. Thus at the beginning of each
counting period, IC5 is reset.
IC5 (74C925) is TTL-compatible with
a multiplexed 4-digit, 7-segment display
driver. Its internal block diagram and
functions are described in Fig. 2. The
maximum frequency display in positions
1, 2, and 3 of ganged switches SR3 and
SR4 is limited to 99.99 kHz, 9.999 kHz,
and 999.9 Hz. The decimal point position
is fixed by switch SR4.
Calibration and testing. Connect a
multimeter to the non-inverting terminal
of IC3 and set the point at 0.63Vcc = 3.15
volts using 1-kilo-ohm preset VR1. To
test the capacitance meter, use a 470pF
polystyrene capacitor with one per cent
tolerance.
Precaution. Try to screen the mains
transformer from the input. Place the
transformer at a place where the chances
of its interference with the input are minimal or nil. While measuring the frequency,
the frequency source under test should not
be touched or loaded to avoid affecting its
frequency due to stray capacitance associated with the test leads.
An actual-size, single-sided PCB
for the circuit of Fig. 1 is shown in Fig.
3, with its component layout shown in
Fig. 4.
frequency meter after suitably calibrating

its scale.
A2. EFY: 1. Yes, ICs DM74LS121 and
SN74LS121 are similar and you may use
either of these two ICs as IC6.
2. You can replace 15F, 25V capacitor C1 with a 22F, 25V capacitor
by changing the value of resistor R2
(1 mega-ohm) such that R2 x C1 product
remains the same, in order to retain
the same output pulsewidth. Since IC1
(NE555) is a timer IC, configured as
a monostable, the output at pin 3 is
approximately 16 seconds as per the
following relationship:
Pulsewidth = 1.1(R2 x C1) seconds
So, if the capacitor value is changed
from 15 F to 22 F, the resistor value
needs be changed from 1 mega-ohm to 680
kilo-ohms so that R2 x C1 product remains
almost the same.
83
Fluid-Level Controller
with Indicator
bhaskar banerjee
he fluid-level controller circuit presented here allows you to set the

lower and upper fluid levels at
the desired specific positions between
two extreme levels. The total fluid level
is divided into ten equal parts. Any two
of these ten positions may be defined as
low and high level, respectively. The
system shows the preset levels on the
two 7-segment displays and the current
fluid level at any instant on a 10-LED bar
graph indicator. The same circuit could
also be used for controlling temperature
in a similar fashion.
The circuit
The main part of the circuit as shown in
Fig. 1 is dot/bar graph driver LM3914
(IC1). This IC is linearly scaled and is
intended for use in LED voltmeter application where the number of illuminated
LEDs indicates the value of input voltage.
It contains a floating 1.2V reference source
between pins 7 and 8 that may be used as
the reference input for the IC. The voltage
from the sensor is fed to the input of IC1
at pin 5.
The output of the sensor may vary
Fig. 1: Schematic diagram of fluid-level controller with indicator
84
from ground level (0V) to supply voltage.

Thus the reference voltage source should
be externally preset, which is feasible with
the help of IC1. This IC can also display
the input voltage on a linear scale using
ten LEDs in the bar graph or the dot mode.
Here we have used the bar graph mode.
The outputs of IC1 are activelow and hence they sink current to
illuminate LEDs. Inverters are used
between the outputs of IC1 and the
inputs of IC3 and IC4 to invert the
active-low outputs of IC1. There
are ten outputs available from IC1,
of which only
five are used
here. One may
use up to eight
outputs of IC1
since IC3 and
IC4 (4051) are
1-of-8 data selectors. (Note.
If 4067 were
used in place of
4051, all the ten
outputs could be
used. It is also Fig. 2: Optical sensor
possible to get more than ten outputs by
cascading LM3941 ICs.)
Using this circuit, the maximum
fluid level can be divided into four equal
parts giving five different level readings
from 0 (empty/low level) to 4 (full/high
level). Thus the five levels are empty, onefourth, half, three-fourth, and full. This
division is meant only for controlling the
level, while all levels including the intermediate levels are constantly displayed
on LED bar graph.
The lower level can be set anywhere
between 0 and 3 in steps of 1 and high
level can be set between 1 and 4. The
fluid level can be maintained between
any two levels by using IC3 and IC4.
IC3 selects the high level and gets inputs
of levels 1, 2, 3, and 4, while IC4 selects
the low level and gets inputs of levels 0,
Parts List
Semiconductors:
IC1
- LM3914 bar/dot display
driver
IC2
- 4069 hex inverter
IC3, IC4, IC5 - 4051 8-channel analogue
multiplexer
IC6
- 4520 dual binary counter
IC7
- 555 timer
IC8
- 4081 quad 2-input AND
gate
IC9, IC10
- 4511 BCD-to-7-segment
latch/decoder/driver
LED1, 3, 5, 7, 9 - Green LED
LED2, 4, 6, 8,
10, 11
- Red LED
Resistors (all -watt, 5% carbon unless
stated otherwise):
R1-R10,
R16-R31
- 470-ohm
R11-R15
- 10-kilo-ohm
R32-R33
- 47-kilo-ohm
R34
- 1-kilo-ohm
VR1
Capacitors:
C1, C2
C3, C4
C5
- 1F ceramic disk
Miscellaneous:
DIS1, DIS2
- Common-cathode
7-segment display
S1, S2
- Push-to-on switch
1, 2, and 3. All
other unused
input pins of
IC3 and IC4 are
grounded.
The selection takes place
according to the
binary word preset at the select
Fig. 3: Sensor usinput pins (pin
ing float operated
potmeter
9, 10, and 11)
of IC3 and IC4.
The required binary word is generated
by a dual divide-by-16 counter IC6 (4520).
(IC6 can be replaced by a divide-by-10
counter 4518, if desired.) Half of IC6 is
used for high level and the other half for
low level. IC6 gets its counting pulse from
a 555 timer (IC7) used for generation of
approximately 1Hz pulse train.
The high level is set by pressing switch
S1, while the low level is set by pressing
switch S2. IC6 is reset when the power is
switched on. This power-on-reset function

is realised using capacitors C1 and C2,
and resistors R12 and R13. The part of
IC6 connected to high-level selector also
gets reset when the count is 5 (101 binary).
This reset pulse is generated using AND
gates of IC CD4081.
The selected minimum and maximum
levels are displayed by two 7-segment displays DIS1 and DIS2 that are controlled
by two BCD-to-7-segment decoders 4511
(IC9 and IC10, respectively).
The outputs of IC3 and IC4 are fed
to the select input pins of IC5 (4051).
The output of IC5 is fed back to one of
its select inputs through an inverter. IC5
determines the control logic. The pump
(or the heater in temperature controller)
should be on when the fluid (or temperature) level is below the minimum level and
should remain on until the maximum
level is reached. It must not start if the
fluid level falls below the maximum level
but remains above the minimum level.
Fig. 4: Actual-size, single-sided PCB layout for fluid-level controller with indicator
85
Fig. 5: Component layout of PCB
This function is realised by IC5 that can

operate a pump (or an alarm, or a flow
valve, or a heater, as required) according
to this control logic. For this, the input
lines of IC5 are set to appropriate logic
levels, which must not be disturbed.
Sensor. To control the fluid level (say,
water level in a tank), an optical sensor as

shown in Fig. 2 may be used. This optical
sensor consists of a small filament lamp
(generally used in torch or an IR LED as
light source) and an LDR or a photodiode
as the sensor. The filament lamp may
be powered using the same step-down
Readers comments:
Q1. Please explain the detailed working
of the circuit. Also elaborate as to how to
arrange the LDR and filament lamp in the
tank? Please give details, how water level
will be controlled by LDR? Is there any
reflection of light from water surface?
Ajit
Through email
A1. EFY: The optical sensor section (LDR
and filament lamp) can be fixed rigidly on
the bottom side of the tank lid/cover using
M-seal or Fevi Quick or similar compound.
Alternatively, you may mount them on a
wooden strip and secure the strip to the
bottom side of the tank cover. The working of the LDR to control the water level is
explained below.
The light rays from the lamp are reflected from the water surface and fall on
LDR1. The orientation and the intensity
of light source are the deciding factors for
incidence of adequate reflected light on the
LDR for proper control of water level control.
No direct light should be allowed to fall
on the LDR. Fix a suitable opaque screen
closer to LDR, between the light source and
the LDR.
For any given orientation of the light
source and the position of the LDR, the
86
transformer that is used to power the circuit. Alternatively, a separate step-down

transformer may be used for the purpose,
but taking into account the voltage and
current ratings of the lamp.
One may also use the sensor described
in Digital Water Level Meter in Circuit
Ideas section of the February 2000 issue of
EFY (also in Electronics Projects Vol. 21).
Use that sensor (VR4) as part of a voltage
divider network as shown in Fig. 3. If the
circuit is used as a temperature controller,
a temperature sensor using the popular
LM35 IC may be built (refer Circuit Ideas
published in March 1993 issue of EFY or
Electronics Projects Vol. 14).
Operation. The lower or the minimum level is set by pressing switch S2 and
the upper or the maximum level by pressing switch S1. The two switches should
be kept pressed until the required level is
displayed. For example, if the lower level
is selected 1 and the upper level 3, the
pump (or heater or a flow valve) will start
when the fluid falls below level 1 and will
stop when the fluid reaches level 3.
Assembly and testing. The circuit
may be built on a veroboard. However,
an actual-size, single-sided PCB and its
component layout are shown in Figs 4 and
5, respectively. Switches used, should be of
good quality. After assembling, the circuit
may be tested using a voltage divider (potentiometer) that could be varied between
ground and positive supply.
While testing, set preset VR1 to increase or decrease the reference voltage
taking into account the maximum output
available from the actual sensor. In case
of power failure, there should be proper
battery back-up. Otherwise, the system
will not behave as desired. Red and green
LEDs are arranged in alternate fashion to
make the bar display look attractive.
reflected light intensity received by

the LDR will be low when the water level
is low and it will increase as the water
level in the tank rises. (The intensity at
the LDR depends on the total length of
the path travelled by light.) Thus the resistance of LDR is high when the level of
water is low and its resistance decreases
as the water level increases. The intensity
of light is indicated by the LEDs and
7-segment display in Fig. 1. of the article.
VR2 (preset) is used to vary the sensitivity
of LDR1 so as to obtain a predetermined
LED/7-segment display when a specified
level is reached.
MGMAA Mighty Gadget

with Multiple Applications
a. jeyabal
GMA, pronounced as migma, is

a versatile and multi-purpose
gadget. It can be used for a
range of applications, from a simple toy
to domestic and workbench applications.
It measures time, compares light output,
temperature, resistance and capacitance,
etc. You can use this gadget in a number
of ways, depending on your imagination
and creativity.
Basically, MGMA is a resistancecapacitance-controlled oscillator that
counts the pulses for a specific period. If
any transducer, such as light-dependent
resistor (LDR) or heat-dependent resistor (thermistor), is connected to it, the
display shows the value corresponding to
its resistance. Contact or break (normally
open or closed) type transducers can also
be used with MGMA.
Fig. 1: Block diagram of the MGMA circuit
Fig. 1 shows the block diagram of

the MGMA circuit. Block 1 is an oscillator that is controlled by block 2. Block
2 contains another oscillator whose frequency is much lower than that of the
former. The differentiator circuit in block
3 resets the decade counters periodically.
Blocks 4 and 5 count the pulses, which,
in turn, are displayed by blocks 6 and
7. Digit 9 in tens counter is decoded
by block 8, and its output disables the
counting process and triggers the aural
indicator in block 9. Block 10 comprises
the regulated power supply to run the
gadget.
Circuit
Oscillator. In Fig. 2, Schmitt trigger input
NAND gate N1 of IC1 (CD4093), capaci-
tor C1, and potmeter VR1 form the oscillator

circuit. Let us presume that capacitor C1 is in
discharged state and pin 2 of gate N1 is in high
state. As the input pin is low, output pin 3 is
high and capacitor C1 starts charging through
potmeter VR1.
When the voltage across capacitor
C1 reaches above half of the supply
voltage, input pin 1 of gate N1 goes high
and output pin 3 goes low. Now capaciParts List
Semiconductors:
IC1
- CD4093 quad 2-input Schmitt trigger NAND gate
IC2, IC3
- CD4033 decade counter/
7-segment decoder
IC4
- 7805 +5V regulator
T1
T2
D1-D7
D8, D9
LED1
- Red LED
stated otherwise)
R1, R6-R9
- 100-kilo-ohm
R2
- 220-kilo-ohm
R3
- 470-kilo-ohm
R4
- 3.3-kilo-ohm
R5, R10, R11 - 330-ohm
VR1
- 1mega-ohm pot., linear
VR2
- 47-kilo-ohm pot., linear
Capacitors:
C1, C3
C2
- 4.7F, 10V tantalum
C4
C5, C6
- 0.1F ceramic disk
Miscellaneous:
X1
- 230V AC primary to 9-0-9V
AC, 100mA secondary transformer
S1, S2
- Push-to-on switch
S3
- SPST switch, 230V AC
DIS1, DIS2 - LT543 7-segment, commoncathode type LED display
SOC1 - SOC4 - Earphone socket
SOC5
- DC IN socket
PZ1
- Piezo-buzzer

- IC bases, knobs, mains
chord, cabinet

- Banana-type earphone plugs
87
Fig. 2: Schematic diagram of MGMA
tor C1 discharges through potmeter

VR1. When the voltage across capacitor
C1 falls below half of the supply voltage,
pin 1 of gate N1 goes low and the output
pin goes high. Now capacitor C1 starts
charging again and the cycle repeats
itself.
The pulses from the output of gate
N1 reach counter IC2 through resistor
R1. Switch S1 is provided to stop the
counting manually by grounding the
Table
Count

0
1
2
3
4
5
6
7
8
9
88
Decoded output of IC CD4033

a
b
c
d
e
1
1
1
1
1
0
1
1
0
0
1
1
0
1
1
1
1
1
1
0
0
1
1
0
0
1
0
1
1
0
1
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
0
f
1
0
0
0
1
1
1
0
1
1
pulses through R1 when switch S1 is

pressed.
Counter and display. The output of
the oscillator is connected to clock input
pin 1 of IC2 (CD4033, a decade counter
for unit digits). The carry-out pin 5 of IC2
is connected to the clock input of decade
counter IC3 that is meant for tens digits.
The segment outputs of both IC2 and
IC3 go to the respective seven segments
of DIS1 and DIS2 (LT543) for displaying
the number of pulses.
Lamp-test (LT) pin 14 of
both IC2 and IC3 is grounded
g
CO
through 100-kilo-ohm resistor
0
1
R8. The test-point (TP) may
0
1
be used to check the display.
1
1
When a high-level voltage (5V)
1
1
is applied to the test-point, all
1
1
segment outputs go high and
1
0
the display shows 88.
1
0
The display is blanked out
0
0
when the number to be dis1
0
played is 0, provided the ripple
1
0
blanking input (RBI) pin 3 is
held low. So on reset, only DIS1 (unit

digit) will show zero as RBI pin 3 of
IC3 is grounded.
Switch S2 is provided to reset the
counter manually. Current-limiting
resistors R5 and R10 provided with
DIS2 and DIS1, respectively, are used
to reduce the component count and
ensure the proper operation of digit-9
decoder circuit.
Display controller and differen-tiator. For accurate reading of the
counter, it must be reset periodically
and the pulses must be counted
for a specific period. For this an
oscillator circuit comprising gate
N2, diodes D1 and D2, resistor R2,
potmeter VR2, and capacitor C2 is
used. This oscillator also works like
the previous one, but its charging
and discharging paths are separated
by diodes D1 and D2. Its on time
(high-level output) can be controlled
by potmeter VR2.
When output pin 4 of gate N2 goes
from low to high state, the differentiator
circuit comprising capacitor C3 and resis-
and it outputs clock pulses. These

pulses are counted by IC2 and IC3
and displayed on DIS1 and DIS2,
respectively. So the oscillator around
gate N1 is enabled and
disabled during the high
and low states, respectively, of the output of
gate N2.
The counters retain
their last count for reading until the output goes
high once again. This
reading time is about 2
to 3 seconds, which is
set by resistor R2. Any
increase in the value of
R2 will increase the reading time and vice versa.
Resistor R3 connected in
parallel across capacitor
C3 is used to discharge
it quickly and diode D3
is used to block the DC
voltage (when switch S2 is
pressed) going to gates N1
and N3, and other parts of
the circuit.
Digit 9 decoder and
aural indicator. It is
very useful to sound an
alarm for a certain readFig. 3: Actual-size, single-sided PCB pattern suggested for
ing or otherwise, say, for a
the circuit in Fig. 2
particular temperature or
light output or resistance
value, etc. A permanent
number 90 is chosen for
simplicity of the decoding
circuit. When the display
shows 90, the counter must
be disabled and the buzzer
enabled.
From the table of decoded outputs of IC 4033 it
is found that for number 9,
at least one of the segment
outputs is low (a, b and f
are high, while e is low).
For number 8, segment e
is inverted by transistor
T2. As RBI pin 3 of IC3 is
grounded, all the segment
outputs go low for 0. The
clock-enable (CE) pin 2 of
IC3 is pulled up by resistor R7.
Pin 2 is also connected to
a, b, f and e segment outputs of
IC3 through diodes D5, D6, D7,
and transistor T2, respectively,
that altogether act as AND
tor R9 produces a sharp pulse that resets
counters IC2 and IC3. At the same time,
gate N1 is enabled as output pin 4 of gate
N2 is connected to input pin 2 of gate N1,
gate and bring the CE pin to ground for

numbers 0 through 8. When the number
is 9, the segment outputs a, b, and e are
high, except the segment output e, which
is inverted by transistor T2. As a result,
CE pin of IC2 goes high and the counters
are disabled.
Simultaneously, this high-level output is inverted by gates N3 and N4. The
inverted output from gate N4 forward
biases transistor T1 to drive the piezobuzzer, while the inverted output from
gate N3 grounds the resetting pulses.
Diode D4 prevents the high output of
N3 from reaching the reset pins of IC2
and IC3.
Power supply. In 5V DC power supply shown at the bottom in Fig. 2, IC 7805
(IC4) is employed for better regulation. DC
input/output socket (SOC5) is provided to
operate the gadget with external 9V battery. LED1 acts as a power-on indicator.
Construction
Figs 3 and 4 show suggested actual-size,
single-sided PCB layout and component
layout, respectively, for the circuit in Fig.
2. Solder the components in the order of IC
sockets, jumpers, resistors, capacitors, diodes, LED, and transistors. Then connect
the rest of the components through wires.
Fig. 5 shows the proposed front-panel
layout of MGMA.
Before connecting VR1 and VR2 to
the PCB, mark the dials using a digital
multimeter. Both dial 1 and dial 2 (refer
Fig. 5) are calibrated in terms of resistance for the variable resistance values of
1 mega-ohm in case of VR1 and 47 kiloohm in case of VR2, respectively, using a
digital multimeter. (Note. There may be
dead-ends on both ends of the potmeter,
and it may vary in construction from
manufacturer to manufacturer.) Mark the
dials for every ten units for easy reading
and setting.
Applications
For high-resistance and low-resistance
transducers, use earphone-type sockets SOC1 and SOC3, respectively. For
low-capacitance and high-capacitance
testing, use earphone-type sockets SOC2
and SOC4, respectively. For SOC1 and
SOC2, the reading will decrease for
the increasing value of resistance and
capacitance, and vice versa for SOC3
and SOC4.
Strength-0-meter. This game reELECTRONICS PROJECTS Vol. 22
89
Fig. 5: Proposed front-panel layout of MGMA
Fig. 6: Connections for water level monitor
quires two small rods or prods. Connect

them to an earphone plug using a pair of
wires half a metre long. Then insert the
plug into SOC1. Hold the rods in each
hand between forefinger and thumb.
Adjust dials 1 and 2 such that the buzzer
beeps. Then rotate dial 1 slightly in the
anti-clockwise direction to read around 70,
a point where the buzzer is silent. Now ask
your friends one by one to grip the rods
firmly. The winner is the one who sounds
the buzzer or scores higher on the meter.
This depends on how hard one holds the
rod, the internal resistance of the body,
and dampness of the fingers.
Plant tender. You can use MGMA
to indicate the time of watering in order
to avoid excessive watering of plants. For
this, insert two metal strips on both sides
of the plant. Connect them to an earphone
plug using wires and insert the plug into
socket SOC3. Since soil-resistance increases with loss of water, the alarm can
be set/activated for a specific moisture
level. Adjust dials 1 and 2 such that the
buzzer sounds when the plant needs to be
watered. The buzzer stops in a short while
on sprinkling water over the soil supporting the plant. The next time the buzzer
will sound automatically when the plant
needs to be watered.
90
Game of quick hands. This game

requires an earphone plug with its two
terminals shorted. Inserting this plug into
SOC4 grounds input pins 5 and 6 of Schmitt NAND gate N2 via the shorted plug
in SOC4. Since output pin 4 is always in
high state, its periodic action of disabling
gate N1 is no longer there.
Connect a 0.1F capacitor to SOC2 using an earphone plug. Since its capacitance
value is higher than that of capacitor C1,
the frequency of the oscillator decreases.
The display shows a reading on momentarily pressing start/reset button
S2 and then quickly depressing stop
button S1. Adjust the dial to read 50
in the display. Now tell your friends
to press button S2 momentarily and
then S1. One who scores less is more
quicker than the others, and hence
the winner.
Water-level monitoring. Five
resistors R12 through R16 are connected in series and the junctions of
the resistors are extended to the five
levels of the water tank using wires
(refer Fig. 6). A reference rod is also
fitted with its lower end just below
level 1.
Plug-in a dummy resistor of
100k into SOC1 and rotate dial 1 to
the zero-resistance position. Adjust dial 2
to read 55 in the display. Cover the unit
digit with an opaque tape, so that only
the tens digit is visible. Now remove the
dummy resistor. Connect the other end
of five-resistor ladder and the reference
probe to SOC1. The display will show the
water levels from one-fifth to five-fifth of
the tank, depending on the actual level
at that time.
Measuring resistance. The idea is
simple. First, VR1 (dial 1) is excluded from
the circuit by rotating it to zero reading.
Then an unknown resistor is connected
to SOC1 and dial 2 is adjusted to read a
number just below 90. Now VR1 (dial 1) is
reinstated and rotated to display the same
reading. As dial 1 is marked for resistance
values, the position of dial 1 indicates the
value of unknown resistor.
With MGMA, up to 2-mega-ohm
resistor can be measured. Connect
the unknown resistor to SOC1 using crocodile clips. Rotate dial 1 to
the zero-resistance position without
touching the resistor, otherwise your
body resistance will get included in
the measurement. Adjust dial 2 such
that the display reads around 90. The
resistor is open if the display shows
0, and shorted if youre unable to set the

reading near 90.
Remove the unknown resistor. Without disturbing dial 2, slowly rotate dial 1
to get the same reading. Now dial 1 shows
the value of unknown resistor.
If the resistor value is less than 40k,
use SOC3 and repeat the same procedure
with dial 2 instead of dial 1 for accurate
measurement. The resistance value can be
read from dial 2.
Checking and measuing capacitance. Using MGMA you can measure
capacitances from 0.001 F to 5 F. First
check for the usability of the unknown
capacitor. Adjust dials 1 and 2 to read 50
in the display. Now check the unknown capacitor using SOC2 for unipolar or SOC4
for electrolytic/tantalum capacitors with
the inner and the outer terminals of the
socket for positive and negative terminals
of the capacitor. If there is no change
in the reading it means the capacitor is
shorted and a higher reading implies it
is good.
To find the value of an unknown nonelectrolytic (unipolar) capacitor, connect
the same to SOC2. Adjust dials 1 and 2 to
read a number around 80 in the display.
Now, without disturbing the dials insert
the known capacitors one by one in SOC2.
The unknown capacitor value is equal to
the value of the known capacitor for which
the display shows the same reading or
near the number 80.
The procedure is same for electrolytic and tantalum capacitors, except
that SOC4 is to be used in place of SOC2,
ensuring that the inner and the outer terminals of the socket are used for positive
and negative terminals of the capacitor,
respectively.
Testing a diode. Rotate dial 1 to
high-resistance position and adjust dial
2 such that the display shows a flickering
45. Test the diode in SOC3 using an earphone plug in the same manner as mentioned earlier. Interchange the leads and
test again. A shorted diode will not make
any change in the reading, while a good
one gives a reading of around 60 and 90 in
both the tests. And for the open diode, the
display shows 90 in both the tests.
While checking the diodes, a parallel
resistance of 100k is required across the
diode. Our body resistance may also do.
Other utilities. Heat alarm, fire
alarm, security alarm, strain gauge, intruder alarm, rain alarm, number game,
timer, and many other circuits can be realised using this MGMA circuit.
TRAFFIC AND STREET

LIGHT CONTROLLER
rajesh gupta
his circuit of an adjustable traffic

and street light controller can control the timings of four sides of
traffic lights separately. It can also control
the changeover from continuous traffic
light mode to blinking yellow light mode
(at night), and from blinking yellow light
mode to continuous traffic light mode
(during day). In addition, this circuit also
controls the automatic switching off/on
of the streetlights in the mornings and
evenings with flexible settingsdefining
the morning and evening time. In order
to prevent false triggering of streetlight
circuitry due to some shadow or light on
the sensor, some time delay is taken into
consideration before sending the control
signal for streetlight operation. Its operation does not require any software and
hardware knowledge.
This circuit can also be adopted for
synchronisation with the signals of adjacent traffic lights by introduction of
appropriate delay in traffic light signals
timings.
The circuit
The circuit has two partsthe first for
generation of control signals for streetlight
and traffic light modes and the second
for generation of four sides of traffic light
signals.
The circuit for streetlight and traffic
Fig. 1: Block diagram of traffic and street light controller
light modes (Part I) controls the switching time of streetlights in evenings and
mornings and the time to changeover from
PARTS LIST
Semiconductors:
IC1
- LM358 op-amp
IC2
- 7404 Hex inverters
IC3, IC6, IC12 - NE555 timer
IC4
- 74LS93 4-bit binary counter
IC5
- 74LS164 8-bit serial shift
register
IC7-IC9
- 7476 dual JK master-slave
flip-flop
IC10
- 7400 Quad 2-input NAND
gates
IC11
- 7410 Triple 3-input NAND
gates
IC13
- 7408 Quad 2-input AND
gates
IC14-IC17
- 7402 Quad 2-input NOR
gates
T1-T6
D1-D14
LED1, LED3,
LED6, LED9,
LED12
- 3mm red LED
LED2, LED5,
LED8, LED11 - 3mm green LED
LED4, LED7,
LED10, LED13 - 3mm yellow LED
stated otherwise):
R1, R2,
R18-R21
- 2.2-kilo-ohm
R3-R5, R8,
R12-R17,
R22-R25
- 100-kilo-ohm
R6
- 47-kilo-ohm
R7, R9, R11
- 10-kilo-ohm
R10
- 100-ohm
R26
- 47-ohm
R27
- 22-kilo-ohm
R28
- 6.8-kilo-ohm
VR1, VR2,
VR4-VR7
- 1-mega-ohm preset
VR3
VR8
Capacitors:
C1
- 220, 10V electrolytic
C2, C4, C6
- 0.01 ceramic
C3, C5
- 6.8, 10V electrolytic
Miscellaneous:
LDR1
S1
- Push-to-on switch
91
Fig. 2: Schematic diagram for the traffic and street light controller
92
continuous traffic light mode to blinking

yellow light mode (at night), and from
blinking yellow light mode to continuous
traffic light mode (in daytime). Thus it
decides the mode of operation.
The circuit for four sides of traffic
lights (Part II) also controls the time allowed for each side of traffic. It is further
classified into continuous traffic light
mode (for day) and blinking yellow light
mode (for night).
Part I Circuit. The block diagram of
the circuit for signal generation for streetlight and traffic light modes is shown
above the dotted line in Fig. 1. A natural
light-dependent voltage and a reference
voltage, which determines the evening and
morning times are connected individually
to the two inputs of a comparator. Low
and high states of the comparator output
decide morning and evening timings,
respectively. The output of comparator is
properly delayed for obtaining the signals
for streetlight and traffic light modes.
In the detailed circuit diagram shown
above the dotted line in Fig. 2, a natural
light-dependent voltage is obtained at the
junction of light-dependent resistor LDR1
and resistor R7. Resistor R6 is used in
parallel with LDR1 to limit the variation
of the LDR. Light-dependent voltage and
variable reference voltage are connected to
the inverting and non-inverting terminals
respectively of comparator IC1(a).
In the evening, voltage at the inverting terminal of the comparator decreases
with time due to the increasing resistance of LDR1. At a particular natural
light intensity (determined by variable
reference voltage, which can be adjusted
with the help of preset VR8), it becomes
less than the voltage at the non-inverting
terminal. This drives the comparator into
positive saturation region. Similarly, in
the morning the comparator goes into
negative saturation region at the same
natural light intensity. In this way, the
comparator gives high voltage (logic 1)
for evening and low voltage (logic 0) for
morning.
IC1(b), with the non-inverting terminal biased at about 1/3rd Vcc, is simply
used as an inverter (though wired as
comparator). The inverted output of
comparator IC1(a) is coupled to transistor
T1 through resistor R4, while its direct
output is coupled to transistor T2 via
resistor R5.
It is observed that transistor T1 is
cut off in the evening and Vcc is applied
to pin 7 of timer IC3 (wired in astable
multivibrator mode) via resistor combination RA1 (=R2+R3+VR1), while in the

morning T2 is cut off and Vcc is applied
to pin 7 of IC3 via RA2 (=R1+R8+VR2).
In other words, the time period of IC3 is
dependent on RA1 from the evening and
RA2 from the morning.
The diode pair of D1 and D2 or D4
and D5 is used to effectively isolate pin 7
of IC3 from being pulled towards ground
via the conducting transistor (T2 in the
evening and T1 in the morning). Time
period of 555 clock in astable mode can
be determined from the following relationship:
T = RA (C/1.44) + 2 RB (C/1.44)
where RA = RA1 from the evening and
RA = RA2 from the morning, while RB
= R9 = 10 kilo-ohm and C = C1 = 220
F. Clock-1 output of IC3 is connected
to 4-bit negative-edge-triggered counter
74LS93 (IC4).
Period of output QD of IC4 is 16 times
the clock-1 time period. This QD output
(low for first eight clock-1 cycles and high
for the next eight clock-1 cycles, and repeating thereafter) of IC4 is connected to
the clock input of an 8-bit (positive-edgetriggered) serial shift register 74LS164
(IC5).
The output of IC1(a) forms the data
(D) input for the shift register. The data
(D) at QA output is available after eight
clock-1 cycles, while that at QH is available after 120 clock-1 cycles. Thus morning/evening (low/high) data is available at
QA and QH outputs after 8 and 120 clock-1
cycles, respectively. Note that the clock-1
period itself differs for morning data and
evening data.
Streetlight indicator (LED1) is connected to QA output of shift register IC5.
The evening data (high) from comparator

IC1(a) passes to the streetlight after eight
clock cycles of clock-1. This delay is taken
into consideration in order to prevent
false signals to the streetlight due to some
shadow or light on the sensor.
The delayed high QH output provides
the control signal for night to the second
part of circuit and changes continuous
traffic light mode to blinking yellow light
mode. In this way the time at which night
functioning of traffic light starts can be
adjusted by choosing appropriate time
period for clock-1 by adjusting the value
of RA1. Similarly, the time at which day
functioning of traffic light starts (stop
blinking yellow light mode and start
continuous traffic light mode) can be
adjusted by RA2.
Low (delayed morning signal) and
high (delayed evening signal) QH outputs
go to the second part of circuit for selecting the mode of traffic light. Table I
summarises the functioning of the circuit
for signal generation for streetlight and
traffic light modes.
Part II Circuit. The block diagram
of the circuit for signal generation for
four sides of traffic lights is given below
the dotted line in Fig. 1. Here, the 4-bit
and 2-bit counters are joined together to
form a 6-bit counter. Outputs of the 2-bit
counter, representing two MSB digits, are
connected to a decoder that has two control inputs and four outputs. The decoder
activates one of the four outputs depending upon the input (00 or 01 or 10 or 11)
of 2-bit counter.
Each output of the decoder can drive
clock-2 at a different frequency. These four
outputs are connected to the four sides of
traffic lights and select each side one after
Table I
Functional Summary of Part I Circuit
Time
Output Output at Output at Activated RA

of IC1(a) QA of IC5 QH of IC5 Resistance

Evening
HIGH LOW
LOW
RA1
After 8 cycles of clock-1
HIGH HIGH
LOW
RA1
(Delay time for streetlight)
After 120 cycles of clock-1 HIGH HIGH
HIGH
RA1
(Delay time for night)
Morning
LOW
HIGH
HIGH
RA2
After 8 cycles of clock-1
LOW
LOW
HIGH
RA2
(Delay time for streetlight)
After 120 cycles of clock-1 LOW
LOW
LOW
RA2
(Delay time for day)
Evening
HIGH LOW
LOW
RA1
Delay times and evening/morning times are adjustable.
A: Continuous traffic light mode B: Blinking yellow light mode
Street Traffic
Light Light
(LED1) Mode
OFF A
ON
A
ON
ON
OFF
B
B
OFF
OFF
93
Fig. 3: Actual-size, single-sided PCB for the circuit in Fig. 2
94
another. The time in which the preceding

4-bit counter counts from 0000 to 1111
(16 counts) is the time allowed for each
side of traffic lights.
First, when the 4-bit counter counts
from 0000 to 0001 (two counts), yellow
light of the selected side will turn on.
From count 0010 to 1101 (12 counts),
green light will turn on. Again from
1110 to 1111 count (two counts), yellow
light will turn on. Meanwhile, in the
other three sides of traffic lights that are
not selected by the decoder, red light will

be on. Similar operation will repeat for
each of the selected side in its turn.
Reset pin of clock-3 and clear pins of
the 6-bit counter are controlled by output
QH from IC5 of Part I. At night, QH will go
high and the 6-bit counter will clear, while
clock-3 becomes active. As a result, yellow
lights of the four sides of traffic light will
blink simultaneously.
The detailed circuit diagram is
given below the dotted line in Fig. 2. The
Fig. 5: Connections for vehicular traffic lights and pedestrians signals
Fig. 6: The traffic and street light controller
active-low, clear input signal for the 6-bit

counter (formed by dual J-K flip-flops
inside IC7 through IC9) is provided
from the output of NOR gate E1, whose
one input is connected to QH output
of shift register IC5 of Part I and the
other input is connected to the output of
inverter gate N3. The input of inverter
gate N3 is connected to push-to-on reset
switch S1.
Thus the 6-bit counter will clear when
QH output is high or the reset button is
pressed. The reset key, when pressed, also
causes counter IC4 and shift register IC5
of Part I to be cleared. QH output of IC5 is
connected to reset pin 4 of clock-3 (IC12).
The output of this clock is connected to
inverter gate N4. Low QH (during day)
activates the 6-bit counter and deactivates
clock-3. Due to this, the output of inverter
gate N4 will be high during the day. This
output is connected to one of the inputs of
four AND gates H1 through H4. Each of
these AND gates is a part of one side of
traffic light circuit.
NAND gates B1, B2, and B3 are connected to the outputs of flip-flops F2, F3,
and F4 of the 6-bit counter. The final
output of this circuit (the output of gate
B2) will be high whenever the first four
bits of the counter are 1110 or 1111 or
0000 or 0001 (14 or 15 or 0 or 1), otherwise
it will be low. Accordingly, inverter N5
output will be low for the above contents
of the counter and high for the remaining
contents (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
or 13).
The output of NAND gate B2 and its
complement (the output of inverter N5)
are connected to NOR gates X2 (=E2,
J2, K2, and M2) and X3 (=E3, J3, K3,
and M3) of the each side of traffic light,
respectively. Other inputs of X2 and X3
NOR gates are common.
The last two flip-flops (F5 and F6) of
the 6-bit counter are connected to four
NAND gates G1 through G4 in such a way
that the output of G1, G2, G3, and G4 will
be low when last two counter bits are 00
(0), 01 (1), 10 (2) and 11 (3), respectively.
For example, when last two bits of counter
contents are 01 (1), only output of NAND
gate G2 will be low and others (G1, G3 and
G4) will be high.
The complements of these four NAND
gate outputs (obtained from collectors of
transistors T3 through T6) are connected
to the four RA resistors of 555 clock-2.
Other terminals of these four resistors
are connected to the anodes of diodes D8,
D10, D12, and D14, while their cathode
95
Table II
Daytime Functions of Part II Circuit
Counter
Decoder output
Activated RA
Glowing LEDs
contents
G1 G2 G3 G4
resistance
000000 -
0 1 1 1
RA3
4,6,9,12 (Yellow light of 1st side and
000001
red light of other sides)
000010 -
0 1 1 1
RA3
2,6,9,12 (Green light of 1st side and
001101
001110 -
0 1 1 1
RA3
4,6,9,12 (Yellow light of 1st side and
001111
010000 -
1 0 1 1
RA4
3,7,9,12 (Yellow light of 2nd side and
010001
010010 -
1 0 1 1
RA4
3,5,9,12 (Green light of 2nd side and
011101
011110 -
1 0 1 1
RA4
3,7,9,12 (Yellow light of 2nd side and
011111
100000 -
1 1 0 1
RA5
3,6,10,12 (Yellow light of 3rd side and
100001
100010 -
1 1 0 1
RA5
3,6,8,12 (Green light of 3rd side and
101101
101110 -
1 1 0 1
RA5
3,6,10,12 (Yellow light of 3rd side and
101111
110000 -
1 1 1 0
RA6
3,6,9,13 (Yellow light of 4th side and
110001
110010 -
1 1 1 0
RA6
3,6,9,11 (Green light of 4th side and
111101
111110 -
1 1 1 0
RA6
3,6,9,13 (Yellow light of 4th side and
111111
Note. The two MSB digits determine the side, while the next four digits determine the time for
which the mentioned LEDs are on.
terminals are all connected to pin 7 of

555 clock-2 (IC6). This is analogous to the
fashion in which RA1 and RA2 have been
connected in Part I in the clock-1 circuit.
When last 2-bit counter contents are
00, RA3 (=R21+R25+VR7) will become
active and other three resistors RA4, RA5,
and RA6 will become inactive. Therefore
the time period of clock-2 of the 6-bit counter will be dependent upon RA3.
Similarly, when last 2-bit counter contents are 01 or 10 or 11, the time period
of clock-2 will be dependent upon RA4
(=R20+R24+VR6), RA5 (=R19+R13+VR5),
and RA6 (=R18+R12+VR4), respectively.
The output of NAND gate G1 is connected to the common input of NOR gates
E2 and E3 of the first side of traffic light
and complements of the outputs of other
three NAND gates G2, G3, and G4 are
connected to one of the inputs of NOR
gates J1, K1, and M1, respectively. The
other inputs of these NOR gates are connected to QH output of IC5. Red and green
lights are connected to the outputs of NOR
gates X4 (=E4, J4, K4, and M4) and X2
(=E2, J2, K2, and M2), and yellow light is
connected to AND gate of each side of the
traffic light.
During daytime, the outputs of AND
gates (which are connected to yellow
lights) will be the same as the outputs
96
of NOR gates X3(=E3, J3, K3 and M3)

of each side, because one of the inputs
of AND gates is high in daytime. Low
QH (during daytime) forces NOR gates
J1, K1, and M1 to work as the inverter
gate for the other inputs. Therefore the
common input of NOR gates X2 and X3
of sides 1, 2, 3, and 4 will be the same as
the output of NAND gates G1, G2, G3,
and G4, respectively.
Let us suppose that initially the
contents of the 6-bit counter are 000000.
When the counter counts up from 000000
to 001111, the output of NAND gate
G1 will be low and that of other NAND
gates G2, G3, and G4 high. Due to this,
RA3 will be active and the time period of
clock-2 of the counter will be according
to RA3.
The high output of NAND gates G2,
G3, and G4 forces the output from NOR
gates J2, K2, M2 and J3, K3, M3 to low
state. These low outputs are input to
NOR gates J4, K4, and M4, due to which
the output of these gates will be high. It
means yellow and green lights will be off
and red light will be on in the remaining
three sides of the traffic light.
Due to the low output of NAND gate
G1 (which is connected to the common
input of NOR gates E2 and E3 of first
side), the output of NOR gates E2 and E3
of first side will depend on the output of

the three-NAND gate circuit (comprising
gates B1, B2, and B3).
When the 6-bit counter counts from
000000 to 000001, the output of the threeNAND gate circuit will be high, which is
connected to NOR gate X2 of each side
and its complement is connected to NOR
gate X3 of all sides. Due to this, the output
of NOR gate E3 will be high and those of
NOR gates E2 and E4 low. In short, during the count period 000000 to 000001
yellow light of the first side of traffic light
and red light of the other three sides will
be on.
When the counter counts up further
from 000010 to 001101, the output of the
three-NAND gate circuit will be low and
its complement will be high. Due to this
reason, the output of NOR gate E2 will
go high and that of NOR gates E3 and
E4 low. Therefore, when counter contents
increment from 000010 to 001101, green
light of first side and red light of all the
other sides will be on.
Again from 001110 to 001111, the
output of three-NAND gate circuit will
go high, due to which yellow light of first
side and red light of the other sides will
turn on. The time in which the counter
counts from 000000 to 001111 can be
adjusted by RA3. The functioning of the
other three sides of the traffic light is
similar.
Daytime functional summary of the
circuit for signal generation for four sides
of traffic light is given in Table II. Change
in RB resistance (VR3+R11) of clock-2,
being common for all sides, will change
the time allowed for each side of traffic
light by an equal amount.
At night, QH output of IC5 will be
high, due to which the 6-bit counter will
clear and clock-3 will start working. The
output of NOR gates J1, K1, and M1 and
NAND gate G1, and the complement of
the output of the three-NAND gate circuit will be low. This forces the output of
NOR gate X3 of each side to high state.
This high output will turn off all the red
lights and give high signal to one of the
inputs of AND gates H1 through H4. The
other input of these AND gates is connected to the complement of clock-3, due
to which all the four sides of yellow light
will blink.
The four sides of traffic light signals
can be used for driving vehicular traffic
signals for straight, right, and left turns
and pedestrians signals. Fig. 5 shows
one of such possible connections of vehicu-
lar and pedestrians signals. The complete

circuit in model form is shown in Fig. 6.
Actual-size, single side PCB for the circuit
shown in Fig. 2 is given in Fig. 3 with its
component layout in Fig. 4.
Calibration
Set preset VR8 in such a position that the
output of comparator IC1(a) switches from
one state to the other at a particular intensity of natural light. Variable resistors
VR1 and VR2 can be calibrated on a time
scale using the following relationships:
VR1 = (1/120) (1.44 TNight/220) 106
(122.2) 103
VR2 = (1/120) (1.44 TDay/220) 106
(122.2) 103
where TDay and TNight are delay times in

seconds (time interval between switching
of comparator IC1(a) and when the traffic
light switches its mode) corresponding to
day and night, respectively.
Variable resistors VR4 through VR7
can be calibrated on a time scale by the
following relationship:
VR (4,5,6,7) = (1/16)(1.44 T/6.8) 106
(122.2) 103 2 VR3
where T is the time allowed (in seconds)
for the side of traffic light in which the
corresponding variable resistance is connected.
Possible enhancements. Stepper
motor-driven wiper can be used for cleaning the dust over the light sensor during
night time. Control signal for this can be
obtained from the shift register.

Also, time-controlling variable resistors VR4 through VR7 of Part II can
be replaced by LDRs with a small light
source whose light intensity varies according to the strength of traffic on each side.
Implementation of this system requires
traffic-sensing sensors. This system will
change the time of each side of traffic
light according to the strength of traffic.
Further, the present circuit being
only a demonstration model uses LEDs
for lights. To drive high-wattage lights,
one can easily boost the signals used for
driving the LEDs to operate solidstate or
electomechanical relays.
97
Lead-Acid Battery
Charger with Active
Power Control
m.k. chandra mouleeswaran
igh-power lead-acid battery chargers usually employ constant

voltage charging method. In
such chargers the charging is monitored
against the battery terminal voltage.
Constant voltage at a constant current

results in a very large initial current in
a flat battery and a very low current in
a partially charged battery. To overcome
this problem, the charger should be made
Fig. 1: Schematic diagram of lead-acid battery charger
98
to vary the charging current in accordance

with the existing terminal voltage of the
battery.
In the circuit presented here the
charging current is adjusted against the
terminal voltage in such a way

that any battery with any level
of charge can be connected to the
charger without requiring any
manual adjustment. The charging voltage is held constant, while
an appropriate charging current
range is automatically selected
at successive different battery
terminal voltages. And when the
battery gets fully charged, the
charger switches over to tricklecharge mode.
The circuit consists of the
Fig. 2: Charging current versus battery terminal voltage
Fig. 3: Actual-size, single-sided PCB for battery charger
following sections:
1. The DC power supply section.
2. The series DC voltage regulation
section.
3. The battery status indication-cumcharge current regulation section.
The DC power supply section. The
230V AC mains supply is connected to
a step-down transformer with a secondary rating of 24V AC, 5A through DPDT
toggle switch S1. When switch S1 is
in off position, the availability of
mains supply is indicated by green
LED1. When switch S1 is toggled to on
position, red LED2 glows to indicate
that the charger is on. The four
15-kilo-ohm resistors R1, R2 and
R3, R4 in the path of LED1 and
LED2, respectively, are rated at
1 watt each.
The output from the secondary
of transformer X1 is rectified by the
bridge rectifier comprising 1N5408
diodes D3 through D6, rated at 800V,
3A. The rectified output is smoothed
by three capacitors C1, C2, and C3
before being applied to the rest of the
circuit. The 4.7-kilo-ohm resistor R6
acts as a bleeder resistance. LED7
indicates that DC is available at the
output of this section.
The series DC voltage regulation section. This section is
configured around power Darlington
transistor TIP142 (T1) that functions
in conjunction with transistor T3
(BC549) and preset VR2 to regulate
the output voltage from the DC voltage regulator section.
Since zener diode ZD1 conducts
only after the output voltage reaches
15 volts, the output voltage needs to
be adjusted in the vicinity of 15 volts
with the help of preset VR2. When
transistor T3 conducts fully, the base
of transistor T1 is pulled towards
ground via resistor R8 and it stops
conducting after the output voltage
exceeds a specific value.
Transistor T2 (also a BC549)
helps in current limit adjustments.
Low-value, high-wattage resistors
R15 (shunted by R14) through R19
connected in series form a currentlimiting resistor network at the
output of transistor T1. This resistor
network limits the charging current depending on the energisation/
de-energisation state of relays RL1
through RL4 that select the current range. The resistors are either
99
Parts List
Semiconductors:
IC1
- LM324 quad op-amp
T1
- TIP142 power Darlington
transistor
T2, T3
T4-T7
- 2N2222A npn transistor
D1, D2,
D7-D11
- 1N4007 rectifier diodes
D3-D6, D12 - 1N5408 rectifier diodes
LED1
- Green LED
LED2
- Red LED
LED3
- Bright yellow LED
LED4, LED5 - Bright green LED
LED6, LED7 - Bright red LED
ZD1
- 15V, 1W zener diode
ZD2
- 6.8V, 1W zener diode
Capacitors:
C1, C2
C3
C4
C5
- 100nF ceramic
Resistors (all -watt, 5% carbon unless
stated otherwise)
R1-R4
- 15-kilo-ohm, 1W
R5
- 2.2-kilo-ohm
R6
- 4.7-kilo-ohm, 0.5W
R7, R10, R12 - 1-kilo-ohm
R8
- 100-ohm
R9
- 470-ohm
R11
- 4.7-kilo-ohm
R13
- 47-ohm
R14-R15
- 0.66-ohm, 3W wirewound or
fusible
R16
fusible
R17
fusible
R18
fusible
R19
- 1.0-ohm, 1W wirewound
R20-R23
- 470-ohm, MFR 0.5% or 0.1%
R24
- 820-ohm, MFR 0.5% or 0.1%
R25
- 10-kilo-ohm, MFR 0.5% or
0.1%
R26-R28
- 1.2-kilo-ohm
R29
- 1.5-kilo-ohm
VR1-VR2
VR3
VR4
Miscellaneous:
RL1-RL4
- 24V DC, 500-ohm relay
contacts at 10A DC
X1
- 230V AC primary to 0-24V,
5A secondary transformer
S1
- DPDT toggle switch
F1
- 750mA cartridge glass fuse
100
Table
LED/Relay Operation and Charging Resistance
Battery
LED/Relay status
voltage
LED3
LED4
LED5
LED

/RL1
/RL2
/RL3
/RL4
<10.5V
Off
Off
Off
Off
10.5V
On
Off
Off
Off
11.5V
On
On
Off
Off
12.5V
On
On
On
Off
13.5V
On
On
On
On
* 0.5A is taken as the trickle charging current.
shorted or added by respective relay

contacts RY1 through RY4 depending on
the charging current requirement from
the regulator.
The battery status indication-cumcharge current regulation section. In
this circuit, a quad op-amp LM324 (IC1)
is wired as a four-stage comparator to
indicate the battery voltage with the help
of four LEDs (LED3 through LED6), while
at the same time selecting and driving
corresponding relays to set the charging
current range.
The 6.8V reference voltage developed
across zener diode ZD2 is proportionately applied to the inverting terminals
of comparators A1 through A4, while the
sampled battery voltage is proportionately
applied to the non-inverting terminals of
all the comparators.
Preset VR3 may be adjusted to obtain
the reference voltages as shown in Fig. 1.
Preset VR4 may be adjusted by applying
an external fixed voltage of 10.5V, 11.5V,
12.5V, or 13.5V across the batterys screw
terminals, ensuring that the corresponding LEDs (and relays) light up (energise)
in accordance with the table.
In the charge characteristic curve of
Fig. 2, it can be seen that the terminal
voltage is compared by the comparators
against the preset values and the charging current is selected accordingly. Thus a
battery of any charge level can be connect-
Charging
resistance
Preset
current
1 ohm
0.33 ohm
0.53 ohm
1 ohm
2 ohms
1A
3A
2A
1A
0.5A*
edand left unattended under the control of

this charger circuit.
When the battery is flat with terminal voltage below 10.5 volts, the initial
charging current is selected at just one
ampere because a higher initial charging
current may cripple both the battery and
the charger. A higher charging current is
selected only when the battery has reached
a safe level of terminal voltage.
Later, as the battery starts charging
and its terminal voltage starts rising, the
charging current is decreased in proper
steps. Upon reaching the full voltage of 13.5
volts, the charger switches to the trickle
charge mode with resistor R19 coming into
the charging path. Optionally, one can
switch off the charger on energisation of relay RL4 by just removing resistor R19 from
the circuit. Whenever the terminal voltage
level of the battery goes low, the charger
automatically resumes charging.
Figs 3 and 4 show the actual-size, single-sided PCB and the component layout,
respectively, of the charger circuit.
Note. To ensure proper functioning
of the circuit, use good-quality relays and
precise-value resistors (R14 through R24)
with tolerance as mentioned in the Parts
List. Connect the metal housing of the
charger circuit to the earth line of the AC
mains supply for personal safety.
Amplitude Measurement of
Sub-Microsecond Pulses
anil kumar maini
pulse or a repetitive train of

pulses is one of the most frequently encountered electronic
signals, and the conventional way to
determine its peak amplitude is to have
an oscilloscope display of the waveform.
An oscilloscope that has the required
bandwidth to correctly display submicrosecond-wide pulses is an expensive
instrument, and is often beyond the reach
of most electronics enthusiasts, hobbyists, and small-scale units. The circuit
presented here allows you to measure the
peak amplitude of a single pulse as well
as of a repetitive train of pulses with a
conventional multimeter.
The circuit is capable of measuring
peak amplitude of pulses as narrow as
100 nanoseconds (ns) up to a maximum of
100V amplitude. There is practically no
limit on the maximum value of the pulse
width. It can also be used to measure the
peak amplitude of a repetitive pulsed
waveform as long as the time interval
between two successive pulses is greater
than 100 microseconds (s).
The circuit
The pulse under measurement is fed to
the input of a cascaded arrangement of
two unity-gain peak detection stages built
around IC1 and IC2 using high-speed
op-amps AD829, as shown in Fig. 1. The
op-amp has a guaranteed unity-gain bandwidth of 120 MHz and a slew rate of 230
V/s, and it is capable of driving highly
capacitive loads. This makes it ideal for
receiving input pulses as narrow as 100
ns. D1 and D2 (1N914) are high-speed
switching diodes having a response time
of the order of 2 ns to 3 ns.
The input pulse gets stretched to
about 10 s at the output of the first peakdetection stage built around IC1 and to
about 100 s at the output of the second
peak-detection stage built around IC2.
With switch S1 open, the circuit can
Fig. 1: Circuit for measuring sub-microsecond pulses

101
Photograph of authors prototype
switch causes
division of the
input voltage
by a factor of
10 due to the
arrangement
of resistors R1
through R3.
Fig. 2: Waveforms at various points of the circuit
The peak
amplitude of
receive input pulses greater than 100 mV
the stretched pulse at the output of the
(which is the same as the reference voltage
second peak detector is the same as
set for comparator IC3, LM319) but less
the input pulse peak amplitude. This
than or equal to 10 volts.
output amplitude is halved by resistors
With switch S1 closed, the input pulse
R9 and R10 before feeding the same to
amplitude may be anywhere between
the analogue input of IC5 (ADC-type
1 volt and 100 volts. The closure of the
AD0808). This ensures that for the maxi-
Fig. 3: Actual-size, single-side PCB layout for the circuit
102
mum input pulse amplitude of 100 volts,

the ADC analogue input is limited to 5
Parts List
Semiconductors:
IC1, IC2
- AD829 op-amp
IC3
- LM329 comparator
IC4
- 74121 monostable multivibrator
IC5
- AD0808 analogue-to-digital
converter
IC6
- DAC0808 digital-to-analogue converter
IC7
- LF356 op-amp
IC8 (N1-N3) - 74HCT04 hex inverter
IC9 (N4-N7) - 7400 NAND gate
D1, D2
- 1N914 high-speed switching
diode
ZD1
- 2.5V zener diode
stated otherwise):
R1, R2
- 18-kilo-ohm
R3, R16
- 1-kilo-ohm
R4
- 12-kilo-ohm
R5, R6
- 22-kilo-ohm
R7, R8
- 15-kilo-ohm
R9-R12
- 100-kilo-ohm
R13
- 470-ohm
R14
- 220-kilo-ohm
R15, R18, R19,
R24, R25
- 10-kilo-ohm
R17
- 2.2-kilo-ohm
R20, R21
- 2.7-kilo-ohm
R22
- 4.7-kilo-ohm
R23
- 33-kilo-ohm
VR1
Capacitors:
C1, C2, C4, C5,
C7-C9, C11-C17
C19
- 0.1F ceramic disk
C3, C10
C6
C18
- 56 pF ceramic disk
Miscellaneous:
S1, S2
- On/off switch (SPST)
Meter
- Multimeter
Operation
volts, which is the maximum amplitude

it can accept.
The output of the first peak detector
stage after a division by a factor of 2 by
the arrangement of resistors R11 and
R12 feeds comparator LM319 (IC3). The
leading edge of the pulse output from the
comparator coincides with the leading
edge of the input pulse. The leading-edge
comparator output triggers monoshot
74121 (IC4) to produce a 1s pulse (as
determined by timing components R1
7-C10) at its Q-output, with its leading
edge coinciding with the leading edge of
the input pulse.
The monoshot output is passed
through an appropriate NAND gate
logic circuit built around 7400 (IC9) and
it acts as the start-of-conversion pulse

for analogue-to-digital converter IC5
(ADC0808). The NAND logic is used here
to incorporate the reset feature.
The clock generator circuit for IC5
is built around 74HCT04 (IC8) to provide 1MHz clock. The clock frequency
is decided by R24, R25, and C18. The
latched digital output from IC5 feeds the
corresponding inputs of DAC0808 (IC6).
The DAC output, which is a latched DC
current, is converted into a proportional
voltage in the current-to-voltage circuit
built around op-amp LF356 (IC7). This DC
voltage is connected to the multimeter for
indication of peak amplitude of the input
pulse to the circuit. Potentiometer VR1 is
meant for calibration.
Every time there is a pulse at the input,

there is a stretched pulse appearing at the
analogue input of the ADC, with its leading edge coinciding with the leading edge
of the input pulse. Fig. 2 shows waveforms
available at various test points marked A,
B, C, D, and E in the circuit shown in Fig.
1. Also, there is a start-of-conversion pulse
appearing at the relevant input of the
ADC. The conversion starts at the trailing
edge (test point E) of this pulse 1 s after
the leading edge of the input pulse.
Since the stretched pulse is about
100s wide, the peak amplitude of the
pulse 1 s later is almost the same as the
actual peak amplitude. At the same time,
this small delay ensures that the analogue
input is already present on the relevant
input at the start of conversion.
The latched digital output from the
ADC feeds the corresponding inputs of
the DAC0808 (IC6) as stated earlier. The
output of the DAC, after conversion into
the proportional voltage by LF356 (IC7),
is fed to the multimeter (set to appropriate DC voltage scale) for measurement of
peak pulse amplitude. Potentiometer VR1
is used for calibration.
The display holds the peak amplitude
of the last pulse until it is reset using
switch S2 or it is updated by another
pulse at the input. The accompanying
photograph shows the assembled circuit
that the author used for performance
evaluation.
An actual-size, single-side PCB for the
circuit is shown in Fig. 3 and its component
layout in Fig. 4.
103
Automatic Submersible
Pump controller
k.c. bhasin
number of construction projects as

well as circuit ideas for water-/
fluid-level control have appeared
in EFY over the years, but so far no dedicated project has appeared for automating
the control of submersible water pumps.
Looking into the demand for such a project
from readers, we present here a circuit for
2850 rpm typically.

The ESP body is made of cast iron
or stainless steel. For low and medium
range, one can use 3-phase or split-phase
(also referred to as 2-phase) supply. ESPs
of 3 HP or higher rating invariably use
3-phase supply.
Let us consider a typical case of 1.5HP
Fig. 1: Line diagram of control panel for manual operation of ESP motor
automating the operation of an electrical

submersible pump (ESP) based on the
minimum and the maximum levels in the
overhead tank (OHT). This circuit can be
interfaced to the existing manual control
panel of an ESP and can also be used as a
standalone system after minor additions.
ESP basics
Electrical submersible pumps are singleor multiple-stage radial-flow pressure series impeller pumps that are close coupled
to the motor for low and medium heads.
These find applications in domestic, industrial, irrigation, air-conditioning, and
various other systems.
The ESPs are classified by the bore
diameter (which generally varies from
100 mm to 200 mm), horse-power (from
about 0.5 HP to 40 HP), and discharge rate
(typically 120 litres per minute for 0.5 HP
to about 2000 litres per minute for 40 HP).
These are run at a fixed speed, which is
104
the run capacitor value can be calculated

using the simple thumb rule (70 F per
HP), while the start capacitor value may
be determined from Table I.
Manual operation of ESP motor
(Fig. 1). The control panel comprises an
isolator switch, push-to-on single-/dualsection start button, push-to-off stop
button, a triple-pole moulded case circuit
breaker (MCCB) for motor protection with
magnetic trip and resetting facility (with
an adjustable current range of 12 to 25 amperes), start and run capacitors, amperemeter, voltmeter, neon indicators, etc.
(Note. The MCCBs used for motor control are termed as motor circuit protectors
(MCPs). These are classified/catalogued
by number of poles, continuous ampere rating, and magnetic trip range (current). For
details, you may visit Cutler-Hammers
Website or contact Bhartia Cuttler-Hammer dealers.)
Fig. 1 shows a simplified control panel
diagram, along with ESP motor wiring.
The start pushbutton (green), which is
normally open, and the stop pushbutton
(red), which is normally closed, are in
ESP with 100mm bore diameter, using

a split-phase motor. The motor draws a
running current of 10 to 11 amp, while
Motor rating
Start capacitor value (F)
the starting current is around 2.5 to three
in HP
230V AC (working)
times the running current value.

275V AC (surge)
To obtain a higher initial torque, the
1/6
20-25
run winding is connected in series with a
1/5
30-40
1/4
40-60
parallel combination of 120-150F, 230V
1/3
60-80
AC bipolar paper electrolytic capacitor
1/2
80-100
and 72F, 440V AC run-mode capacitor.
3/4
100-120
After two or three seconds of running,
1
120-150
1
150-200
when the motor has picked up sufficient
2
200-250
speed, the start capacitor goes out of the
circuit because of the opening
of the centrifugal switch inTruth Table for relay operation
side the motor, while the run Water level
Relay operation (2.5 3 sec.) Pump motor
capacitor stays in the circuit in tank
RL1 (stop) RL2 (Start)
operation
permanently. For ESPs that Below
No
Yes
Starts
dont have an integral cen- low level
trifugal switch arrangement, Above
a dual-section start switch low level
(explained later) can be used but below
high level
No
No
Remains on
to perform the function of the
Reaches
centrifugal switch.
high level
Yes
No
Stops
For the split-phase motor,
Fig. 2: Circuit diagram for automatic control of ESP motor via control panel (Fig. 1)
series with the live or phase line.

The isolator switch is normally in on
position. When start button is momentarily pressed, the contactor energises via the
closed contacts of off button. One of the
contact pairs of the contactor is used as
the hold contact to shunt on button and
provide a parallel path to the contactor
coil, which thus latches.
The supply to the motor gets completed
via the other N/O contacts of the contactor and the pump motor starts. When the
motor gains sufficient speed (around 80
per cent of the normal running speed), the
centrifugal switch opens to take the start

capacitor out of the circuit and only the run
capacitors (2x36 F) permanently stay in
series with one of the two stator windings
of the ESP motor.
In case the ESP is not provided with
an integral centrifugal switch, a second
section in start button (shown in light
shade in Fig. 1) can be used to shunt
points E and F. Since this switch section has no hold on contacts, the start
capacitor will go out of circuit as soon as
start button is released. The motor can be
switched off by momentarily depression of
off button, which interrupts the supply to

the contactor coil.
To interface the control circuit shown
in Fig. 2, we use circled points A and B
(in parallel with on button) and C and D
(formed by disconnecting one of the wires
going to off button terminal, i.e. in series
with off button). Points E and F will be
used if the ESP does not have an integral
centrifugal switch.
It may be recalled, by referring to Fig.
1 of the project Auto Control for 3-phase
Motor published in EFYs June issue
(same EP Vol. 22), that wiring of on and
off buttons of 3-phase (4-wire system)
and split-phase motors are identical.
Hence the control circuit described here
can equally be used for 3-phase motors of
up to about 10 HP. For motors of higher
HP, one must use star-delta type starter
configuration.
The circuit
Fig. 3: Actual-size, single-sided PCB layout for Fig. 2
As shown in Fig. 2, the 230V AC mains

(tapped from the same points from which
it is fed to the control panel of Fig. 1) is
stepped down to 12V-0-12V by transformer X1. The rectified output smoothed
by capacitor C1 is used for operation of
105
heavy-duty 24V, 250-ohm relays RL1

and RL2 having contact rating of 30 amp.
The relay contacts identified by letters A
through F in Fig. 2 are to be connected to
identically marked points in Fig. 1.
Note that point C in Fig. 1 is created
by breaking the connection going to point
D on the stop switch. We have used relay
RL1 with single changeover contacts. If
you need higher current rating, use relays with double changeover contacts by
interconnecting N/C, N/O, and pole of one
set to the corresponding terminals of the
other set. The circuit, except for the relay
drivers, is operated with regulated +12V
supply developed across capacitor C2.
The +12V supply is fed to the common
probe in the overhead tank/storage tank
via 10-kilo-ohm resistor R1 and diode
D9. Low-level and high-level probes are
connected to the input of CMOS inverter
gates N3 and N1, respectively, via 10-kiloohm resistors.
The final low-level output at pin 10 of
gate N5 goes high when the water level
in the overhead/storage tank is below the
low-level probe. The final high-level output
at pin 4 of gate N2 goes high as soon as the
water touches the high-level probe.
Both IC1 and IC2 have been configured as monostables with a pulse width of
about 2.5 to 3 seconds. This period is found
to work optimally for start and stop
switch operation of the manual control
panel. The respective monostables for low
level (IC2) and high level (IC1) get triggered via transistors T2 and T1 when the
final output at pin 10 of gate N5 or pin 4 of
gate N2, respectively, goes high.
The connection of reset pins of IC2 and
IC1 to the outputs of gates N1 and N2,
respectively, ensures that no false triggering of monostables takes place due to
the noise generated during changeover of
106
relay contacts, and also that the two relays

never operate simultaneously.
In the case of mains failure, the pump
stops if it was already running. When the
mains supply resumes, the pump starts
only when the water goes below the low
level. In such a situation, you can restart
the motor by manual operation of start
button on the control panel.
The connections for the ammeter and
the voltmeter, not shown in Fig. 1, can be
made easily. Connect the voltmeter across
the incoming live and neutral lines, and
insert the ammeter in series with the stop
switch by breaking the live line connection
after the stop switch.
Transformer, relays, switches, fuse,
and neon indicator (with integral resistor)
are to be mounted on the cabinet.
Precautions
The following are the vital points to be borne

in mind during wiring, assembly, and installation:
1. One-watt resistor R18 should be
mounted leaving some space below it.
2. Use multistrand insulated copper wires
of 15-amp rating for taking connections from
relay terminals and terminate them on a tag
block, marking each terminal properly. Similarly, terminate the points to be extended to
the OHT/storage tank on a tag block (TB) using 25-28SWG wire, marking them suitably.
3. Mount the relays inside the body of a
suitable metallic enclosure. The enclosure
should be properly earthed via the earth lead
of the mains. Also mount the step-down transformer inside the same enclosure/cabinet. Use
a TB for incoming live, neutral, and earth connections from the mains (to be taken from the
manual control panel of ESP motor).
4. After assembly, position the cabinet as close to the manual control panel
Parts List
Semiconductors:
IC1, IC2
- NE555 timer
IC3
- CD4049 hex inverter/buffer
T1, T2
T3, T4
- BD139/SL100 npn transistor
D1-D4, D7-D9 - 1N4007 rectifier diode
D5, D6
ZD1
- 12V, 1W zener diode
Resistors (all -watt 5% carbon unless stated
otherwise)
R1, R3, R5,
R7, R9, R12,
R14
- 10-kilo-ohm
R2, R6, R11,
R15-R17
- 1-kilo-ohm
R4, R13
- 220-kilo-ohm
R8, R10
- 330-kilo-ohm
R18
- 330-ohm
Capacitors:
C1
capacitors
C2
capacitors
C3, C7
- 47, 25V electrolytic capacitors
C4, C6
C5, C8
capacitors
Miscellaneous:
X1
- 230V AC primary to 12V-012V, 1amp
Secondary transformer
L1
- NE2 (neon bulb with inbuilt
resistor)
S1
- On/off switch
F1
- 3amp fuse
RL1
- 24V, 250-ohm, 1 c/o relay,
30A contact rating
of ESP motor as possible and extend

connections from tag blocks for relay and
power supply to the corresponding points,
as explained earlier, using cables of correct ratings.
5. For probes, use stainless steel
rods of about 10cm length and 5 to 8 mm
diameter with arrangement for screwing
the telephone-type 25/26 SWG wire to be
used for extending the probes connections
to the circuit. Teflon-insulated wires are,
however better as they would last longer.
The joint may be covered by epoxy.
6. The probes can be hung from the
lid of the tank to appropriate levels using
the same wire. Make sure that the common probe goes up to the bottom of the
tank/storage tank.
7. All the wires from tank to the TBs
in the cabinet should be routed in such a
way that they do not interfere with any
mains wiring. The length of the wires
hardly matters as the CMOS gates used
for terminating the wires from probes
have very high input impedance.
Transistor Curve Tracer

a. saravanan
ransistor is the basic component

of all electronic equipment. A good
design of electronic circuitry requires proper knowledge of the characteristics and parameters of transistors. Due
to such factors as changes in doping level
of impurities and physical dimensions,
production imperfections, and environmental (ambient temperature, humidity,
etc) changes, no two transistors can have
the same characteristics.
Transistor is an active device and
even a very small change in its parameters causes a large drift in its operation.
This affects the overall efficiency and the
reliability of an equipment. Hence for an
efficient, reliable, and trouble-free design/
operation of the electronic equipment, the
designer must know the characteristics
and parameters of each transistor used in
the equipment.
The manufacturer provides generalised family characteristics of transistors
bearing specific part numbers. These
characteristics are drawn under specific
test conditions such as 25oC temperature
and 10mA collector current IC. But as the
circuit designed may need to be operated

at different conditions (for example, at an
ambient temperature of 40C and collector current of 10 mA), the manufacturers
data is no longer adequate. The manual
procedure to draw the characteristics of
a transistor is tedious and cumbersome.
Further, using the manual procedure, it
is not feasible to draw the dynamic characteristics of a transistor.
The transistor curve tracer circuit
presented here enables one to draw the
input and output characteristics of npn
transistors in common-emitter configuration on a cathode ray oscilloscope (CRO).
It can be constructed and calibrated by the
designer himself.
The circuit can be upgraded to
draw the characteristics of both npn
and pnp transistors, field effect transistors (FETs), metal-oxide semiconductor field effect transistors (MOSFETs), unijunction transistors (UJTs),
silicon-controlled rectifiers (SCRs),
TRIACs, etc. In general, it can be upgraded for any two- or three-terminal
analogue electronic device that has a
Fig. 1: Block diagram for tracing transistor output characteristics
Fig. 2: Block diagram for tracing transistor input characteristics
single control terminal unlike op-amps.
Block diagram
The transistor curve tracer is built around
the ramp generator and the current-tovoltage converter. The ramp generator
produces a linear ramp that is applied
to the transistor under test either as
the collector-emitter voltage (VCE) or the
base-emitter voltage (VBE). The ramp is
also used to deflect the electron beam
horizontally (along x-axis) on the screen of
the CRO. Similarly, the current-to-voltage
converter converts either the collector
current (IC) or the base current (IB) into a
proportional voltage that is used to deflect
the electron beam vertically (along y-axis)
on the screen.
The signal conditioning and switching
circuits, along with the ramp generator
and current-to-voltage converter, make
a complete curve tracer for the input and
output characteristics of an npn transistor.
Output characteristics (Fig. 1).
The ramp and clock generator generates
a linear ramp and 1 kHz clock pulses. The
ramp is amplified by the ramp buffer amplifier to 0 to 5 volts. This amplified ramp
is applied to the collector of the transistor
under test as the collector-emitter voltage (VCE) through the current-to-voltage
converter.
The current-to-voltage converter gives
an output voltage proportional to collector
current IC that is applied to the CRO to
deflect the beam in y-axis. The 0-5V ramp
output is applied to the CRO to deflect the
beam in x-axis. Hence we can trace the
output characteristics of the transistor
with the collector-emitter voltage (VCE) on
x-axis and IC on y-axis.
To trace the output characteristic
graph for various base current (IB) values, the generators clock output fed to
the counter is incremented for each clock
pulse. The count sequence is 000, 001,
010, 011, 100, 101, 110, and 111 (0 to
7 decimal). After 111, the counter resets
107
Fig. 3: Circuit diagram of transistor curve tracer
automatically to 000 and the sequence

repeats. The lower three bits of the counter are applied to the base-current control
circuit.
The base-current control circuit sets
IB in eight discrete 100A steps, i.e. 0 A,
100 A, 200 A, 300 A, 400 A, 500 A,
600 A, and 700 A. Adjust the step width
(100 A) using a potentiometer such that
the output characteristics of various npn
transistors with various current gains ()
are traced/accommodated.
Input characteristics (Fig. 2).
Here again, the ramp and clock generator
generates a linear ramp and 1kHz clock
pulses. The ramp is amplified by the ramp
buffer amplifier to 0-5V. This amplified
ramp is attenuated and amplified as required to get 0-1V ramp and applied to
the base of the transistor under test as
the base-emitter voltage (VBE) through the
current-to-voltage converter.
The current-to-voltage converter gives
an output voltage proportional to base
current IB that is applied to the CRO to
deflect the beam in y-axis. The 0-1V ramp
output is applied to the CRO to deflect the
beam in x-axis. Hence we can trace the
108
input characteristics of the transistor with

VBE on x-axis and IB on y-axis.
To trace the input characteristics
graph for various VCE values, the clock
output of the generator is fed to the counter and switching circuit. The counter
counts the number of pulses in the binary
form. Q0 output of the counter is used as
the collector-emitter voltage control that
toggles VCE with 0 volt and 10 volts for
every clock pulse. Thus we can trace the
input characteristics for VCE = 0 volt and
VCE = 10 volts.
The circuit
The transistor curve tracer circuit (Fig. 3)
comprises power supply, ramp and clock
generator, ramp buffer and offset null,
current-to-voltage converter, counter, base
current control, and switching sections.
1. The power supply section. The
circuit operates on 12V regulated power
supply. The input AC mains supply is
stepped down by transformer X1 to deliver
a secondary supply of 15-0-15V AC at 1
ampere. The output of the transformer is
rectified by a bridge rectifier. The 1000F,
35V capacitors act as filters to eliminate

ripples and provide unregulated DC output voltage.
The unregulated dual DC voltage is
converted by three-terminal ICs AN7812
and AN7912 into 12V regulated power
supply. (Note. Connect 0.1F decoupling
capacitors between the supply terminals
and ground of every IC in order to suppress unwanted noise signals in the supply voltage.)
2. The ramp and clock generator
section. The ramp and clock generator
uses a constant current source (LM334)
and a capacitor, in conjunction with timer
NE555 (IC3) wired as an astable multivibrator, to generate a linear ramp. The
control terminal of timer 555 (pin 5) is
held at a reference voltage of 5 volts by a
zener diode so that the upper threshold
(VUTP) is at 5 volts and the lower threshold
(VLTP) at 2.5 volts.
The output current from IC LM334
can be controlled with the help of potentiometer VR1. This current charges the
capacitor linearly in the form of a linear
ramp. As soon as the voltage across the
capacitor exceeds the upper threshold volt-
Fig. 4: Actual-size, single-side PCB layout for transistor curver tracer
age (VUTP), the output of timer 555 changes

its state and goes low. This activates the
discharge terminal (pin 7) of timer 555
and hence the capacitor quickly discharges
through the timer.
As the voltage across the capacitor
drops below the lower threshold voltage
(VLTP), the output of timer 555 changes
its state and goes high to disable the discharge terminal and further discharging of
capacitor stops. Once again the capacitor
gets charged linearly through the constant
current source and the sequence repeats.
Thus the potential across the capacitor is
a positive linear ramp between 2.5 volts
and 5 volts. The ramp frequency can be
controlled by varying the charging current
using potentiometer VR1. (EFY Lab note.
During lab testing, we used AD590 temperature transducer in place of LM334H
as the constant current source, and the
method of using the same is shown in Fig.
3 within dotted lines.)
3. The ramp buffer and offset null
section. Since the output impedance of
the ramp source is very high, we cannot
load it. Also, a DC offset voltage equal to
the lower threshold voltage (VLPT = 2.5V)
is present in the ramp output. In order
to nullify the offset voltage of the ramp
and to source the current from the ramp,
use a buffer amplifier. An op-amp in noninverting amplifier configuration is used
to achieve this function.
As the input impedance of the noninverting amplifier is very high, it will not
load the ramp source. Also, it is possible to
nullify the DC offset voltage present in the
ramp output with the help of ramp offset
adjustment preset VR2.
By adjusting feedback preset VR3, the
output of ramp buffer can be set to deliver
a linear 0-5V ramp. This output is used as
VCE for the transistor under test to source
the collector current (IC).
To draw the input characteristics of
the transistor, the base-emitter voltage
(VBE) should be varied linearly. For this we
require a linear 0-1V ramp with sufficient
current sourcing capability. In order to
achieve this, a ramp attenuator (voltage
divider) and an amplifier are used.
The 0-5V ramp output of ramp buffer
is attenuated by the potential divider
network (comprising resistors R4 and R5)
followed by an op-amp (IC5) connected in
non-inverting configuration. The gain of
the op-amp can be adjusted using preset
VR5 connected in the feedback path.
In order to nullify the offset voltage of

109
the op-amp, balancing preset VR4 is connected between the offset null terminals
of the op-amp. The output of the op-amp
is 0-1V linear ramp, which is used as the
base-emitter voltage (VBE) for sourcing
the base current (IB) of the transistor
under test.
4. The current-to-voltage converter section. The spot on the CRO screen
is deflected in proportion to the potential
applied to its input. Hence in order to
deflect the beam along y-axis, which is
the current axis (collector current IC in
the transistor output characteristics and

base current IB in the transistor input
characteristics), the current component
is to be converted into a proportional
voltage.
The current to be measured is passed
through series resistor R7 of 10-ohm,
1% MFR (metal film resistor). Potential
drop Vout across the resistor, according to
the Ohms law, is proportional to current
I through it and is given by the following
relationship:
V = IR
Fig. 6: Waveforms at various points in the circuit
110
where Vout = 10xI

Hence, there is a potential drop of 10 mV
per mA of the current through the circuit.
We cannot apply this small floating potential
directly to the CRO for a significant deflection.
Therefore we use a differential amplifier to
have an output voltage with respect to the
ground that is proportional to the current
though the circuit. The differential amplifier
has a gain of 100 that can be fine-tuned with
the help of gain adjust preset VR7 in the feedback path.
The current-to-voltage converter converts
the current of 1 mA into a potential difference
of 1 volt that can be applied to the CRO to
deflect the beam in vertical axis. In order to
nullify the offset voltage of the op-amp, connect
a balancing preset to the offset null terminals
of the op-amp.
5. The counter section. The base current (IB) is to be changed in discrete steps
for every ramp to enable the transistors
output characteristics for various IB values
simultaneously on the CRO screen.
In the counter circuit, the output of
timer 555 (IC3) from pin 3 is a square wave
that intimates the end of ramp. This output
is used as clock pulse for the counter wired
around CMOS binary/decade, up/down IC
MC14029B or CD4029B (IC7).
IC7 is wired as a 3-bit binary upcounter so that the output of the counter
(Q2, Q1, and Q0) is incremented by binary 1 for every clock pulse. The count
sequence is 000, 010, 011, 100, 101, 110,
and 111, i.e. 0 through 7 decimal. After
111, the counter is automatically reset to
000, and once again the count sequence
repeats. Hence we get eight discrete logic
levels, and accordingly we can set the
base current (IB) using a base current
control circuit.
Similarly, to draw the input characteristics of the transistor under test for
various collector-emitter voltage (VCE)
values, the collector-emitter voltage (VCE)
is to be changed for each ramp. The least
significant bit (Q0) of the counter is used
to toggle the collector-emitter voltage (VCE)
from 0 volt to 10 volts. Thus we can view
the input characteristics of the transistor
for VCE= 0 volt to VCE= 10 volts simultaneously on the screen of the CRO.
6. The base current control
section. This section receives the
input from the counter circuit and
varies the base current (I B ) of the
transistor. The output of counter IC7
in series with a high-value resistor
acts as the constant current source.
Fig. 7: Actual output curves on CRO (shown

without retrace)
Fig. 8: Actual input curves on CRO (shown

without retrace)
The high-level outputs of the counter

are fairly constant at 10 volts.
When we connect a resistor of 100
kilo-ohms in series with Q0 output of the
counter, it supplies a constant current of
100 A during its logic 1 state. Similarly,
when we connect a resistor of 50 kilo-ohms
(two 100 kilo-ohm resistors in parallel)
in series with Q1 output of the counter,
it supplies a constant current of 200 A
during its logic 1 state. Using 25-kilo-ohm
resistor in series with Q2 output we can
get a constant current source of 400 A.
When more than one current source
are connected in parallel, the result is
similar to having a current source equal to
the sum of individual source currents.
If we use the base current (IB) setting
as it is for a transistor with large current
amplification factor (), its collector current (IC) gets saturated for much smaller
values of IB and only two or three traces
appear on the screen of the CRO. To get
the maximum number of traces, reduce
the base current by increasing the series
resistor values through IB SET potentiometer VR8. With the help of VR8, we can
adjust the base current in incremental
steps from 10 A to 100 A.
(Note. Connect two 100-kilo-ohm resistors in parallel to get 50-kilo-ohm resistor. Similarly, connect four 100-kilo-ohm
resistors in parallel to have 25-kilo-ohm

resistor. This method has been shown in
Fig 3.)
7. The switching section. Certain
circuits are common in tracing both the
output characteristics and input characteristics. The ramp and clock generator,
ramp buffer and amplifier, and counter
circuits are retained at their places for
both output and input characteristics. But
to trace the output characteristics the current-to-voltage converter is to be connected
in the collector of the transistor under test
and to trace the input characteristics it is
to the connected in the base of the transistor (refer Figs 1 and 2 for output and input
characteristics, respectively).
To have minimum complexity, the
collector and the base circuits of the
transistor are switched suitably using a
changeover switch on the front panel. The
switching details are obvious from the
circuit diagram in Fig. 3.
Construction
Wire the circuit on a 2.5mm, IC-type general-purpose printed circuit board (PCB)
as shown in Fig. 3. The use of glass-epoxy
PCB is recommended. An actual-size,
single-side PCB for the circuit is shown in
Fig. 4, with its component layout shown
in Fig. 5.
Carefully solder all the components
and use sockets for ICs. All range resistors used should be stable, close-tolerance
type (preferably MFRs). Preferably use
linear-type IB SET potentiometer and
mount it on the front panel of the instrument. Enclose the circuit board, power
transformer, and other circuit components in a metal box having approximate
dimensions of 22x17x7.5 cm. Extend
input and output leads to the corresponding points in the circuit. Terminate the
outputs for connection to the CRO in
BNC(F) connectors.
Calibration
After construction, check the circuit
thoroughly for short circuits, breaks,
and open circuits on the PCB. After
switching on the instrument, let it
warm up for a few minutes before
commencing with the calibration.
Calibration procedure of the circuit is
as follows:
1. Check and ensure 12V regulated voltage with respect to ground.
2. Connect a CRO to shorted pins 2
and 6 of timer 555 (ramp output). A linear ramp with positive slope is observed
on the screen of the CRO. By adjusting
frequency control potentiometer VR1, set
the frequency of the ramp at 1 kHz (refer
waveform 1 in Fig. 6).
3. Connect the CRO to the output of
ramp buffer. Adjust preset VR2 to nullify the DC offset voltage in the output of
ramp buffer. Adjust preset VR3 to set the
amplitude of ramp output to 0 to 5 volts
(refer waveform 2 in Fig. 6).
4. Connect CRO at the output of ramp
attenuator and amplifier. Adjust preset
VR4 to nullify the DC offset voltage in the
output of ramp buffer. Adjust preset VR5
to set the amplitude of ramp output to 0 to
1 volt (refer waveform 3 in Fig. 6).
5. Calibrate the current-to-voltage
converter by connecting a 1-kilo-ohm. 1%
metal film resistor between the collector
and emitter terminals of the transistor
under test. Connect the output of the
current-to-voltage converter to a CRO.
By observing the ramp waveform on
the screen of the CRO, nullify DC offset
voltage using preset VR6 and adjust the
amplitude of the observed ramp waveform to 0-5 volts with the help of preset
VR7. Calibrate the current-to-voltage
converter to convert 1 mA of current into
1 volt (refer waveform 4 in Fig. 6). Then
check the clock output by connecting the
CRO to pin 3 of timer 555 (refer waveform
5 in Fig. 6).
6. Verify the outputs of the counter by
using a dual-trace oscilloscope. Connect
one input channel of the CRO with clock
pulses at pin 3 of IC3 and the outputs at
pins 6, 11, and 14 of counter IC7 to the
other input of the CRO sequentially (refer
waveforms 5, 6, 7, and 8 in Fig. 6).
7. Short-circuit the base-emitter terminals of the transistor under test. Select
input/output characteristics switch S2 to
output characteristics position and connect the CRO to the output of the currentto-voltage converter. By adjusting IB SET
potentiometer VR8 on the front panel of
the instrument, check proper operation
of the base-current section by observing
stair-case ramp of varying amplitude on
the screen of the CRO (refer waveform 9
in Fig. 6).
Operation
After calibration, the instrument is ready
for use to trace the input and output
characteristics of npn transistors. Follow
the operating procedure given below every
111
Parts List
Semiconductors:
IC1
- 7812, +12V regulator
IC2
- 7912, 12V regulator
IC3
- NE555 timer
IC4, IC6
- A741 op-amp (IC OP-07
op-amps can be used
in place of A741 with
advantage)
IC7
- MC14029B/CD4039 binary/
decade up-/down-counter
IC8
- LM334H/AD590 temperature sensor
D1-D4
ZD1
- 5V zener diode
Resistors (all -watt, 1% MFR, unless stated
otherwise):
R1, R5, R6,
R8, R9
- 1-kilo-ohm
R2, R4
- 22-kilo-ohm
R7
- 10-ohm
R3, R10, R11
(A,B), R12(A-D) - 100-kilo-ohm
VR1
- 1-kilo-ohm preset
VR2
VR3, VR4,
VR5, VR6
VR7
VR8
- 1-mega-ohm potmeter
Capacitors:
C1-C4, C9
C5, C6
C7, C8
C10
- 0.1F ceramic disk

Miscellaneous:
X1
- 230V AC primary to
15V-0-15V AC, 500mA
secondary transformer
S1
- On/off switch
S2
- DPDT switch
time to get correct traces of input and output characteristics of the transistor:
1. Connect the x-axis and y-axis BNC
pins of the transistor curve tracer to the
112
corresponding inputs of the CRO.

2. Plug in the AC cord of both the CRO
and the transistor curve tracer and switch
them on.
3. Set the CRO inputs to ground.
4. Allow warm-up time of at least 10
minutes for the circuit components to get
stabilised.
5. Set the CRO for X-Y mode of operation.
6. Adjust intensity and focus controls
to get a sharp spot on the screen of the
CRO.
7. Set the volts/div control of x-axis to
0.5 volt/div.
8. Set the volts/div scale of y-axis to
2 volts/div.
9. Adjust the position controls of the
CRO to position the spot on the left bottom of the screen ((0,0) position in the
graph).
10. Set the inputs for DC coupling to
the CRO.
11. Connect the transistor whose
characteristics are to be traced to the
transistor curve tracer, ensuring correct
pin configuration.
12. Set the selector switch for input/
output characteristics to the output characteristics position.
13. Release the CRO inputs from
ground and switch them over to connect
inputs.
14. Now view the output characteristics of the transistor. Fine-tune the IB set
potentiometer to get eight traces on the
screen of the CRO.
15. To trace input characteristics of
the transistor, change the input/output
characteristics selector switch to the input
characteristics position.
16. Set the volts/div control of x-axis to
0.1 volt/div and observe the input characteristics likewise.
Figs 7 and 8 show a typical transistors output and input characteristics,
respectively, on the CRO screen (without
retrace).
Conclusion
To draw the characteristics of pnp transistors, insert an inverter circuit in the
ramp path of collector-emitter voltage
VCE and base-emitter voltage VBE, and
invert the output of the current-to-voltage
converter.
By using a potential divider and
buffer amplifier circuit in place of the
base-current control circuit you can
draw the characteristics of FETs and
MOSFETs.
To trace the forward characteristics
of diodes, connect the anode of the diode
to the base terminal and the cathode to
the emitter terminal. Set the transistor
curve tracer to draw input characteristics,
and the CRO screen displays the forward
characteristics of the diode.
Similarly, with simple add-on circuits
to the motherboard, you can draw the
characteristics of UJTs, SCRs, TRIACs,
etc.
Thin and faint retrace lines visible
along with the characteristic traces can
be removed by connecting a retrace blanking circuit to the Z-mod input of the CRO.
Almost all CROs exceeding 30MHz bandwidth have the Z-mod input facility.
Tripping Sequence
Recorder-Cum-Indicator
r.g. thiagraj kumar and s. ramaswamy
n applications like power stations and

continuous process control plants, a
protection system is used to trip
faulty systems to prevent damages and
ensure the overall safety of the personnel
and machinery. But this often results in
multiple or cascade tripping of a number
of subunits.
Looking at all the tripped units doesnt
reveal the cause of failure. It is therefore
very important to determine the sequence
of events that have occurred in order to
exactly trace out the cause of failure and
revive the system with minimal loss of
time.
The circuit presented here stores the
tripping sequence in a system with up to
eight units/blocks. It uses an auxiliary relay
contact point in each unit that closes whenever tripping of the corresponding unit occurs. Such contact points can be identified
easily, especially in systems using programmable logic controllers (PLCs).
This circuit records tripping of up to
eight units and displays the order in which
they tripped. A clock circuit, however fast,
cannot be employed in this circuit because
the clock period itself will be a limiting
factor for sensing the incidence of fault.
Besides, it may also mask a number of
events that might have occurred during

the period when the clock was low. Hence
the events themselves are used as clock
signals in this circuit.
Fig. 1 shows the block diagram of the
tripping sequence recorder-cum-indicator.
The inputs derived from auxiliary relay
contacts (N/O) of subunits or push-to-on
switches are latched by RS flip-flops when
the corresponding subunits trip, causing
the following four actions:
1. The latch outputs are ORed to activate audio alarm.
2. The latch outputs are differentiated
individually and then ORed to provide
clock pulses to the counter to increment
the output of the counter that is initially
preset at 1 (decimal).
3. Each individual latch output activates the associated latch/decoder/driver
and 7-segment display set to display the
number held at the output of the counter,
which, in fact, indicates the total number
of trips that have taken place since the
last presetting.
4. LEDs associated with each of the
latch, decoder, and driver sets remain lit
to indicate the readiness of the sets to receive the tripping input. LEDs associated
with the tripped unit go off.
Fig. 1: Block diagram of tripping sequence recorder-cum-indicator
The circuit
IC1 and IC2 (CD4043) Quad NOR RS
flip-flops in Fig. 2 are used to capture and
store the information pertaining to the
tripping of individual units. Reset pins of
all the eight flip-flops and sub-parallel enable (PE) pin 1 of BCD up-/down-counter
CD4510 (IC3) are returned to ground via
10-kilo-ohm resistor R22, while set pins
of all RS flip-flops are returned to ground
via individual 10-kilo-ohm resistors R14
through R21.
Initially, all the eight Q outputs of
IC1 and IC2 are at logic 0. The auxiliary
relay contacts of the subunits, which are
depicted here by push-to-on switches S1
through S8, connect the set terminal of the
corresponding stage of RS flip-flop to +12V
whenever tripping of a specific subunit
occurs. This makes the output of the associated flip-flop go high. Thus whenever
Parts List
Semiconductors:
IC1, IC2
- CD4043 quad NOR RS latch
IC3
- CD4510 BCD up-/downcounter
IC4-IC11
- CD4511 BCD-to-7-segment
latch/decoder/driver
T1-T11
T12-T19
D1-D16
DIS1-DIS8 - LT543 common-cathode
7-segment display
stated otherwise):
R1-R11,
R13-R38
- 10-kilo-ohm
R12, R39-R46 - 1-kilo-ohm
R47-R102
- 470-ohm
Capacitors:
C1-C8
Miscellaneous:
S1-S8
- Push-to-on switch or relay
contacts (N/O)
S9
- Push-to-on switch
PZ1
- Piezobuzzer

- 12V, 500mA power supply
113
Fig. 2: Schematic diagram of tripping sequence recorder-cum-indicator
a sequence of tripping of subunits

occurs, the corresponding outputs
(1Q to 8Q) go high in the order
of the tripping of the associated
subunits.
All the eight Q outputs are
connected to the corresponding latch-enable inputs of BCD
latch-cum-decoder-driver ICs
(CD4511). These Q outputs
are also ORed using diodes D1
through D8 to activate an audible
alarm and also routed to a set of
differentiator networks (comprising capacitors C1 through C8 and
resistors R2 through R9).
A differentiator provides a
sharp pulse corresponding to the
tripping of a subunit. All such
differentiated pulses are ORed
via diodes D9 through D16 and
coupled to the counter stage Fig. 3: Actual-size, single-side PCB of the main control portion of tripping sequence controller-cumformed by IC3 (CD4510, a syn- indicator circuit
114
Fig. 4: Component layout for Fig. 3
Fig. 5: Actual-size, single-side PCB for

latch decoder/driver and display circuit of
one subunit
chronous up-/down-counter with preset)

after amplification and pulse shaping by
transistor amplifier stages built around
transistors T2 and T3. These pulses serve
as clock to count the number of trippings
that occurred after a reset.
Operation
Let us assume that three units, say, E, H,
and A (fifth, eighth, and first), tripped in
that order following a fault.
When the system is reset (before
any tripping), the outputs of all RS flipflops (1Q through 8Q) are low. This LE*
active-low makes latches IC4 through
IC11 transparent and as the counter is
preset to 1 (since P1 input is high while
P2, P3, and P4 are low) with the help
of switch S9, all the latches hold that
1 and their decoded b and c segment
Fig. 6: Component layout for Fig. 5
outputs go high.
However, the common-cathode drive
is absent in all the 7-segment displays
because driver transistors T4 through T11
are cut off due to the low outputs of all RS
flip-flops and hence the displays are blank.
At the same time, the low outputs of all
RS flip-flops (1Q through 8Q) forward bias
pnp transistors T12 through T19 associated with LED1 through LED8 of each of
the displays. As a result, all these LEDs
glow, indicating no tripping.
Now when unit E trips, output 5Q
of RS flip-flop IC2 goes high to provide
the base drive to common-cathode drive
transistor T8. This, in turn, activates DIS5
(fifth from left in Fig. 2) to display 1, indicating that unit E tripped first. The corresponding LED5 goes off as transistor T16
is cut off. Also, latch IC8 is disabled due
to logic 1 on its pin 5 and therefore it does
not respond to further changes in its BCD
data input. Simultaneously, the

buzzer goes on to sound an audible
alarm, indicating the emergency
situation at the plant.
The differentiator formed
by C5 and R6 responds to the
low-to-high transition of 5Q and
generates a short pulse. This pulse
passes through diode D13 and
transistors T2 and T3 and reaches
clock pin of counter IC3. The
counter counts up and its output
becomes 0010 (decimal 2).
As mentioned earlier, all the
display units other than E have
the drive signal on segments a, b,
g, e, and c now but are off because
of the missing common-cathode
drive. When the next subunit H
trips, output 8Q experiences a
low-to-high transition and the corresponding display (DIS8) shows
digit 2. The above sequence of
operation holds true for any further
subunit trippingwith the displayed
digit incrementing by one for each sequential tripping.
In the prototype, LEDs D17 through
D24 were fixed below the corresponding
7-segment displays pertaining to subunits
A through H to provide a visual indication
that these units are ready to respond to
a tripping.
The circuit works satisfactorily with
twisted-pair wires of length up to 5 metres. In electrically noisy environments,
the length of the cable has to be reduced
or a shielded twisted-pair cable can be
used.
An actual-size, single-side PCB layout
for the main control portion of the tripping
sequence recorder-cum-indicator circuit is
shown in Fig. 3 and its component layout
in Fig. 4. The PCB layout for the indicator set comprising IC4, DIS1, transistors
T4 and T12, LED1, etc is shown in Fig. 5
and its component layout in Fig. 6. The
indicator set of Fig. 5 can be connected
to the main PCB of Fig. 3 using Bergstrip
type SIP (single-inline-pin) connectors as
per requirements.
This tripping sequence recorder-cumindicator circuit can also be used in quiz
games to decide the order in which the
teams responded to a common question.
For this, provide push-to-on switches on
the tables of individual teams and a master reset to the quiz master. Modify the
alarm circuit suitably with a retriggerable
monostable stage so that the audible alarm
stops after a short interval.
115
SECTION B :
CIRCUIT IDEAS
Electronic Starter
for Single-Phase motors
sarat chandra das
novel single-phase electronic

starter circuit meant for 0.5HP
and 1HP motors is presented here.
It incorporates both overload and shortcircuit protections. A special currentsensing device has been added in this
starter to sense the current being drawn
by the motor.
If the motor jams due to bearing failure or defect in the pump or any other
reason, it would draw much higher current
than its normal rated current. This will
be sensed by the current-sensing device,
which will trip the circuit and protect the
motor. Some other reasons for the motor
drawing higher current are as follows:
(a) Windings damaged or short-circuit
between them.
(b) Shorting of motor terminals by
mistake.
(c) Under voltage or single phasing
occuring in the mains supply source (normally, a 440V AC, 3-phase with neutral
four-wire system).
The main components used in the
circuit comprise a specially wound sensing
transformer X1, another locally available
step-down transformer X2, single-changeover relay RL1, two double-changeover
relays (RL2 and RL3), and other discrete
components shown in the figure. The
mains supply to the motor is routed in
series with the primary of transformer
X1 via normally-open contacts of relay
RL3. The primary of transformer X1 is
connected in the neutral line.
To switch on the supply to the motor, switch S1 is to be pressed momentarily, which causes the supply path
to the primary of transformer X2 to
be completed via N/C contacts of relay
RL1. Relay RL2 gets energised due to
the DC voltage developed across capacitor C2 via the bridge rectifier. Once
the relay energises, its N/O contacts
RL2(a) provide a short across switch
S1 and supply to the primary of transformer X2 becomes continuous, and
hence relay RL2 latches even if switch

S1 is subsequently opened. The other N/O
contacts RL2(b) of relay RL2, on energisation, connect the voltage developed across
capacitor C2 to relay RL3, which thus
energises and completes the supply to the
motor, as long as current passing through
primary of transformer X1 is within limits
(for a 1hp motor).
When the current drawn by motor
exceeds the limit (approx. 5A), the voltage developed across the secondary of
transformer X1 is sufficient to energise
relay RL1 and trip the supply to relays
RL2 and RL3, which was passing via the
N/C contact of relay RL1. As a result, the
supply to the motor also trips.
The contact rating for relays RL1 and

RL2 should be 5 amperes, while contact
ratings of relay RL3 should be 10 to 15
amperes.
Transformer X1 can be wound using
any suitable size CRGO core. (One can
use a burntout transformer core as well.)
The primary comprises 30 to 31 turns for
use with 1HP motor and additional eight
turns, if you are using a 0.5HP motor.
Fuses F1 and F2 are kit-kat type. The on
pushbutton is normally-off type, while
off pushbutton S2 is of normally-on
type. Capacitors C1 and C2, apart from
smoothing the rectified output, provide
necessary delay during energisation and
de-energisation of relays. Diodes across
119
relays are used for protection as freewheeling diodes.

Starters for 0.5HP and 1HP motors
are not easily available in the market.
Readers comments:
I would like to have some doubts
cleared:
1. In the circuit, AC supply was indicated by phase and neutral. If phase
and neutral are changed, what will be
the result?
2. What is the suggested core size of
transformer X1 tested by the author?
3. Can we use ferrite core transformer
instead of CRGO core?
J.V.K. Naidu
Eluru
The author, Sarat Chandra Das,
replies:
1. The mains supply is taken from 3-phase,
4-wire system. When you are using any domestic appliance such as fan, TV, etc, you
Users are therefore compelled to use

10-amp rated circuit breaker for such motors. A mechanical starter or auto starter
would turn out to be costlier than the
Fig. 1: Suggested El core dimensions
do not make sure as to which is phase and

neutral in the socket (when using a 2-pin
plug top). Nothing happens when phase
and neutral are interchanged.
(EFY: Nothing untoward happens as
long as supply in the gadget is first routed
to a transformer. In some appliances neu-
circuit given here, which works very reliably. Parts used in this circuit are easily
available in most of the local markets.
tral and ground are shorted together and

thus the body of the gadget becomes live
and one could get a shock on touching the
gadget. One must use a 3-pin plug and
socket system in which live and neutral
conventions are adhered to as per ISI specifications/Electricity Act and rules.)
2. The suggested core size is shown in
Fig. 1. I suggest the use of a 220V/6V-06V, 500mA to 1A rating step-down transformer core used in battery eliminators
(new or burnt), which is available in the
local market.
3. Ferrite core is better than CRGO,
but it is costlier and not easily available
in the local market, while CRGO core is
easily available. Technically, turns ratio
in winding will change.
Modem On/Off Indicator

t.k. Hareendran
ere is an interesting, low component-count, and easy-to-build

electronic circuit for the Internet
surfers. This circuit, using two LEDs,
indicates the modem status, i.e. whether
it is in use or not.
The incoming telephone line terminating on a master phone is shunted by a
metal oxide varistor.
The circuit is configured around the
popular timer chip NE555, which is wired
as an astable multivibrator. When power
is applied to the circuit, the astable starts
working as usual. However, LEDs D2 and
D3 connected to its output pin 3 would not
glow as transistor T1 is in off condition and
hence resistor R4s bottom end is hanging
in high impedance state.
However, when the modem is working, voltage drop across preset VR1
illuminates the LED inside the optocoupler (IC2). As a result, transistor
T1 gets sufficient base-bias through
activated transistor inside opto-coupler
via resistor R3. Consequently, LEDs
120
D1 and D2 start blinking at the bistable IC1s frequency determined by the

values of resistors R1 and R2 and capacitor C1.
A 9V, 0.5A AC adapter can be used
to power the circuit. Finally, one minor
adjustment is required for successful operation of the gadget. For this, first switch
on the supply to the gadget and then
switch on the modem. Now adjust the
wiper of preset VR1 very slowly until the

LEDs start blinking. Memorise the wiper
position and fix it in this position using a
good-quality glue/compound.
After construction, fix the complete
circuit in a suitable and attractive cabinet
with one LED in its front panel. Keep
the whole unit near the modem and fit
another LED near the master telephone
with the label Modem in Use.
Touch-Select Audio source

saravanan j.
ften you need to connect output from more than one source
(preamplifier) such as tape
recorder/player and CD (compact
disc) player to audio power amplifier.
This needs disconnecting/connecting
wires when you want to change the
source, which is quite cumbersome
and irritating.
Here is a circuit that helps you choose
between two stereo sources by simple
touch of your hand. This circuit is so com-
pact that it can be fixed within the audio

power amplifier cabinet and can use the
same power supply source.
The circuit uses just two CMOS ICs
and a few other componenets. The ICs
used are MC14551/CD4551 (quad 2-channel analogue multiplexer) and CD4011
(quad 2-input NAND gate). When touchplate S1 is touched (its two plates are
to be bridged using a fingertip), gate N1
output (IC1, pin 3) goes high while the
output of gate N2 at pin 4 goes low. This
causes selection of CD outputs being connected to the power amplifier input, which
is indicated by lighting of LED1.
When touch-plate S2 is touched, the
outputs of gates N1 and N2 toggle. That
is, IC2 pin 3 is pulled low while its pin 4
goes high. This results in selection of tape
recorder outputs being connected to the
input of power amplifier. This is indicated
by lighting of LED2.
Pin 9 is the control pin of IC2. In the
circuit, the state of multiplexer switches
is shown with pin 9 high
(CD source selected). When
pin 9 is pulled low, all the
switches within the multiplexer change over to the
alternate position to select
tape player as source.
EFY Lab note. Although one can connect pin
7 (VEE) of IC2 to ground,
but for operation with
preamplifier signals going
above and below ground
level, one must connect it
to a negative voltage (say,
1V to 1.5V) to avoid
distortion.
Precision attenuator
with digital control
anantha narayan
hen instruments are designed,

an analogue front-end is essential. Further, as most equipment have digital or microcontroller interface, the analogue circuit needs to have
digital control/access.
The circuit of a programmable attenu-
ator with digital control is described here,

where digital control can be a remote dip
switch, or CMOS logic outputs of a decade
counter (having binary equivalent weight
of 1, 2, 4, and 8, respectively), or I/O port
of a microcontroller like 80C31.
The heart of this circuit is the popu-
lar OP07 op-amp with ultra-low offset

in the inverting configuration. A dual,
4-channel CMOS analogue multiplexer
switch CD4052 enables the change in
gain. An innovative feature of the circuit
is that the on resistance (around 100
ohms) of CD4052 switch is bypassed so
121
op-amp.
(b) Output
The output can be connected to a
7107/7135-based DPM or any other analogue-to-digital converter or op-amp stage.
Use a buffer at the output if the output has to
be loaded by a load less than 1 meg-ohm.
Use an inverting buffer if input leads
have to have polarity where ground is the
inverting terminal. (For details, see next
circuit.)
(c) CD4052 CMOS switch
The on-resistance (100-ohm approx.)
comes in series with the op-amp output
source resistance, which produces no er
that no error is introduced by its use.

Resistors R1 to R6 used in the circuit should be of 0.1 per cent tolerance,
50 ppm (parts per million) if you use
3-digit DPM, i.e. 1999 counts (approx.
11 bits). But for 4-digit DPM (approx.
14 bits), you may need to have trimpots
(e.g. replace 1k-ohm resistor R6 by a fixed
900-ohm resistor in series with a 200-ohm
trimpot) to replace R3, R4, R5, and R6
gain selection resistors for proper calibration to required accuracy. However, for
testing or trials, use 1 per cent 100ppm
MFR resistors. The expected errors will
be around 1 per cent.
To keep parts count (hence cost) to
a minimum, the common or ground is
used as the positive input terminal and
one end of resistor R1 as the negative.
This is so because the op-amp inverts
the polarity as it is used in inverting
configuration. This does not matter as
the equipment will be isolated by the
power supply transformer and all polarities are relative. In case you want
the common to be the negative, you will
have to add some stages (IC4 and IC5

circuitry shown in precision amplifier
circuit described later).
The OP07 pinout is based on standard single op-amp 741. Any other
op-amp like CA3140, TLO71, or LF351 can
be used but with offset errors in excess of 1
per cent, which is not tolerable in precision
instrumentation.
The OP07 has equivalent ICs like
A741 and LM607 having ultra-low
offset voltage (<100V), low input bias
current (<10nA), and high input impedance (>100M), which are the key requirements for a good instrumentation op-amp
for use with DC inputs.
The following design considerations
should be kept in mind:
(a) Input: 500V max
Since W resistors can withstand
up to 250V, resistors R1 and R2 in series
are used for 1 meg-ohm with 500V (max)
input limit. These resistors additionally
limit the input current as well. Diodes D1
and D2 clamp the voltage across input of
op-amp to 0.5V, thereby protecting the
Truth Table (Control input VS attenuation)

X,Y (ON-switch (2) (1) Gain
Pair)
B
A
(Attenuation)
X0,Y0
0
0
1/1000
X1,Y1
0
1
1/100
X2,Y2
1
0
1/10
X3,Y3
1
1
1
ror at output.
Caution. The circuit does not isolate,
it only attenuates. When high voltage is
present at its input, do not touch any part
of the circuit.
(d) Digital control options
(i) A and B can be controlled by I/O
port of a microcontroller like 80C31 so that
the controller can control gain.
(ii) A and B can be given to counters
like 4029/4518 to scroll gain digitally.
(iii) A and B can be connected to DIP
switch.
(iv) A and B can be connected to a
thumbwheel switch.
Notes. 1. Digital input logic 0 is 0V and
logic 1 is 5V.
2. All resistors are metal film resistors
(MFR) with 1% tolerance, unless specified
otherwise.
3. C2 and C3 are ceramic disk capacitors of 0.1F = 100nF value.
Precision Amplifier
with Digital Control
anantha narayan
T
122
his circuit is similar to the preceding circuit of the attenuator.

Gain of up to 100 can be achieved
in this configuration, which is useful for

signal conditioning of low output of transducers in millivolt range.
The gain selection resistors R3

to R6 can be selected by the user and
can be anywhere from 1 kilo-ohm to 1
meg-ohm. Trimpots can be used for obtaining any value of gain required by the user.
The resistor values shown in the circuit
are for decade gains suitable for an autoranging DPM.
Resistor R1 and capacitor C1 reduce
ripple in the input and also snub transients. Zeners Z1 and Z2 limit the input to
4.7V, while the input current is limited
by resistor R1. Capacitors C2 and C3 are
the power supply decoupling capacitors.
Op-amp IC1 is used to increase the
input impedance so that very low inputs
are not loaded on measurement. The user
can terminate the inputs with resistance
of his choice (such as 10 meg-ohm or 1
meg-ohm) to avoid floating of the inputs
when no measurement is being made.
IC5 is used as an inverting buffer
to restore polarity of the input while
IC4 is used as buffer at the output
of CD4052, because loading it by
resistance of value less than 1 megohm will cause an error. An alternative is to make R9=R10=1 meg-ohm
and do away with IC4, though this
may not be an ideal method.
Truth Table (Control Input vs Gain)
X,Y (On-switch
(2)
(1)
Gain
Pair)
B
A
(Av.)
X0,Y0
0
0
1/10
X1,Y1
0
1
1
X2,Y2
1
0
10
X3,Y3
1
1
100
Gains greater than 100 may not be practical because even at gain value of 100 itself,
a 100V offset will work out to be around 10
mV at the output (100V x 100). This can be
trimmed using the offset null option in the
OP07, connecting a trimpot between pins 1
and 8, and connecting wiper to +5V supply
rails. For better performance, use ICL7650 (not
pin-compatible) in place of OP07 and use 7.5V

instead of 5V supply.
Eight steps for gain or attenuation can
be added by using two CD4051 and pin
6 inhibit on CD4051/52. More steps can
be added by cascading many CD4051, or
CD4052, or CD4053 ICs, as pin 6 works
like a chip select.
Some extended applications of this
circuit are given below.
1. Error correction in transducer amplifiers by correcting gain.
2. Autoranging in DMM.
3. Sensor selection or input type selection in process control.
4. Digitally preset power supplies or
electronic loads.
5. Programmable precision mV or mA
sources.
6. PC or microcontroller or microprocessor based instruments.
7. Data loggers and scanners.
Random Number Generator

Based Game
k. udhaya kumaran
his electronic game is simulation

of one-arm bandit game. Electronics hobbyists will find it very
interesting. When toggle switch S1 is in
run position, all segments of 7-segment

displays (DIS1 through DIS3) will light
up. On turning toggle switch S1 from run
to stop position, displayed digits will con-
tinue advancing and the final display

is unpredictable. Thus the final number
displayed in DIS1 through DIS3 is of
random nature. The speed with which
123
the number in 7-segment display keeps

changing on flipping switch S1 from run
to stop condition slowly decays before
stopping with a random number display.
To play this game, one has to obtain
three identical numbers in displays DIS1
through DIS3. The contestant would
score 1 (one) point if he manages to get a
final display of 000, 2 points for getting
111 display, 3 points for 222, and so
onup to ten points for 999. He should
try to score maximum possible points in
fixed numbers of attempts (say, 20 to 25
attempts).
Apart from using this circuit as
a game for entertainment, one can use
it as random number generator for
any other application as well. The
decay time with the given component
values is around 15 seconds before the
display could stop at a final random
number.
The circuit comprises clock oscillator
built around NE555 timer IC4, threestage clock pulse counter built using three
CD4033 ICs (IC1 to IC3), and three 7-segment LED displays (DIS1 to DIS3).
In clock oscillator circuit, NE555
timer IC4 is used in a similar way as a
free-running astable multivibrator, the
only difference being the additional capacitor C1 introduced between pin No. 7
of IC4 and junction of resistors R22 and
R24. When toggle switch S1 is in run position, both terminals of capacitor C1 are
shorted by switch S1 and timer IC4 works
as a free-running astable multivibrator.
The operating frequency is in the vicinity of 35 kHz, determined by the value of
timing components.
When toggle switch S1 is flipped
from run to stop position, capacitor
C1 is introduced in the discharge path
of pin No. 7 of IC4 and junction of resistors R22 and R24. At the same time,
capacitor C4 comes in parallel with
timing capacitor C3 to change the operating frequency of the astable from

around 35 kHz to around 65 Hz. Now
capacitor C1 slowly starts charging as
it is connected in the discharge path
of the timing capacitors C3 and C4.
The clock frequency of IC4 gradually
reduces and after 15 seconds, when
capacitor C1 is sufficiently charged,
the oscillating frequency gradually
drops and finally it stops oscillating.
Thus, pin 3 of IC4 becomes low.
Second part of the circuit comprises
three cascaded ICs, IC1 through IC3
(CD4033 decade upcounter cum 7-segment decoder). In conjunction with three
7-segment displays (DIS1 to DIS3), these
form a 3-digit clock counter. The clock
counting speed is dependant upon the
clock pulse frequency of IC4. It is connected to clock input pin 1 of IC1 while
chip enable pin 2 of IC1 to IC3 are held
low. Thus all clock counter ICs advance
by 1 for every positive clock transition.

Reset pin 15 of all counter ICs is held low
through resistor R25. Thus reset facility
is not used in this circuit.
Due to persistence of vision, one cannot distinguish 0-9 counting in DIS1 to
DIS3 when the clock frequency is high.
All 7-segment displays appear to show
digit 8, while the red LED1 remains lit
continuously, indicating clock counter is
in running condition.
On sliding toggle switch S1 from
run to stop position, the counting
speed of individual digits falls immediately due to the clock frequency changing to around 65 Hz. Now, the counting
speed will be 65 Hz for DIS3, 6.5 Hz for
DIS2, and 0.6 Hz for DIS1. This speed of
individual digit counting slowly decays,
until the counter stops and LED1 stops
blinking, and the final count (random
numbers) are displayed in DIS1, DIS2,
and DIS3.
9-Line Telephone Sharer

Dhurjati Sinha
his circuit is able to handle nine

independent telephones (using a
single telephone line pair) located
at nine different locations, say, up to a
124
distance of 100m from each other, for receiving and making outgoing calls, while
maintaining conversation secrecy. This
circuit is useful when a single telephone
line is to be shared by more members residing in different rooms/apartments.

Normally, if one connects nine phones
in parallel, ring signals are heard in all
the nine telephones (it is also possible that

the phones will not work due to higher
load), and out of nine persons eight will
find that the call is not for them. Further,
one can overhear others conversation,
which is not desirable. To overcome these
problems, the circuit given here proves
beneficial, as the ring is heard only in the
desired extension, say, extension number
1.
For making use of this facility, the
calling subscriber is required to initially dial the normal phone number
of the called subscriber. When the call
is established, no ring-back tone is
heard by the calling party. The calling subscriber has then to press the
asterik (*) button on the telephone to
activate the tone mode (if the phone
normally works in dial mode) and dial
extension number, say, 1, within 10 seconds. (In case the calling subscriber fails
to dial the required extension number
within 10 seconds, the line will be disconnected automatically.) Also, if the dialed
extension phone is not lifted within 10
seconds, the ring-back tone will cease.
The ring signal on the main phone
line is detected by opto-coupler MCT2E (IC1), which in turn activates the
10-second on timer, formed by IC2 (555),
and energises relay RL10 (6V, 100-ohm,
2 C/O). One of the N/O contacts of the
relay has been used to connect +6V rail
to the processing circuitry and the other
has been used to provide 220-ohm loop resistance to de-energise the ringer relay in
telephone exchange, to cut off the ring.
When the caller dials the extension
number (say, 1) in tone mode, tone re-
ceiver CM8870 (IC3) outputs

code 0001, which is fed to the
4-bit BCD-to-10 line decimal
decoder IC4 (CD4028). The
output of IC4 at its output
pin 14 (Q1) goes high and
switches on the SCR (TH-1)
and associated relay RL1.
Relay RL1, in turn, connects,
via its N/O contacts, the 50Hz
extension ring signal, derived
from the 230V AC mains, to
the line of telephone 1. This
ring signal is available to telephone 1 only, because half of
the signal is blocked by diode
D1 and DIAC1 (which do not
conduct below 35 volts).
As soon as phone 1 is
lifted, the ring current increases and voltage drop
across R28 (220-ohm, 1/2W
resistor) increases and operates opto-coupler IC5 (MCT2E). This in turn resets timer
IC2 causing:
(a) interruption of the
power supply for processing
circuitry as well as the ring
signal relays RL1 through
RL9, and
(b) removal of loop resistance R16, via the second
contact of relay RL10.
As a result, the telephone
line voltage shoots up to 48V,
DIAC1 and diode D1 connected in series with phone
1 conduct within a few milliseconds, and phone 1 comes
into operation. The telephone
exchange does not interpret
this as break in off-hook condition, since
some delay margin is set at exchange.
When phone 1 is busy, the other
eight phones will not work, since line
voltage will again drop to 10V and the
other diacs will not conduct. Thus conversation secrecy will be maintained.
The other extensions also work in a
similar manner when another extension
number is dialed and its corresponding
relay energises to extend the 50Hz ring
to another extension.
The 24V, 50Hz ring signal derived
from transformer X1 is sufficient for
working with phones of Beetel and ITI
make, but for Pretel and some other
makes, it may be necessary to increase
the ring voltage to about 30 volts or even
higher.
125
Electronic Card Lock System

priyank mudgal
his circuit of electronic card lock

system is much simpler and
cheaper than other similar circuits
that have appeared in earlier issues of
EFY.
The circuit is configured around
an addressable 1 of 16 demultiplexer
CD4514B (IC1). Any number in binary
form, when available at input pins 2,
3, 21, and 22 (address pins A0 through

A3), makes corresponding output go logic
high, thus turning on the appliance
through relay contacts. Up to 15 appliances can be switched on/off (one at a
time). Output Q0 (pin 11) can be used
for visual indication, to show that circuit
is active.
A 40W bulb illuminates LDR1
result, transistor T1 conducts and extends positive supply to the collectors of

transistors T2 through T5. Then, depending upon the holes blocked/punched in
the inserted card, any combination of
emitters of transistors T2 through T5
turns logic high (transistors output
corresponding to blocked LDRs only goes
high). These outputs connected to address
input pins A0 through A3 of IC1
Table I
Appliance LDR2 LDR3 LDR4 LDR5
no.
1
-
*
*
*
2
*
-
*
*
3
-
-
*
*
4
*
*
-
*
5
-
*
-
*
6
*
-
-
*
7
-
-
-
*
8
*
*
*
9
-
*
*
10
*
-
*
11
-
-
*
12
*
*
-
13
-
*
-
14
*
-
-
15
-
-
-
Blocked hole corresponding to selected
binary address.
* Punched holes corresponding to LDR position on card
to LDR5
constantly.
This pulls
down bases
of transistors
T1
through T5
to ground.
LDR1 ensures that card is properly inserted into the
card slot.
When the card is
correctly inserted, it
covers the hole/opening for LDR1 and thus
blocks the light from
falling on LDR1. As a
126
switch on the corresponding appliance

(one out of 15).
The card used should be of opaque
plastic. It should be able to withstand
some heat from the bulb, even though the
appliance remains on only for the period
for which the card is in the slot.
The card has a triangular notch that
shows correct orientation/direction of
insertion of card and prevents false operation. LDRs can be placed in a line, or
randomly, to increase security.
The order in which holes should be
punched for each appliance is given in
Table I. Two illustrations, one each for
card-2 and card-5, are shown in the accompanying figures. An elevation and
plan/top view of the gadget is also shown
in the figures.
Pulsed Operation
of a CW Laser Diode
dr. alika khare
ere a simple low-cost technique

for converting a CW laser diode at 670 nm wavelength to
pulsed laser up to a frequency of 500 kHz
is presented.
A low-power pulsed radiation source
is very important for any laboratory involved in optical pulsed systemslaser,
pulsed discharges, optical communication,

fibre-optic sensors, image processing,
etcwhere one is required to check the
frequency response of the detection system
or optical simulation of an optical source
or local networking using optical fibre
cable. Fast-speed LED offers the solution for such requirements, but because
of very low power and large
divergence, its use remains
limited. On the other hand,
a pulsed diode laser offers
a very good solution for this
problem.
Commercial systems are
usually expensive. However,
a CW diode laser operating
at 670 nm can easily be
pulsed up to a frequency of
500kHz with low-cost technique, using
a function generator and an inexpensive
push-pull amplifier interface circuit. The
block diagram of the system is shown in
Fig. 1.
A 3mW CW diode laser at 670 nm
with voltage and current rating of 3V
at 100mA, respectively, is used. The
source (a function generator) is capable of
delivering square pulses of 3V amplitude,
which are amplified by a complementary
symmetry push-pull circuit shown in Fig.
2.
The output of the
amplifier is
connected to
the diode laser for pulsed
operation.
The laser is
focused onto
a photodiode
terminated
with 50-ohm
resistor (Fig.
1). The output of photodiode is
displayed on
digital storage oscilloscope and it is also

connected to the PC for getting a hard
copy.
Up to a frequency of around 20 kHz,
the threshold voltage for laser oscillations
is around 2.4V. For frequencies greater
than 20 kHz, the threshold for laser
oscillations depends on the operating
frequency and is higher than 2.4V. The
behaviour of laser pulses up to 10 kHz is
nearly similar. Laser output at a typical
frequency of 2 kHz is shown in Fig. 3, at
various voltages (2.6V, 3.4V, and 4V). The
input waveform A is shown at the bottom
of the figure.
For a driving pulse of about 3V (which
is the normal operating voltage for CW
operation), the laser pulse becomes flat
after a delay of approximately 40 s (time
taken to build up the laser oscillations
to its maximum amplitude). Above 3V,
probably population inversion is developed much above threshold, before the
laser oscillations build up into the cavity,
and so we observe the sharp peak in laser
output (for more details, refer Laser Fundamentals book by W. T. Silfvast, published by Cambridge University Press),
exponentially decaying to a steadystate
value with a time constant depending on
the initial peak intensity and the carrier
life time in the excited state. After the
127
input pulse is over, the oscillations die

down within 5 s.
Therefore above 3V, up to a frequency of 10 kHz, the laser is operated
in quasi CW mode. In the frequency
range of 10 kHz to 50 kHz, the laser
output keeps on increasing, even during the flat portion of the input current
pulse, and falls down to zero during the
off period of the driving pulse. Fig. 4
shows the laser waveforms at 50 kHz,

100 kHz, 200 kHz, 300 kHz, and 500
kHz, respectively.
All these pulses were recorded at
around 4V. In this range of frequencies,
the duration for which voltage is on/off
is of the order of less than 5 s, and so
the driving pulses switch off before the
termination of laser oscillations. Therefore the laser output shows a modulation
with the DC component in it. Beyond

500 kHz, it is difficult to observe laser
oscillations even at voltages higher
than 4V.
Lab note. Tests conducted at EFY
using laser diode of laser torch (rated for
<5mW) with identical inputs at 2 kHz did
not show any marked departure of output
waveform (square wave) from the input
square wave.
Generation of 1-sec. pulses

spaced 5-Sec. Apart
Praveen shanker
his circuit using a dual-timer

NE556 can produce 1Hz pulses
spaced 5 seconds apart, either
manually or automatically. IC NE556
comprises two independent NE555 timers
in a single package. It is used to produce
timer 1 in NE556 triggers by itself.

The output of the first timer is connected to trigger pin 8 of second timer,
which, in turn, is connected to a potential
divider comprising resistors R4 and R5.
Resistor R1, preset VR1, resistor R2,
two separate pulses of different pulse

widths, where one pulse initiates the activation of the second pulse.
The first half of the NE556 is wired
for 5-second pulse output. When slide
switch S2 is in position a, the first
timer is set for manual operation, i.e.
by pressing switch S1 momentarily
you can generate a single pulse of 5-second duration. When switch S2 is kept in
b position, i.e. pins 6 and 2 are shorted,
preset VR2, and capacitors C2 and C5 are

the components determining time period.
Presets VR1 and VR2 permit trimming of
the 5-second and 1-second pulse width of
respective sections.
When switch S2 is in position a
and switch S1 is pressed momentarily,
the output at pin 5 goes high for about
5 seconds. The trailing (falling) edge of
this 5-second pulse is used to trigger
the second timer via 0.1F capacitor
128
C6. This action results in momentarily pulling down of pin 8 towards the
ground potential, i.e. low. (Otherwise
pin 8 is at 1/2 Vcc and triggers at/below
1/3 Vcc level.) When the second timer is
triggered at the trailing edge of 5-second
pulse, it generates a 1-second
wide pulse.
When switch S2 is on position b, switch S1 is disconnected, while pin 6 is connected
to pin 2. When capacitor C2
is charged, it is discharged
through pin 2 until it reaches
1/3Vcc potential, at which it is
retriggered since trigger pin 6 is
also connected here. Thus timer
1 is retriggered after every
5-second period (corresponding
to 0.2Hz frequency). The second
timer is triggered as before to
produce a 1-second pulse in
synchronism with the trailing
edge of 5-second pulse.
This circuit is important wherever a
pulse is needed at regular intervals; for
instance, in Versatile Digital Frequency
Counter Cum Clock construction project
published in EFY Oct. 97 (or Electronics
Projects Vol. 18), one may use this circuit
in place of CD4060-based circuit. For
the digital clock function, however, pin 8
and 12 are to be shorted after removal of
0.1F capacitor and 10-kilo-ohm resistors
R4 and R5.
High-/Low-voltage
Cutout with Timer
dr d.k. kaushik
his inexpensive circuit can be

connected to an air-conditioner/
fridge or to any other sophisticated
electrical appliance for its protection.
Generally, costly voltage stabilisers are
used with such appliances for maintaining constant AC voltage. However, due to
fluctuations in AC mains supply, a regular
click sound in the relays is heard. The
frequent energisation/de-energisation of
the relays leads to electrical noise and
shortening of the life of electrical appliances and the relay/stabiliser itself. The
costly yet fault-prone stabiliser may be
replaced by this inexpensive high-low
cutout circuit with timer.
The circuit is so designed that relay
RL1 gets energised when the mains

voltage is above 270V. This causes resistor R8 to be inserted in series with
the load and thereby dropping most of
the voltage across it and limiting the
current through the appliance to a very
low value.
If the input AC mains is less than 180
volts or so, the low-voltage cut-off circuit
interrupts the supply to the electrical appliance due to energisation of relay RL2.
After a preset time delay of one minute
(adjustable), it automatically tries again.
If the input AC mains supply is still low,
the power to the appliance is again inter-
rupted for another one minute, and so

on, until the mains supply comes within
limits (>180V AC). The AC mains supply
is resumed to appliance only when it is
above the lower limit.
When the input AC mains increases
beyond 270 volts, preset VR1 is adjusted
such that transistor T1 conducts and
relay RL1 energises and resistance
R8 gets connected in series with the
electrical appliance. This 10-kilo-ohm,
20W resistor produces a voltage drop
of approximately 200V, with the fridge
as load.
The value and wattage of resistor R8
may be suitably chosen according to the
electrical appliance to be used. It is
tor T3 remains cut off (with its collector

remaining high) until the mains supply
falls below the lower limit, causing its
collector voltage to fall. The collector of
transistor T3 is connected to the trigger
point (pin 2) of IC1.
When the input is more than the lower
limit, pin 2 of IC1 is nearly at +Vcc. In
this condition the output of IC1 is low,
relay RL2 is de-energised and power is
supplied to the appliance through the N/C
terminals of relay RL2.
If the mains supply is less than the
lower limit, pin 2 of IC1 becomes momentarily low (nearly ground potential) and
thus the output of IC1 changes state from
low to high, resulting in energisation
practically observed that after continuous use, the value of resistor R8

changes with time, due to heating. So
adjustment of preset VR1 is needed two
to three times in the beginning. But once
it attains a constant value, no further
adjustment is required. This is the only
adjustment required in the beginning,
which is done using a variac.
Further, the base voltage of transistor T2 is adjusted with the help of pre-set
VR2 so that it conducts up to the lower
limit of the input supply and cuts off
when the input supply is less than this
limit (say, 180V). As a result, transis-
of relay RL2.
As a result, power
to the load/appliance is cut off.
Now, capacitor
C2 starts charging through resistor R6 and preset
VR3. When the
capacitor charges
to (2/3)Vcc, IC1
changes state
from high to
low. The value
of preset VR3 may be so adjusted that it
takes about one minute (or as desired) to
charge capacitor C1 to (2/3)Vcc. Relay is
now de-energised and the power is supplied to the appliance if the mains supply
voltage has risen above the lower cut-off
limit, otherwise the next cycle repeats
automatically.
One additional advantage of this
circuit is that both relays are deenergised when the input AC mains
voltage lies within the specified limit
and the normal supply is extended to
the appliance via the N/C contacts of
both relays.
129
Automatic
heat detector
Sukant Kumar Behara
his circuit uses a complementary

pair comprising npn metallic transistor T1 (BC109) and pnp germanium transistor T2 (AC188) to detect heat
(due to outbreak of fire, etc) in the vicinity
and energise a siren. The collector of transistor T1 is connected to the base of transistor T2, while the collector of transistor
T2 is connected to relay RL1.
The second part of the circuit comprises popular IC UM3561 (a siren and
machine-gun sound generator IC), which
can produce the sound of a fire-brigade
siren. Pin numbers 5 and 6 of the IC are
connected to the +3V supply when the relay is in energized state, whereas pin 2 is
grounded. A resistor (R2) connected across
pins 7 and 8 is used to fix the frequency of
the inbuilt oscillator. The output is available from pin 3.
Two transistors BC147 (T3) and
BEL187 (T4) are connected in Darlington
configuration to amplify the sound from
UM3561. Resistor R4 in series with a 3V
zener is used to provide the 3V supply to
UM3561 when the relay is in energised
state. LED1, connected in series with
68-ohm resistor R1 across resistor R4,
glows when the siren is on.
To test the working of the circuit, bring

a burning matchstick close to transistor
T1 (BC109), which causes the resistance
of its emitter-collector junction to go low
due to a rise in temperature and it starts
Readers comments:
I have tried to construct the circuit,
which failed to respond even after supplying heat for a long time. How can one
check the transistor if the relay does not
operate? Can you suggest me an alternative for transistor T1? Please help.
Saket
Through e-mail
In the project, on heating the base of
transistor T1, the circuit does not work.
I was even more surprised to see that the
circuit had been EFY Tested.
Manish Poudwal
Through e-mail
EFY:
In reply to Saket:
The circuit has been tested and there
is nothing wrong in the circuit. To test the
transistor, take a lighted matchstick (or
candle) close to the BC109 (or the BC549).
(For higher amplification, use BC109C or
BC549C.) The relay should energise via
the amplifier comprising complementary
pair of transistors T1 and T2. When you
gradually withdraw the candle or burning
matchstick, the brightness of the LED
will gradually decrease and it will finally
go off.
We have also tried the circuit with
130
Pin Designation
SEL1
SEL2
No Connection
No Connection
+3V
No Connection
Ground
No Connection
Do not care
+3V
conducting. Simultaneously, transistor

T2 also conducts because its base is connected to the collector of transistor T1. As
a result, relay RL1 energises and switches
on the siren circuit to produce loud sound
of a firebrigade siren.
Sound Effect
Lab note. We have added a
table to enable readers to obtain
Police Siren
Fire Engine Siren all possible sound effects by returning pins 1 and 2 as suggested
Ambulance Siren
Machine Gun
in the table.
transistor BC108 in place of BC109, and

it worked well.
In reply to Manish Poudwal:
All the circuits are undoubtedly tested
and records maintained. If you have not
been able to achieve the results, there
is likely to be some flaw. You may have
used a silicon transistor for AC188. Note
that AC188 is a germanium transistor (in
metal can). Please check.
Response from the reader: As guessed
correctly by you, I was using a silicon
transistor AC188 instead of germanium
transistor. Now the circuit does work.
Musical Touch Bell

Sukant Kumar Behara
ere is a musical call bell that can

be operated by just bridging the
gap between the touchplates with
ones fingertips. Thus there is no need
for a mechanical on/off switch because
the touch-plates act as a switch. Other
features include low cost and low power
consumption. The bell can work on 1.5V
or 3V, using one or two pencil cells, and
can be used in homes and offices.
Two transistors are used for sensing
the finger touch and switching on a melody
IC. Transistor BC548 is npn type while
transistor BC558 is pnp type.

The emitter of transistor BC548 is
shorted to the ground, while that of transistor BC558 is connected to the positive
terminal. The collector of transistor BC548
is connected to the base of BC558. The
base of BC548 is connected to the washer
(as shown in the figure). The collector of
BC558 is connected to pin 2 of musical IC
UM66, and pin 3 of IC UM66 is shorted
to the ground. The output from pin 1 is
connected to a transistor amplifier comprising BEL187 transistor for feeding the
loudspeaker. One end of 2.2-mega-ohm

resistor R1 is connected to the positive rail
and the other to a screw (as shown in the
figure). The complete circuit is connected
to a single pencil cell of 1.5V.
When the touch-plate gap is bridged
with a finger, the emitter-collector junction of transistor BC548 starts conducting. Simultaneously, the emitter-baser
junction of transistor BC558 also starts
conducting. As a result, the collector of
transistor BC558 is pulled towards the
positive rail, which thus activates melody
generator IC1 (UM66). The output of IC1
is amplified by transistor BEL187 and fed
to the speaker. So we hear a musical note
just by touching the touch points.
The washers inner diameter should
be 1 to 2 mm greater than that of the
screwhead. The washer could be fixed in
the position by using an adhesive, while
the screw can be easily driven in a wooden
piece used for mounting the touch-plate.
The use of brass washer and screw is recommended for easy solder-ability.
Readers comments:
The circuit starts ringing (without
touching the screw) when connected to
3V. On disconnecting points 1 and 2 (kept
open), I still received the ring. Why so?
A. Vaidhyanathan
Pollachi
The author, Sukant Kumar Behara,
replies:
You can rectify this snag by changing
transistor T1 (BC148) with a new one.
On touching the base of transistor T1, its
emitter-collector junction starts conducting. But youve mentioned that even without touching the base of transistor T1, the
bell starts ringing, which means that the
emitter-collector junction of the transistor
has got shorted internally.
Non-contact
liquid-level controller
R.G. Thiagaraj Kumar
FY readers are quite familiar with

liquid-level controllers. But the
one presented here is different.
Usually, transducers using electric con-
duction, or variation in resistance or

capacitance principle, are employed for
level sensing.
In conduction type of sensors, the elec-
tric current passes through the liquid. The

corrosion of contacts is a major problem
while using DC excitation. The cost and
the size are the two restrictive factors
131
in using AC excitation. Further, passing

current through the liquid in combustive
environments is not permissible.
In resistance type sensors, the resistance is altered through some mechanical arrangement, which means a large
operating force is required, which may be
a problem in small tanks. In capacitive
transducer type, the construction cost is
high.
In the present project, an easy but effective liquid-level controller is presented
using the magnetic principle. It is non-contact type and hence can be used in almost
all applications, irrespective of whether
the liquid is conductive or not. Two reed
switches (with glass enclosure) and a ring
magnet (normally used in loud-speakers)

form the sensor unit. The reed switches
used are normally-open type and they
close when placed (and oriented properly)
in a magnetic field.
The electronic circuit is a simple bistable multivibrator wired around the common 555 timer IC. It can be set or reset by
the closure of reed switches. The output of
the multivibrator drives the relay, which
controls the AC mains supply to the pump
motor or any other controller (such as a
solenoid-operated valve).
The reed switches are connected as
shown in the figure. These are put in a
closed (non-conductive) tube, which is
then placed in the tank. The ferrite ring
magnet is put inside the

float, and it moves up and
down along the tube depending upon the level of
the liquid in the tank.
When the level of the
liquid in the tank is low,
the magnet comes closer
to reed switch S2. As a
result, switch S2 is closed
+
and the bistable multivibrator sets. This actuates the relay, thereby
starting the pump to fill
the tank. The level of the
liquid in the tank starts
increasing.
When the level of the
liquid in the tank is high enough,
the ring magnet comes close to
reed switch S1, and it closes. The
bistable multivibrator now resets
and the pump is switched off.
This process is repeated and the
tank gets filled automatically.
Switches S1 and S2 are
used for testing the circuit or
when the reed switches are nonfunctional. A neon bulb is used to
indicate the presence of the AC
supply in the plug. An optional
piezobuzzer is used to raise an
audible alarm when the relay
energises.
If you desire to display the
level of the liquid in the tank, additional
reed switches would need to be placed inside the tube at different levels (say, 1/4th,
1/2, 3/4th, and near-overflow level). They
can be connected between the LEDs and
the supply via current-limiting resistors
for level indication. The LEDs can be arranged in a model tank diagram printed
on the front panel of the controller. The
LED corresponding to the level of the
liquid in the tank would glow in this arrangement.
The selection of float material is to be
done carefully to avoid chemical reaction
and/or pollution of the liquid. Teflon floats
are suitable for most applications.
Readers comments:
The circuit is indeed very effective and
accurate, while being very simple and
straightforward. Congratulations to the
author!
Based on this circuit, I successfully
arranged a number of reed switches using a 24-lead flat cable inside a PVC tube,
for monitoring a vehicles fuel tank level.

Since the idea of using an electric conduction method is out of question with petrol,
I was agonisingly pondering over various
alternatives. The idea given by Mr Kumar
is what exactly I was looking for.
M.K. Chandra Mouleeswaran
Tamil Nadu
We are undergraduate students from a

leading University of Sri Lanka and have
constructed the project successfully.
The IC should function when both
switches S1 and S2 are open and the AC
supply is switched on, but we found that
it becomes on automatically. Also explain
the purpose of using diode D3 and capaci-
132
tor C2 in the circuit.

Menaha Shah and Colleagues
Through e-mail
EFY: During lab testing (with DC supply) we havent noticed any such fault.
The stated fault could occur only if the
gap between reed switch contacts is too

small. Try placing 0.1F capacitor across
resistors R1 and R2 to bypass any noise
surge at switching on as it may trigger
the timer.
Diode D3 acts as a free-wheeling diode
to dissipate the stored energy in the relay

coil when the transistor suddenly cuts off
and the magnetic field collapses. Capacitor
C2 at control pin 5 of timer 555 is used as
a filter capacitor when the timer is used in
noisy environments.
High-Power Bicycle Horn

T.K. Hareendran
n interesting circuit of a bicycle

horn based on a popular, low-cost
telecom ringer chip is described
here. This circuit can be powered using the bicycle dynamo supply and does
not require batteries, which need to be
replaced frequently.
The section comprising diodes (D1
and D2) and capacitors (C1 and C2) forms
a half-wave voltage-doubler circuit. The
output of the voltage doubler is fed to capacitor C3 via resistor R1. The maximum
DC supply that can be applied to the input
terminals of IC1 is 28V. Therefore zener

diode ZD1 is added to the circuit for protection and voltage regulation.
The remainder of the circuit is the
tone generator based on IC1 (KA2411).

The dual-tone output signal from pin 8 of
IC1 is fed to the primary of transformer
X1 (same as used in transistor radios) via
capacitor C6. The secondary of X1 is connected to a loudspeaker directly.
In case you are interested in connecting a piezoceramic element in place of the
loudspeaker, remove capacitor C6, transformer X1, and the loudspeaker. Connect
one end of the piezoceramic disk to pin 5
of IC1 and the other end to pin 8 of IC1
through a 1/4W, 1-kilo-ohm resistor.
IC1 KA2411 is also available in COB
style, with the same pin configuration.
Both packages work equally well. However, to get the best results with the COB
package, change values of resistors R2
through R4 to 330-kilo-ohm, capacitor C4
to 0.47F, 63V electrolytic (positive end to
pin 3 of IC1), and C5 to 0.005F, 63V.
This bicycle horn project can also be
used as a telephone extra ringer by just
removing all components on the left side
of capacitor C3 and connecting the circuit
shown in Fig. 2 to the terminals of capacitor C3.
AC mains phase-sequence
indicator
M.K. Chandra Mouleeswaran
mains phase-sequence indicator

serves as a hand-tool in checking
electrical wiring, especially the wiring
of three-phase AC motors.
The basic idea of the circuit is that

when any (say, Y) of the three phases
(RYB), taken as a reference phase, is at
negative-going zero voltage, its leading
phase (say, R) is positive while its lagging

phase (B) is negative, and these states can
be easily verified.
The circuit comprises two main parts.
133
The first part

comprises
transistorised
multivibrator,
decade countercum-LED driver,
and LED arrays
arranged in a
specified fashion, as shown in
the figure. The
second part comprises the phasesequence detector followed by
phase-sequence
sensor operated flip-flop and
LED switching
transistors.
The astable multivibrator section

provides clock pulses in the 10 to 1000Hz
range to the decade counter and the LED
array section. The LEDs are grouped into
two parts to form two distinctive indicators. These two groups are successively
driven by Q0 to Q4 and Q5 to Q9 outputs
of IC1. Only one of the two groups LEDs
will turn on sequentially, depending on
which of the two transistors (transistor
T3 or transistor T4) is on, which, in turn,
is dependent upon the phase sequence
of the three-phase supply. This becomes
clear from the following explanation of the
second part of the circuit.
The three phases (R, Y, and B) are
brought to an artificial neutral at the
junctions of resistors R17 through R19
(each 22 kilo-ohm, 2-watt) to serve as
the common reference. As stated earlier,
for a given phase sequence,

when phase R is at its negative-going zero, phase B is
negative. So data-input pin
5 of the flip-flop (IC2) is logic
high (due to non-conduction
of transistor T5). Meanwhile,
clock-input pin 3 of the flipflop goes from low to high due
to phase R (refer waveforms
for condition 1, as observed
by EFY Lab). The high at
data pin appears at the q
output (pin 1) while Q output
remains low as long as the
134
phase sequence is clockwise. Therefore

the Q output drives transistor T3 to extend the ground path for green LEDs D1
through D10 to show a clockwise-rotating
LED ring.
When any of the two phases gets
interchanged (say, after a maintenance
work at the power-house or repair/replacement of a 3-phase transformer), the
conditions are reversed (refer waveform
for condition 2, as observed by EFY Lab),
and Q become high and red LEDs D11
through D20 are switched on (sequentially)
by transistor T4 to show an anticlockwiserotating ring.

While testing for the phase sequence,
there is no need to keep the device on for
a long time. A push-to-on read switch
can be used during the phase-sequence
testing. If the device is to be used for
long periods, use a high-capacity battery
in place of PP3 battery. Also replace 2W
resistors R17 to R19 with 5W fusible-type
resistors.
The frequency of the astable multivibrator is unimportant, except that the
speed of the LED ring must be easily visible. Zener diodes ZD1 and ZD2 are used
for protection of transistors T5 and T6,
respectively.
Precautions. 1. Never use an AC
mains adaptor-type power supply in place
of the battery.
2. Correctly position LEDs D1 through
D20 in the ring for its proper viewing.
3. Assemble resistors R11 to R19 on
the PCB at a slightly elevated level using ceramic beads for proper dissipation
of heat.
Luxurious toilet/
bathroom facility
A.R. Gidwani
Ag
ed persons in the house and

guests often fumble while search
ing for the toilet and bathroom switches at night. Also, very few
of us take care to switch off the lights of
toilets/bathrooms after using them. The
circuit given here helps to overcome both
the problems.
The figure shows two symmetrical
circuits (one each for toilet and bathroom) sharing common power supply and
a melody generator-cum-audio warning unit. The reed switches S1 and S2
are of normally-open type, operated by
permanent magnets appropriately fixed
to the doors of bathroom and toilet, respectively. When the doors of bathroom
and toilet are closed, the reed switches
are also closed, and vice versa. (Door is

assumed in closed condition with nobody
inside bathroom/toilet, i.e. reed switch is
activated.)
The operational features of the circuit
are:
Lamp and exhaust fan are switched
on when the door is opened.
Soft music is played continuously
135
until the door is closed from inside/outside.

With a person inside the room,
lamp and fan remain on, until the door
is reopened. They go off when the door is
reopened.
Visual indication of whether the
toilet/bathroom is occupied/vacant is given
by two bicolour LEDs fixed on a panel,
which may be fitted near the door with
corresponding toilet/bathroom labels
on them. Here the LED colour turns from
green to red if the room gets occupied,
and vice-versa.
If the door is opened once, and not
closed back within 10 seconds, the lamp
and fan are automatically switched off,
thus conserving electricity. But the music
remains on as a reminder that the door is
not closed.
For cleaning of bathroom/toilet with
doors kept open, a parallel on/off switch is
included on the switchboard to bypass the
relay contacts and manually control the
switching on/off of the light and exhaust
fan. (This is the service mode.) In this
case, the music remains on as long as the
door remains open. In case of failure of the
unit, the same on/off switch can be used as
usual until the circuit is repaired.
Due to battery backup facility,
even with power failure, when a person
is inside, the door status is maintained.
However, the lamp and fan will be on only
on mains resumption.
Also, when a person leaves the room

during power failure, with door closed, the
lamp and fan are kept off on resumption of
power. (Intelligent-mode!)
However, the circuit can be fooled
by opening and closing the door within
10 seconds, without entering inside. In
this case, the lamp and fan will continue
to be on and would require reopening and
closing of the door to bring the circuit to
order.
This problem can be prevented to
some extent by using a hydraulic door
opener, which would approximately take
10 seconds to close the opened door. A
delay period of 10 seconds is deliberately
chosen for letting the person inside the
toilet/bathroom in normal case!
IC1 is a dual positive edge-triggered D
type flip-flop. IC1(a) gets triggered when
bathroom door (and switch S1) is opened
and hence IC1(b) toggles, as Q output of
IC1(a) is connected to clock input pin of
IC1(b). As a result, relay RL1 energises
through transistor T3, thereby switching
on the lamp and exhaust fan. (Please refer
to Fig. 2, the separate wiring diagram of
lamp and exhaust fan via the N/O contacts
of the relay.) Simultaneously, pin 2 (Q1) of
IC1(a) goes low, switching transistor T5
on, which switches on melody generator
IC4, letting out a sweet audio tune via
transistor T6 and loudspeaker.
In normal condition, when someone opens the bathroom door and gets
inside within preset time of IC3(a) (10
seconds here), and closes the door from
inside, the music stops with lamp and
fan on. Now, in case someone opens
the door before or after use, and forgets
to shut it, the lamp and exhaust fan
are switched off after 10 seconds but
the music remains on as a reminder
that the door is to be closed. This happens due to mono multivibrator (MMV)
IC3(a), which resets pin 10 of IC1(b)

through transistor T1 after 10 seconds.
(This period can be adjusted by varying the values of resistor R11 and/or
capacitor C7.)
It should be noted here that although
IC3 is used as MMV, it is triggered here
with a positive pulse through its pin 4
(reset pin) rather than its pin 6 (trigger
pin). This arrangement makes it unique
for setting and resetting IC3 through pin
4, and resetting IC1(a) through pin 5 of
IC3 and transistor T1.
Battery backup facility ensures memory backup during power failure. Power
supply uses a normal 2-diode full-wave
rectifier circuit, which needs no further explanation. The purpose of using bi-colour
LED1 and LED2 is that, initially when the
door is closed these emit green lightas
the green LED part gets the supply via
resistor R15to indicate that bathroom/
toilet is vacant. When bathroom/toilet is
occupied, transistor T3/T4 conduct to light
up the red LED part as well.
Melody generator IC4 (UM66) is
switched on through diodes D3/D4 and
transistor T5, which conducts when IC1(a)
pin 2 or IC2(a) pin 2 goes low. When
transistor T5 conducts, zener ZD1 breaks
down and supplies regulated 3.9V to IC4,
to produce a melodious tune via transistor
T6 and the speaker.
As most toilets and bathrooms are attached nowadays, only a single circuit is
required, and the circuit can be wired on
a general-purpose veroboard.
A small modification of the circuit,
by adding additional SPST switch S3, as
shown in Fig. 2, needs to be done inside
the wooden switchboard box. This permits
the user to operate the lamp and fan during cleaning of the toilet or for bypassing
the circuit, when bathroom or toilet undergo repair work.
EEPROM W27C512
(Winbond) Eraser
j.p. Sharma
PROMs (electrically erasable

PROMs) are generally erased by
ultraviolet rays, and it takes half
an hour or so to erase the data in an
136
ERPOM. Nowadays a special EEPROM

from Winbond is available in the market,
which is being used in telecommunication due to its low cost.
The simple, low-cost circuit presented

here takes only 100 ms to erase old programs electrically. The programming
voltage VPP for the mentioned IC is 12.7V,
unlike the 28xxxx series EEPROMs that

can be written to or read like a RAM, in
situ. Multiple ICs connected in parallel
can be erased simultaneously using the
given circuit.
The circuit requires 15V to 20V DC.
Timer IC3 (LM555) is used for generation
of clock pulses of 200 millisecond time
period with an on time of 100 milliseconds. Pulse time is achieved by using
presets VR1 and VR2 and capacitor C1.
The on/off time of pulse may be set with
the help of an oscilloscope or by taking appropriate values of presets VR1 and VR2
(in-circuit resistances) and capacitor C1
using the following relationship:
On time=0.69VR1xC1=Off Time=
0.69VR2xC1=100 milliseconds
IC1 (7812) and IC2 (7805) are voltage
regulator ICs that are used to obtain regu-
lated 14V DC and 5V DC, respectively,

required for operation of the circuit. The
clock with time period of 200 milliseconds
is fed to IC4 (CD4017). In this IC, the output is available successively only at one of
the output pins with a delay of 200 milliseconds when reset pin 15 is low. The 14V
DC is made available via transistors T1
and T2 to pins 22 and 24 of IC5 (27C512,
which is the IC under erasure).
As soon as push-to-on switch S1 is
pressed momentarily, it resets IC4 by application of 5V DC to reset pin 15, and the
output at pin 3 (Q0) goes high. This high
output is shifted to the next output pin
with the successive clock pulse received
at pin 14.
Q5 output from pin 1 of IC4 is inverted
using transistor T3 and is given to chipenable pin 20 of IC5, when 14V DC is
already available at pins 22 and 24 of IC5.

All address pins, except pin 24 (A9), are
set low and all data pins (11 through 13
and 15 through 19) are at high level (+5V).
Then pins 22 and 24 are pulsed low for 100
milliseconds. Immediately all data (cells)
are set high. (Data output is high only in
erased condition.)
At the end when Q9 output of IC4
goes high, transistor T4 conducts, pulling
its collector low. LED1 glows to indicate
completion of erasure. Simultaneously,
pin 4 of timer IC3 is taken low to stop
generation of further clock pulses until
IC4 is reset.
Insert the next IC to be erased in IC5
socket (preferably use a ZIF socket) and
reset IC4 by pushing switch S1 momentarily. It takes only 100 milliseconds to erase
the EEPROM IC.
Readers comments:
Please clarify the following:
1. Why all address pins, except 24
(A9), are connected to 0V (GND)?
2. If there are more than A15 address
pins (as in 27C010, 27C020, 28C020 etc),
which address pin willbe connected to Vcc
(+5V)?
3. Is it possible to set pulse time with

DTM?
4. Is it possible to erase EEPROM
other than Winbond make?
Angika Electronics, Bhagalpur
The author, J.P. Sharma, replies:
1. The given configuration is mandatory
as per the manufacturers catalogue for
erasing W27C512 EEPROM.

2. 27C010 and 27C020 are UV erasable EPROMs (with less than A15 pins).
For 28C020, refer the datasheet.
3. A monostable low pulse of 100 milliseconds can be set with DTM.
4. You can erase similar EEPROMs
electrically.
Intelligent Electronic Lock

k. udhaya Kumaran
his intelligent electronic lock circuit is built using transistors

only. To open this electronic lock,
one has to press tactile switches S1

through S4 sequentially. For deception
you may annotate these switches with
different numbers on the control panel/

keypad.
For example, if you want to use ten
137
switches on the keypad marked 0 through

9, use any four arbitrary numbers out of
these for switches S1 through S4, and the
remaining six numbers may be annotated
on the leftover six switches, which may
be wired in parallel to disable switch S6
(shown in the figure). When four password
digits in 0 through 9 are mixed with the
remaining six digits connected across disable switch terminals, energisation of relay
RL1 by unauthorised person is prevented.
For authorised persons, a 4-digit password
number is easy to remember.
To energise relay RL1, one has to
press switches S1 through S4 sequentially
within six seconds, making sure that each
of the switch is kept depressed for a duration of 0.75 second to 1.25 seconds. The
relay will not operate if on time duration
of each tactile switch (S1 through S4) is
less than 0.75 second or more than 1.25
seconds. This would amount to rejection
of the code.
A special feature of this circuit is that
pressing of any switch wired across disable switch (S6) will lead to disabling of
the whole electronic lock circuit for about
one minute. Even if one enters the correct 4-digit password number within one
minute after a disable operation, relay
RL1 wont get energised. So if any unauthorised person keeps trying different
permutations of numbers in quick successions for energisation of relay RL1, he is
not likely to succeed. To that extent, this
electronic lock circuit is foolproof.
This electronic lock circuit comprises
disabling, sequential switching, and
relay
138
latch-up sections.
The disabling section comprises zener
diode ZD5 and transistors T1 and T2. Its
function is to cut off positive supply to sequential switching and relay latch-up sections for one minute when disable switch
S6 (or any other switch shunted across its
terminal) is momentarily pressed.
During idle state, capacitor C1 is
in discharged condition and the voltage
across it is less than 4.7 volts. Thus zener
diode ZD5 and transistor T1 are in nonconduction state. As a result, the collector
voltage of transistor T1 is sufficiently
high to forward bias transistor T2. Consequently, +12V is extended to sequential
switching and relay latch-up sections.
When disable switch is momentarily depressed, capacitor C1 charges up
through resistor R1 and the voltage available across C1 becomes greater than 4.7
volts. Thus zener diode ZD5 and transistor T1 start conducting and the collector
voltage of transistor T1 is pulled low. As
a result, transistor T2 stops conducting
and thus cuts off positive supply voltage
to sequential switching and relay latchup sections.
Thereafter, capacitor C1 starts discharging slowly through zener diode ZD5
and transistor T1. It takes approximately
one minute to discharge to a sufficiently
low level to cut-off transistor T1, and
switch on transistor T2, for resuming
supply to sequential switching and relay
latch-up sections; and until then the circuit does not accept any code.
The sequential switching section com
prises transistors T3 through

T5, zener diodes ZD1 through
ZD3, tactile switches S1 through
S4, and timing capacitors C2
through C4. In this three-stage
electronic switch, the three transistors are connected in series to
extend positive voltage available
at the emitter of transistor T2
to the relay latch-up circuit for
energising relay RL1.
When tactile switches S1
through S3 are activated, timing capacitors C2, C3, and C4
are charged through resistors
R3, R5, and R7, respectively.
Timing capacitor C2 is discharged through resistor R4,
zener diode ZD1, and transistor T3; timing capacitor C3
through resistor R6, zener diode ZD2, and transistor T4; and timing
capacitor C4 through zener diode ZD3
and transistor T5 only. The individual
timing capacitors are chosen in such a
way that the time taken to discharge capacitor C2 below 4.7 volts is 6 seconds, 3
seconds for C3, and 1.5 seconds for C4.
Thus while activating tactile switches
S1 through S3 sequentially, transistor T3
will be in conduction for 6 seconds, transistor T4 for 3 seconds, and transistor T5
for 1.5 seconds.
The positive voltage from the emitter of transistor T2 is extended to tactile
switch S4 only for 1.5 seconds. Thus one
has to activate S4 tactile switch within
1.5 seconds to energise relay RL1. The
minimum time required to keep switch S4
depressed is around 1 second.
For sequential switching transistors
T3 through T5, the minimum time for
which the corresponding switches (S1
through S3) are to be kept depressed is
0.75 seconds to 1.25 seconds. If one operates these switches for less than 0.75
seconds, timing capacitors C2 through
C4 may not get charged sufficiently. As
a consequence, these capacitors will discharge earlier and any one of transistors
T3 through T5 may fail to conduct before
activating tactile switch S4. Thus sequential switching of the three transistors will
not be achieved and hence it will not be
possible to energise relay RL1 in such a
situation.
A similar situation arises if one keeps
each of the mentioned tactile switches depressed for more than 1.5 seconds. When
the total time taken to activate switches S1
through S4 is greater than six seconds,

transistor T3 stops conducting due to time
lapse. Sequential switching is thus not
achieved and it is not possible to energise
relay RL1.
The latch-up relay circuit is built
around transistors T6 through T8, zener
diode ZD4, and capacitor C5.
In idle state, with relay RL1 in deenergised condition, capacitor C5 is in
discharged condition and zener diode ZD4

and transistors T7, T8, and T6 in nonconduction state.
However, on correct operation of sequential switches S1 through S4, capacitor C5 is charged through resistor R9 and
the voltage across it rises above 4.7 volts.
Now zener diode ZD4 as well as transistors T7, T8, and T6 start conducting and
relay RL1 is energised. Due to conduction
of transistor T6, capacitor C5 remains

in charged condition and the relay is in
continuously energised condition.
Now if you activate reset switch S5
momentarily, capacitor C5 is immediately
discharged through resistor R8 and the
voltage across it falls below 4.7 volts. Thus
zener diode ZD4 and transistors T7, T8,
and T6 stop conducting again and relay
RL1 de-energises.
Stable 455kHz BFO

for SSB Reception
D. Prabaharan
ost Indian amateur radio operators prefer to operate on

SSB (single sideband) and CW
because these carry the signal over a long
distance for a given transmitter power.
Broadcast receivers are not meant to
directly receive Morse code transmission
on SSB and CW. Short-wave listeners
require some arrangement to receive the
same. One such arrangement comprises a
simple IF BFO (beat frequency oscillator),
which is an RF oscillator of conventional
type. The output of BFO is heterodyned
to beat with another frequency to obtain
a resultant frequency (difference of the
two frequencies) lying in the audio range
(about 1 kHz).
BFO can be used to get an audio note
from CW reception and also to resolve SSB
signals. An SSB signal is transmitted without carrier signal. In ordinary receivers, it
does not produce speech with sufficient
clarity. When BFO signal is heterodyned

with SSB signal, this RF acts like a carrier
and the signal is well resolved.
The BFO circuit comprises transistors T1 and T2, which are connected
in a straightforward two-stage, directcoupled, common-emitter configuration.
The input and output are in phase and
positive feedback between the two

is provided by ceramic filter CF1.
A significant amount of feedback
is provided only at the operating
frequency of the filter, which is
455 kHz. So the circuit oscillates
at this frequency. The ceramic filter
gives good frequency stability and
requires no adjustment in order to
produce the correct frequency. This
BFO is meant for single-sideband
reception only.
There is no need to connect
BFO to receiver. Tune your BC
receiver to any SSB signal, and then on
keeping BFO just close to it, you may
notice some hissing noise in your receiver.
Match BFO frequency to your receivers
IF, which may be between 452 and 460
kHz, until you get clear sound. If the BFO
signal is too strong, increase the distance
between BFO and receiver.
Auto Shut-off For Cassette

Players And Amplifiers
arthur louis
ere are two simple, low-cost circuits that can be used to shut
off the mains supply to any
audio or video equipment (such as
tape recorder, CD player, and amplifier).

These circuits are helpful to those in the
habit of falling asleep with their music
system on.
The circuits will also protect the

equipment from getting damaged due to
high-voltage spikes whenever there is a
resumption of power after a break. This
139
is possible because the equipment will get

switched off automatically under such conditions but will not get switched on automatically on resumption of mains supply.
The circuit in Fig. 1 can be used to
shut off any cassette player that has a
reliable auto-stop mechanism. Whenever
switch S1 is pressed momentarily, it extends the supply to the step-down transformer of the tape recorder and charges
capacitor C1 through diode D1. This, in
turn, makes transistor T1 conduct and
energise relay RL1 to provide a parallel
path to switch S1, so that supply to the
step-down transformer continues even
when switch S1 is released.
When any button on the cassette
player is pressed, the capacitor charges
through diode D2. This ensures conduction
140
of transistor T1 and thus the continuity

of operation of cassette player. However,
whenever the auto-stop mechanism functions at the end of a tape, the leaf switch
gets opened. This cuts the charging path
for the capacitor and it starts discharging slowly. After about one minute, the
relay opens and interrupts main power
to the transformer. The time delay can
be increased by increasing the value of
capacitor C1.
If the appliance used is a two-in-one
type (e.g. cassette player-cum-radio), just
connect another diode in parallel with
diodes D1 and D2 to provide an additional
path for charging capacitor C1 via the
tape-to-radio changeover switch, so that
when radio is played the relay does not
interrupt the power supply.
The other circuit, shown in

Fig. 2, functions on the basis of
the signal received from preamp
of the appliance used. In this
circuit, opamp A741 is wired
in inverting opamp configuration. It amplifies the signal received from the preamp. Timer
NE555 is used to provide the
necessary time delay of about
one minute.
Preset VR1 is used to control the sensitivity of the circuit
to differentiate between the
noise and the signal. Resistor
R4 offers feedback resistance to
control the gain of the opamp.
By increasing or decreasing the
value of resistor R4, the gain
can be increased or decreased,
respectively. The preset time
delay of timer NE555 (which
is about one minute) can be increased by increasing the value
of C4.
Initial energisation of relay
RL2 and charging of capacitor
C4 take place on depression of
switch S3 in the same manner as charging of capacitor
C1 (refer Fig. 1) on depression
of switch S1. As a result, pins
2 and 6 of NE555 go high and
the output of timer goes low to
switch off mains supply from
the relay to step-down transformer X2 of the appliance.
Bleeder resistor R6 is used to
discharge capacitor C4. Now
if signals are received from
the preamplifier, these are amplified by A741 and fed to the
base of transistor T2, which keeps capacitor C4 charged through resistor R5. When
there is no signal, T2 will not conduct and
the capacitor slowly discharges through
R6. The output of 555 goes high to switch
off the relay and thus the mains supply
to transformer X2. Switch S2 can be depressed momentarily if the device needs
to be manually switched off.
Note. The 12V supply should be provided to the circuit from the equipments
power supply. Opamp A741 should be
driven from the preamplifier of the gadget
used, and not from its power amplifier
output. Switches S1 and S2 are 2-pole
push-to-on switches. These can also be
fabricated from 2-pole on-off switches,
which are widely used in cassette players,
by removing the latch pin from them.
House Security System

malay banerjee
ere is a low-cost, invisible laser

circuit to protect your house
from thieves or trespassers. A
laser pointer torch, which is easily available in the market, can be used to operate
this device.
The block diagram of the unit shown
in Fig. 1 depicts the overall arrangement
for providing security to a house. A laser
torch powered by 3V power-supply is used
for generating a laser beam. A combination of plain mirrors M1 through M6 is
used to direct the laser beam around

the house to form a net. The laser beam
is directed to finally fall on an LDR that
forms part of the receiver unit as shown
in Fig. 2. Any interruption of the beam
by a thief/trespasser will result into
energisation of the alarm. The 3V powersupply circuit is a conventional full-wave
rectifier-filter circuit. Any alarm unit
that operates on 230V AC can be connected at the output.
The receiver unit comprises
two identical
step-down
transformers
(X1 and X2), two 6V relays (RL1 and

RL2), an LDR, a transistor, and a few
other passive components. When switches
S1 and S2 are activated, transformer
X1, followed by a full-wave rectifier and
smoothing capacitor C1, drives relay RL1
through the laser switch.
The laser beam should be aimed continuously on LDR. As long as the laser beam
falls on LDR, transistor T1 remains forward
biased and relay RL1 is thus in deenergised
condition. When a person crosses the line
of laser beam, relay RL1 turns ON and
transformer X2 gets energised to provide
a parallel path across N/C contact and the
pole of relay RL1. In this condition, the laser beam will have no
effect on LDR and the alarm will
continue to operate as long as
switch S2 is on.
When the torch is switched
on, the pointed laser beam is
reflected from a definite point/
place on the periphery of the
house. Making use of a set
of properly oriented mirrors
one can form an invisible net
of laser rays as shown in the
block diagram. The final ray
should fall on LDR of the
circuit.
Note. LDR should be kept
in a long pipe to protect it from
other sources of light, and
its total distance from the
source may be kept limited to
500 metres.
141
Simple
WaterLevel
IndicatorCumAlarm
pradeep g.
his water-level indicator-cumalarm circuit is configured around

the well-known CMOS inputcompatible, 7-channel IC ULN2004 Darlington array.
As the water level rises in the tank, it
comes in contact with probes P1 through
P7 and thereby makes pins 7 through 1
high, sequentially. As a result, the corresponding output pins 10 through 16 go
low one after the other, and LED1 through
LED7 light up in that order.
When water comes in contact with the

final probe P7, it results in sounding of
the piezo-buzzer connected to output pin

16 along with LED7.
Precision Inductance and

Capacitance Meter
P. Thangavel
his circuit for measurement of inductance and capacitance can be

used to test whether the values of
inductors and capacitors quoted by the
manufacturer are correct.
The principle used in the circuit is
based on the transient voltages produced
across inductors and capacitors connected
as series R-L and R-C networks, respectively, across a constant voltage source.
The time constant for R-C and R-L networks is given by the relationships t=RxC
and L/R, respectively, where resistance
R is in ohms, capacitance C in Farads,
142
inductance L in Henries, and time t in

seconds.
The voltage across capacitor in R-C
network rises exponentially to 0.632 of
the applied voltage and voltage across
inductor in R-L network degrades exponentially to 0.368 of the applied voltage
in one RxC and one L/R time (referred to
as time constant T of the combination),
respectively.
When the inductor/capacitor under
test is connected across terminals A
and B shown in the circuit, it is discharged through the normally-closed
contacts of two-way push-to-on/off switch

S1. When switch S1 is pushed, the
capacitors voltage begins to grow (or
the inductors voltage begins to drop).
Simultaneously, the output of timer 555
IC, which is wired as an astable multivibrator, is passed through NOR gates
N1 and N2 and applied to the counter
circuit.
When the time constant (one CxR or
one L/R, as the case may be) reaches, gate
N2 is inhibited as its pin 2 goes high and
the counter circuit freezes. Mode switch
S2 is to be kept in position a1 for capaci-
tance measurement and in position a2 for

inductance measurement.
As series resistance R1 is 1 kilo-ohm,
the capacitance value is given by the
relationship C=Tx103 while the inductor
value is given by the relationship L=Tx103.
The time period (1/frequency) of timer
555 (IC2) is adjusted for 1 ms and 1 s in
b1 and b2 positions, respectively, of the
range switch. The values of capacitors and
inductors covered in each

Displayed
range, together
value
with displayed
values, are
Capacitance in
F and inductance shown in the
in H
table.
From the
table
it is obviCapacitance in nF
ous that this
and inductance
circuit can
in mH
measure capacitance from
1 nF to 9,999
F and inductance from 1 mH to 9999
H. While presets VR1 and VR2 are to be
adjusted for the in-circuit value of 1.717
kilo-ohm each, the in-circuit value of
preset VR3 is close to 4.7 kilo-ohm. If a
regulated +5V is not used, the measurement of capacitance and inductance will
be imprecise.
Given below are some important
points to be taken care of:
1. The position of modeselect switch S2

and range-select
switch S3 should
be changed before switch S1 is
pressed.
2. If the circuit is allowed to
function until it
displays a constant value, the
maximum time
taken for measurement will be
10 seconds.
3. When modeselect switch S2
is in position a1,
capacitances can
be measured,
and when it is in
position a2, inductances can be
measured.
4.
When
range-select
switch S3 is in
position b1, the
output of 555 IC
will have a time
period of 1 ms
(frequency = 1 kHz), and when it is in position b2, the output of 555 IC will have a
time period of 1 s.
(EFY lab note. The guaranteed
frequency of NE555 is limited to 500
kHz, and hence it may not be possible to
get 1s period. One may therefore use a
2nF capacitor to get a period of 2 s and
multiply the displayed value by 2, in b2
range.)
5. Use a breadboard for connecting
inductors or capacitors across terminals
A and B.
6. Using both the ranges for measuring an inductor or capacitor enables
one to obtain the accurate value. For
example, a 4.7F capacitor will display
only 4 F when measured in range b1 ,
while in b2 range it will display 4700 nF
(or 4.7 F).
7. Dont press switch S1 before inserting the capacitor or the inductor between
terminals A and B.
Readers comments:
I have asssembled the circuit, which
doesnt work at all. It is showing different
values all the time. Even when the capaci-
tor and the inductor arent connected for

measurement, it still shows some values.
I have checked all the ICs and found them
all in good condition. Is there any misprint
in the said circuit idea? Kindly tell me the

cause of this problem.
Asif Draboo
Bemiba, Jammu & Kashmir
555 IC
Time period

1 ms
(Switch S3 in
position b1)

1 s
(Switch S3 in
position b2)

Table
Capacitance
Inductance
range
range
C=Tx103
L=Tx103
When T=1 ms, When T=1 ms, L=1H
C=1 F
When T=9999 ms,
When T=
L=9999 H
9999 ms,
C=9999 F
When T=1 s,
When T=1 s,
C=1 nF
L=1 mH
When T=9999 s, When T=9999 s,
C=9999 nF
L=9.999H
=9.999 F
=9999 mH
143
The author, Thangavel Ponnusamy,

replies:
Please go through the article throughly.
There are some rules to be followed to get
proper performance from the instrument:
1. The circuit should be switched on
only after connecting the capacitor or the
inductor for measurement. If you connect
the capacitor or the inductor (for measurement) after the circuit is powered on, you
are bound to get wrong results.
2. Check the position of mode switch,
which needs to be set in appropriate mode
before switching on the circuit. No switch
should be changed when the circuit is
powered on. For large-value inductors
and capacitors, the results will be stable

only after a few seconds, so wait until the
results stabilise.
3. Ensure that you are using good capacitors and inductors for measurement.
I hope the above tips will help you to
get yor instrument working.
Under-/Over-Voltage Beep
for Manual Stabiliser
K. Udhaya Kumaran
anual stabilisers are still popular because of their simple construction, low cost, and high reliability due to the absence of any relays
while covering a wide range of mains AC
voltages compared to that handled by automatic voltage stabilisers. These are used
mostly in homes and in business centres
for loads such as lighting, TV, and fridge,
and in certain areas where the mains
AC voltage fluctuates between very low
(during peak hours) and abnormally high
(during non-peak hours).
Some manual stabilisers available in
the market incorporate the high-voltage
auto-cut-off facility to turn off the load
when the output voltage of manual stabiliser exceeds a certain preset high voltage
limit. The output voltage may become high
due to the rise in AC mains voltage or due
to improper selection by the rotary switch
on manual stabiliser.
One of the major disadvantage of using a manual stabiliser in areas with a
wide range of voltage fluctuations is that
one has to keep a watch on the manual
stabilisers output voltage that is displayed on a voltmeter and keep changing
the same using its rotary switch. Or else,
144
the output voltage may reach the preset

auto-cut-off limit to switch off the load
without the users knowledge. To turn on
the load again, one has to readjust the
stabiliser voltage using its rotary switch.
Such operation is very irritating and inconvenient for the user.
This under-/over-voltage audio alarm
circuit designed as an add-on circuit for
the existing manual stabilisers overcomes the above problem. Whenever the
stabilisers output voltage falls below a
preset low-level voltage or rises above
a preset high-level voltage, it produces
different beep sounds for high and low
voltage levelsshort-duration beeps
with short intervals between successive
beeps for high voltage level and slightly
longer-duration beeps with longer interval
between successive beeps for low voltage
level. By using these two different types
of beep sounds one can readily readjust
the stabilisers AC voltage output with the
help of the rotary switch. There is no need
of frequently checking voltmeter reading.
It is advisable to preset the highlevel voltage 10V to 20V less than
the required high-voltage limit for
auto-cut-off operation. Similarly,
for low level one may preset lowlevel AC voltage 20V to 30V above
minimum operating voltage for a
given load.
The primary winding terminals of
step-down transformer X1 are connected
to the output terminals of the manual
stabiliser. Thus, 9V DC available across
capacitor C1 will vary in accordance with
the voltage available at the output terminals of the manual stabiliser, which is
used to sense high or low voltage in this
circuit.
Transistor T1 in conjunction with
zener diode ZD1 and preset VR1 is used
to sense and adjust the high-voltage level
for beep indication. Similarly, transistor
T2 along with zener ZD2 and preset VR2 is
used to sense and adjust low voltage level
for beep indication.
When the DC voltage across capacitor C1 rises above the preset
high-level voltage or falls below the
preset low-level voltage, the collector
of transistor T2 becomes high due to
non-conduction of transistor T2, in either case. However, if the DC voltage
sampled across C1 is within the preset
high- and low-level voltage, transistor
T2 conducts and its collector voltage
gets pulled to the
ground level. These
changes in the collector voltage of transistor T2 are used to
start or stop oscillations in the astable
multivibrator circuit
that is built around
transistors T3 and
T4. The collector of
transistor T4 is connected to the base of
buzzer driver transistor T5 through

resistor R8. Thus when the collector
voltage of transistor T4 goes high, the
buzzer sounds. Preset VR3 is used to control the volume of buzzer sound.
In normal condition, the DC voltage
sampled across capacitor C1 is within the
permissible window voltage zone. The
base of transistor T3 is pulled low due to
conduction of diode D2 and transistor T2.
As a result, capacitor C2 is discharged. The
astable multivibrator stops oscillating and
transistor T4 starts conducting because
transistor T3 is in cut-off state. No beep
sound is heard in the buzzer due to conduction of transistor T4 and non-conduction of

transistor T5.
When the DC voltage across capacitor
C1 goes above or below the window voltage
level, transistor T2 is cut off. Its collector voltage goes high and diode D2 stops
conducting. Thus there is no discharge
path for capacitor C2 through diode D2.
The astable multivibrator starts oscillating. The time period for which the beep is
heard and the time interval between two
successive beeps are achieved with the
help of the DC supply voltage, which is
low during low-level voltage sampling and

high during high-level voltage sampling.
The time taken for charging capacitors C2
and C3 is less when the DC voltage is high
and slightly greater when the DC voltage
is low for astable multivibrator operation.
Thus during low-level voltage sensing
the buzzer beeps for longer duration with
longer interval between successive beeps
compared to that during high-voltage level
sensing.
This circuit can be added to any existing stabiliser (automatic or manual) or
UPS to monitor its performance.
Ultra-Sensitive
Solidstate Clap Switch
Pradeep G.
ere is the circuit of a highly sensitive clap switch that can be

operated from a distance of up to
10 metres from the microphone.
Signals picked up by the microphone
are amplified by transistors T1, T2, and
T3. Diode D1 detects clap signals and the
resulting positive voltage is applied to the
base of transistor T4. The output from
transistor T4 is further amplified by transistor T5, whose output is used to trigger

a monostable multivibrator wired around
the 555 timer (IC1).
The output of IC1 is used as a clock for
decade counter 4017 (IC2) that is wired
as a divide-by-two counter. For each successive clap, transistor T6 conducts and
cuts off alternately. As a result, for each
clap signal, the lamp is either switched

on or off.
Triac 8T44A (or ST044) can drive load
of up to 4-amp rating. The 12V DC for
operation of the circuit is directly derived
from the mains using rectifier diode D2,
current-limiting resistor R16, and 12V
zener ZD1 shunted by filter capacitor C7.
15-Step Digital Power Supply

naveen thariyan
ere is a simple circuit to obtain

variable DC voltage from 1.25V
to 15.19V in reasonably small
steps as shown in the table. The input

voltage may lie anywhere between
20V and 35V.
The first section of the circuit comprises a digital up-down counter built
around IC1a quad 2-input NAND
145
schmitt trigger (4093), followed by

IC2 a binary up-down counter (4029).
Two gates of IC 4093 are used to generate up-down logic using push buttons S1
and S2, respectively, while the other two
gates form an oscillator to provide clock
pulses to IC2 (4029). The frequency of
oscillations can be varied by changing
the value of capacitor C1 or preset VR1.
IC2 receives clock pulses from the
oscillator and produces a sequential binary output. As long as its pin 5 is low,
the counter continues to count at the
rising edge of each clock pulse, but stops
counting as soon as its pin 5 is brought
to logic 1.
Logic 1 at pin 10 makes the counter
to count upwards, while logic 0 makes it
count downwards. Therefore the counter
counts up by closing switch S1 and counts
down by closing switch S2.
The output of counter IC2 is used to
realise a digitally variable resistor. This
section consists of four N/O reed relays
that need just about 5mA current for their
operation. (EFY lab note. The original
circuit containing quad bilateral switch
IC 4066 has been replaced by reed relays
operated by transistorised switches because
of unreliable operation of the former.)
The switching action is performed using
BC548 transistors. External resistors are
connected in parallel with the reed relay
contacts. If particular relay contacts are
opened by the control input at the base
of a transistor, the corresponding resistor
across the relay contacts gets connected
to the circuit.
The table shows the theoretical output
for various digital input combinations.
146
Table
Binary
output
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Equivalent
dec no.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
LED4
R14 (W)
Shorted
Shorted
Shorted
Shorted
Shorted
Shorted
Shorted
Shorted
1500
1500
1500
1500
1500
1500
1500
1500
LED3
R13 (W)
Shorted
Shorted
Shorted
Shorted
820
820
820
820
Shorted
Shorted
Shorted
Shorted
820
820
820
820
The measured output is nearly equal to

the theoretically calculated output across
regulator IC3 (LM317). The output voltage
is governed by the following relationship
as long as the input-to-output differential
is greater than or equal to 2.5V:
Vout = 1.25(1+R2'/R1')
Where, R1' = R15 = 270 ohms (fixed)
LED2
R12 (W)
Shorted
Shorted
470
470
Shorted
Shorted
470
470
Shorted
Shorted
470
470
Shorted
Shorted
470
470
LED1
R11 (W)
Shorted
220
Shorted
220
Shorted
220
Shorted
220
Shorted
220
Shorted
220
Shorted
220
Shorted
220
R2' (W)
0
220
470
690
820
1040
1290
1510
1500
1720
1970
2190
2390
2540
2790
3010
Vout (V)
1.25
2.27
3.43
4.44
5.05
6.06
7.22
8.24
8.19
9.21
10.37
11.39
11.99
13.01
14.17
15.19
and R2' = R11 + R12 + R13 + R14

= 220 + 470 + 820 +1500 ohms
= 3,010 ohms (with all relays energised)
One can use either the binary
weighted LED display as indicated by
LED1 through LED4 in the circuit or a
74LS154 IC in conjunction with LED5
through LED20 to indicate one of the 16

selected voltage steps of Table I. The input
for IC4 is to be tapped from points marked
A through D in the figure. This arrangement can be used to replace the LED arrangement at points A, B, C, and D. This
74LS154 IC is a decoder/demultiplexer
that senses the output of IC2 and accordingly activates only one of its 16 outputs
in accordance with the count value. LEDs
at the output of this IC can be arranged in
a circular way along side the corresponding voltages.
Working
When the power is switched on, IC2 resets
itself, and hence the output at pins 6, 11,
14, and 12 is equivalent to binary zero, i.e.
0000. The corresponding DC output of the
circuit is minimum (1.25V). As count-up
switch S1 is pressed, the binary count of
IC2 increases and the output starts increasing too. At the highest count output
of 1111, the output voltage is 15.19V (assuming the in-circuit resistance of preset
VR2 as zero). Preset VR2 can be used for
trimming the output voltage as desired.

To decrease the output voltage within
the range of 1.25V to 15.2V, count-down
switch S2 is to be depressed.
Notes. 1. When relay contacts across
a particular resistor are opened, the corresponding LED glows.
2. The output voltages are shown assuming the in-circuit resistance of preset
VR2 as zero. Thus when the in-circuit
resistance of preset VR2 is not zero, the
output voltage will be higher than that
indicated here.
Microphone for Computer

Vyjesh M.V.
uying a microphone for a computer is costly. Especially when

there is a need to have two microphonesone for modem and another
for sound cardor if the present microphone is not working properly and needs
to be replaced, you are likely to feel the
burden of extra cost. Here is a low-cost
microphone circuit that comes within
your budget.
All sound cards and modems have a
socket for microphone that is in compatible
with stereo jack pins. The stereo socket
takes condenser microphone as input and
provides the necessary positive voltage

for a condenser microphone. Before building the full circuit, connect three wires to
the jackpin, switch on the computer, and
insert the jack pins; into the socket of the
sound card. With the help of a

multimeter, find out the positive terminal out of the three
wires.
There exists a potential difference of 4V or so between the
positive and ground terminals.
The third terminal will obviously be for the signal input.
The positive terminal is used for biasing
the condenser microphone. After identifying all the terminals, connect them
as shown in the accompanying circuit
diagram.
Versatile Zener Diode Tester

k. udhaya kumaran
ener diodes available in the market are specified according to their

breakdown voltage as well as tolerance. The tolerance may vary from 5 per
cent to 20 per cent. The circuit of a versatile zener diode tester presented here enables you to verify the specified breakdown
voltage and tolerance values. In addition,
you can check the dynamic impedance of
a zener diode.
The dynamic impedance characteristics of a zener diode determine as to how
well the zener diode regulates its own
breakdown voltage. Thus this circuit can
be used to compare the dynamic impedance characteristics of zener diodes from
a lot and segregate/categorise them accordingly.
For full-fledged zener diode testing

you will have to refer to the manufacturers datasheet to check zener diode
parameters such as zener voltage, power,
and current (maximum/nominal) ratings. In addition, temperature coefficient
and dynamic impedance have also to be
checked if zener diode is to be used for
critical functions such as voltage reference
147
Table I
Minimum and Maximum Test Current
Values
Zener diode values
IT(min)
IT(max)
3.3V to 4.3V
10mA
15mA
4.7V to 18V
5mA
10mA
20V to 39V
2mA
4mA
Note: Zener diode power ratings are 250 mW,
400 mW, and 500 mW.
Table II
Minimum and Maximum Test Current
Values
Zener diode values
IT(min)
IT(max)
3.3V to 12V
10mA
15mA
13V to 27V
5mA
10mA
30V to 43V
2mA
5mA
47V to 75V
1.5mA
3mA
82V to 120V
1mA
2mA
Note: Zener diode power rating is 1 watt.
for digital voltmeters, control systems, and

precision power-supply circuits. However,
for a common hobbyist it is not necessary
to check zener diodes critically, and only
checking its dynamic impedance characteristic is sufficient.
Dynamic impedance implies the degree of change in a zener diodes voltage
with the change in current. Expressed
in ohms, it equals the small change in
zener voltage divided by the corresponding change in zener current (centered
around the test current figure prescribed
in datasheets by manufacturers). From
datasheets it is observed that test current
value is high for low-voltage zener diodes
and low for higher-voltage zener diodes.
However, the dynamic impedance value
will be low for low-voltage zener diodes
and vice versa for higher-voltage zener
diodes.
To test 3.3V to 120V zener diodes by
the practical dynamic impedance method,
you need to have a variable voltage (0 to
above 120V) and current (1 mA to 150
mA) supply source. Designing this type of
148
power supply is quite complicated and is

prone to damage if excess current is drawn
accidentally.
The zener diode tester circuit presented here has been designed considering
the above factors. It is capable of testing
zener diodes of breakdown voltage ratings
of upto 120V and wattage ratings of 250
mW, 400 mW, 500 mW, and 1W.
The circuit can be deployed in quicktest mode as also in quality-test mode of
operation. In quick-test mode, you can
perform a rough check of zener diodes
breakdown voltage up to 47 volts. In
quality-test mode, you can check dynamic
impedance characteristic for zener diodes
from 3.3V to 120V.
Commonly available step-down transformers X1 and X2 (230V AC primary to
9V AC, 750 mA sec. each) are connected
back-to-back as shown in the figure. A
bridge rectifier followed by filter capacitor
C1 converts the output from X2 transformer to DC. Neon lamp L1 indicates
the presence of higher DC voltage (220V
approximately) across capacitor C1, which
is used to test various zener diode values
from 3.3V to 120V.
An advantage of using this highvoltage circuit is that the current gets
restricted to a low value. It delivers only
3 mA (approx.) when testing zener diodes
with higher breakdown values (e.g. 120V
zener diode), but while testing zener
diodes of low breakdown values, such as
3.3V, it delivers a current slightly above
20 mA. Such power-supply characteristics
suit our requirement, as stated earlier.
Since a small current is used for testing of
zener diodes, there is no danger of zener
diodes getting damaged during testing using the dynamic impedance method.
Before using the circuit, check DC voltage across test terminals A and B without
connecting any zener diode and then flip
toggle switch S2 to quick-test position. DC
voltage available across terminals A and
B will be around 200V

DC. Now put toggle switch
to quality-test position.
DC voltage can now be
adjusted from 6V DC to
200V DC (approx.) with
the help of potentiometer
VR1. After these preliminary checks, the circuit is
ready for operation.
To test zener diode by
quick-test method, connect zener diode across
terminals A and B and flip
switch S1 to on position.
Note down DC voltage in digital multimeter M2, which is the rough breakdown
voltage. In quick-test method you can test
zener diode values up to 47 volts safely.
For higher-value zener diodes you will
have to increase the value of resistor R3
suitably. If zener diode presents a short,
digital multimeter M2 will read 0 volts.
To perform quality test on the same
zener diode, turn switch S1 off and remove zener diode from across terminals
A and B. Now turn switch S1 on and
adjust potentiometer VR1 to obtain DC
voltage (on digital multimeter) across
terminals A and B equal to the one
found during quick test method. Now
keep potentiometer VR2 in mid position
and connect zener diode across terminals
A and B.
(Note. Before testing zener diode, refer Table I and Table II for the minimum
test current (ITmin) and maximum test
current (ITmax) required for various zener
diode values, depending upon their wattage rating.)
Test current is adjusted using potentiometer VR2 and measured using meter
M1 (A 0-25mA analogue milliampere
meter or a 0-20mA digital multimeter can
be used.)
Now adjust potentiometer VR2 and
note down changes in zener voltage during ITmin and ITmax conditions. If the required current is not available, increase
DC voltage by adjusting potentiometer
VR1 suitably. While changing test current from ITmin to ITmax, the voltage
variation across zener diode should be
less than 1 volt for lower-value zener
diodes and a few volts for higher-value
zener diodes. A voltage variation of more
than this value indicates that zener
diode is not properly regulating. When
comparing zener diodes of same values,
the zeners showing less voltage deviation
would regulate better.
DTMF Proximity Detector

k.s. sankar
DTMF-based IR transmitter and

receiver pair can be used to realise a proximity detector. The
circuit presented here enables you to
detect any object capable of reflecting
the IR beam and moving in front of the IR
LED photodetector pair up to a distance of
about 12 cm from it.
The circuit uses the commonly available telephony ICs such as dial-tone generator 91214B/91215B (IC1) and DTMF
decoder CM8870 (IC2) in conjunction
with infrared LED (IR LED1), photodiode
D1, and other components as shown in
the figure. A properly regulated 5V DC
power supply is required for operation of
the circuit.
The transmitter part is configured
around dialer IC1. Its row 1 (pin 15) and
column 1 (pin 12) get connected together
via transistor T2 after a power-on delay
(determined by capacitor C1 and resistors R1 and R16 in the base circuit of

the transistor) to generate DTMF tone
(combination of 697 Hz and 1209 Hz)
corresponding to keypad digit 1 continuously.
LED 2 is used to indicate the tone
output from IC3. This tone output is
amplified by Darlington transistor pair of
T3 and T4 to drive IR LED1 via variable
resistor VR1 in series with fixed 10-ohm
resistor R14. Thus IR LED1 produces
tone-modulated IR light. Variable resistor VR1 controls the emission level
to vary the transmission range. LED 3
indicates that transmission is taking
place.
A part of modulated IR light signal
transmitted by IR LED1, after reflection
from an object, falls on photodetector
diode D1. (The photodetector is to be
shielded from direct IR light transmission path of IR LED1 by using any

opaque partition so that it receives only
the reflected IR light.) On detection of
the signal by photodetector, it is coupled
to DTMF decoder IC2 through emitterfollower transistor T1.
When the valid tone pair is detected
by the decoder, its StD pin 15 (shorted to
TOE pin 10) goes high. The detection of
the object in proximity of IR transmitterreceiver combination is indicated by
LED1. The active-high logic output pulse
(terminated at connector CON1, in the
figure) can be used to switch on/off any
device (such as a siren via a latch and
relay driver) or it can be used to clock a
counter, etc.
This DTMF proximity detector finds
applications in burglar alarms, object
counter and tachometers, etc.
Stepper Motor Control

Jaydip appasaheb dhole
simple, low-cost hardwired step

per motor control circuit that can
be used in low-power applications,
such as moving toys etc is presented here.

The circuit comprises a 555 timer IC
configured as an astable multivibrator
with approx. 1Hz frequency. The frequency is determined from the following
relationship:
149
Frequency = 1/T = 1.45/(RA + 2RB)C

Where RA = RB = R2 = R3 = 4.7 kilo-ohm
and C = C2 = 100 F.
The output of timer is used as clock
for two 7474 dual D flip-flops (IC2 and
IC3) configured as a ring counter. When
power is initially switched on, only the
first flip-flop is set (i.e. Q output at pin

5 of IC2 will be at logic 1) and the other
three flip-flops are reset (i.e. their Q outputs will be at logic 0). On receipt of a
clock pulse, the logic 1 output of the first
flip-flop gets shifted to the second flipflop (pin 9 of IC2). Thus with every clock
pulse, the logic 1 output keeps shifting

in a ring fashion.
Q outputs of all the four flip-flops are
amplified by Darlington transistor arrays
inside ULN2003 (IC4) and connected to
the stepper motor windings marked A
through D in the figure. The common
point of the winding is connected to +12V
DC supply, which is also connected to pin
9 of ULN2003. The colour code used for
the windings is shown in the figure.
When the power is switched on, the
control signal connected to SET pin of the
first flip-flop and CLR pins of the other
three flip-flops goes active low (because
of the power-on-reset circuit formed by
R1-C1 combination) to set the first flip-flop
and reset the remaining three flip-flops.
On reset, Q1 of IC2 goes high while all
other Q outputs go low. External reset
can be activated by pressing the reset
switch. By pressing the reset switch, you
can stop the stepper motor. On releasing the reset switch, the stepper motor
again starts moving further in the same
direction.
Low-Cost Intercom
Pradeep G.
150
he intercom circuit described here

uses two transistors, an audio
transformer, and a few passive
components in addition to condenser

microphone and low-wattage speaker
(refer Fig. 1). The complete unit
can be made on a
general-purpose
veroboard.
The microphone signals are
amplified by a
two-stage transistor
amplifier, while the
speaker is driven
through an audio
output transformer
(similar to the one
used in transistor radios). When
ring button (pushto-on switch S1) is
pressed, capacitor
C3 gets connected between the base of

transistor T2 and the top end of primary
winding of audio output transformer. As a
result, the amplifier circuit wired around
transistor T2 gets converted into a Hartley
oscillator and produces an audible tone
for call-bell.
To build a two-way intercom set, make
two identical units with the speaker of
each circuit installed near the other unit
as shown in Fig. 2.
High-power
Car Bat tery Eliminator
T.K. Hareendran
o operate car audio (or video) system from household 230V AC

mains supply, you need a DC adaptor. DC adaptors available in the market
are generally costly and supply an unregulated DC. To overcome these problems,
an economical and reliable circuit of a
high-power, regulated DC adaptor using
reasonably low number of components is
presented here.
Transformer X1 steps down 230V AC
mains supply to around 30V AC, which
is then rectified by a bridge rectifier
comprising 1N5406 rectifier diodes D1
through D4. The rectified pulsating DC is
smoothed by two 4700F filter capacitors
C1 and C2.
The next part of the circuit is a seriestransistor regulator circuit realised using
high-power transistor 2N3773 (T1). Fixedbase reference for the transistor is taken
from the output pin of 3-pin regulator IC1
(LM 7806). The normal output of IC1 is
raised to about 13.8 volts by suitably biasing its common terminal by components
ZD1 and LED1. This simple arrangement
provides good, stable voltage reference at
a low cost. LED1 also works as an output
indicator.
Finally, a crowbar-type protection
Readers comments:
The way of biasing of transistor
T1 seems to be wrong. As per the datasheet, the transitor T1 should be of
pnp type and connected as shown in
Fig. 1 here.
Chittaranjan Parida
Cuttack
The author, T.K. Hareendran, replies:
As clearly mentioned in the text, transistor T1
works as a series regulator transistor. In conventional circuits, one ordinary zener diode is used
to provide a fixed-base bias to T1. The circuit
published is an improved version
and the fixed three-terminal voltage
x1
GND
circuit is added. If the output voltage

exceeds 15V due to some reason such as
component failure, the SCR fires because
of the breakdown of zener ZD2. Once SCR
fires, it presents a short-circuit across the
Fig. 1: Readers modification to battery

eliminator circuit
regulator IC1 is used to increase the efficiency

and lifetime. The schematic of a conventional
series regulator is shown in Fig. 2.
The circuit indicated by you,
based on NSC datasheet, is in fact
a current booster. Here T1 plays the
unregulated DC supply, resulting in the

blowing of fuse F1
instantly. This offers
guaranteed protection to the equipment
connected and to the
circuit itself.
This circuit can
be assembled using
a small general-purpose PCB. A goodquality heat-sink is required for transistor T1. Enclose the complete circuit in a
readymade big adaptor cabinet as shown
in the figure.
Fig. 2: Schematic of a conventional series

regulator
role of a bypass transistor. At low

load currents, all the load current is
provided by IC1 and whenever the
load current is increased beyond a
preset value (decided by R) transistor T1 comes into picture and supplies all the excess current.
151
Automatic Plant Irrigator

priyank Mudgal
he circuit presented here waters

your plants regularly when you
are out for a vacation.
The circuit comprises a sensor part
built using only one op-amp (N1) of quad
op-amp IC LM324. Op-amp N1 is configured here as a comparator. Two stiff
copper wires are inserted in the soil containing plants. As long as the soil is wet,
conductivity is maintained and the circuit
remains off.
When the soil dries out, the resistance
between the copper wires (sensor probes
A and B) increases. If the resistance increases beyond a preset limit, output pin
1 of op-amp N1 goes low. This triggers

timer IC2 (NE 555) configured as a monostable multivibrator. As a result, relay RL1
is activated for a preset time. The water
pump starts immediately to supply water
to the plants.
As soon as the soil becomes sufficiently wet, the resistance between
sensor probes decreases rapidly. This
causes pin 1 of op-amp N1 to go high.
LED1 glows to indicate the presence of
adequate water in the soil. The threshold
point at which the output of op-amp N1
goes low can be changed with the help
of preset VR1.
To arrange the circuit, insert copper

wires in the soil to a depth of about 2 cm,
keeping them 3 cm apart. When the soil
gets dried, adjust VR1 towards ground
rail until LED1 turns off and relay RL1
is energised. The motor starts pumping
the water. LED1 glows up as the water
reaches the probes.
For small areas a small pump such as
the one used in air coolers is able to pump
enough water within 5 to 6 seconds. The
timing components for IC2 are selected
accordingly. The timing can be varied with
the help of preset VR2.
The circuit is more effective indoors
if one intends to use
it for long periods.
This is because the
water from reservoir
(bucket, etc) evaporates rapidly if it
is kept in the open.
For regulating the
flow of water, either
a tap can be used or
one end of a rubber
pipe can be blocked
using M-seal compound, with holes
punctured along its
length to water several plants.
Simple telephone ring tone

generator
K. Udhaya Kumaran, VU3GTH
ere is a simple telephone ring

tone generator circuit designed
using only a few components.
It produces simulated telephone ring
152
tone and needs only DC voltage (4.5V

DC to 12V DC). One may use this circuit in ordinary intercom or phonetype intercom. The sound is quite
loud when this circuit is operated on

+12V DC power supply. However, the
volume of ring sound is adjustable.
The commonly available 14-stage
binary ripple counter with built-in oscillator (CMOS IC CD4060B) is used to

generate three types of pulses, which
are available from pin 1(O11), pin 3 (O13),
and pin 14 (O7), respectively. Preset VR1
is adjusted to obtain 0.3125Hz pulses
(1.6-second low followed by 1.6-second
high) at pin 3 of IC1. At the same time,
pulses available from pin 1 will be of
1.25 Hz (0.4-second low, 0.4-second
high) and 20 Hz at pin 14. The three
output pins of IC1 are connected to base
terminals of transistors T1, T2, and T3
through resistors R1, R2, and R3, re-
spectively.
Transistors T1 through T3 are cascaded in such a way that the positive
voltage available at the emitter of transistor T1 is extended to the collector of
Transistor T3 when the outputs of all
the three stages are low. As a result,
transistors T1 through T3 are forward
biased for 0.4, 1.6, and 0.025 seconds,
respectively and reverse biased for similar durations.
Using a built-in oscillator-type piezobuzzer produces around 1kHz tone. In
this circuit, the piezo-buzzer is turned
on and off at 20Hz for ring tone sound

by transistor T3. 20Hz pulses are available at the collector of transistor T3 for
0.4-second duration. After a time interval
of 0.4 second, 20Hz pulses become again
available for another 0.4-second duration. This is followed by two seconds of
nosound interval. Thereafter the pulse
pattern repeats itself.
Refer the figure that indicates
waveforms available at various points
including the collector of transistor T3.
Preset VR2 can be used for adjusting the
amplitude of the ring tone.
Dual-input high-fidelity
audio mixer
Prasad J.
Th
e circuit described here is based

on the superior characteristics of
dual-gate MOSFET (metaloxide semiconductor field-effect transistor).
It exhibits a very high input impedance
that lends for good sensitivity and very
less loading of the input signal source.
Low cross-modulation characteristic leads
to minimal distortion of the output with
respect to the input signals. Also, the
MOSFET offers low feedback capacitance
and high transconductance. All these advantages make the MOSFET the most effective for high-quality mixer and converter
applications.
This dual-input audio frequency
mixer circuit employs a single dual-gate
MOSFET 3N200. One may, however,

substitute it with any other dual-gate
MOSFET such as 3N187 and BF966. (It

is to be noted that BF966 is not gate-protected and hence
calls for suitable
precaution in handling it.)
The audio frequency (AF) input
from the first channel (CH1) is applied on gate 1 (G1)
of the MOSFET
through 500-kiloohm potentiometer
VR1. The AF input
from the second
channel (CH2) is
153
applied on gate 2 (G2) of the MOSFET

through another 500-kilo-ohm potentiometer VR2. Potentiometers VR1 and
VR2 serve as gain controls for the mixer
inputs.
Gate 1 receives the negative bias
resulting from the voltage developed
by the current passing through resistor R1 that is in series with the source.
Gate 2 receives the positive bias
produced across resistor R3 by the
voltage divider formed by resistors R3
and R4.
The mixed common output signal
developed across drain load resistor R2
is coupled to the output through capacitor C5. This output can be, in turn, fed
to any audio amplifier system for further
amplification.
The input impedance at each signal
input is approximately 500 kilo-ohm,
which is determined largely by the resistance of potentiometers VR1 and VR2.
Higher input impedance may be obtained
by substituting higher-resistance potentiometers, but this will lead to the pickup
of stray signals.
The current drain of this circuit at 6V
DC is less than 3 mA. The open-circuit
voltage gain is 10 for each channel. The
maximum amplitude of input signals at
gates G1 and G2 is 0.1V RMS. Signals
of higher amplitudes are reduced by the
adjustment of potentiometers VR1 and
VR2, hence evading the output signal
peak-clipping. The corresponding output
signal amplitude is 1V RMS.

The entire circuit can be built on
a general-purpose PCB or veroboard.
The complete assembly is shielded using
a metal container. The two input jacks
should be fixed on the opposite sides of
the container against the output jack.
This simple circuit can be utilised for
various combinations of devices at the
input end. A few examples are two microphones, two audio players, or one audio
player and one microphone, etc.
Note. Adequate precautions should
be taken to prevent the destruction of
MOSFET due to static electricity. The use
of a grounded tip for the soldering iron is
recommended.
Unipolar/bipolar
triangular and bipolar
square wave generator
Yogesh Kataria
he circuit given here is capable of

generating unipolar and bipolar
triangular waves as well as bipolar square waves. In unipolar mode,
the output frequency is double that of
bipolar mode (using identical component
values).
When switch S1 is closed, the circuit
generates bipolar triangular as well as
bipolar square waves, and when switch
154
S1 is open, it generates unipolar triangular and bipolar square wavesboth

having double the frequency in the
first case.
Op-amp 301 acting as a comparator produces bipolar square wave with
output swinging between +Vcc and VEE.
The square wave output is fed to op-amp
741 that is configured as an integrator to
produce a triangular waveform.
Figs 2 and
3 show the
waveforms
with switch S1
in closed and
open positions,
respectively,
using 0.047F
capacitor C and
in-circuit value
of preset VR1 as
28 kilo-ohm. The
circuit is capable
of working on
a few hertz to
around 250kHz.
Anti-theft security for car audios

T.K. Hareendran
his small circuit, based on popular CMOS NAND chip CD4093,

can be effectively used for protecting your expensive car audio system
against theft.
When 12V DC from the car battery
is applied to the gadget (as indicated by
LED1) through switch S1, the circuit
goes into standby mode. LED inside
optocoupler IC1 is lit as its cathode
terminal is grounded via the car audio
(amplifier) body. As a result, the output
at pin 3 of gate N1 goes low and disables
the rest of the circuit.
Whenever an attempt is made to remove the car audio from its mounting by
cutting its connecting wires, the optocoupler immediately turns off, as its LED
cathode terminal is hanging. As a result,
the oscillator circuit built around gates

N2 and N3 is enabled and it controls the
on/off timings of the relay via transistor T2. (Relay contacts can be used to
energise an emergency beeper, indicator,
car horns, etc, as desired.)
Different values of capacitor C2 give
different on/off timings for relay RL1 to
be on/off. With 100F we get approximately 5 seconds as on and 5 seconds as
off time.
Gate N4, with its associated components, forms a self-testing circuit.
Normally, both of its inputs are in high
state. However, when one switches off the
ignition key, the supply to the car audio is
also disconnected. Thus the output of gate
N4 jumps to a high state and it provides a
differentiated short pulse to forward bias
transistor T1 for a short duration. (The

combination of capacitor C1 and resistor
R5 acts as the differentiating circuit.)
As a result, buzzer in the collector
terminal of T1 beeps for a short duration
to announce that the security circuit is
intact. This on period of buzzer can be
varied by changing the values of capacitor
C1 and/or resistor R5.
After construction, fix the LED and
buzzer in dashboard as per your requirement and hide switch S1 in a suitable location. Then connect lead A to the body of
car stereo (not to the body of vehicle) and
lead B to its positive lead terminal. Take
power supply for the circuit from the car
battery directly.
Caution. This design is meant for car
audios with negative ground only.
Readers comments:
The oscillator circuit built around
gates N1, N2, and N3 is not working. The
circuit works like a timer when pin 2 of
MCT2E is connected to the body of the
audio. There is no change in the performance when pin 2 is left hanging. But when
pins 2 and 4 of MCT2E are shorted, the
circuit starts working.
Also clarify the use of R3 in

the circuit and show pin connections of MCT2E.
D. Mohan Kumar, Trivandrum
The author, T.K. Hareendran,
replies:
Carefully recheck your assembled
circuit. No modification/corrections Fig. 1: MCT2E pin
are required in the published de- configuration
sign. The fault indicated

may be due to a faulty optocoupler (MCT2E).
Resistor R3 (100 kiloohm) is used to pull down
the input of gate N1 (wired
as inverter) in active state.
The pin configuration of
MCT2E is shown in Fig. 1.
155
PC-based dial clock-cumelectronic roulette

Vijaya Kumar P.
his hardware-cum-software project

is meant to control hardware
through software. The hardware
using LEDs to simulate both dial clock and
electronic roulette is rather simple.
Of the two 4-line-to-16-line decoders
used in the circuit, the first (IC1) drives
hour LEDs and the other (IC2) drives
minute LEDs. These decoders are interfaced directly to the PCs printer port
provided on its backside.
Data output lines D0 to D3 (pins 2
through 5 of 25-pin D connector) of the
printer port are connected to four address
inputs of the decoder used for minute
156
display, while data output lines D4 to D7

(pins 6 through 9) are connected to four
data inputs of the decoder used for hour
display.
Since the outputs of these decoders are
active-low, the positive terminals of LEDs
are made common. This obviates the need
to use additional inverters. In accordance
with 4-bit binary address at inputs A
through D of decoders, only one of the 16
outputs at a time goes active-low to light
the corresponding LED.
Since a dial clock requires only 12
LEDs, only 12 of 16 outputs of 74154
decoders are used in this circuit. Only the
minute decoder (IC2) is used for electronic

roulette.
The dial clock and electronic roulette
functions, which can be selected via the
software program, are explained below:
Dial clock. When dial clock is selected,
system time is displayed on the LED panel.
The hour-indicating LED glows continuously, while minute-indicating LED blinks
for each odd second (i.e. 1, 3, 5, ...., and so
on). The clock incorporates hourly chime
and alarm setting features. Chime and
alarm sound can be distinguished from the
duration for which it will sound.
Electronic roulette. Roulette is a
game of chance that basically comprises
a circular wheel divided into a number
of sectors that are numbered serially and
a pointer. There exists a relative motion
between the pointer and the wheel. The
rotation is initiated by mechanical means.
The wheel is allowed to stop itself and the
number indicated by the pointer decides
the winner.
This game can also be arranged electronically by using sequential running
lights, which will simulate the rotating
wheel, and making them to stop at random position. The chance of a number to
be winner is 1 out of 12 in the PC-based
electronic roulette explained here. The
software for dial clock and electronic roulette is written in C language.
For simulation of dial clock, the software uses gettime () function to read time
from the computer, which is then stored
in a variable. This time is written into
the parallel-port as 8-bit binary number

by using outportb () function. To make
minute-indicating LED to blink, minute
variable is multiplied by (second % 2). The
multiplication result comes out to be 1 for
odd seconds and 0 for even seconds.
i=sc%2;
mn=mn*i;
The binary equivalent of minute variable is written into data pins D0 to D4 of
the parallel-port. Hour variable is multi-
plied by 16 to write the binary equivalent

of hour into data pins D5 to D7.
Outportb (0x0378,ho*16+mn);
Simulation of roulette wheel is quite
simple. The software uses a decimal
number (1 through 13) generator whose
binary equivalents are written into data
pins D0 to D4 of the parallel port using
outputb () function. The roulette can be
reset by initialising decimal number generator that simulates running lights.
#include <stdio.h>
#include <dos.h>
#include <stdlib.h>
#define PORT 0x0378
main()
{ int k=0;
clrscr();
gotoxy(30,10);
printf(1.(D)ial Clock\n);
gotoxy(30,12);
print(2.(R)un Electronic Roulette \n);
gotoxy(30,14);
printf(3.(E)xit\n);
do
{
k=getch();
k=touchper(k);
if(k==D)
{
Aclock(0,0,0);
}
if(k==R)
{
Roulet();
}
}
while(k!=E);
clrscr();
print(By Vijaya kumar.P,3rd Sem,E&C, K.V.G.C.E,Sullia\n);
printf(Dedicated to Father of Electricity Michael Faraday who
is my favourite Scientist.\n);
exit(0);
}
Aclock(int shor,int smin,int ssec)
{
int ho,sc,mn,mnt,k,i=0;
struct time tim;
clrscr();
do
{
gettime(&tim);
gotoxy(30,8);
ho=tim.ti_hour;
mn=tim.ti_min;
sc=tim.ti_sec;
mnt=mn;
if(ho>12)
{
ho=ho-12;
}
if(ho==0)
{
ho=12;
}
i=sc % 2;
mn=mn*i; /*Making minute LED to blink*/
mn=mn/5;
outportb(PORT,ho*16+mn);
printf(hour:min:sec = %2d:%02d:02d\n,ho,mnt,sc);
gotoxy(30,10);
printf(1.(G)oto MAIN MENU\n);
gotoxy(30,12);
printf(2.(S)et Alaram\n);
if(shor==ho&&smin==mnt&&ssec==sc)
{
alarm(15);
}
if(mnt==0&&sc==0)
{
alarm(1);
}
if(bioskey(1))/* To check Whether any keyis pressed */
k=getch();
k=toupper(k);
if(k==S)
{
setala();
}
}
while(k!=G);
{
outportb(PORT,0);
main();
}
}
setala() /*Function to set Alarm*/
{
int hrs,mns,scs;
clrscr();
printf(Enter hour\n);
scanf(%d ,&hrs);
printf(Enter Minute\n);
The decimal number generator can be

stopped at random for play. The speed of
running can be adjusted by using delay ()
function. The delay time has to be selected
appropriately, as it should not be either
too low or too high. Keeping the delay time
very low is undesirable, since it will cause
continuous glowing of LEDs. Similarly, a
very high delay time is also undesirable,
since the player can stop the wheel at his
winning position.
DialCLK.C
scanf(%d ,&mns);
printf(Enter seconds\n);
scanf(%d ,&scs);
Aclock(hrs,mns,scs);
}
alarm(int beps) /*Function to produce beeping sound*/
{
int i;
for(i=0;i<beps;i++)
{
sound(1500);
delay(100);
nosound();
delay(100);
}
}
Roulet()/*Function for Roulette Wheel*/
{
int i,k=0;
clrscr();
gotoxy(30,10);
printf(1.Press any key to Reset\n);
gotoxy(30,12);
printf(2.(P)lay\n);
gotoxy(30,14);
printf(3.(G)oto MAIN MENU\n);
k=getch();
k=toupper(k);
do
{
for(i=1;i<13;i++)/* To generate decimal number from 1 to 12*/
{
if(bioskey(1))
k=getch();
k=toupper(k);
if(k==P)
break;
outportb(PORT,i);/*outputting binary equivalents of i
through Data pins of LPT port*/
delay(50);
}
}
while(k!=G);
outportb(PORT,0);
main();
}
Long-Range
Cordless Burglar Alarm
t.k. hareendran
his long-range cordless burglar

alarm circuit makes use of a
cordless telephone (CLT) unit with
paging facility and a few low-cost discrete
components. The circuit is so simple that
even a novice can easily construct it without any difficulty.
When the page button on a CLT is
pressed and held in that position, the

handset starts beeping to indicate that
somebody is calling. This function is used
here to build the gadget. The system consists of three sub-assemblies:
1. Wireless beeper. The handset of
the CLT.
2. Infrared transmitter. A number
Fig. 1
157
Fig. 2
of IR transmitter circuits based on the

well-known 555 chip have been published
earlier in EFY. Just select one circuit with
a modulating frequency of 36 to 38 kHz
and assemble it on a veroboard. After that,
enclose it in a proper cabinet. (EFY note. A
typical IR transmitter circuit used during
testing is shown in Fig. 1.)
3. Infrared receiver-cum-control
unit. The circuit diagram of this unit is
shown in Fig. 2. Front end of this block is
TSOP1736 infrared receiver module. This
module can demodulate 36kHz modulated
IR beam to produce an active-similar
low output. You may also use any other
module, provided it has an active-low
output. The modulated IR beam from the
transmitter is received by the receiver
module and its output at pin 2 goes low.
The rest of the circuit is in sleep mode
as it does not get power for its operation.
The SCR here plays the role of an electronic switch.
Fig. 3
When the infrared beam is interrupted, the output of the receiver module goes
high to apply a forward bias to the base of
transistor T1. As a result, the gate of SCR
gets sufficient forward bias to conduct (and
latch). The astable multivibrator

built around IC1 starts working to
control the on/off relay timings.
Diode D1 prevents the relay from
latching and diode D2 works as a
free-wheeling diode.
Normally open (N/O) contacts
of the relay are used to close the
page button contacts until the
circuit is reset by pressing pushto-off switch S1 (N/C type). One
may replace switch S1 with a
key-lock switch to avoid its unauthorised operation. The astable
circuit helps the handset user to
distinguish between a normal paging call and an intrusion warning
alarm.
After construction, fix the
transmitter and receiver modules
at opposite sides in the door frame
as shown in Fig. 3. Carefully open
the CLT and solder two wires to
the page button terminals with their free
ends connected to the
relay contacts (N/O).
Now your cordless
burglar alarm with
a wireless monitoring range of about
500 metres (actual
range is based on the
CLTs paging range)
is ready to detect an
intruder.
EFY note. The author has successfully
tested his prototype
with the following
CLT makes:
1. Panasonic KX-T
3611 BH (made in Japan)
2. Panaphone WT-3990 (made in
China)
3. Citizen JRT-5400 (made in India)
Water-Level Controller
joydeep kumar chakraborty
I
158
n most houses, water is first stored

in an underground tank (UGT) and
from there it is pumped up to the
overhead tank (OHT) located on the roof.

People generally switch on the pump when
their taps go dry and switch off the pump
when the overhead tank starts overflowing. This results in the unnecessary wastage and sometimes non-availability of
water in the case of emergency.

The simple circuit presented here
makes this system automatic, i.e. it
switches on the pump when the water
level in the overhead tank goes low and
switches it off as soon as the water level
reaches a pre-determined level. It also
prevents dry run of the pump in case the
level in the underground tank goes below
the suction level.
In the figure, the common probes connecting the underground tank and the
overhead tank to +9V supply are marked
C. The other probe in underground tank,
which is slightly above the dry run level,
is marked S. The low-level and high-level
probes in the overhead tank are marked
L and H, respectively.
When there is enough water in the
underground tank, probes C and S are
connected through water. As a result,
transistor T1 gets forward biased and
starts conducting. This, in turn, switches
transistor T2 on. Initially, when the
overhead tank is empty, transistors T3
and T5 are in cut-off state and hence pnp
transistors T4 and T6 get forward biased
via resistors R5 and R6, respectively.
As all series-connected transistors
T2, T4, and T6 are forward biased, they
conduct to energise relay RL1 (which is
also connected in series with transistors
T2, T4, and T6). Thus the supply to the
pump motor gets completed via the lower
set of relay contacts (assuming that switch
S2 is on) and the pump starts filling the
overhead tank.
Once the relay has energised, transistor T6 is bypassed via the upper set
of contacts of the relay. As soon as the
water level touches probe L in the overhead tank, transistor T5 gets forward
biased and starts conducting. This, in
turn, reverse biases transistor T6, which
then cuts off. But since transistor T6 is
bypassed through the relay contacts, the
pump continues to run. The level of water
continues to rise.
When the water level touches probe
H, transistor T3 gets forward biased and
starts conducting. This causes reverse
biasing of transistor T4 and it gets cut
off. As a result, the relay de-energises
and the pump stops. Transistors T4 and
T6 will be turned on again only when the
water level drops below the position of
L probe.
Presets VR1, VR2, and VR3 are to be
adjusted in such a way that transistors
T1, T3, and T5 are turned on when the
water level touches probe pairs C-S, C-H,
and C-L, respectively. Resistor R4

ensures that transistor T2 is off in the
absence of any base
voltage. Similarly,
resistors R5 and R6
ensure that transistors T4 and T6 are
on in the absence
of any base voltage.
Switches S1 and S2
can be used to switch
on and switch off, respectively, the pump
manually.
You can make
and install probes
on your own as per
the requirement and
facilities available.
However, we are describing here how the
probes were made for
this prototype.
The author used a piece of nonmetallic conduit pipe (generally used for
domestic wiring) slightly longer than the
depth of the overhead tank. The common
wire C goes up to the end of the pipe
through the conduit. The wire for probes
L and H goes along with the conduit from
the outside and enters the conduit through
two small holes bored into it as shown
in Fig. 2.
Care has to be taken to ensure that
probes H and L do not touch wire C directly. Insulation of wires is to be removed
from the points shown. The same arrangement can be followed for the underground
tank also. To avoid any false triggering
due to interference, a shielded wire may
be used.
159
Invisible Broken Wire Detector

k. udhaya kumaran, vu3gth
ortable loads such as video cameras, halogen flood lights, electrical irons, hand drillers, grinders, and cutters are powered by connecting long 2- or 3-core cables to the mains
plug. Due to prolonged usage, the power
cord wires are subjected to mechanical
strain and stress, which can lead to internal snapping of wires at any point. In
such a case most people go for replacing
the core/cable, as finding the exact location of a broken wire is difficult. In 3-core
cables, it appears almost impossible to
detect a broken wire and the point of

break without physically disturbing all
the three wires that are concealed in a
PVC jacket.
The circuit presented here can easily and
quickly detect a broken/faulty wire and its
breakage point in 1-core, 2-core, and 3-core
cables without physically disturbing wires.
It is built using hex inverter CMOS CD4069.
Gates N3 and N4 are used as a pulse generator that oscillates at around 1000 Hz in
audio range. The frequency is determined by
timing components comprising resistors R3
and R4, and capacitor C1. Gates N1 and N2
are used to sense the presence of 230V AC

field around the live wire and buffer weak
AC voltage picked from the test probe. The
voltage at output pin 10 of gate N2 can enable or inhibit the oscillator circuit.
When the test probe is away from any
high-voltage AC field, output pin 10 of
gate N2 remains low. As a result, diode
D3 conducts and inhibits the oscillator
circuit from oscillating. Simultaneously,
the output of gate N3 at pin 6 goes low to
cut off transistor T1. As a result, LED1 goes
off. When the test probe is moved closer to
230V AC, 50Hz mains live
wire, during every positive
half-cycle, output pin 10 of
gate N2 goes high.
Thus during every
positive half-cycle of the
mains frequency, the oscillator circuit is allowed
to oscillate at around 1
kHz, making red LED
(LED1) to blink. (Due to
the persistence of vision,
the LED appears to be
glowing continuously.)
This type of blinking
reduces consumption of
the current from button
cells used for power supply.
A 3V DC supply is sufficient for powering the whole circuit. AG13 or LR44 type
button cells, which are also used inside
laser pointers or in LED-based continuity
testers, can be used for the circuit. The
circuit consumes 3 mA during the sensing
of AC mains voltage.
For audio-visual indication, one may
use a small buzzer (usually built inside
quartz alarm time pieces) in parallel with
one small (3mm) LCD in place of LED1
and resistor R5. In such a case, the current consumption of the circuit will be
around 7 mA. Alternatively, one may use

two 1.5V R6- or AA-type batteries. Using
this gadget, one can also quickly detect
fused small filament bulbs in serial loops
powered by 230V AC mains.
The whole circuit can be accommodated in a small PVC pipe and used as
a handy broken-wire detector. Before
detecting broken faulty wires, take out
any connected load and find out the faulty
wire first by continuity method using any
multimeter or continuity tester. Then connect 230V AC mains live wire at one end of
the faulty wire, leaving the other end free.
Connect neutral terminal of the mains
AC to the remaining wires at one end.
However, if any of the remaining wires is
also found to be faulty, then both ends of
these wires are connected to neutral. For
single-wire testing, connecting neutral
only to the live wire at one end is sufficient
to detect the breakage point.
In this circuit, a 5cm (2-inch) long,
thick, single-strand wire is used as the
test probe. To detect the breakage point,
turn on switch S1 and slowly move the test
probe closer to the faulty wire, beginning
with the input point of the live wire and
proceeding towards its other end. LED1
starts glowing during the presence of AC
voltage in faulty wire. When the breakage point is reached, LED1 immediately
extinguishes due to the non-availability
of mains AC voltage. The point where
LED1 is turned off is the exact brokenwire point.
While testing a broken 3-core rounded
cable wire, bend the probes edge in the
form of J to increase its sensitivity and
move the bent edge of the test probe closer
over the cable. During testing avoid any
strong electric field close to the circuit to
avoid false detection.
Readers comments:
I congratulate the author for giving a
smart, useful, and compact circuit of Invisible Broken Wire Detector in August
issue. I have the following queries regarding this circuit:
1. How do gates N1 and N2 sense the

presence of 230V AC field around the live
wire?
2. What is meant by buffering weak
AC voltage?
3. Why only 1kHz oscillator is used
for the detection of signal at pin 10 of IC

4069?
4. While searching broken points in
faulty wires, why the remaining wires are
neutralised?
Rajeev Mehndiratta, Rohtak
160
We used the circuit as continuity tester

as follows:
Keep the finger in the positive terminal of the battery.
Touch the wire end that is to be
checked.
Keep the test probe on the other end
of the wire.
If the wire is good, the LED glows.
Otherwise, the LED does not glow.
In this regard, we require some clarification on the following:
1. In case the probe touches on AC
230V, what will happen to the circuit?
2. Shall we get a shock if we place
our hand on the positive terminal of the
battery?
P. Ramesh and S. Ponkumar
Tuticorin
In reply to Rajeev Mehndiratta, the
author, K. Udhaya Kumaran, states:
1. CMOS gate has a very high input impedance. When the test probe is placed
closer to 230V AC electrical field, some
AC voltage is induced in the test probe,
which is sufficient to make the output gate

of N1 go low and the output gate of N2 go
high. Thus during every positive cycle, pin
10 of gate N2 goes high, which activates
the oscillator circuit.
2. As diode D1 conducts during
every positive half cycle of AC, the DC
voltage available at the cathode of diode
D1 provides a very small source current,
which is not able to control the oscillator circuit directly. When gates N1 and
N2 are used as buffer (booster), the DC
voltage available at pin 10 of IC1 is capable of enabling/inhibiting the oscillator
circuit.
3. The 1kHz oscillator circuit is not
used to detect signals at pin 10 of IC1,
but it is used for providing audio-visual
indication during sensing of 230V AC field.
During rest of the period, the oscillator
remains inhibited.
4. While connecting 230V AC phase
point to the faulty wire, there is a possibility of voltage induction into the wires
that are in close proximity to the faulty
wire. This may lead to false detection of

broken wire point or no detection. By connecting remaining wires to neutral, there
is no likelihood of false detection.
Reply to P. Ramesh and S. Ponkumar:
In the prototype circuit, single strand
wire with sleeve was used as the probe, so
there is no chance for the probe to come in
direct contact with the mains AC voltage.
However, nothing will happen if you use
a naked wire as a probe that is in direct
contact with mains live wire. If you touch
the positive terminal of the battery, you
wont get any lethal electrical shock because resistance between the test probe
and ground (resistor R1 + your body resistance) is more than 1 mega-ohm.
As described by you using my circuit
as continuity tester, some time testing
continuity of long wire may not be reliable
because my circuit show wrong continuity
indication even if in between any part of
wire are partially contacted or long wire
may act as probe and sense any neighbouring electrical field.
PC-BASED MULTI-MODE
LIGHT CHASER
vijaya kumar p.
or those who want to use their PC

for various electronic functions,
here is a circuit that converts a PC
to a multi-mode light chaser. The advantage of this light chaser over other light
chasers is that users can define their own
patterns (designs) of running lights by
altering the source program that requires
a simple hardware. The program given
here produces 24 different patterns of
running light.
The circuit shown in Fig. 1 is mainly
used to physically isolate the PC hardware
from the mains supply and to make it
capable of driving 230V loads. The PCs
parallel port (LPT1) provided on its back
is used to interface with the circuit. LPT
port is terminated in a 25-pin D type
female connector. Its pin configuration is
shown in Table I.
Triacs are used to drive 230V bulbs.
Table I
Pin Configuration
Pin
Description
1
*Strobe
2
Data bit 0
3
Data bit 1
4
Data bit 2
5
Data bit 3
6
Data bit 4
7
Data bit 5
8
Data bit 6
9
Data bit 7
10
Acknowledge
11
*Busy
12
Paper end
13
Select
14
*Auto feed
15
Error
16
Initialise
17
*Select input
18-25
Ground
Note: *indicates that pins are internally
(hardware) inverted.
Triac BT136 used here can take up a load

of up to 800 watts. If you want to drive
higher loads, BT136 (4A) can be replaced
with triacs of higher current ratings, like
BT139 (16A). Since we are using triacs to
drive 230V bulbs, the mains supply would
also appear on the PC. Optocouplers have
been used to isolate the PC from 230V
mains supply.
The circuit can be assembled on a
general-purpose dotted PCB and can be
linked to the PCs LPT port (female) usDecimal number

1

2

4

8

16

32

64

128
Binary equivalents
00000001
00000010
00000100
00001000
00010000
00100000
01000000
10000000
161
input decimal number

from the keyboard. The
outportb() function directly outputs the binary
equivalent of the decimal
number to LPT1 (Port ID
is 0x0378). For example,
if the number entered is
15, its binary equivalent
00001111 is written into
data pins D0 to D7 of
the parallel port.
To understand the
logic of multi-mode light
chaser, first consider
the following simple sequential running light
program:
miniature lamps, 50 miniature lamps

must be connected in series and the net
combination of 50 bulbs in series should
be connected to each channel (channel 1
through channel 8).
Since LEDs require very small current, parallel ports can directly drive
LEDs. Software can be tested using simple
hardware as shown in Fig. 2.
C language provides a built-in outportb() function to output binary data to a
hardware port. To understand this, let us
consider the following program:
ing a 25-pin male D type connector along

with a 25-core cable. Instead of connecting 230V bulbs you can connect small
6.2V miniature lamps, which are easily
available in electrical shops. Connections
are shown in Fig. 3. While using 6.2V
162
#include <dos.h>
main()
{
int i;
printf(Input a decimal number);
scanf (%d,&i);
outportb() (0x0378,i);
}
The above program is used to output a

binary equivalent of the decimal number
entered. Scanf function is used to take the
#include <stdio.h>
#include <dos.h>
#include <math.h>
main()
{
int temp=0,i,ch,PORT =
0x0378;
printf(Press x to exit);
run:
for(i=0;i<8;i++)
{
tempb=pow(2,i);
outportb(PORT,temp); /*
outputs BINARY no.
to
LPT1 */
delay(2000); /*using delay
to control speed */
if(bioskey(1))/*To check
whether any key is
pressed */
ch=getch();
ch=toupper(ch);
if(ch==X)
{
exit(0);
}
}
goto run;
}
In the above program, for loop is

used to increment i in steps of 1 up to
7. As these values of i get substituted in
temp=pow(2,i), numbers temp= 20=1, 21=2,
22 =4, 23=8, 24=16, 25=32, 26=64, and 27=128
are generated. The outportb() function is
used to write binary equivalents of 1, 2, 4,
8, 16, 32, 64, and 128 to data pins D0 to
D7, with D0 as the least significant digit
and D7 as the most significant digit.
The binary equivalents of numbers
obtained by incrementing powers of 2 up
to 7 are given below:
It is clear from the table that the

resulting binary numbers will produce
the running light effect. Delay function

defines the speed of running. Go to
statement is used to take control unconditionally to for loop, so as to repeat the

running process.
By changing the formula of producing binary number patterns, one can get
different actions. The multi-mode light
chaser program is divided into a number
of cases. Each case will produce two
or more actions. These cases are made
to switch automatically using switch
statement and one for loop. Further, by
changing the delay time, one can increase
or decrease the speed of running lights.
EFY note. The complete source-code
of multi-mode chaser lights in C language has been included along with the
executable version of the program in the
accompanied CD.
Fuse Status Indicators

For Power-supplies
M.K. CHANDRA MOULEESWARAN
use status indicators are very

simple to construct using a few
components. These go very nicely
with all sorts of power-supplies and other

instruments that use power-supply sections. The logic and the formula, if any,
used with each circuit/figure are shown
in the corresponding
truth tables.
Fig. 1 shows the
use of a 3-pin bi-colour LED. When the
fuse is intact, both
red and green parts
of the LED are lit and the LED
emits a yellow light. With the fuse
in blown condition, only the bottom
part of the LED gets the supply
and therefore only the red part of
the LED is lit. The formulae for
working out the values of currentlimiting resistors
for each colour
Table I (refer Fig. 1)
LED are shown
Indicator Details
in Table I. These
Fuse status
Bias to LED1
Colour of LED1

A1-red anode
A2-green anode
relationships are
Intact
Forward
Forward
Red+green=yellow applicable to the
Blown
Forward
Nil
Red
circuits of Figs 1
Relationship to evaluate R1 and R2 in Figs 1 and 2:
and 2.
DCVin-VLED % ILED=R1 or R2 in ohms
Fig. 2 emwhere Vin and VLED are in volts, ILED in amperes
ploys
an addiIn Fig. 2, VLED=VD2+VLED for flasher LED path
tional flashing
LED in series with the red part of the

bi-colour LED. So the fuse failure is indicated by the flashing of LED as well as
the red part of the bi-colour LED.

Fig. 3 shows the use of a bi-colour
LED in the AC mains supply circuit. The
unique feature of this circuit is that just
by altering the resistor values, it can be
used in low-voltage AC circuits or DC
circuits.
The AC is converted into pulsating
DC using rectifier diodes before appliELECTRONICS PROJECTS Vol. 22
163
Table II (refer Fig. 2)

Indicator Details
Fuse status
Bias to LED1 and LED2

LED2-anode A1-red anode A2 green anode
Intact
Forward
Forward
Forward

Blown
Forward
Forward
Nil
Colour of
LED1 and LED2
Continuous green LED1+
flash red LED1+flash red
LED2=green and yellow
alternate+flash red
Flashing red LED1 and LED2
Table III (refer Fig. 3)

Indicator Details

Bias to LED1
Colour of LED1

A1-red anode
A2-green anode
Intact
Forward
Forward
Red+green=yellow at 50Hz flicker
Blown
Forward
Nil
Red at 50Hz flicker
Note. Approximate DCVin at C of D1 or D2 is 200 volts
Table IV (refer Fig. 4)
Indicator Details
Supply input
Polarity of
Polarity to LED1

the supply
at P1
at P2
DC
Forward
Positive
Negative

Reverse
Negative
Positive
AC
Alternates
Alternates

at 50Hz/s
at 50Hz/s

Colour of LED1
Red-continuous
Green-continuous
Alternates between red
and green at 50 Hz and
appears yellow
cation to the LED sections via currentlimiting resistors. For higher power
dissipation in current-limiting resistors,
a series combination of resistors can be
used. Because of the pulsating voltage,
the LEDs would produce a flickering
effect. The total series resistance with
each LED section may be calculated by
dividing 200 volts with the desired LED
current (say, 10 mA).
Fig. 4 shows the use of a 2-pin bicolour LED. The two LEDs are internally
connected in reverse, so they glow both
ways of the supply polarity connections
and can be easily used for AC circuits as
indicators. The correct polarity is indicated by green and the reverse polarity
by red. The AC supply is shown by yellow, which, in fact, is due to the turning
on of both the colours at the AC mains
frequency. When the frequency is more
than 20 Hz, the two colours combine to
produce yellow light. Pin identification
of this LED is done usually by using a
current-limiting resistor and DC supply only.
All the circuits can be effectively altered to suit an individuals requirement.
A Hierarchical Priority Encoder

dr bhaskara rao n.
normal priority encoder encodes

only the highest-order data line.
But in many situations, not only
the highest but the second-highest
priority information is also needed. The
circuit presented here encodes both
the highest-priority information as well as
the second-highest priority information of
an 8-line incoming data. The circuit uses
the standard octal priority encoder 74148
that is an 8-line-to-3-line (4-2-1) binary
encoder with active-low data inputs and
outputs.
The first encoder (IC1) generates
the highest-priority value, say, F. The
active-low output (A0, A1, A2) of IC1 is
inverted by gates N9 through N11 and fed
to a 3-line-to-8-line decoder (74138) that
requires active-high inputs. The decoded
outputs are active-low. The decoder identifies the highest-priority data line and that
164
data value is cancelled using XNOR gates

(N1 through N8) to retain the secondhighest priority value that is generated by
the second encoder.
To understand the logic, let the incoming data lines be denoted as L0 to L7. Lp
is the highest-priority line (active-low)
and Lq the second-highest priority line
(active-low). Thus Lp=0 and Lq=0. All
lines above Lp and also between Lp and
Lq (denoted as Lj) are at logic 1. All lines
below Lq logic state are irrelevant, i.e.
dont care. Here p is the highest-priority
value and q the second-highest-priority
value. (Obviously, q has to be lower than
p, and the minimum possible value for p
is taken as 1.)
Priority encoder IC1 generates binary
output F2, F1, F0, which represents the
value of p in active-low format. The
complemented F2, F1, and F0 are ap-
plied to 3-line-to-8-line (one out of eight

outputs is active-low) decoder 74138.
Let the output lines of 74138 be denoted
as M0 through M7. Now only one line
is active-low among M0 through M7,
and that is Mp (where the value of p is
explained as above). Therefore the logic
level of line Mp is 0 and that of all other
M lines 1.
The highest-priority line is cancelled
using eight XNOR gates as shown in the
figure. Let the output lines from XNOR
gates be N0 through N7. Consider inputs
Lp and Mp of the corresponding XNOR
gate. Since Mp = 0 and also Lp = 0, the
output of this XNOR gate is Np = complement of Lp = 1. All other Ls are not
changed because the corresponding Ms
are all 1s. Thus data lines N0 through N7
are same as L0 through L7, except that
the highest-priority level in L0 through
L7 is cancelled in N0 through N7.

The highest-priority level in N0
through N7 is the second-highest priority
leftover from L0 through L7, i.e. Nq=0
and Nj=1 for q<j7. Now these N lines
are applied to priority encoder 2 (IC3) to
generate S2, S1, S0, which represent q.
Thus the second-highest priority value
is extracted. Through cascading one can

recover the third-highest priority, and
so on.
For example, let L0 through L7 = X X
X 0 1 1 0 1. Here the highest 0 line is L6
and the next highest is L3 (X denotes dont
care). Thus p=6 and q=3. Now the activelow output of the first priority encoder will
be F2 F1 F0 = 0 0 1. The input to 74138 is

1 1 0 and it outputs M0 through M7 = 1 1
1 1 1 1 0 1. Since M6=0, only L6 is complemented by XNOR gates. Thus the outputs
of XNORs are N0 through N7 = X X X 0 1 1
1 1. Now N3=0 and the highest priority for
N is 3. This value is recovered by priority
encoder 2 (IC3) as S2 S1 S0 = 1 0 0.
Digital Mains Voltage Indicator

pratap chandra sahu
ontinuous monitoring of the mains

voltage is required in many applications such as manual voltage
stabilisers and motor pumps. An analogue voltmeter, though cheap, has many
disadvantages as it has moving parts and
is sensitive to vibrations. The solidstate
voltmeter circuit described here indicates
the mains voltage with a resolution that
is comparable to that of a general-purpose
analogue voltmeter. The status of the
mains voltage is available in the form of
an LED bar graph.
Presets VR1 through VR16 are used
to set the DC voltages corresponding to

the 16 voltage levels over the 50-250V
range as marked on LED1 through
LED16, respectively, in the figure. The
LED bar graph is multiplexed from the
bottom to the top with the help of ICs
CD4067B (16-channel multiplexer) and
CD4029B (counter). The counter clocked
by NE555 timer-based astable multivibrator generates 4-bit binary address
for multiplexer-demultiplexer pair of
CD4067B and CD4514B.
The voltage from the wipers of presets
are multiplexed by CD4067B and the
output from pin 1 of CD4067B is fed to

the non-inverting input of comparator
A2 (half of op-amp LM358) after being
buffered by A1 (the other half of IC2). The
unregulated voltage sensed from rectifier
output is fed to the inverting input of
comparator A2.
The output of comparator A2 is low
until the sensed voltage is greater than
the reference input applied at the noninverting pins of comparator A2 via
buffer A1. When the sensed voltage goes
below the reference voltage, the output of
comparator A2 goes high. The high output
165
from comparator A2 inhibits the decoder

(CD4514) that is used to decode the output of IC4029 and drive the LEDs. This
ensures that the LEDs of the bar graph
are on up to the sensed voltage-level proportional to the mains voltage.
The initial adjustment of each of the
presets can be done by feeding a known

AC voltage through an auto-transformer
and then adjusting the corresponding
preset to ensure that only those LEDs that
are up to the applied voltage glow.
(EFY note. It is advisable to use additional transformer, rectifier, filter, and
regulator arrangements for obtaining a

regulated supply for the functioning of the
circuit so that performance of the circuit is
not affected even when the mains voltage
falls as low as 50V or goes as high as 280V.
During Lab testing regulated 12-volt supply for circuit operation was used.)
Electronic Dice
Vijaya kumar P.
ere is a small circuit of an electronic dice to interface with your

PC. The circuit simulates a digital
dice and uses the parallel-port LPT1 provided on the back of the PC. LPT employs
a 25-pin D type female connector.
C language provides a built-in outportb() function to output binary data to
166
the hardware port. To understand this,

let us consider the following program:
#include <dos.h>
main()
{
int i;
printf(Input a decimal number);
scanf (%d,&i);
outportb(0x0378,i);
}
The above program is used to output the binary equivalent of a decimal

number entered via the keyboard.
Scanf function is used to take the input
decimal number from the keyboard. The
outportb() function directly outputs the
Fig. 1
Truth Table
Throw Data pins

Logic state

D2
D1
D0
State of LEDs
A
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
OFF
OFF
OFF
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
ON
ON
ON
OFF
ON
ON
OFF
ON
OFF
ON
OFF
ON
ON
OFF
ON
ON
ON
ON
ON
ON
ON
ON
OFF
Fig. 2
Fig. 3
Display
binary equivalent of decimal number to

LPT1 (port ID is 0x0378).
For example, after you convert the
above program into an executable file
using Turbo C compiler and run it, the
program prompts you to Input a decimal
number. Suppose you enter 15 , then its
binary equivalent 00001111 is output
(written) to data pins D0 through D7
(pins 2 through 9) of the 25-pin parallel
port. If LEDs are connected to the output pins of the parallel port, along with
resistors of 220-ohm in series, they can
be directly driven to indicate the binary
output number, as the parallel port can
directly support the current required for
driving the LEDs.
The electronic dice program generates
a random decimal number that is output
through data-output lines D0 through D2
(pins 2 through 4) of the LPT port in the
form of a 3-bit binary number.
Fig. 1 shows the hardware interface
circuit of a BCD-to-decimal converter
employing a 7-segment display driver IC
7447, which directly converts the input
BCD number into 7-segment display.
Fig. 2 shows the circuit simulating the
electronic dice with dot pattern display
that satisfies the truth table shown. Fig.
3 shows the Karnaugh Map simplification
of minterms.
When the software program using
C language is run after compilation, it
prompts you to press letter T for simulating an action equivalent to throwing of
dice by generating/outputting a random
number, or press letter X to exit the program. The program is given below:
#include <stdio.h>
#include <dos.h>
#include <conio.h>
#include <graphics.h>
#include <stdlib.h>
#define PORT 0x0378 /*LPT1 Data Port
Address */

/*Use 0x0278 for LPT2 */
void main(void)
{
int ran;
int gd=DETECT,gm,ch,x,y;
initgraph(&gd,&gm ,""); /* Initializes
graphics mode */
/* Decorating the screen */
x = getmaxx();/*Get maximum screen
coordinates x & y*/
y = getmaxy();
setbkcolor(BLUE);
rectangle(10,y-10,x-10,10);
setcolor(YELLOW);
settextstyle(DEFAULT_FONT,
167
HORIZ_DIR,2);
outtextxy(120,20,"*** ELECTRONIC
DICE ***");
setcolor(GREEN);
outtextxy(x/5,180,"1.Press T to Throw
Dice");
outtextxy(x/5,230,"2.Press X to Exit");
/* Actual program */
randomize();/*Initializes random number
generator */
do {
ch= getch();
ch= toupper(ch);
if(ch=='T') /* If T is Pressed */
{
ran=random(6); /* to generate
random number between 0&7 */
ran=ran+1;
outport(PORT,ran); /* outputs
BINARY no. to LPT's Data Port */
}
}
while(ch!='X'); /* Exit the program if X is

pressed */
outportb(PORT,0); /* Clears LPT's Data
Port */
closegraph(); /*Shuts down graphics
mode */
printf("By Vijaya Kumar.p");
exit(0);
}
(EFY note. Source code has also been

included in the accompanied CD.)
Light-Operated Organ
pradeep g.
included in the emitter circuit of T1 as
ere is a circuit based on a

unijunction transistor (UJT)
2N2646 or its equivalent that can
be used as a light-operated organ. Wired
as a relaxation oscillator, it can oscillate
independently without a tank circuit or
complicated RC feedback network.
A light-dependent resistor (LDR) is
shown in the diagram. When LDR receives light from a light source,
such as an electric bulb, a
sharp and pleasing audio tone
is heard from the speaker. The
intensity of light falling on
LDR can be varied by waving
a hand to and fro between the
lamp and the LDR. As a result,
the frequency of the output
sound changes.
Stereo Tape Head Preamplifier

for PC Sound Card
t.k. hareendran
ere is a stereo tape head preamplifier circuit for your PC sound

card that can playback your
favourite audio cassette through the
PC. Audio signals from this circuit can
be directly connected to the stereo-input
(line-input) socket of the PC sound card
for further processing.
The circuit is built around a popular
stereo head preamp IC LA3161. Weak
electrical signals from the playback
heads are fed to pins 1 and 8 of IC1 via
DC decoupling capacitors C1 and C6,
respectively. Components between pins 2
and 3 and pins 6 and 7 provide adequate
equalisation to the signals for a normal
tape playback.
168
The amplified and equalised signals

available at output pins 3 and 6 of IC1
are coupled to the inputs of line amplifier circuit built around transistors T1
(via capacitor C5, potmeter VR1, resistor R8, and capacitor C12) and T2 (via
capacitor C10, potmeter VR2, resistor
R19, and capacitor C16), respectively.
Left and right playback levels can be
adjusted by variable resistors VR1 and
VR2. The audio signals are finally available at the negative ends of capacitors
C13 and C17.
The circuit wired around relay driver
transistor T3 serves as a simple source
selector. This is added deliberately to help
the user share the common PC sound card
line-input terminal for operating some

other audio device as well.
When the preamplifier is in off state,
switching relay RL1 is off and it allows
connection of external signals to the sound
card. When the preamplifier is turned
on, the relay is energised by transistor
T3 after a short delay determined by
the values of resistor R21 and capacitor
C20. On energisation, the relay contacts
changeover the signals to internal source,
i.e. the head preamplifier.
After constructing the whole circuit
on a veroboard, enclose it in a mini metallic cabinet with level controls and sockets
at suitable points. Use a regulated 1A,
12V DC power supply for powering the
whole circuit including the tape deck

mechanism. (A 1A, 18V AC secondary
transformer with 4700F, 40V electro-
lytic capacitor and 78M12 regulator is

sufficient.)
You can use any kind of tape deck
mechanism with this circuit. Use of goodquality playback head and well-screened
wires are recommended.
Heart Beat Monitor

pradeep g.
ere is a simple and low-cost circuit of heart beat monitor using

readily available components. It
uses the piezo-electric plate of audible
piezobuzzers as the sensing device, which
can be purchased for around Rs 2 only
from component vendors.
The sensor is pressed against human
body near the heart region. It should make
a solid contact with your palm to convert
heart beat sound into low-frequency electrical variations. These electrical variations are amplified by transistor T1 that is
configured as a common-emitter amplifier.
Amplified signals are coupled to transistor
T2 for driving the audio power amplifier
stage. The speaker reproduces heart beat
notes as audible sound.
The two BEL188 silicon transistors
used in the power output stage are freely

available. In case you use AC188/128 germanium transistors in place of BEL188
silicon transistors, replace 220-ohm resistors with 47-ohm resistors and 680-ohm
resistors with 1-kilo-ohm resistors.
169
Digital Fan Regulator

sunil p.b.
he circuit presented here can be

used to control the speed of fans
using induction motor. The speed
control is nonlinear, i.e. in steps. The
current step number is displayed on a
7-segment display. Speed can be varied
over a wide range because the circuit can
alter the voltage applied to the fan motor
from 130V to 230V RMS in a maximum of
seven steps.
The triac used in the final stage is
fired at different angles to get different voltage outputs by applying short-
170
duration current pulses at its gate. For

this purpose a UJT relaxation oscillator
is used that outputs sawtooth waveform. This waveform is coupled to the
gate of the triac through an optocoupler
(MOC3011) that has a triac driver output stage.
Pedestal voltage control is used for
varying the firing angle of the triac. The
power supply for the relaxation oscillator
is derived from the rectified mains via
10-kilo-ohm, 10W series dropping/limiting
resistor R2.
The pedestal voltage is derived from

the non-filtered DC through optocoupler
4N33. The conductivity of the Darlington
pair transistors inside this optocoupler is
varied for getting the pedestal voltage. For
this, the positive supply to the LED inside
the optocoupler is connected via different
values of resistors using a multiplexer
(CD4051).
The value of resistance selected by
the multiplexer depends upon the control
input from BCD up-/down-counter CD4510
(IC5), which, in turn, controls forward
biasing of the transistor inside optocoupler
4N33. The same BCD
outputs from IC5 are
also connected to the
BCD-to-7-segment decoder to display the
step number on a 7-segment display.
NAND gates N3
and N4 are configured
as an astable multivibrator to produce rectangular clock pulses
for IC5, while NAND
gates N1 and N2 generate the active-low count
enable (CE) input using
either of push-to-on
switches S1 or S2 for
count up or count down
operation, respectively,
of the BCD counter.
Optocoupler 4N33
electrically isolates
the high-voltage section and the digital
section and thus prevents the user from
shock hazard when
using switches S1 and
S2. BCD-to-7-segment
decoder CD4543 is
used for driving both
common-cathode and
common-anode 7-segment displays. If phase
input pin 6 is high
the decoder works as
a common-anode de-
coder, and if phase input pin 6 is low it

acts as a common-cathode decoder.
Optocoupler 4N33 may still conduct
slightly even when the display is zero, i.e.

pin 13 (X0, at ground level) is switched to
output pin 3. To avoid this problem, adjust
preset VR1 as required using a plastichandled screwdriver to get no output at

zero reading in the display.
Running Lights and

Running Holes
vijaya kumar p.
his four-channel, two-mode light

chaser circuit produces effects of
running holes and running lights.
astable multivibrator for generating clock

signals for decade counter CD4017 (IC2).
The speed of running lights can be varied
using preset VR1. CD4030 (IC3) is a quad

XOR gate that can be used both as an inverting and a non-inverting gate by tying
Fig. 1
Each effect, i.e. running lights or running

holes, is repeated five times. Applications
include decorating photographs using
LEDs or driving 230V bulbs via triacs.
Fig. 1 shows the circuit for driving the
bulbs using triacs, while Fig. 2 is a modification of Fig. 1 for driving LEDs without
using triacs.
In Fig. 1, timer 555 is used as an
12V
Fig. 2
171
any one of the XOR gate inputs high and

low, respectively (refer the table).
For every fourth clock to IC2, its pin
7 goes high, which, in turn, clocks IC4.
Since the first five outputs of IC4 are
connected together (wired ORed) using
diodes D3 through D7, the output at

the tied end remains high for every five
clock pulses at IC4. This output is coupled to one of the inputs of all the four
XOR gates.
When the output of IC4 (Q) goes
high, the outputs of IC2 get inverted and

produce the running hole effect. And when
the output of IC4 (Q) goes low, XOR gates
act as non-inverters and the outputs of
IC2 remain as original and produce the
running light effect.
A Simple Transistor Tester

j. balaji
his simple-to-construct circuit is

useful for testing both npn and
pnp low-power transistors. It comprises a few resistors, LEDs, diodes, and
a mains step-down transformer.
The 230V mains voltage is stepped
down to about 6 volts AC before application to the circuit. The leads of transistor under test are inserted in the test
terminals (sockets) marked E, B, and C
(for emitter, base, and collector, respectively) appropriately, i.e. the emitter of the
transistor is to be inserted in terminal
E, the base of the transistor in terminal
B, and the collector of the transistor in
terminal C.
The resistor to be connected in series
with the base terminal is selected with
the help of a 6-position rotary switch
S1 as per base current requirement for
the transistor. Two different coloured

(green and red) LEDs are used for indication.
Green LED glows if the npn transistor under test is good, otherwise
not. Likewise, when a pnp transistor is

tested, the glowing of red LED indicates that the transistor is good and no
glowing indicates that the transistor
is bad.
12V, 3A Power Supply

d. prabakaran
172
his circuit provides a 12V regulated power supply with output

current up to 3 amperes. It is spe-
cially designed for use with 2m handheld

rigs with linear power amplifier and CB
portable QRP rigs.
The circuit uses monolithic IC CA3085

voltage regulator in 8-lead TO-5 package.
Its salient features include good load and
line regulation, output current up to 100
mA (which can be increased to several
amperes with additional pass transistors),
output short-circuit protection, and lower
input voltage.
A low power dissipation is achieved
by driving external series-pass transistor 2N4241 (T1) from pin 2 of CA3085.
Normal output pin 8 is returned to ground
via diodes D3 and D4 to ensure error amplification operation in the linear region.
Ripple rejection is approximately 50 dB on
no load and 35 dB on full load.
A 2x2x2.5cm aluminium heat sink fastened onto a 1.5mm blackened aluminium

sheet of 12.5cm2 area on 2N4241 helps the
circuit in dissipating heat without exceed-
ing maximum device ratings.

CA3085 can dissipate up to 650mW
power in free air, without any heat sink.
AFCO-make C-05-4 heat sink is suitable
for this IC. An improper heat sink may

cause device junction temperature to
exceed the limit, resulting in progressive
deterioration of the device.
Speller effect sign Display

vijaya kumar p.
he circuit described here uses lowcost and easily available IC

CD4017 to produce a speller type
light display. In such displays, each letter
of the sign sequentially lights up, one after
the other, until all letters are glowing.
After a few seconds, the letters switch off
and the cycle repeats. This circuit provides
a maximum of nine channels and therefore
can be used to spell a word or sign having
up to nine characters.
Timer IC1 (555) is configured in astable mode to produce clock signal for triggering IC2 (CD4017). Speed of switching
on the display can be controlled by varying
preset VR1.
CD4017 is a decade counter having ten
outputs, of which one output is high for
each clock pulse. However, this produces
running lights effect. To change this sequence to get the speller effect, pnp transistors T1 through T9 are wired as shown
in the figure. Nine triacs (triac 1 through
triac 9) are used to drive 230V bulbs. (In
place of 230V bulbs, miniature lamps connected in series in the form of characters
or letters can also be used, provided the
voltage drop across the series combination
is 230 volts.)
When any of the outputs of IC2 goes
high, the corresponding transistor connected to the output goes off. When Q0 is
high, transistor T1 goes off and its output
at the collector goes low. Since the emitter of transistor T2 is connected to the
collector of transistor T1, and collector
and emitter terminals of transistors T1
through T9 are connected in series, all
transistors next to transistor T1, i.e. transistors T2 through T9, do not get supply
and hence all their outputs go low.
Next, when Q1 output goes high,
transistor T2 goes off. Thus outputs of
transistors T2 through T9 remain low.
Since Q0 output at this instant is low,
transistor T1 is forward biased and its
output goes high to light up the first
character.
Similarly, when Q2 output goes high,
Q0 and Q1 outputs are low and therefore outputs of transistors T1 and T2
go high to light up the first and second
characters.
This process continues until all transistors turn on, making all the characters
to light up. The cycle repeats endlessly,
producing the speller type light effect.
173
DarkRoom Timer
d. prabakaran
he timer circuit described here provides a pleasant musical tone in

your darkroom at 1-second intervals. The circuit takes up very little
space and can be easily converted into a
metronome.
Unijunction transistor (UJT) T1 functioning as a relaxation oscillator triggers
the phase-shift audio oscillator circuit
built around transistor T2, turning it

on and off. As capacitor C1 is charged
through preset VR1 and resistor R1, the
emitter voltage of UJT rises toward the
supply voltage.
When the emitter voltage becomes sufficiently positive, the emitter becomes forward biased and discharges capacitor C1
through the emitter-base 1 (B1) junction
and resistor R2.
The voltage drop
across R2 forward
biases transistor T2 and turns
it on. As capacitor C1 becomes
discharged, the
current through
resistor R2 drops
and transistor T2
is cut off.
A tone signal is generated
by transistor T2
and R-C coupled
phase-shift oscillator. Part of the
signal taken from
the collector of
transistor T2 is coupled to a small speaker

through a transistor-radio type output
transformer.
The 22-kilo-ohm value of resistor R3
represents a compromise between tone
duration and intensity. You can use resistors having a value anywhere between 10
kilo-ohms and 25 kilo-ohms for different
durations and intensities of the output
signals.
Since the unijunction transistor is
functioning as the oscillator trigger,
changing the values of one or more components in the UJT circuit will change the
rate of the tone burst. The tone frequency
can be varied by changing the value of
any or more of capacitors C2 through C4
and resistors R5 and R6 in the phase-shift
network.
The primary winding of transformer
X1 can be tuned for a slight increase in
the output, using capacitor values between
0.05 and 0.25 F for C5 by trial-and-error
method. Tone pulses should begin about
ten seconds after the unit is turned on.
After a minute or so, adjust preset VR1 for
1-second beats by comparing the timing of
the beats with the seconds needle on your
wristwatch.
Active Shortwave Antenna

praveen shanker
he circuit presented here boosts

weak shortwave signals so that
these can be heard with enhanced
clarity over a shortwave receiver. Further, the receiver doesnt require any
physical connection as its placement in
the vicinity (within 6 to 7 cm) of the circuit will suffice. The circuit works well
over a wide range of supply voltage from
3 volts to 12 volts.
Low-noise transistor T1 (BF494 or
BF495) is connected as shown in the
figure. Resistor R1 gives the DC bias to
T1. R1s value may lie anywhere between
l00 kilo-ohms and 22 kilo-ohms; it deter-
174
mines the quiescent base-emitter current

for transistor T1. Resistor R2 limits the
current flowing through transistor T1
and, in conjunction with capacitor C2,
determines the operating point for its
stable operation.
The number of turns in inductor L1
would have to be reduced as operation
area shifts towards the upper end of the
high-frequency band. A 180H RFC in
series with positive supply rail, along
with a bypass capacitor to the ground, is
recommended for reducing signal loss in
the power supply.
The current consumption is well be-
low 10 mA. The transistor works well at

maximum supply and so reduction of resistor R1s value below 22 kilo-ohm is not
recommended, as otherwise the transistor
may burn off.
This circuit works satisfactorily
for boosting signals in 13m-49m band.
However, as the frequency increases, its

performance deteriorates. The same happens when the frequency decreases below
that of the shortwave range. For input
use a long wire as the antenna, while the
output antenna wire may be limited to
about 30 cm.
Note. The circuit is prone to selfoscillations if the aerial (input) wire

picks up stray radiations from the
power supply wires or from the
output. So keep the power supply and
output wires well isolated from the
input.
Long-Range
Target shooter
pratap chandra sahu
racticing target shooting using a

real gun is both expensive and
risky. Also, it is not possible for
everybody to have a gun. The circuit

presented here makes you feel the excitement of shooting a target situated at a
distance of more than 100 metres without

any risk or much expenditure.
The circuit simply uses a laser pointer
(also referred to as laser torch) as the
transmitter at the gun end. Laser pointers can reach a maximum of 1 kilometre
distance but it is advisable to limit the
range within, say, 200 metres.
While constructing the gun no change
has to be made in the readymade pointer.
Just tightly fit the pointer inside the toy
gun, so that the triggering switch can activate the press-to-on button of the laser
pointer, as shown in Fig. 1.
The receiver comprises a counter-cum7-segment display driver IC (CD4033)
with a debouncer formed by 555 timer and
an LDR sensor at the input. The counter
works as a scoreboard and directly shows
the number of successful hits.
The LDR senses the pointers laser
beam and activates the monostable multivibrator wired around 555 timer IC. To
increase the sensitively of the receiver,
the LDR signal is amplified by transistor T1. The timer pulse-width is set at
around 100 milliseconds so as to work as
a debouncer. The timer output is coupled
to IC CD4033.
CD4033 is a serial decade countercum-7-segment decoder/driver. With
every output pulse from monostable IC1,
the count in CD4033 gets incremented by
one. Thus the output of IC2 reflects the
latest score by a competitor. Pressing reset
switch resets the display too.
You can increase the size of the
display board manyfolds using the additional circuit shown in Fig. 3. This
multiplexed board avoids higher power
175
consumption and is necessary if you are using the

module for long-range shooting.
For each segment, you
can wire up to ten LEDs in
parallel. Short the anodes
of LEDs of all segments
as it is a common-anode
type display. (The output
from ULN2003 will be
active-low.)
For proper functioning of
the receiver, the LDR should
be kept covered in such
a way that no external light
falls on it. Further, the
receiver should be fixed
at least two metres from
the ground so that the laser
beam is accidentally not
directed towards anybodys
eyes. The game can be played
both in daylight as well as
at night.
Caution. Never look or
stare at the beam source and
do not bounce the beam on
a mirror.
Power Supply for

Walkie-Talkies
pradeep g.
ere is a simple power supply circuit that can be used for citizen-band and VHF walkie-talkies
of power rating up to 10 watts. The circuit
uses a step-down transformer, followed by
bridge rectifier, filter, regulator, and current booster stages.
A pnp power transistor is added to
the circuit to increase its current sourcing
capabilities. Regulator 7812 can support
around 100 mA current. When the current flowing through R1 nears 100mA
value, the voltage (>0.65V) across the
emitter-base junction makes transistor
T1 to conduct and provide a path for additional current.
The circuit can source around one ampere of current at 12+1.4 volts=13.4 volts.
176
Both the regulator IC and the power transistor must be mounted on heat sinks.
High-Performance
Interruption De tector
junomon abraham
he circuit presented here detects

interruption in security systems.
Its features include no false triggering by external factors (such as sunlight
and rain), easy relative positioning of the
sensors and alignment of the circuit, high
sensitivity, and reliability.
The circuit comprises three sections,
namely, transmitter, receiver, and power
supply. The transmitter generates modulated IR signals and the receiver detects
the change in IR intensity. Power supply
provides regulated +5V to the transmitter
and the receiver.
The power supply and the speaker
are kept inside the premises while the
transmitter and the receiver are placed
opposite to each other at the entrance
where the detection is needed. Three
connections (Vcc, GND, and SPKR) are
needed from the power supply/speaker
to the receiver section, while only two
connections (Vcc and GND) are required
to the transmitter.
The transmitter is basically an astable
multivibrator configured around NE555
(IC3). Its frequency should match the
frequency of the detector/sensor module
(36 kHz for the module shown in figure)
in the receiver. The transmitter frequency

is adjusted by preset VR2. For making
the duty cycle less than 50 per cent, diode
1N4148 is connected in the charging path
of capacitor C7.
The output of astable multivibrator
modulates the IR signal emitted from IR
LEDs that are used in series to obtain a
range of 7 metres (maximum). To increase
the range any further, the transmitted
power has to be raised by using more
number of IR LEDs. In such a case, it is
advisable to use another pair of IR LEDs
and 33-ohm series resistor in parallel
with the existing IR LEDs and resistor R5
across points X and Y.
The receiver unit consists of a monostable multivibrator built around NE555
(IC2), a melody generator, and an IR sensor module. The output of the IR sensor
module goes high in the standby mode
or when there is continuous presence of
modulated IR signal.
When the IR signal path is blocked,
the output of the sensor module still remains high. However, when the block is
removed, the output of the sensor module
briefly goes low to trigger monostable
IC3. This is due to the fact that the sen-
sor module is meant for pulsed operation.

Thus interruption of the IR path for a brief
period gives rise to pulsed operation of the
sensor module.
Once monostable IC2 gets triggered,
its output goes high and stays in that state
for the duration of its pulse width that can
be controlled by preset VR1. The high
output at pin 3 of the monostable makes
the musical IC to function. Voltage divider
comprising R2 and R3 reduces the 555
output voltage to a safer value (around
3V) for UM66 operation. The duration of
the musical notes is set by preset VR1 as
stated earlier.
For proper operation of the circuit,
use 7.5V to 12V power supply. A battery back-up can be provided so that the
circuit works in the case of power failure
also. Potmeter VR3 serves as a volume
control.
The transmitter, receiver, and power
supply units should be assembled separately. The transmitter and the receiver
should have proper coverings (booster) for
protection against rain. The length of the
wire used for connecting the IR sensor module and IR LEDs should be minimum.
Note. The heart of the circuit is the
177
IR sensor module (usually used in VCRs

and TVs with remote); the circuit works
satisfactorily with various makes of
sensors. The entire circuit can be fixed

in the same cabinet if the connection
wires to the sensors are smaller than 1.5
metres. The reflection property of IR signals can also be used for small-distance
coverage.
Readers comments:
This circuit helps me in various ways. I
have the following queries regarding it:
1. How can I fit a lamp in place of the
speaker or another device?
2. Can I perform more than one func-
tion using this circuit?
circuit! A lamp can be connected easily by

using a simple transistor driver circuit at
output pin 3 of IC2 (NE555). For larger
loads, you may need a relay circuit to
connect the load through the contacts of
the relay.
Bhavik A. Patel
Through e-mail
The author, Junomon Abraham,
replies:
Thank you for your keen interest in this
Digital Relay Tester

For RAX and MAX
krishna sharma
178
his high-speed relay tester is intended for testing 12V DC 2C/O

(changeover) and 4C/O PCB-
mounted relays used in RAX (smallcapacity rural automatic exchange) and

MAX (main automatic exchange) of C-
DOT origin. It is a reliable tool for testing

relays in bulk. For other than 2C/O and
4C/O contact relays, slight modification
in the circuit is required.

As soon as the relay is inserted in
28-pin ZIF socket and test pushbutton S2
is pressed, the tester displays pass or fail
on 7-segment display. If the relay coil is
open or N/O and N/C contacts are not functioning as they should during operate and
release conditions, the tester immediately
displays fail on 7-segment display. If the
relay under test is good, the display shows
pass on 7-segment display.
When the mains supply is connected
to the circuit by closing switch S1, 5V
DC supply goes to the ICs, transistors
(collectors), and common points (poles) of
the relay under test, and 12V DC supply
goes to one of the terminals of the coil of
relay under test. The outputs from four
N/C and four N/O contacts are alternately
applied to N1 and N2 gates, respectively,
of dual 4-input AND gate IC3 (74LS21).

The high output of gate N1 goes to pin
1 of gate N3 of IC4 (7400), while the low
output of gate N2 goes to pin 2 of gate N3
of IC4. As a result, the output of gate N3
becomes high and transistor T1 conducts
to complete the path for supply to the coil
of the relay under test.
For a good relay, the output of gate
N4 is high before its energisation. After
energisation of the relay, the output of
gate N3 remain high whereas the output
of gate N4 goes low. This signal is inverted
by gate N5 to display pass. The output of
gate N5 is further inverted by gate N6 to
display fail.
The common segments of pass and
fail characters are illuminated by OR gating via diodes D5 and D6, while exclusive
pass and fail segments are illuminated
directly through resistors R12 and R13

(whichever is high), respectively.
For testing 2C/O relays, keep the knob
of push switch S3 (wiring of S3 to relay
socket is shown separately) pressed to
bypass two C/O contacts out of four C/O
contacts.
The test procedure is summarised
below:
1. Switch on the power supply to the
tester.
2. Insert the relay to be tested into ZIF
socket and lock it.
3. For 4C/O relay leave knob S3 released, and for 2C/O relay keep the knob
pressed.
4. Press test switch S2 and observe the
display for pass/ fail.
5. Unlock ZIF socket and segregate the
relay as per the result.
Fastest Finger First Indicator

p. rajesh bhat
Qu
iz-type game shows are increasingly becoming popular on television these days. In such games, fastest
finger first indicators (FFFIs) are used to
test the players reaction time. The players designated number is displayed with
an audio alarm when the player presses
his entry button.
The circuit presented here determines
as to which of the four contestants first

pressed the button and locks out the remaining three entries. Simultaneously,
an audio alarm and the correct decimal
number display of the corresponding contestant are activated.
When a contestant presses his
switch, the corresponding output of latch
IC2 (7475) changes its logic state from
1 to 0. The combinational circuitry comprising dual 4-input NAND gates of IC3

(7420) locks out subsequent entries by
producing the appropriate latch-disable
signal.
Priority encoder IC4 (74147) encodes
the active-low input condition into the
corresponding binary coded decimal (BCD)
number output. The outputs of IC4 after
179
inversion by inverter gates inside hex

inverter 74LS04 (IC5) are coupled to BCDto-7-segment decoder/display driver IC6
(7447). The output of IC6 drives commonanode 7-segment LED display (DIS.1,
FND507 or LT542).
The audio alarm generator comprises
clock oscillator IC7 (555), whose output
drives a loudspeaker. The oscillator fre-
quency can be varied with the help of preset VR1. Logic 0 state at one of the outputs
of IC2 produces logic 1 input condition at
pin 4 of IC7, thereby enabling the audio
oscillator.
IC7 needs +12V DC supply for
sufficient alarm level. The remaining circuit operates on regulated +5V
DC supply, which is obtained using
IC1 (7805).
Once the organiser identifies the contestant who pressed the switch first, he
disables the audio alarm and at the same
time forces the digital display to 0 by
pressing reset pushbutton S5.
With a slight modification, this
circuit can accommodate more than four
contestants.
Readers comments:
What modifications are
required to
accommodate
more than four
contestants?
Suyash
Narayan
Delhi
EFY: To accommodate up
to eight contestants, the
modified circuit is shown
in Fig. 1 below.
In this circuit,
IC8 (7475) is
added to the
previous circuit
to accommodate switches
S5 through S8. Fig. 1: Modification of the fastest finger first circuit for eight contestants
In place of IC3
(7420) of the
(74LS00) have been used to lock out the
previous circuit, IC9 (74LS30) and IC10
subsequent entries by producing the ap-
propriate latch-disable signal. The rest

of the circuit remains the same.
Decorative Signboard
pratap chandra sahu
his eye-catching signboard can be

used for special occasions such as
birthdays and marriage ceremonies. The characters in the display board
are illuminated one by one, each for one
second. After the last character is illuminated, the entire board gets illuminated
for 4 to 5 seconds. The above two sequences are repeated continuously.
Timer 555 (IC1) generates 1Hz pulses,
which are applied to decade-counter
CD4017B (IC5). The output from pin
180
Q9 of IC5 triggers 4- to 5-second (pulse

width) monostable multivibrator IC2. The
output of IC2 is ANDed in gate A1 with
100Hz stepped down/pulsating DC supply available at the output of the bridge
rectifier comprising diodes D1 through
D4. The output of AND gate A1 drives
second decade counter IC4, whose outputs
(Q1 through Q8) are ORed with the corresponding outputs of first counter IC5.
(Note. Only eight of the ten outputs of
CD4017s have been used.)
Driving characters at 1 Hz ensures

that the characters are illuminated one
by one for one second each. Similarly,
100Hz signal driving IC4 ensures that
the characters are refreshed rapidly for a
continuous glow effect due to persistence
of vision. AND gate A2 is used to block
1Hz signal reaching the first counter (IC5)
while the second counter (IC4) is active,
i.e. when the output of IC2 is high. When
IC2 output goes low after 4-5 seconds, it
enables gate A2 to pass 1Hz clock to the
first counter (IC5) and disables the second

counter (IC4) via its reset pin 15. Transistor T1 acts as an inverter.
For illuminating more than one message, use two rows of characters wired
reverse to each other. This sequence of
characters in opposite directions gives a
special effect.
The characters can be made by wiring LEDs/torch bulbs (6V, 200mA type)
in series/parallel combination or densely
painted glass or transparent plastic illuminated by torch bulbs. The bulbs should
be placed behind each painted character.
Each of the eight outputs of ULN2803 can

sink a maximum of 500 mA at supply voltage of up to 50 volts.
Note. The supply for ULN2803 can be a
separate one or the same as used for the rest
of the circuit. However, ensure the ground
reference is same in both the cases.
Condenser Mic Audio Amplifier

d. prabakaran
he compact, low-cost condenser

mic audio amplifier described here
provides good-quality audio of 0.5
watts at 4.5 volts. It can be used as part

of intercoms, walkie-talkies, low-power
transmitters, and packet radio receivers.
Transistors T1 and T2 form the mic

preamplifier. Resistor R1 provides the
necessary bias for the condenser mic while
181
preset VR1 functions as gain control for

varying its gain. In order to increase the
audio power, the low-level audio output
from the preamplifier stage is coupled via
coupling capacitor C7 to the audio power
amplifier built around BEL1895 IC.

BEL1895 is a monolithic audio power
amplifier IC designed specifically for sensitive AM radio applications that delivers
1 watt into 4 ohms at 6V power supply
voltage. It exhibits low

distortion and noise and
operates over 3V-9V supply voltage, which makes
it ideal for battery operation. A turn-on pop reduction circuit prevents
thud when the power
supply is switched on.
Coupling capacitor C7 determines lowfrequency response of
the amplifier. Capacitor
C9 acts as the ripplerejection filter. Capacitor
C13 couples the output
available at pin 1 to the
loudspeaker. R15-C13
combination acts as the
damping circuit for output oscillations. Capacitor C12 provides the boot
strapping function.
This circuit is suitable for low-power
HAM radio transmitters to supply the
necessary audio power for modulation.
With simple modifications it can also be
used in intercom circuits.
Smoke Alarm
pradeep g.
he smoke alarm circuit presented

here is based on the readily available photon-coupled interrupter
module and timer IC NE555. The pho-
182
to interrupter module is used as the

smoke detector, while timer 555 is
wired in astable configuration as an
AF oscillator for sounding alarm via a
loudspeaker.
In the absence of any
smoke, the gap
of photo interrupter module
is clear and the
light from LED
falls on the phototransistor
through the slot.
As a result, the
collector of phototransistor is
pulled towards
ground. This
causes reset pin
4 of IC 555 to go
low. Accordingly,
the timer is reset and hence the alarm

does not sound.
However, when smoke is present in
the gap of the photo interrupter module,
the light beam from LED to the phototransistor is obstructed. As a result, the
phototransistor stops conducting and pin
4 (reset) of IC 555 goes high to activate
the alarm.
Note. The unit must be housed
inside an enclosure with holes to allow
entry of smoke.
OverLoad Protector
With Reset But ton
vijay kumar p.
n applications like inverters and

UPS, the load must not exceed the
rated output power since it can cause
excess heating of output transformer
windings and active driving devices and
thereby damage them.
The circuit presented
here can be used as overload protector for inverters
or as an electronic fuse
in AC mains supply. The
mains supply to the load
is routed via the the N/C
(normally closed) contacts
of relay RL1. In an inverter, the relay contacts
could be used as inverter
oscillator on/off control.
Whenever overload occurs,
it inhibits inverter oscillator circuit, which, in turn,
stops generation of power.
Resistor R1 is used
as the overload sensing
element. When the load
exceeds the maximum
rated value, it draws current in excess of
its rated value. This causes the potential
drop across resistor R1 to increase. An
optocoupler is used to sense this voltage drop. The optocoupler, in addition,
isolates the AC mains part from the rest
of the circuit. Zener diode ZD1 across the
optocoupler MCT2E, which is connected
in reverse prevent inbuilt LED of the
optocoupler MCT2E from negative half
cycles across R1.
Resistor R1 is selected as 1 ohm for
230V, 500 watts (max.) load capacity.
When the load just exceeds 500 watts,
the current through R1 is approximately
2.1 amperes, producing a potential
difference of 2.1 volts across R1. The
inbuilt transistor inside the optocoupler
senses this voltage and its collector current increases proportionally. When the
current reaches the required designed
value, voltage drop across resistor-pre-
set combination R3-VR1 also increases.

(Note. The power dissipated in 1-ohm
resistor for 500W load is just 2.1 watts,
which is negligible compared to the
maximum power rating of the load. To
old pin that resets the flip-flop output to

low state. The circuit can be reset after
removing unwanted loads.
Note. Since the circuit is very sensitive, fluctuations in AC mains can also
use this circuit for 1kW load, select R1

as 0.5-ohm, 10W.)
Overload limiting point can be set by
preset VR1. When the potential at wiper of
preset VR1 becomes greater than VZ+VBE
(where VZ is the breakdown voltage of
zener diode ZD1 and VBE the forward voltage drop at the base-emitter junction of
transistor T1), it causes forward biasing
of transistor T1. This results in the collector of transistor T1 to be pulled down
to ground and trigger IC555, which is
connected in bistable mode.
The output of IC1 forward biases
transistor T2 to energise the relay RL1
and causes overload indicating LED1 to
glow. Once the output of bistable IC1 goes
high, it continues to remain high, unless
reset pushbutton S1, which is connected
between Vcc and threshold terminal (pin
6) of timer 555, is pressed. On pressing
S1, a high pulse is applied to the thresh-
trigger the circuit undesirably. This effect

can be eliminated by using 4.7F bypass
capacitor C1 as shown in the figure.
Since some equipments like TV draws
more current initially for few seconds,
this can cause the overload protector to
cutoff the supply, which is undesirable.
Inserting a small time delay of around 5
seconds by using a capacitor C3 of 220F
can eliminate this. The time delay can
be increased by using higher values of
C3 and can be decreased by using higher
values of C3.
If you are using the circuit for loads,
which do not draw more current initially,
the delay feature may be useless and even
be harmful. Therefore disable the feature
by simply disconnecting capacitor C3.
While adjusting the overload cutoff
point disconnect C3, which will otherwise
can cause confusion, and reconnect it
after final adjustments.
183

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Electronics Projects

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Published by Ramesh Chopra for EFY Enterprises Pvt Ltd,

Section A: Construction Projects

Build Your Own Pentium III PC.................................................................................. 3

Automatic Room Light Controller............................................................................... 17

Intelligent Water Level Controller............................................................................... 21

A Unique Liquid Level Indicator................................................................................. 25

Interface Your Printer with 8085 Microprocessor....................................................... 28

Telephone Line-Interfaced Generic Switching System............................................... 46

Programmable Melody Generator............................................................................... 55

Auto Control for 3-Phase Motors................................................................................ 66

Telephone Remote Control.......................................................................................... 72

Microcontroller-Based School Timer.......................................................................... 75

Digital Capacitance-cum-Frequency Meter................................................................. 80

Fluid-Level Controller with Indicator......................................................................... 84

MGMAA Mighty Gadget with Multiple Applications............................................ 87

Traffic and Street Light Controller.............................................................................. 91

Lead-Acid Battery Charger with Active Power Control.............................................. 98

Amplitude Measurement of Sub-Microsecond Pulses................................................ 101

Automatic Submersible Pump Controller.................................................................... 104

Transistor Curve Tracer............................................................................................... 107

Tripping Sequence Recorder-cum-Indicator................................................................ 113

Section B: Circuit Ideas

Electronic Starter for Single-Phase Motors................................................................. 119

Modem On/Off Indicator.......................................................................................... 120

Touch-Select Audio Source......................................................................................... 121

Precision Attenuator with Digital Control................................................................... 121

Precision Amplifier with Digital Control..................................................................... 122

Random Number Generator Based Game................................................................... 123

9-Line Telephone Sharer.............................................................................................. 124

Electronic Card Lock System...................................................................................... 126

Pulsed Operation of a CW Laser Diode....................................................................... 127

Generation of 1-Sec. Pulses Spaced 5-Sec. Apart....................................................... 128

High-/Low-Voltage Cutout with Timer........................................................................ 129

Automatic Heat Detector............................................................................................. 130

Musical Touch Bell.................................................................................................... 131

Non-Contact Liquid-Level Controller......................................................................... 131

High-Power Bicycle Horn........................................................................................... 133

AC Mains Phase-Sequence Indicator.......................................................................... 133

Luxurious Toilet/Bathroom Facility............................................................................ 135

EEPROM W27C512 (Winbond) Eraser...................................................................... 136

Intelligent Electronic Lock.......................................................................................... 137

Stable 455KHz BFO for SSB Reception..................................................................... 139

Auto Shut-off for Cassette Players and Amplifiers...................................................... 139

House Security System................................................................................................ 141

Simple Water-Level Indicator-cum-Alarm.................................................................. 142

Precision Inductance and Capacitance Meter.............................................................. 142