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TRAFFIC LIGHT CONTROLLER WITH 8085

AIM
To write an assembly language program to simulate the traffic light at an intersection
using a traffic light interface.
APPARATUS REQUIRED:
SL.NO
1
2
3

ITEM
Microprocessor kit
Power supply
Traffic light interface kit

SPECIFICATION
8085,Vi Microsystems
+5 V dc
Vi Microsystems

QUANTITY
1
1
1

ALGORITHM:
1. Initialize the ports.
2. Initialize the memory content, with some address to the data.
3. Read data for each sequence from the memory and display it through the ports.
4. After completing all the sequences, repeat from step2.
A SAMPLE SEQUENCE:
1. (a) Vehicles from south can go to straight or left.
(b) Vehicles from west can cross the road.
(c) Each pedestrian can cross the road.
(d) Vehicles from east no movement.
(e) Vehicles from north, can go only straight.
2. All ambers are ON, indicating the change of sequence.
3. (a) Vehicles from east can go straight and left.
(b) Vehicles from south, can go only left.
(c) North pedestrian can cross the road.
(d) Vehicles from north, no movement.
(e) Vehicles from west, can go only straight.
4. All ambers are ON, indicating the change of sequence.
5. (a) Vehicles from north can go straight and left.
(b) Vehicles from east, can go only left.
(c) West pedestrian can cross the road.
(d) Vehicles from west, no movement.
(e) Vehicles from south, can go only straight.
6. All ambers are ON, indicating the change of sequence.

7. (a) Vehicles from west can go straight and left.


(b) Vehicles from north, can go only left.
(c) South pedestrian can cross the road.
(d) Vehicles from south, no movement.
(e) Vehicles from east, can go only straight.
8. All ambers are ON, indicating the change of sequence.
9. (a) All vehicles from all directions no movement.
(b) All pedestrian can cross the road.
BIT ALLOCATION:
BIT

LED

BIT

LED

BIT

LED

PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7

SOUTH LEFT
SOUTH RIGHT
SOUTH AMBER
SOUTH RED
EAST LEFT
EAST RIGHT
EAST AMBER
EAST RED

PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7

NORTH LEFT
NORTH RIGHT
NORTH AMBER
NORTH RED
WEST LEFT
WEST RIGHT
WEST AMBER
WEST RED

PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7

WEST STRAIGHT
NORTH STRAIGHT
EAST STRAIGHT
SOUTH STRAIGHT
NORTH PD
WEST PD
SOUTH PD
EAST PD

PATH REPRESENTATION:

CONTROL
PORT A
PORT B
PORT C

-----------------

0F ( FOR 8255 PPI )


0C
0D
0E

PROGRAM :
ADDRESS

LABEL

MNEMON ICS

8100

MVI A, 81

OPCO OPER
DE
AND
3E
81

8102

OUT CONTROL

D3

0F

8104

LXI H,DATA_SQ

Output
contents
of
accumulator to OF port
Load address 817B to HL
register

8107

LXI D,DATA_E

11

81,87

810A
810D

CALL OUT
XCHG

CD
EB

42, 81

810E

MOV A,M

7E

810F
8111
8114

OUT PORT A
CALL DELAY1
XCHG

D3
CD
EB

8115
8116
8117
811A

INX D
INX H
CALL OUT
XCHG

13
23
CD
EB

811B

MOV A,M

7E

811C
811E
8121

OUT PORT B
CALL DELAY1
XCHG

D3
CD
EB

8122
8123
8124
8127

INX D
INX H
CALL OUT
XCHG

13
23
CD
EB

8128

MOV A,M

7E

Load address 8187 to DE


register
Call out address
Exchange contents of HL
with DE pair
Move
M
content
to
accumulator
Load port A into output port
Call delay address
Exchange content of HL
with DE pair
Increment the content of D
Increment the content of H
Call out the address
Exchange content of HL
with DE pair
Move
M
content
to
accumulator
Load port B into output port
Call DELAY address
Exchange content of HL
with DE pair
Increment D register
Increment H register
Call specified address
Exchange content of HL
with DE pair
Move
M
content
to
accumulator

0C
66, 81

42, 81

0D
66, 81

42, 81

COMMENT
Move 80 immediately to
accumulator

8129
812B
812E

OUT PORT C
CALL DELAY1
XCHG

D3
CD
EB

0E
66, 81

812F
8130
8131
8134

INX D
INX H
CALL OUT
XCHG

13
23
CD
EB

8135

MOV A,M

7E

8136
8138
8139

OUT PORT C
INX H
MOV A,M

D3
23
7E

0E

813A
813C
813F
8142

OUT PORT A
CALL DELAY1
JMP REPEAT
MOV A,M

D3
CD
C3
7E

0C
66, 81
04, 81

8143
8145
8146

OUT PORT C
INX H
MOV A,M

D3
23
7E

0E

8147
8149
814A

OUT PORT B
INX H
MOV A,M

D3
23
7E

0D

814B
814D
8150
8151
8152

OUT PORT A
CALL DELAY
RET
PUSH H
LXI H,001F

D3
CD
C9
E5
21

0C
51, 81

8155

LXI B,FFFF

01

FF,FF

8158
8159

DCX B
MOV A,B

0B
78

815A

ORA C

B1

815B
815E
815F

JNZ LOOP
DCX H
MOV A,L

C2
2B
7D

42, 81

1F,00

58, 81

Load port C into output port


Call DELAY address
Exchange content of HL
with DE pair
Increment D register
Increment H register
Call specified address
Exchange content of HL
with DE pair
Move
M
content
to
accumulator
Load port C into output port
Increment H register
Move
M
content
to
accumulator
Load port A into output port
Call DELAY address
Jump to specified address
Move
M
content
to
accumulator
Load port C into output port
Increment H register
Move
M
content
to
accumulator
Load port B into output port
Increment H register
Move
M
content
to
accumulator
Load port A into output port
Call DELAY address
Return to accumulator
Push the register H
Load 00 1F in HL register
pair
Load FF FF in DE register
pair
Decrement B register
Move
B
content
to
accumulator
OR
content of C with
accumulator
Jump to LOOP if no zero
Decrement H register
Move
L
content
to
accumulator

8160

ORA H

B4

8161
8164
8165
8166
8167

JNZ L1
POP H
RET
PUSH H
LXI H,001F

C2
E1
C9
E5
21

55, 81

816A

LXI B,FFFF

01

FF,FF

816D
816E

DCX B
MOV A,B

0B
78

816F

ORA C

B1

8170
8173
8174

JNZ LOOP2
DCX H
MOV A,L

C2
2B
7D

8175

ORA H

B4

8176
8179
817A
817B

JNZ L2
POP H
RET
12 27 44 10 2B
92 10 9D 84 48
2E 84
48 4B 20 49 04

C2
E1
C9

DATA
SEQ DB

OR
content of H with
accumulator
Jump to L1 if no zero
Pop the register H
Return from subroutine

1F,00

6D, 81

6A, 81

Push the register H


Load 00 1F in HL register
pair
Load FF FF in DE register
pair
Decrement B register
Move
B
content
to
accumulator
OR
content of C with
accumulator
Jump to LOOP2 if no zero
Decrement H register
Move
L
content
to
accumulator
OR
content of H with
accumulator
Jump to L2 if no zero
Pop the register H
Return to subroutine

RESULT:
Thus an assembly language program to simulate the traffic light at an intersection
using a traffic light interfaces was written and implemented.

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