Digital Logic & Circuits

Assignment#4

Solve the following problems from Chapter 4 of the textbook Digital Logic
& Computer Design Mano: 4.2, 4.3, 4.6, 4.8, 4.9, 4.10, 4.29 and 4.30.

Design a logic circuit that takes in a 4-bit excess-3 code ABCD that
represents a decimal digit, and generates 1 in its output G if the code
represents a prime number or 0 otherwise. (Questions to settle before you
can proceed: What are prime numbers? How to handle invalid excess-3
codes?) You need to show the truth table. Obtain the simplified SOP
expression for G and draw the logic diagram using only the fewest 2-input
and 3-input NAND gates.

Design a logic circuit that converts a 4-bit binary number ABCD in into the
equivalent 4-bit number WXYZ in twos complement format. Express W, X,
Y and Z in simplified SOP and POS forms. [A question you may discuss is
how should (0100) be converted into 2s complement?]
2

Design a 4-bit magnitude comparators. Which compares two 4-bit binary numbers(A 3
A2 A1 A0 and B3 B2 B1 B0) and generates three outputs
a) A > B
b) A < B
c) A = B

It is necessary to compare three 4-bit numbers X = (x x x x ) , Y =

3 2 1 02
(y y y y ) , and Z = (z z z z ) . Using some 4-bit magnitude
3 2 1 02
3 2 1 02
comparators and associated logic gates, draw a circuit that will implement
the following truth table.

Condition

f f f f f f f f
0 1 2 3 4 5 6 7

X>Y>Z

10000000

X>Z>Y

01000000

Y>X>Z

00100000

Y>Z>X

00010000

Z>X>Y

00001000

Z>Y>X

00000100

X=Y=Z

00000010

Any other case

00000001

Design a 1-bit parity generator which generates an even parity bit for 4-bit
binary input, with the help of this hardware design a 7-bit Hamiing code
Transmitter.

Design a combinational circuit for performing the operation z = (x + 1)(y

+ 1) 2, where both x and y are positive integers in the range 13 and are
represented by 2-bit binary codes X 1X0 and Y1Y0 respectively. The circuit
has to generate z as the output represented by the four-bit binary code
Z3Z2Z1Z0.
(a)
Construct the Karnaugh maps for Z3, Z2, Z1 and Z0, with the rows
corresponding to different combinations of X 1 and X0, and the columns
corresponding to different combinations of Y1 and Y0, in that order.
(b)
Obtain the Boolean expressions for Z3, Z2, Z1, Z0 in terms of X1, X0, Y1, Y0.
Find the chip count needed for the realisation under the three given options.

A code converter has to be designed to obtain the representation of decimal

digits in the normal BCD code (DCBA) from the excess-3 Gray code
representation G3G2G1G0 (digits 0 to 9 coded as 0010, 0110, 0111, 0101,
0100, 1100, 1101, 1111, 1110 and 1010).

(a) Construct the Karnaugh maps for the output D, C, B, A, with the rows
corresponding to different combinations of G3 and G2, and the columns
corresponding to different combinations of G1 and G0, in that order.
(b) Obtain the Boolean expressions for D, C, B, A in terms of G3, G2, G1, G0.
Find the chip count needed for the realisation under the three given
options.

A combinational circuit has to provide automatic control of a car airconditioner, consisting of a Compressor, a Heater and a 2-speed Fan,
depending on the Temperature (T) and Moisture (M) according to the
following logic:

M < ML

ML < M < M H

MH < M

T < TL

Heater OFF
Compressor OFF
Fan OFF

Heater ON
Compressor OFF
Fan speed LOW

Heater ON
Compressor OFF
Fan speed
HIGH

TL < T < TH

Heater OFF
Compressor ON
Fan OFF

Heater OFF
Compressor OFF
Fan OFF

Heater ON
Compressor OFF
Fan speed LOW

TH < T

Heater OFF
Compressor ON
Fan speed LOW

Heater OFF
Compressor ON
Fan speed
HIGH

Heater OFF
Compressor ON
Fan speed
HIGH

Assign two binary variables each to represent the different ranges of

Temperature and Moisture. Specify suitable output variables to control (i)

the Compressor (ii) the Heater and (iii) the Fan speed, and express the
control logic given above in terms of Boolean expressions for these output
variables in terms of the input variables representing temperature and
pressure.

In an EL101 Quiz, there are ten MCQs to be answered. Each MCQ answer
sheet is passed through an optical reader in which each correct answer
will pass a HIGH signal (an incorrect answer will pass a LOW signal) to one
of the ten inputs of a Counting Device. The Counting Device computes
the number of correct answers in each MCQ answer sheet, and outputs the
answer, in binary form, through the four output lines.
You have to design this Counting Device of ten inputs (I9 through I0)
and four outputs (A, B, C, D) by using some three Full Adders, two 2-bit
Binary Parallel Adders, and one 4-bit Binary Parallel Adder. You need to
draw only the block diagrams for the full adders and parallel adders.