A New Single Phase AC to DC Harmonic Reduction

Converter Based on the Voltage-Doubler Circuit

H.O. Aintablian, H.W. Hill
Department of Electrical and Computer Engineering
Ohio University
Athens, OH 45701
Abrtrrct-Nodom power oloctronic due to their high costs and low
e i p a t that U80 .witch-modo reliabilities [ 2 1 .
tocbnology aro major 80urcoa of This paper describes a single-
harmonic currontm. Sovoralmethod8 of phase harmonic reduction circuit based
pawor factor hprovomont through on line-frequency operation using the
h a d c elimination havo boon voltage-doubler circuit with an
dovolopod that u80 high froquoncy additional switch. Theoretical and
-itch08 to activoly 8hapo tho input simulation results depicting the input
curront. In +hi8 papor, a minglo- current waveform of the new circuit
phaso harmonic roduction aircuit ba8od and its harmonic currents are
on tho voltago-doublor circuit 18 presented. Finally, the proposed
pr08mt.d that U808 a witch opratod circuit is tested in a laboratory
on lino-froquoncy. Significant setting and experimental results are
roduction of tho l'HD of tho mapply discussed.
curront i 8 achiovod with tho propo8.d
mothod. Thoorotical, mimulation and 11. DESCRIPTION AND ANALYSIS
laboratory wavoform8 of tho input
curront and it# harmonic cosagononto OF THE PROPOSED CIRCUIT
aro promontod. Tho advantage8 and
di88dVatag08 Of tho propo8.d circuit The proposed harmonic reduction
aro atlinod. circuit that is based on the voltage-
doubler circuit is shown in figure 1.
I. INTRODUCTION The new circuit has an additional
switch that is operated on line
frequency (60 Hz). When the switch is
The Switch-mode power supplies open the circuit acts as a full-wave
employed in personal computers and bridge rectifier. During each half-
other non-linear loads generate high cycle a pair of diodes conduct until
levels of harmonic currentsIl1. The the dc output voltage rises above the
triplen harmonic components of the supply voltage. When the switch is
input current are a major concern to closed the circuit acts as a voltage-
the power engineer since these doubler rectifier each capacitor
components add in phase in the neutral getting charged to approximately the
conductor of an existing power peak of the ac voltage.
system[ll. It is in the interest of To better understand the operation
the computer industry to build of the new circuit, the circuit of the
harmonic-free power supplies in order uncompensated bridge rectifier is
to extract more power from a wall considered first as shown in figure 2.
outlet. The excessive harmonic
currents due to the increase in the
usage of switch-mode technology have
led to legislation of new standards to
limit harmonics; among them are the
IEEE-519 and the IEC-555 121.
In the past 10 years an ample amount
of literature has been published
dealing with methods of power factor
improvement of single-phase ac-to-dc
converters through harmonic
elimination. Among the different
harmonic elimination circuits, the
boost converter is the most popular
and has a high performanceI21.
However, active methods of power
factor correction such as the boost
methods have not gained marketability
Figure 1: Schematic of the proposed
harmonic reduction circuit

0-7803-1328-3/94$03.0001994 IEEE
452
A PSpice analysis of the circuit of
figure 2 was performed. Figure 3
shows the PSpice results of the input
current waveform of the bridge
rectifier circuit. The current
pulsewidth of figure 3 can be
increased by stepping up the supply
voltage before the current starts to
flow and after the current becomes
zero. This is achieved by operating
the circuit of figure 1 as a voltage-
doubler (switch is closed) outside the
normal current conduction times. The 4 Mat
WllshoOen
switch is opened during the normal
current conduction time and the
circuit operates as an ordinary bridge
rectifier. Figures 4 shows the
...I
simulated input current waveform when
the new scheme is used.
The durations of the conduction
periods (t,and t, in figure 4) of the Figure 4: Input current waveform of the
switch can be determined either by proposed circuit obtained by Pspice
performing a PSpice simulation or a
theoretical analysis of the bridge
rectifier circuit and reading the zero
crossings of the input current.
Figures 5 and 6 show the input
current magnitude spectra of the
bridge rectifier circuit and the new
harmonic reduction circuit obtained by
Pspice. It is obvious from these

Figure 5: Magnitude spectrum of input

current of bridge rectifier obtained from
PSpice
Figure 2 : Schematic of uncompensated
bridge rectifier circuit

I I

i
4t t

i
I

i
1
4
U.'
I
i
I
Y

Figure 3 : Input current waveform of

uncompensated bridge-rectifier
circuit simulated by PSpice

453
figures that the harmonic content of
the input current decreases
significantly with the new circuit.
The total harmonic distortion (THD)
can be calculated from equation 1 [ 3 1 .

m - 1 0 0 @
I
1
(1)

The current shown in fiaure 5 has a

THD of 69.5% while the current of
figure 6 has a THD of 39.4%.
Moreover, the third harmonic component
of the current is reduced from .615 A
to .21 A , a reduction of 65.8%.
Figure 8: Theoretical voltage and
111. THEORETICAL ANALYSIS current waveforms for C=O.5 mF, L=l
mH and R = 1 0 0 f2
The analysis of the voltage-doubler
circuit is very similar to the
analysis of the bridge rectifier
circuit. The equivalent circuit of a
bridge rectifier which represents the
input section of a typical power
supply is shown in figure 7.

1 D

md

Figure 7: Equivalent Circuit of

bridge rectifier
The equivalent circuit is analyzed
under both transient and steady-state
conditions. The appendix outlines the
details of the analysis and the
formulas that are generated. Figure 8
shows waveforms of the input current
and the output voltage over the
positive half-cycle for C=0.5 mF, L=l
mH and R=100 ohms.
This analysis can be extended to
the voltage-doubler circuit by
choosing the appropriate capacitance
and initial conditions. First, the
circuit is analyzed as a voltage-
doubler with C=0.5 mF. Near the end
of the first conduction period the
Figure 9 : Theoretical current
waveform of the proposed harmonic
reduction circuit
analysis is switched to the bridge
rectifier by dividing the capacitance
by two (two capacitors in series) and
using double the output voltage as an
initial condition. When the current
reaches zero the analysis is switched
back to the voltage-doubler circuit.
The input current waveform of the new
harmonic reduction circuit is shown in
figure 9 . It resembles the simulation
results of figure 4 closely.

454
 IV. LABORATORY VERIFICATION
A prototype circuit as shown in
figure 1 0 was developed to verify the
operation of the proposed circuit.
+
- coEmyxcRcurr
n not be affected by this because the
PoWERcIm
Figure 1 0 : Laboratory circuit
The control circuit uses a window
comparator that gives an output high
when the input voltage falls between
preset lower and upper limits V, and
V,,. The signals of Vi*, V,, V, and V,
are shown in figure 11. The npn
transistor 42 in the power circuit is
used as a switch during the positive
half-cycle and is controlled by V,. A
pnp transistor (not shown in figure
11) is connected back-to-back to Q2
and performs the switching function
during the negative half-cycle.
In the power circuit the ac supply
voltage was set at 3 0 V instead of 1 2 0
V in order not to exceed the ratings
of the components that were available.
455
Vln
-. - -
L-U
Figure 11: Control circuit voltages
The shape of the input current should
magnitudes of the harmonics would be
off by a constant factor.
addition, to keep the control circuit
In
simple the control voltage v, had
half-wave symmetry i.e. the conduction
periods of the switch were chosen to
be equal. The harmonic components of
the input current would be lower in
magnitude if this simplification was
not made.
Time waveforms were measured in the
laboratory using an HP Signal Analyzer
(HP 3 5 6 1 A ) . Figure 1 2 shows the time
waveform of the input current for the
bridge rectifier circuit and figure 1 3
shows its magnitude spectrum. As can
be seen in figure 1 3 the harmonic
content of the input current is quite
high. Figures 14 and 1 5 show the
corresponding waveforms of the
proposed harmonic reduction circuit.
In figure 15, there is a significant
reduction in the harmonic components
of the input current in particular the
third harmonic current. The THDs of
figures 1 3 and 15 are 7 0 . 1 % and 3 0 . 7 %
respectively.
V. CONCLUSIONS
This paper describes a harmonic
reduction ac-to-dc converter based on
a line-frequency voltage-doubler
circuit with a switch. Simulation and
experimental waveforms of the supply
current are presented. The current
 1
0 I 4 @ a lb 11 14 l@ 1
-W o I 4 6 a io iz 14 11

*on*)
Figure 12: Laboratory waveform of
input current without harmonic Figure 14: Laboratory waveform of input
reduction current with harmonic reduction

J
l t

3 =-
I :::
-0rg
A
Figure 13: Measured magnitude spectrum of
input current waveform without harmonic
reduction

harmonics are reduced substantially by

carefully closing and opening a switch of the switch for maximum harmonic
during half a cycle, thus increasing reduction.
the pulsewidth of the current. The
THD of the input current is reduced VI. APPENDIX
considerably and so is the magnitude
of the third harmonic. Two modes of operation exist for
The advantages of this ac-to-dc the circuit of figure 7. During mode
harmonic reduction converter over the #1, the diode is forward biased and
high-frequency boost converter are its the capacitor charges through the
low cost, high reliability and supply. During mode # 2 , the diode is
simplicity of control. The reverse biased and the capacitor
disadvantage is its inability to discharges through the load. The
eliminate the harmonic currents current and voltage waveforms are
completely. The proposed method of illustrated in figure 8.
harmonic reduction can be applied to To find the supply current i(t) and
loads of a wide power range. In the output voltage v,(t), the circuit
situations where the load is highly of figure 7 is examined under both
variable a controller can be added transient and steady state conditions.
that detects the zero crossings of the During mode #1, using Kirchhoff's
current and can set the firing angles laws yields,

456
 During mode #2, the capacitor
discharges with a time constant R x C
and

(3)

In ( 3 ) the second-order differential

equation is solved for v,(t) and from
( 2 ) the response i(t) is obtained. The The following initial conditions
complete response is the sum of the are applied in order to find the
natural response and the forced constants K,, K, and K,:
response.
During mode #1,
vc(0) = v, at end of mode # 2
i(0) = 0
During mode #2,
Where,
v,(O) = v, at end of mode #1
VII. REFERENCES
[ l l H.O.Aintablian, H.W.Hil1, Jr.,
'Harmonic Currents of Personal
Computers and their Effects on the
Distribution System Neutral Current,'
Proceedings of the IAS Annual
a=-- 1 Meeting, Oct. 93, Toronto, Ontario.
RC
[21 T.S. Key, Jih-Sheng Lai,
"Comparison of Standards and Power
supply Design Options for Limiting
Harmonic Distortion in Power Systems,"
IEEE Trans. on Ind. Appl., VOL. 29,
NO. 4 , PP. 688-695, July/Aug. 93.
[ 3 ] N. Mohan, T.M. Undeland, W.P.
Robbins, 'Power Electronics:
The constants K1 and K, are Converters, Applications and Design,'
determined by applying initial PP. 26-33, J. Wiley & Sons, NY, 1 9 8 9 .
conditions to the complete response.
The forced response of vc(t) is given [ 4 1 M.A.Geisler, "Predicting Power
by : Factor and Other Input Parameters for
Switching Power Supplies,' Proceedings
of APEC , March 90, Dallas, Texas.
[51 P.N. Enjeti, R. Martinez, " A High
Performance Single Phase AC to DC
where, Rectifier with Input Power Factor
Correction,' Proceedings of APEC,
March 93, San Diego, California.

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