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TIDA-00222
MSP430F6779
TPS7A6533-Q1
CSD17571Q2
OPA4314
LM4041B
Product Folder
Product Folder
Product Folder
Product Folder
Product Folder
Featured Applications
5V
Data Centers
Sub-metering
Building automation
Load Management
3.3 V
LDO
TPS7A6533-Q1
CT1 I / F
CT2 I / F
CT3 I / F
CT4 I / F
CT5 I / F
CT6 I / F
CT7 I / F
EMI Filter
SD1
EMI Filter
SD2
EMI Filter
SD3
EMI Filter
SD4
EMI Filter
SD5
EMI Filter
SD6
EMI Filter
SD7
UART Interface
JTAG
Interface
MSP430F
6779
Expansion
Interface
Amplifier
High Gain
Voltage
Sensor
SAR1
OPA4314
Amplifier
Low Gain
Master/Slave Sync
Interface
SAR2
OPA4314
V Reference
LM4041B
Active/Alarm
LEDs
Calibration
LED
Voltage
An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and other
important disclaimers and information.
System Description
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System Description
Millions of dollars a year are invested in power protection systems such as UPSs and generators, but
problems can still occur at the branch circuit level due to improper loading or inadequate monitoring. You
might not be able to see trouble coming until a circuit breaker trips, and that is too late. Systems go down.
Valuable data is lost, and business comes to a standstill. It can take hours to recover.
Branch Circuit Power Monitoring (BCPM) system monitors current and power on individual panel board
branch circuits alerting users before the circuit current approaches the breakers trip point. Current and
power alarm thresholds are programmable to match individual branch circuit breaker ratings. By receiving
early notification of high current conditions, the required preventative maintenance can be performed to
avoid unnecessary load drops making the BCPM a giant step forward in enhancing system reliability.
The BCPM is a current sensing device that monitors multiples on a panel board within a power distribution
unit. Designed for use in multiple-location data centers, the BCPM provides branch circuit amperage and
power information, and initiates alarms. The BCPM enables the data center operator to manage power by
anticipating overloaded circuit breakers.
The branch circuit power monitor system continuously measures the current on all breaker levels and
warns of impending trouble, so that proactive steps can be taken. Armed with these insights, data center
and facility managers can more effectively balance loads, prevent overload conditions, plan for future
capacity needs and, where applicable, allocate energy cost among internal departments. The BCPM
consists of a signal acquisition board with current sensor and potential dividers for voltage measurement,
RS485 for communication and visible and audible alarms.
1.1
Applications
1.2
Sub-Meter
Rising energy costs continue to pressure operators of commercial, industrial, institutional and multi-family
residential facilities to leave no stone unturned in finding ways to reduce operating expenses. Users
have turned to sub-metering to identify when and where energy is used in order to implement energy
conservation measures and programs.
Building owners and facility managers are faced with ever increasing utility costs that eat away at the
bottom line. In order to begin managing these costs, users need to know where the energy is being used
and be able to allocate the costs appropriately. Sub-metering products and systems allow users to see
specifically where and when energy is consumed within the building envelope. Meters are used to monitor
actual usage by department, tenant or common area and report back to computerized systems for billing,
allocation, analysis and management.
1.3
System Description
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1.4
Energy Analysis
The type of energy data needed by todays sophisticated facility manager is well beyond the capability of
the master utility meter at the main service entrance. Master meters provide a broad indication of
consumption and demand, but true load profiling requires specific interval usage data from key loads to
isolate the causes of load peaks as a first step to eliminating them or moving them to off-peak hours when
rates are lower.
As first-level data gathering tools in the facility load profiling process, sub-meters provide high-accuracy
interval data snapshots of energy use and demand from enterprise level all the way down to a specific
circuit or item of equipment. The use of meters and sub-metering systems provide energy information
necessary for:
Load profiling and benchmarking
Measurement and verification
BAS integration
Power quality analysis
Usage aggregation
1.5
Cost Allocation
Metering individual departments, areas or buildings for cost center analysis, budgetary accountability and
allocation allows visibility into energy consumption and usage trends. Armed with this critical information,
managers are able to take advantage of energy savings opportunities that may be as simple as turning off
lights or computers when rooms are not in use. When department budgets include energy consumption,
users will be inclined to take the necessary steps to ease the pressure on their budgets by reducing
overall energy use.
1.6
Tenant Billing
In facilities where there are multiple tenants, monitoring actual consumption is a win-win situation for both
the building manager and the tenants. Managers are able to allocate energy usage costs directly to the
tenants. In addition, all common area usage can be monitored and distributed equitably between tenants.
Both tenant billing and common area allocation allows building managers to recoup energy expenses.
Tenants benefit from sub-metering of actual energy usage in two ways.
First, tenants only pay for what they use. They are not burdened with the overflow cost of large users as
they would be if billed a flat rate per square foot of space rented. The second benefit is that they gain
control over their usage allowing them to conserve energy and benefit financially for their efforts.
Whether metering a commercial or residential tenant, department or common area, cost allocation and
accurate billing practices help reduce costs, recoup energy expenses and promote energy conservation.
1.7
System Description
1.8
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Multi-Family Residential
Rising energy rates are driving multi-family property owners to allocate utility costs back to tenants,
recover revenue and promote resource conservation. Arbitrary square-footage cost allocation and other
ratio billing measures do little to encourage energy conservation. Alternatively, tenants in high-rises,
condos, co-ops and mixed-use buildings have been shown to use up to 25% less energy when submeters hold them accountable for the power they use. Wireless meters and accessories are the perfect
cost-effective solution for tenant metering and common area allocation.
1.9
System Description
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Table 1 provides a brief difference between Branch Current Monitor (BCM) and Branch Circuit Power
Monitor (BCPM) for the current TI designs.
Table 1. Comparison BCM v/s BCPM
BCM
BCPM
Current
Voltage
Power
NA
Yes
Communication
Yes
YEs
Design Features
This TI design demonstrates the Current Measurement, Voltage and Power measurement capabilities
using Sigma-Delta ADC required for BCPM. With this design, customers will be able to measure the
Current, Voltage and Power more accurately compared to many of the current solutions. All of the relevant
design files like the schematics, bill of materials (BOM), layer plots, Altium files, Gerber, MSP430F6779
microcontroller (MCU) software and executable for easy-to-use graphical user interface (GUI) have also
been provided.
Table 2. Design Specification
SL NUMBER FEATURES
DESCRIPTION
90 277 Vac
Input Frequency
50/60Hz
Current Accuracy
< 2%
Voltage Accuracy
< 2%
Power accuracy
Sampling Rate
4096Hz
MCU
MSP430F6779
Power supply
Input: 5 V Vdc
Output: 3.3 Vdc
10
LED Indication
3 LEDs
11
Communication Interface
Block Diagram
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Block Diagram
The measurement module reference design includes the block shown in Figure 1.
3.3 V
5V
LDO
TPS7A6533-Q1
CT1 I / F
CT2 I / F
CT3 I / F
CT4 I / F
CT5 I / F
CT6 I / F
CT7 I / F
EMI Filter
SD1
EMI Filter
SD2
EMI Filter
SD3
EMI Filter
SD4
EMI Filter
SD5
EMI Filter
SD6
EMI Filter
SD7
UART Interface
MSP430F
6779
JTAG
Interface
Expansion
Interface
Amplifier
High Gain
Voltage
Sensor
SAR1
OPA4314
Amplifier
Low Gain
Master/Slave Sync
Interface
SAR2
OPA4314
V Reference
LM4041B
Active/Alarm
LEDs
Calibration
LED
Voltage
3.1
MCU
MCU MSP430F6779 is used in the current design. This MCU has has 7 channels of 24-bit ADC based
on a second-order sigma-delta architecture for current measurement, which has a large dynamic range.
AC input voltage is measured using internal 10-bit SAR ADC. The availability of Software Modules and
integration of 24-bit ADC lead to the selection of the MSP430F6779 MCU.
3.2
Seven current channels are sensed using 24-bit ADC. Distributed current is measured through CT.
Interfacing of CT to the measurement module is through the 2-pin terminal block provided for each current
channel. CT output is in the form of current. Burden resistor is used to convert current to voltage. Voltage
is passed through RF/EMI filter. The RF/EMI filter is used for common mode and differential mode noise
rejection; hence, improved performance.
Block Diagram
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AC input voltage is interfaced through 2-pin terminal block. Resistor divider is used to sense voltage. The
choice of voltage divider resistors selected ensures the mains voltage is divided down to the normal input
range, suitable to ADC. 10 bit SAR ADC is used to sense voltage signal. SAR ADC accepts only unipolar
signal. AC input voltage is level shifted by AVCC/2 and given as input to ADC. The high gain ADC input is
not being measured. This is for future expansion.
3.3
Power Supply
An external DC voltage input has to be applied for the measurement module to operate. The DC input is
connected using a 2-pin screw type connector. An input voltage of 5 V must be applied.
3.4
3.5
LED Indication
Three LEDs are available on the measurement module. These LEDs can be used for different functions
like indicating consumption, alarm or to indicate the measurement module health.
3.6
JTAG Programming
JTAG interface connector has been provided on the measurement module for programming and
debugging of MCU MSP430F6779.
3.7
Expansion Options
Different expansion options are available in the measurement module:
SPI, UART and I2C Interface - for feature enhancements/external communication/connecting multiple
Measurement Modules
GPIO interface connector for future feature enhancements
Circuit Design
4.1
MCU
The MSP430F6779 devices are the latest metering SoC that belongs to the MSP430F67xx family of
devices. This family of devices belongs to the powerful 16-bit MSP430F6xx platform, which brings in many
new features and provides flexibility to support robust metrology solutions. These devices find their
application in energy measurement and have the necessary architecture to support them.
The F6779 has a powerful 25-MHz CPU with MSP430CPUX architecture. The analog front end consists of
up to seven independent 24-bit ADC based on a second-order Sigma Delta architecture that supports
differential inputs. The sigma-delta ADCs (24_B) operate independently and are capable of 24-bit
results. They can be grouped together for simultaneous sampling of 7 currents on the same trigger. In
addition, it also has an integrated gain stage to support gains up to 128 for amplification of low-output
current sensors.
Availability of 24-bit resolution and seven simultaneous channels makes it suitable for the applications like
BCPM.
AC input voltage is measured by internal SAR ADC of MCU. 10-bit SAR ADC is used to sense voltage.
The 24_B on the MSP430F6779 module has a trigger generator that triggers the ADC10 to ensure that
the timing between the ADC10 and modules are grouped and synchronized. MSP430F6779 is used in
this TI design.
Circuit Design
4.2
4.2.1
www.ti.com
I1+
I1+
R42
C31
47pF
J10
1 R61
2 13.0
R52
13.0
C18
0.015F
AGND
ED120/2DS
C32
47pF
1.0k
I1-
I1-
R43
AGND
=
=
=
=
100 Arms
100 Arms
141A
1/2000 Turns
=
=
=
=
=
=
=
So, 13 burden is used in measurement module design. However, burden resistor value may vary
depending on CT ratio and maximum current measurement. Sometimes, it is difficult to find exact value of
burden or it is very costly. To overcome this limitation, design is equipped with two burden resistors.
NOTE: The errors due to DC offset or CT gain is compensated by calibration.
NOTE: Do not make the CT connections with the Current flowing on the primary side of the CT .
Make sure the current source is switched Off before connecting.
Circuit Design
www.ti.com
4.2.2
Voltage Inputs
The voltage divider resistors for the AC input voltage channel is selected to ensure the input to the MCU is
less than the ADC input voltage for the entire range on input voltages; ferrite beads are used for filtering.
10-bit SAR ADC is used to sense the voltage signal. SAR ADC takes only unipolar signal. AC input
voltage is bipolar. DC offset of AVCC / 2 (1.65 V) is provided to the op-amp circuit to level shift the AC
input.
Resistor divider calculation:
Max sensing voltage Vmax
Peak Max sensing voltage Vmax_pk
AVCC
R15
1
2
FBMJ2125HS420-T
42 OHM
ED120/2DS
R28
R27
R25
R20
332k
332k
332k
332k
FB1
NEUTRAL
FBMJ2125HS420-T
42 OHM
AGND
R12
2.4K
100k
13
V_SENSE
R19
100k
12
R11
2.4K
14
V+
D
V-
11
FB3
J7
R7
V1_IN_L
100
OPA4314AIPW
U2D
C5
0.01F
R91
200k
AGND
VREF_PH
AGND
AGND
4.2.3
OPA4314 Op-Amp
The OPA4314 family of single, dual and quad-channel operational amplifiers represents a new generation
of low-power, general-purpose CMOS amplifiers. Rail-to-rail input and output swings, low quiescent
current (150 A typ at 5.0 VSS) combined with a wide bandwidth of 3 MHz, and very low noise (14
nV/Hz at 1 kHz) make this family very attractive for a variety of battery-powered applications that require
a good balance between cost and performance. The low input bias current supports applications with
mega- source impedances.
The robust design of the OPA314 devices provides ease-of-use to the circuit designer: unity-gain stability
with capacitive loads of up to 300 pF, an integrated RF/EMI rejection filter, no phase reversal in overdrive
conditions, and high electrostatic discharge (ESD) protection (4-kV HBM).
Circuit Design
www.ti.com
These devices are optimized for low-voltage operation as low as +1.8 V (0.9 V) and up to +5.5 V (2.75
V), and are specified over the full extended temperature range of 40C to +125C. The quad-channel
OPA4314 used is TSSOP-14 package.
Table 3. OPA4314 Specifications
4.2.4
Characteristics
OPA4314
0.720
Number of Channels
Rail-to-Rail
In/Out
-40 to 125
2.5
14
94/92
10
5.5
1.8
1.5
Pin/Package
14, TSSOP
ESD-Human model- KV
EMI Filter
Internal
Vo (Swing )
VCC-60 mV
Vcm (input )
V-(-0.2 V) , V+ (+0.2 V )
4.2.5
10
Features
Small packages: SOT23, SC70-5
No output capacitor required
Output voltage tolerance
LM4041D: 1% at 25C
Low output noise: 20 Vrms (10Hz to 10kHz)
Wide operating current range: 60 A to 12 mA
Extended temperature range: -40C to +125C
Low temperature coefficient : 100ppm/C (max)
Circuit Design
www.ti.com
R29
100
AVCC
C10 0.1F
TP13
R30
470
AGND
6
B
R26
30k
U4
LM4041BIDBZ
R22
VREF_PH
100
OPA4314AIPW
U2B
11
V+
V-
C12
0.1F
1
AGND
AGND
R31
10.0k
AGND
4.3
Power Supply
An external DC supply should be connected on 2-pin terminal block to power the measurement module.
TPS7A6533-Q1 LDO is used in the design. A maximum of 12 V DC input must be applied. DVCC for the
measurement module is 3.3 V. The power supply is protected for reverse polarity and over voltage. There
is an LED to indicate the power supply healthiness.
U1
TPS7A6533QKVURQ1
1
2
BAS21-7-F
IN
OUT
TP12
+3.3V power
plane
DVCC
FB2
1
GND
12V
D4
J9
1000 OHM
ED120/2DS
C1
1F
C2
0.1F
C7
1F
R16
300
D3
Green
C17
4.7F
C13
0.1F
D5
3.9V
MMSZ5228B-7-F
DGND
DGND
4.4
11
Circuit Design
www.ti.com
J1
1 PM_UCA0TXD
PM_UCA0TXD
2 PM_UCA0RXD
PM_UCA0RXD
3 P2.7
P2.7
4
DVCC
5
HEADER_1X5
DGND
4.5
LED Indication
Three LEDs are available on the measurement module and can be programmed for some of the functions:
Alive LED This indicated that the measurement module functioning is normal
Metrology LED Metrology LED can magnitude of current flowing
Alarm LED - Can be used to indicate any abnormal conditions of current during measurement
NOTE: These features have not been implemented as part of this design.
4.6
JTAG Programming
The MSP430 family supports the standard JTAG interface that requires four signals for sending and
receiving data. The JTAG signals are shared with general-purpose input/output (GPIO). The
TEST/SBWTCK pin is used to enable the JTAG signals. In addition to these signals, the
RST/NMI/SBWTDIO is required to interface with the MSP430 development tools and device programmers.
For further details on interfacing to development tools and device programmers, see the MSP430
Hardware Tools User's Guide (SLAU278). For a complete description of the features of the JTAG interface
and its implementation, see MSP430 Programming Via the JTAG Interface User's Guide (SLAU320).
Connector J8 is the JTAG programming interface connector.
J5
DVCC
R5
DVCC
10k
R8
10k
R17
10k
R13
10k
DVCC
68001-403HLF
J8
R21
47k
TDO
TDI
TMS
TCK
TDO
TDI
TMS
TCK
RESET
2 INT
4 EXT
6
TEST/SBWTCK
8
10
12
14
TEST/SBWTCK
2
1
RESET
1
3
5
7
9
11
13
1
2
3
DGND
N2514-6002-RB
C14
0.1F
4
3
S1
7914G-1-000E
DGND
12
Circuit Design
www.ti.com
4.7
Expansion Options
Different expansion options are available in the measurement module:
SPI, UART and I2C interface:
SPI
SPI can be used for synchronizing multiple measurement modules to configure them for more
number of channels or for three-phase measurement
I2C
There may be a need to calibrate the inputs based on accuracy of the CT. In this case, an
EEPROM can be connected to the I2C interface to store the calibration values. This I2C interface
can be used to interface to the temp sensor, RTC or any other I2C interface-based peripherals.
GPIO
The GPIO inputs can be used as I/O, Timer inputs or PWM outputs. These I/Os can be used when
feature enhancements are required.
J3
SDCLK
1
P5.6
3
P6.0
5
PM_UCA2SIMO7
PM_UCA3RXD 9
P4.3
11
PM_UCB1SDA13
P4.7
15
SDCLK
P5.6
P6.0
PM_UCA2SIMO
PM_UCA3RXD
P4.3
PM_UCB1SDA
P4.7
P5.5
P5.7
PM_UCA2SOMI
PM_UCA2CLK
PM_UCA3TXD
PM_UCB1SCL
P4.6
2
4
6
8
10
12
14
16
P5.5
P5.7
PM_UCA2SOMI
PM_UCA2CLK
PM_UCA3TXD
PM_UCB1SCL
P4.6
67997-416HLF
J4
P1.2
P1.1
P1.0
P2.4
PM_UCB0SCL
PM_UCB0SDA
P3.2
PM_UCA1CLK
PM_UCA1SOMI
PM_UCA1SIMO
1
2
3
4
5
6
7
8
9
10
P1.2
P1.1
P1.0
P2.4
PM_UCB0SCL
PM_UCB0SDA
P3.2
PM_UCA1CLK
PM_UCA1SOMI
PM_UCA1SIMO
HEADER_2X5
P6.1
P6.3
P6.5
P6.7
P7.1
P7.3
P7.5
P7.7
P8.1
P8.3
P8.5
P8.7
1
3
5
7
9
11
13
15
17
19
21
23
2
4
6
8
10
12
14
16
18
20
22
24
P6.2
P6.4
P6.6
P7.0
P7.2
P7.4
P7.6
P8.0
P8.2
P8.4
P8.6
P6.2
P6.4
P6.6
P7.0
P7.2
P7.4
P7.6
P8.0
P8.2
P8.4
P8.6
67997-424HLF
13
Software Description
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Software Description
The software has three projects in this design: one for mathematical routines, another primarily for
metrology (current and voltage calculation), and an application wrapper that deals mainly with applicationprocessor functionality (communication, and so forth). The software is described in the following
subsections. The first subsection describes the setup of various peripherals of the MSP430. Subsequently,
the entire metrology software is described as two major processes: the foreground process and
background process.
5.1
24 Initialization
The F677x family has seven independent sigma delta data converters. The clock to the 24 (fM) is
derived from system clock, which is configured to run at 25 MHz. The sampling frequency is defined as fs
= fM/OSR, the OSR is chosen to be 256 and the modulation frequency fM, is chosen as 1.048576 MHz,
resulting in a sampling frequency of 4.096 ksps. The 24s are configured to generate regular interrupts
every sampling instance.
The following are the channels associations:
A0.0+ and A0.0- Current I1
A1.0+ and A1.0- Current I2
A2.0+ and A2.0- Current I3
A3.0+ and A3.0- Current I4
A4.0+ and A4.0- Current I5
A4.0+ and A4.0- Current I5
A6.0+ and A6.0- Current I7
5.2
ADC10 Setup
The ADC10 is used to sample the Mains voltage and is triggered by the s trigger generator. When
triggered by the , the ADC10 enters autoscan mode and samples all of its 16 ADC channels once. In
the software, the clock to the ADC10 is set to 4 MHz. The sample and hold time for each converter is 8
cycles and the conversion time is 12 cycles, which results in a total of 20 cycles (5 s) delay between
conversion results of adjacent converters. In addition, the ADC10_A uses AVCC as the reference voltage
and is configured to output 10-bit results that are scaled to 16-bit twos complement numbers
(ADC10DF=1). This allows the ADC results from the ADC10 to be treated as a 16-bit signed number when
performing mathematical operations.
The following is the relevant ADC10 channel associations:
A4 Voltage
14
Software Description
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5.3
Foreground Process
The foreground process includes the initial setup of the MSP430 hardware and software immediately after
a device RESET. Figure 9 shows the flowchart for this process.
RESET
HW setup:
Clock, SD24_B, Port pins, RTC_C, eUSCI
N
N
YY
&DOFXODWHFKDQQHOVPHWURORJ\UHDGLQJV
15
Software Description
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Computation Formulas
This section briefly describes the formulas used for the voltage, current, energy, and temperature
calculations.
5.3.1.1
As described in the previous sections, voltage and current samples are obtained from the converters at
a sampling rate of 4096 Hz. All of the samples that are taken in 1 second are kept and used to obtain the
RMS values for voltage and current for each channel. The RMS values are obtained in Equation 1.
Sample
Sample
count
vch (n)* vch (n)
n =1
VRMS,ch = Kv,ch *
- voffset , ch
Sample count
count
ich (n)* ich (n)
n =1
IRMS,ch = Ki,ch *
- ioffset , ch
Sample count
(1)
Where,
Ch = Current channel whose parameters are being calculated [that is, Channel A(=1), Channel B(=2),
Channel C(=3), Channel D(=4), Channel E(=5), Channel F(=6), or Channel G(=7)]
Vch(n) = Voltage sample at a sample instant n
Voffset, ch = Offset used to subtract effects of the additive white Gaussian noise from the voltage
converter
Sample count = Number of samples in one second
Ki,ch = Scaling factor for each current
5.3.1.2
Power and energy are calculated for one frame's worth of active and reactive energy samples. These
samples are phase corrected and passed on to the foreground process, which uses the number of
samples (sample count) to calculate channel active and reactive powers by the formulas in Equation 2.
Sample
Sample
count
count
v(n) ich (n)
v90 (n) ich (n)
n =1
n =1
PACT,ch = K ACT,ch
PREACT,ch = KREACT,ch
Sample count
Sample count
(2)
Where,
v90,ch (n) = Voltage sample at a sample instant n shifted by 90
KACT,ch = Scaling factor for active power
KREACT,ch = Scaling factor for reactive power
For reactive power, the 90 phase shift approach is used for two reasons:
It allows accurate measurement of the reactive power for very small currents.
It conforms to the international specified measurement method.
The calculated mains frequency is used to calculate the 90 degrees-shifted voltage sample. Because the
frequency of the mains varies, it is important to first measure the mains frequency accurately to phase
shift the voltage samples accordingly (see Section 5.4.2).
To get an exact 90 phase shift, interpolation is used between two samples. For these two samples, a
voltage sample slightly more than 90 before the current sample and a voltage sample slightly less than
90 before the current sample are used. The application's phase shift implementation consists of an
integer part and a fractional part. The integer part is realized by providing an N samples delay. The
fractional part is realized by a one-tap FIR filter. In the software, a lookup table provides the filter
coefficients that are used to create the fractional delays.
16
Software Description
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After calculating the active and reactive power, each phase's apparent power is calculated in Equation 3.
(3)
The calculated powers for each phase are then converted to energy by Equation 4.
E ACT, ch = PACT, ch Samplecount
(4)
The calculated energies are then accumulated into buffers that store the total amount of energy consumed
since meter reset. There are seven sets of buffers that are available: one for each channel. Within each
set of buffers, the following energies are accumulated:
Active import energy (active energy when active energy >= 0)
Active export energy (active energy when active energy < 0)
Reactive Quad I energy (reactive energy when reactive energy >=0 and active power >=0; inductive
load)
Reactive Quad II energy (reactive energy when reactive energy >=0 and active power <0; capacitive
generator)
Reactive Quad III energy (reactive energy when reactive energy <0 and active power <0; inductive
generator)
Reactive Quad IV energy (reactive energy when reactive energy <0 and active power >=0; capacitive
load)
Approximate import energy (apparent energy when active energy >=0)
Approximate export energy (apparent energy when active energy <0)
5.3.1.3
Frequency (Hz)
The background process calculates the frequency in terms of samples per mains cycle. The foreground
process then converts this to Hertz by Equation 5.
Sampling Rate (samples / second)
Frequency (Hz ) =
Frequency (samples / cycle)
(5)
5.3.1.4
Power Factor
After the active power and apparent power have been calculated, the absolute value of the power factor is
calculated. In the meter's internal representation of power factor, a positive power factor corresponds to a
capacitive load and generator and a negative power factor corresponds to an inductive load and
generator. The sign of the internal representation of power factor is determined based on the sign of the
active and reactive power. Therefore, the internal representation of power factor is calculated in
Equation 6.
| PAct |
, if capacitive load / generator
P
Apparent
Internal Representation of Power Factor =
- | PAct | ,if inducitive load / generator
PApparent
(6)
5.4
Background Process
The background function deals mainly with timing critical events in software. It uses the interrupt as a
trigger to collect voltage and current samples. The interrupt is generated when the trigger generator of
the triggers the ADC10. Once the trigger to the ADC is generated, sample processing is done on the
previously obtained voltage and current samples. This sample processing is done by the
per_sample_dsp() function. The flowchart for the per_sample_dsp() function is shown in Figure 10.
17
Software Description
www.ti.com
The per_sample_dsp() function is used to calculate intermediate dot product results that are fed into the
foreground process for the calculation of metrology readings. The ADC10 is configured to represent the
10-bit voltage results as a 16-bit signed result. Because 16-bit voltage samples are used, the voltage
samples are further processed and accumulated in dedicated 48-bit registers. In contrast, since 24-bit
current samples are used, the current samples are processed and accumulated in dedicated 64-bit
registers. Per-channel active power and reactive power are also accumulated in 64-bit registers.
After sufficient samples (approximately one second's worth) have been accumulated, then the foreground
function is triggered to calculate the final values of VRMS, IRMS, active, reactive, and apparent powers,
active, reactive, and apparent energy, and power factor. In the software, there are two sets of dot products
at any given time: one is used by the foreground for calculation and the other used as the working set by
the background. After the background process has sufficient samples, it swaps the two dot products so
that the foreground uses the newly acquired dot products that the background process just calculated and
the background process uses a new empty set to calculate the next set of dot products.
Whenever there is a leading-edge zero-crossing (- to + voltage transition) on a voltage channel, the
per_sample_dsp() function is also responsible for updating the corresponding phases frequency (in
samples/cycle) and voltage sag or swell conditions. For the sag conditions, whenever the RMS voltage is
below a certain user-defined threshold percentage, the number of Mains cycles where this condition
persists is logged as the sag duration. The number of periods in time where there was a sag condition is
logged as the sag events count. Note that the sag duration corresponds to the total number of cycles in a
sag condition since reset, and is not cleared for every sag event. Also, when the RMS voltage is above a
certain threshold percentage, swell events and duration are logged in a similar way.
18
Software Description
www.ti.com
N
N
First Current?
YY
5HPRYHUHVLGXDO'&IRUSKDVHVYROWDJHWKHQXSGDWH
SKDVHV9RMS dot product
5HPRYHUHVLGXDO'&IRUFKDQQHOVFXUUHQWWKHQ
XSGDWHWKHFKDQQHOVGRWSURGXFWIRU,506, active
power, and reactive power
N
N
Leading-edge zero-crossing
on voltage channel?
YY
Voltage Sag/Swell Detection
N
N
All channels done?
YY
N
N
1 second of energy calculated
for any of the channels?
YY
Swap dot products between foreground and
bacground then notify foreground process
Return
19
Software Description
5.4.1
www.ti.com
5.4.2
good samples
linear interpolation
Phase Compensation
When a current transformer (CT) is used as a sensor, it introduces additional phase shift on the current
signals. Also, the voltage and current input circuit's passive components may introduce additional phase
shift. Another source of phase shift is the sequential sampling on the voltage channel. The relative phase
shift between voltage and current samples must be compensated to ensure accurate measurements. The
converters have programmable delay registers (24PREx) that can be applied to any current. This
built-in feature (PRELOAD) is used to provide the phase compensation required.
20
Software Description
www.ti.com
The fractional delay resolution of the preload register is a function of input frequency (fIN), OSR, and the
sampling frequency (fS).
360 fIN 360 fIN
Delay resolutionDeg =
=
OSR fS
fM
(7)
In this application, for input frequency of 60 Hz, OSR of 256, and sampling frequency of 4096, the
resolution for every bit in the preload register is approximately 0.02 with a maximum of 5.25 (maximum
of 255 steps). When using CTs that provide a larger phase shift than this maximum, sample delays along
with fractional delay must be provided. This phase compensation can also be modified while the
application is running to accommodate temperature drifts in CTs, but conversions on the must be
stopped while changes are made to the phase compensation.
5.5
5.6
Future Enhancements
Sufficient processing and memory is available to implement the following:
Alarms for voltages
Alarms for currents
Alarms for power
Average voltages and currents
Frequency
Demand computation
Modbus protocol for communication
21
Test Data
www.ti.com
Test Data
A GUI is provided with this TI Design for calibration and result display. To run the GUI, the eUSCIA0
UART TX/RX pins must be connected to an isolated UART to RS-232 adapter, such as the one below:
http://www.ti.com/tool/TIDA-00163
6.1
Viewing Results
To run the GUI:
1. Connect the measurement module to a PC via an RS-232 cable and the isolated UART to RS-232
adapter.
2. Open the /Source/GUI folder and open calibration-config.xml in a text editor.
3. Change the "Port Name" field within the "meter" tag to the COM port connected to the meter. In step 4,
this field is changed to COM7.
</correction>
</phase>
<temperature/>
<rtc/>
</cal-defaults>
<meter position="1">
<port name="com7" speed="9600"/>
</meter>
<reference-meter>
<port name="USB0::0x0A69::0x0835::A66200101281::INSTR"/>
<type id="chroma-6602"/>
<log requests= "on" responses="on"/>
<scaling voltage="1.0" current="1.0"/>
</reference-meter>
4. Run calibrator.exe in the GUI folder. If the COM port in calibration-config.xml was changed in the
previous step to the com port connected to the measurement module, the GUI will open.
If the GUI connects properly to the measurement module, the top left button is green. If there are
problems with connections or if the code is not configured correctly, the button is red.
5. Click on the green button to open the results window (see Figure 12).
22
Test Data
www.ti.com
6. From the results window, the total-energy consumption readings and sag/swell logs could be viewed
by pressing the Meter Consumption button. Once this is pressed, the meter events and consumption
window pops up as shown in Figure 14.
23
Test Data
www.ti.com
7. The configuration of the meter can also be viewed by clicking Meter features to open the screen
shown in Figure 15.
6.2
Calibration
Calibration is key to any meter's performance, and it is absolutely necessary for every meter to go through
this process. Initially, every meter exhibits different accuracies due to silicon-to-silicon differences, sensor
accuracies, and other passive tolerances. To nullify the effects of these differences, every meter must be
calibrated. For calibration to be performed accurately, an accurate AC test source and a reference meter
must be available. The source should be able to generate any desired voltage, current, and phase shift
(between V and I). To calculate errors in measurement, the reference meter acts as an interface between
the source and the meter that is being calibrated. This section describes a simple and effective method of
calibration of this measurement module.
The GUI that is used for viewing results can also be used to calibrate the measurement module. During
calibration, parameters called calibration factors are modified in software to give least error in
measurement. For this meter, there are four main calibration factors for each channel: current scaling
factor, current AC offset, power scaling factor, and the phase compensation factor. In addition, there is
also the voltage scaling factor and voltage AC offset for the voltage converter. The voltage, current, and
power scaling factors translate measured quantities in metrology software to real-world values represented
in volts, amps, and watts, respectively. The voltage AC offset and current AC offset are used to eliminate
the effect of additive white Gaussian noise associated with each channel. This noise is orthogonal to
everything except itself. As a result, it is present only when calculating RMS voltages and currents. The
last calibration factor is the phase compensation factor, which is used to compensate any phase shifts
introduced by the current sensors and other passives.
When the meter software is flashed with the code (available in the zip file, which is provided with the
installer in the software design files), default calibration factors are loaded into these calibration factors.
These values will be modified via the GUI during calibration. The calibration factors are stored in
INFO_MEM, and therefore, would remain the same if the meter is restarted. The calibration factors can be
viewed by pressing the "Meter calibration factors" button shown in Figure 16. The meter calibration factors
window displays the latest values and this could be used to directly replace the macro definition of these
factors in the source code. For phase correction, a conversion must be made from microseconds to
register units since the softwares phase correction parameters are in units of modulation clock cycles
instead of microseconds. To convert the value displayed by the GUI into a value that can be used by the
associated macro in emeter-template, multiply the Phase correction variable on the GUI by 8.338608,
round the resulting number to the nearest integer, and then right-shift by 3.
24
Test Data
www.ti.com
6.2.1
valueobserved
Correction (% ) =
- 1 * 100
valuedesired
(8)
Where, valueobserved is the value measured by the TI meter, and valuedesired is the calibration point
configured in the AC test source.
5. After calculating Correction(%) for all currents, input these values as is () for the field RMS for the
corresponding channels.
6. After calculating Correction(%) for the voltage, input these values as is () for the field RMS for
voltage.
TIDU430 September 2014
Submit Documentation Feedback
25
Test Data
www.ti.com
7. After calculating Correction(%) for all active powers, input these values as is () for the field Active
Power for the corresponding channels.
8. Click Update meter and the observed values for the currents on the GUI settle to the desired currents.
6.2.2
Phase Compensation
Note that this example is for a given channel. Repeat these steps for other channels.
After performing power gain correction, phase calibration must be performed. Use the following steps to
perform phase correction calibration:
1. If the AC test source has been turned OFF or reconfigured, perform steps 1- 3 from the gain calibration
section using the identical voltages and currents used in that section.
2. Modify only the phase-shift of the calibrated phase to a non-zero value; typically, +60 is chosen. The
reference meter will now display a different % error for active power measurement. Note that this value
may be negative.
3. Using the % error readings provided by your reference meter (denoted as %error), the phase shift
supplied by your source meter (denoted as desired), and the line frequency fed into the meter (denoted
as fMains), calculate the correction factor (in units of microseconds) by using Equation 9. For Equation 9,
note that desired and error must be in units of degrees while fMains must be in units of Hertz.
%
100
-f
106
correction = error
fMains 360
(9)
4. Enter the calculated correction into the Phase Correction field for the phase that is being calibrated.
5. Click Update meter.
6. If this error is not close to zero, or is unacceptable, fine-tune the phase correction by following these
steps:
(a) Enter a small value as an update for the Phase Correction field for the channel that is being
calibrated. Usually, a small positive or negative integer should be entered to bring the error close to
zero. Additionally, for a phase shift greater than 0 (for example, +60), a positive (negative) error
would require a positive (negative) number as correction.
(b) Click Update meter and monitor the error values on the reference meter.
(c) If this measurement error (%) is not accurate enough, fine tune by incrementing or decrementing by
a value of 1 based on Step 6a and 6b.
NOTE: When the error is very close to zero, changing the fine-tuning value by 1 can result in the
error oscillating on either side of zero. Select the value that has the smallest absolute
error.
(d) Change the phase to -60 and check if this error is still acceptable. Ideally, errors should be
symmetric for same phase shift on lag and lead conditions.
After performing phase correction, calibration is complete for one channel.
26
Test Results
www.ti.com
Test Results
7.1
7.2
EXPECTED ERROR
READING OBSERVED
ERROR
0.5
1%
0.499963
-0.01%
1%
1.00008
0.01%
2.5
1%
2.49995
0.00%
1%
4.99943
-0.01%
10
1%
10.0022
0.02%
15
1%
15.0084
0.06%
25
1%
25.004
0.02%
37.5
1%
37.5029
0.01%
50
1%
50.0011
0.00%
62.5
1%
62.5045
0.01%
75
1%
75.0189
0.03%
95
1%
95.0579
0.06%
EXPECTED ERROR
READING OBSERVED
ERROR
0.5
1%
0.500044
0.01%
1%
1.0002
0.02%
2.5
1%
2.50036
0.01%
1%
5.00036
0.01%
10
1%
10.0032
0.03%
15
1%
15.0105
0.07%
25
1%
25.0072
0.03%
37.5
1%
37.5039
0.01%
50
1%
50.0063
0.01%
62.5
1%
62.51
0.02%
75
1%
75.0105
0.01%
95
1%
95.0406
0.04%
27
Test Results
7.3
www.ti.com
7.4
EXPECTED ERROR
READING OBSERVED
ERROR
0.5
1%
0.500011
0.00%
1%
1.00005
0.01%
2.5
1%
2.49968
-0.01%
0.00%
1%
4.99986
10
1%
10.0008
0.01%
15
1%
14.9981
-0.01%
25
1%
24.9939
-0.02%
37.5
1%
37.4922
-0.02%
50
1%
49.9927
-0.01%
62.5
1%
62.4936
-0.01%
75
1%
74.9941
-0.01%
95
1%
94.9936
-0.01%
100
1%
100.018
0.02%
28
EXPECTED ERROR
READING OBSERVED
ERROR
0.5
1%
0.500023
0.00%
1%
1.0001
0.01%
2.5
1%
2.49985
-0.01%
1%
5.0004
0.01%
10
1%
10.0013
0.01%
15
1%
15.0006
0.00%
25
1%
24.9957
-0.02%
37.5
1%
37.5009
0.00%
50
1%
50.0009
0.00%
62.5
1%
62.4976
0.00%
75
1%
75.0042
0.01%
95
1%
95.0056
0.01%
100
1%
100.038
0.04%
Test Results
www.ti.com
7.5
7.6
EXPECTED ERROR
READING OBSERVED
ERROR
0.5
1
1%
0.49991
-0.02%
1%
0.999975
0.00%
2.5
1%
2.49944
-0.02%
-0.02%
1%
4.99901
10
1%
10
0.00%
15
1%
14.9973
-0.02%
25
1%
24.9922
-0.03%
37.5
1%
37.491
-0.02%
50
1%
49.9864
-0.03%
62.5
1%
62.4894
-0.02%
75
1%
74.996
-0.01%
95
1%
94.9922
-0.01%
100
1%
100.016
0.02%
EXPECTED ERROR
READING OBSERVED
ERROR
0.5
1%
0.499903
-0.02%
1%
0.999998
0.00%
2.5
1%
2.5003
0.01%
1%
5.00028
0.01%
10
1%
10.002
0.02%
15
1%
15.0074
0.05%
25
1%
25.0033
0.01%
37.5
1%
37.5
0.00%
50
1%
49.9962
-0.01%
62.5
1%
62.4972
0.00%
75
1%
74.9962
-0.01%
95
1%
95.0319
0.03%
29
Test Results
7.7
www.ti.com
7.8
EXPECTED ERROR
READING OBSERVED
ERROR
0.5
1%
0.499952
-0.01%
1%
1.00004
0.00%
2.5
1%
2.50037
0.01%
1%
5.00008
0.00%
10
1%
10.0013
0.01%
15
1%
15.0077
0.05%
25
1%
25.0026
0.01%
37.5
1%
37.4978
-0.01%
50
1%
49.9955
-0.01%
62.5
1%
62.4961
-0.01%
75
1%
74.9928
-0.01%
95
1%
95.0165
0.02%
0.08
Channel 5
Channel 6
Channel 7
Error (%)
0.06
0.04
0.02
-0.02
-0.04
0
20
40
60
Input Current (A)
80
100
D001
30
Test Results
www.ti.com
7.9
MEASURED VOLTAGE
ERROR
92
92.029
0.03%
138
138.059
0.04%
184
184.007
0.00%
230
229.986
-0.01%
APPLIED
CURRENT
UPF
0.5Lag
0.8Lead
0.5Lag
0.8Lead
0.25%
0.06%
0.16%
0.04%
-0.07%
0.10%
0.50%
0.01%
0.12%
0.00%
-0.05%
0.04%
1.00%
0.03%
0.14%
-0.01%
-0.05%
0.10%
2.50%
-0.01%
0.07%
0.00%
-0.03%
0.02%
5.00%
-0.03%
0.03%
-0.05%
-0.07%
0.02%
10.00%
0.00%
0.11%
-0.04%
-0.04%
0.09%
15.00%
0.04%
0.08%
0.02%
-0.05%
0.05%
25.00%
0.01%
0.04%
0.02%
-0.04%
0.01%
37.50%
0.01%
0.00%
0.00%
-0.02%
-0.05%
50.00%
0.00%
0.00%
0.00%
-0.01%
-0.04%
62.50%
-0.01%
-0.03%
0.00%
-0.02%
-0.03%
75.00%
0.00%
0.01%
0.01%
-0.03%
0.01%
95.00%
0.02%
0.02%
0.04%
0.00%
0.02%
0.2
UPF
Active 0.5 Lag
Active 0.8 Lead
Reactive 0.5 Lag
Reactive 0.8 Lead
0.15
Error (%)
0.1
0.05
-0.05
-0.1
0
10
20
30
40
50
Applied Current (A)
60
70
80
90
100
D003
31
Test Results
www.ti.com
APPLIED
CURRENT
UPF
0.5Lag
0.8Lead
0.5Lag
0.8Lead
0.25%
0.05%
0.14%
0.02%
-0.06%
0.10%
0.50%
0.02%
0.12%
-0.02%
-0.07%
0.03%
1.00%
0.04%
0.17%
-0.01%
-0.06%
0.10%
2.50%
-0.01%
0.09%
0.01%
-0.05%
0.01%
5.00%
-0.02%
0.05%
-0.05%
-0.09%
0.01%
10.00%
0.01%
0.12%
-0.03%
-0.06%
0.08%
15.00%
0.04%
0.09%
0.03%
-0.06%
0.05%
25.00%
0.02%
0.05%
0.03%
-0.05%
-0.01%
37.50%
0.01%
-0.01%
0.01%
-0.03%
-0.08%
50.00%
0.00%
-0.01%
0.00%
-0.04%
-0.06%
62.50%
-0.01%
-0.03%
0.00%
-0.05%
-0.06%
75.00%
-0.01%
-0.01%
0.00%
-0.07%
-0.03%
95.00%
0.00%
-0.01%
0.02%
-0.04%
-0.03%
0.2
UPF
Active 0.5 Lag
Active 0.8 Lead
Reactive 0.5 Lag
Reactive 0.8 Lead
0.15
Error (%)
0.1
0.05
-0.05
-0.1
-0.15
0
10
20
30
40
50
Applied Current (A)
60
70
80
90
100
D004
32
Test Results
www.ti.com
APPLIED
CURRENT
UPF
0.5Lag
0.8Lead
0.5Lag
0.8Lead
0.25%
0.05%
0.21%
-0.01%
-0.05%
0.10%
0.50%
0.03%
0.16%
-0.03%
-0.06%
0.10%
1.00%
0.01%
0.16%
-0.04%
-0.06%
0.15%
2.50%
0.01%
0.12%
-0.06%
-0.09%
0.11%
5.00%
0.00%
0.13%
-0.03%
-0.05%
0.08%
10.00%
0.02%
0.13%
-0.03%
-0.03%
0.09%
15.00%
0.02%
0.02%
-0.03%
0.00%
0.05%
25.00%
-0.01%
0.04%
-0.03%
-0.05%
0.09%
37.50%
0.00%
0.03%
-0.02%
-0.06%
0.05%
50.00%
0.01%
0.04%
0.02%
-0.06%
0.01%
62.50%
0.01%
-0.01%
0.03%
-0.01%
-0.01%
75.00%
0.02%
0.00%
0.01%
0.01%
-0.01%
95.00%
0.01%
-0.03%
0.02%
0.00%
-0.03%
0.21
UPF
Active 0.5 Lag
Active 0.8 Lead
Reactive 0.5 Lag
Reactive 0.8 Lead
0.18
0.15
0.12
Error (%)
0.09
0.06
0.03
0
-0.03
-0.06
-0.09
-0.12
0
10
20
30
40
50
Applied Current (A)
60
70
80
90
100
D005
33
Test Results
www.ti.com
APPLIED
CURRENT
UPF
0.5Lag
0.8Lead
0.5Lag
0.8Lead
0.25%
0.05%
0.23%
0.02%
-0.06%
0.08%
0.50%
0.03%
0.17%
-0.04%
-0.06%
0.08%
1.00%
0.01%
0.16%
-0.03%
-0.07%
0.12%
2.50%
0.00%
0.10%
-0.05%
-0.10%
0.09%
5.00%
0.00%
0.13%
-0.04%
-0.07%
0.05%
10.00%
0.03%
0.14%
-0.02%
-0.04%
0.07%
15.00%
0.01%
0.03%
-0.03%
-0.01%
0.03%
25.00%
-0.01%
0.03%
-0.03%
-0.07%
0.06%
37.50%
-0.01%
0.01%
-0.02%
-0.06%
0.02%
50.00%
0.01%
0.04%
0.02%
-0.05%
-0.01%
62.50%
0.01%
-0.01%
0.03%
-0.02%
-0.03%
75.00%
0.02%
0.02%
0.02%
-0.01%
-0.02%
95.00%
0.01%
-0.02%
0.03%
-0.01%
-0.03%
0.25
UPF
Active 0.5 Lag
Active 0.8 Lead
Reactive 0.5 Lag
Reactive 0.8 Lead
0.2
0.15
Error (%)
0.1
0.05
0
-0.05
-0.1
-0.15
0
10
20
30
40
50
Applied Current (A)
60
70
80
90
100
D006
34
Test Results
www.ti.com
APPLIED
CURRENT
UPF
0.5Lag
0.8Lead
0.5Lag
0.8Lead
0.25%
0.01%
0.14%
0.02%
-0.04%
0.08%
0.50%
0.03%
0.14%
-0.03%
-0.05%
0.08%
1.00%
0.01%
0.16%
-0.03%
-0.05%
0.10%
2.50%
0.00%
0.07%
-0.03%
-0.08%
0.07%
5.00%
0.00%
0.10%
-0.02%
-0.04%
0.04%
10.00%
0.03%
0.11%
-0.01%
-0.03%
0.07%
15.00%
0.01%
0.02%
-0.03%
0.01%
0.03%
25.00%
-0.01%
0.03%
0.00%
-0.04%
0.07%
37.50%
0.00%
0.00%
-0.01%
-0.03%
0.04%
50.00%
0.01%
0.02%
0.03%
-0.02%
-0.01%
62.50%
0.01%
-0.02%
0.04%
0.00%
-0.03%
75.00%
0.03%
-0.01%
0.01%
0.01%
-0.03%
95.00%
0.00%
-0.05%
0.03%
0.00%
-0.04%
0.2
UPF
Active 0.5 Lag
Active 0.8 Lead
Reactive 0.5 Lag
Reactive 0.8 Lead
0.15
Error (%)
0.1
0.05
-0.05
-0.1
0
10
20
30
40
50
Applied Current (A)
60
70
80
90
100
D007
35
Test Results
www.ti.com
APPLIED
CURRENT
UPF
0.5Lag
0.8Lead
0.5Lag
0.8Lead
0.25%
0.00%
0.05%
0.04%
-0.11%
0.04%
0.50%
0.01%
0.04%
0.01%
-0.09%
-0.01%
1.00%
0.01%
0.05%
0.02%
-0.07%
0.01%
2.50%
0.02%
-0.01%
0.05%
-0.05%
-0.08%
-0.06%
5.00%
0.01%
-0.04%
0.00%
-0.04%
10.00%
0.01%
0.01%
0.01%
-0.04%
0.01%
15.00%
-0.01%
-0.14%
0.03%
0.00%
-0.10%
25.00%
0.02%
0.15%
0.04%
-0.14%
-0.08%
37.50%
0.02%
-0.08%
0.07%
0.01%
-0.12%
50.00%
0.02%
-0.11%
0.07%
0.00%
-0.13%
62.50%
0.01%
-0.11%
0.06%
0.00%
-0.12%
75.00%
0.00%
-0.14%
0.08%
0.00%
-0.12%
0.2
UPF
Active 0.5 Lag
Active 0.8 Lead
Reactive 0.5 Lag
Reactive 0.8 Lead
0.15
0.1
Error (%)
0.05
0
-0.05
-0.1
-0.15
-0.2
0
10
20
30
40
50
Applied Current (A)
60
70
80
90
100
D008
36
Test Results
www.ti.com
APPLIED
CURRENT
UPF
0.5Lag
0.8Lead
0.5Lag
0.8Lead
0.25%
-0.03%
0.06%
-0.04%
0.00%
-0.06%
0.50%
-0.02%
0.08%
-0.05%
-0.06%
-0.02%
1.00%
-0.01%
0.12%
-0.05%
-0.06%
0.05%
2.50%
0.00%
0.07%
-0.01%
-0.07%
-0.02%
0.00%
5.00%
-0.01%
0.04%
-0.05%
-0.04%
10.00%
-0.01%
0.08%
-0.04%
-0.06%
0.06%
15.00%
-0.02%
-0.08%
-0.02%
-0.03%
-0.04%
25.00%
0.02%
0.17%
-0.01%
-0.13%
-0.03%
37.50%
0.00%
-0.01%
0.03%
-0.01%
-0.07%
50.00%
0.00%
-0.07%
0.02%
-0.01%
-0.06%
62.50%
0.00%
-0.06%
0.02%
-0.02%
-0.08%
75.00%
0.00%
-0.10%
0.04%
-0.01%
-0.06%
0.2
UPF
Active 0.5 Lag
Active 0.8 Lead
Reactive 0.5 Lag
Reactive 0.8 Lead
0.15
Error (%)
0.1
0.05
-0.05
-0.1
-0.15
0
10
20
30
40
50
Applied Current (A)
60
70
80
90
100
D009
37
Design Files
www.ti.com
Design Files
8.1
Schematics
The schematics are presented in the following order:
1.0k
I1+
I1+
R42
C31
47pF
J10
1 R61
2 13.0
J14
1
2
R86
R85
R79
R73
R74
R35
1.0k
ED120/2DS
R49
13.0
R82
0
I5+
AGND
1.0k
I5+
R36
C26
47pF
I5-
1.0k
I5-
R87
R80
0
R75
0
R76
1
2
R37
I6+
1.0k
0
R59
R50
13.0
I2+
I6+
R54
C33
47pF
R53
13.0
AGND
AGND
R38
C34
47pF
1.0k
I2-
I2-
R45
C23
0.015F
13.0
NEUTRAL1
C19
0.015F
13.0
ED120/2DS
C27
47pF
ED120/2DS
R84
I2+
R44
J11
R88
I1-
AGND
AGND
1
2
I1-
R43
1.0k
J15
C32
47pF
C22
0.015F
13.0
NEUTRAL1
C18
0.015F
AGND
C25
47pF
R58
R52
13.0
ED120/2DS
AGND
C28
47pF
I6-
1.0k
I6-
1.0k
AGND
I3+
I3+
R46
J16
1
2
R90
R89
R81
R77
R78
R39
1.0k
J12
I7+
R83
R60
13.0
13.0
R51
13.0
R55
13.0
R40
C20
0.015F
AGND
ED120/2DS
C36
47pF
1.0k
C24
0.015F
AGND
NEUTRAL1
1
R56
2
I7+
C29
47pF
ED120/2DS
C35
47pF
I3-
I3-
R47
C30
47pF
AGND
I7-
1.0k
I7-
AGND
1.0k
NEUTRAL
I4+
C37
47pF
J13
1 R57
2
NEUTRAL
I4+
R33
R41
R48
13.0
C21
0.015F
13.0
NEUTRAL1
AGND
ED120/2DS
1.0k
C38
47pF
I4-
I4-
R34
AGND
38
Design Files
www.ti.com
TP3
C8
AVCC
100pF
390k
R9
R29
100
AVCC
AVCC
C10 0.1F
U4
LM4041BIDBZ
R18
100k
100k
100
AGND
OPA4314AIPW
U2B
R6
V+
V-
V1_IN_H
100
U2A
OPA4314AIPW
VREF_PH
V1_IN_H
C6
0.01F
R92
390k
C12
0.1F
AGND
AGND
VREF_PH
1
AGND
AGND
HEADER_2X2
V+
V-
11
R26
30k
R22
11
5
1
2
3
4
V_SENSE
AGND
J6
R14
TP13
R30
470
12V
R31
10.0k
DGND
C16
100pF
TP6
AGND
R32
C9
1.00Meg
AVCC
100pF
R10
200k
FB3
R28
R27
R25
R20
332k
332k
332k
332k
FB1
IN OUT
BAS21-7-F
OPA4314AIPW
U2C
V_ZCD
100
C5
0.01F
OPA4314AIPW
U2D
AGND
AGND
TP12
+3.3V power
plane
DVCC
FB2
1000 OHM
ED120/2DS
V_ZCD
V+
C
V-
10
10k
V1_IN_L
AGND
U1
TPS7A6533QKVURQ1
12V
1
2
12
VREF_PH
AGND
D4
J9
V_SENSE
R19
100k
R11
2.4K
R24
R91
200k
FBMJ2125HS420-T
42 OHM
NEUTRAL
AGND
R12
2.4K
R7
14
V+
D
V-
10k
V1_IN_L
C1
1F
DGND
C2
0.1F
R16
300
C7
1F
D3
Green
C17
4.7F
D5
C13
0.1F
3.9V
MMSZ5228B-7-F
FBMJ2125HS420-T
42 OHM
13
11
1
2
ED120/2DS
GND
J7
100k
V1_IN_L
11
R15
R23
VREF_PH
AVCC
DGND
R1
2.2k
J5
TDO
TDI
TMS
TCK
TDO
TDI
TMS
TCK
RESET
Q2
CSD17571Q2
30V
TEST/SBWTCK
R4
DGND
Active_LED
300
Active_LED
C4
0.1F
2
1
RESET
2 INT
4 EXT
6
TEST/SBWTCK
8
10
12
14
1
3
5
7
9
11
13
8
6
1
2
5
68001-403HLF
J8
R21
47k
D2
TLHR6405
RED
1
2
3
DVCC
7
4
10k
R8
10k
DVCC
R5
R17
10k
R13
10k
DVCC
N2514-6002-RB
C14
0.1F
4
3
S1
7914G-1-000E
DGND
DGND
12V
R2
2.2k
R71
0
D1
TLHR6405
RED
DVCC
R72
AVCC
8
6
1
2
5
VCORE
VASYS1
10
C55
4.7F
C54
0.1F
C56
4.7F
C57
0.1F
C50
4.7F
R3
Calib_LED
300
7
4
DVCC
VCORE
DVCC
VDSYS1
AUXVCC2
VDSYS1
Q1
CSD17571Q2
30V
Calib_LED
C3
0.1F
DGND
VREF
DVCC
TP15
VREF
TP14
AUXVCC2
AUXVCC1
AUXVCC1
DGND
AUXVCC3
AGND
C51
0.1F
C52
0.1F
C47
0.47F
C48
0.1F
C41
0R
C43
0.1F
DNP
C42
0R
C40
0.1F
DNP
C49
4.7F
C39
0.1F
C44
4.7F
C45
0.1F
C46
0.47F
AGND
AGND
DGND
39
Design Files
www.ti.com
C15
2
3
XIN
AGND
C53
I7I7+
I6I6+
I5I5+
12pF
DGND
AVCC
VCORE
DVCC
VASYS1
I4I4+
I3I3+
I2I2+
I1I1+
XOUT
P5.5
P5.6
P5.7
P6.0
PM_UCA2SOMI
PM_UCA2SIMO
PM_UCA2CLK
VASYS1
I4I4+
I3I3+
I2I2+
I1I1+
VCORE
C11
VASYS1
I7I7+
I6I6+
I5I5+
VREF
DGND
Y1
CMR200T-32.768KDZBT
32.768KHz
VDSYS1
AUXVCC1
AUXVCC2
12pF
0.1F
U3
MSP430F6779IPEU
MSP430F6779IPEU
DVCC
V1_IN_H
V1_IN_L
V_ZCD
R68
2.2k
R69
2.2k
PM_UCB0SCL
PM_UCB0SDA
P2.7
PM_UCA0RXD
PM_UCA0TXD
P3.2
PM_UCA1CLK
PM_UCA1SOMI
PM_UCA1SIMO
R66
0
R64
560K
Active_LED
Calib_LED
R67
560K
R65
560K
V_ZCD
P1.2
P1.1
P1.0
P2.4
PM_UCB0SCL
PM_UCB0SDA
P2.7
PM_UCA0RXD
PM_UCA0TXD
P3.2
PM_UCA1CLK
PM_UCA1SOMI
PM_UCA1SIMO
Active_LED
Calib_LED
SDCLK
P5.5
P5.6
P5.7
P6.0
PM_UCA2SOMI
PM_UCA2SIMO
PM_UCA2CLK
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
XIN
XOUT
AUXVCC3
RTCCAP1
RTCCAP0
P1.5/SMCLK/CB0/A
P1.4/MCLK/CB1/A4
P1.3/ADC10CLK/A3
P1.2/ACLK/A2
P1.1/TA2.1/VeREF+/A1
P1.0/TA1.1/VeREF-/A0
P2.4/PM_TA2.0
P2.5/PM_UCB0SOMI/PM_UCB0SCL
P2.6/PM_UCB0SIMO/PM_UCB0SDA
P2.7/PM_UCB0CLK
P3.0/PM_UCA0RXD/PM_UCA0SOMI
P3.1/PM_UCA0TXD/PM_UCA0SIMO
P3.2/PM_UCA0CLK
P3.3/PM_UCA1CLK
P3.4/PM_UCA1RXD/PM_UCA1SOMI
P3.5/PM_UCA1TXD/PM_UCA1SIMO
COM0
COM1
P1.6/COM2
P1.7/COM3
P5.0/COM4
P5.1/COM5
P5.2/COM6
P5.3/COM7
LCDCAP/R33
P5.4/SDCLK/R23
P5.5/SD0DIO/LCDREF/R13
P5.6/SD1DIO/R03
P5.7/SD2DIO/CB2
P6.0/SD3DIO
P3.6/PM_UCA2RXD/PM_UCA2SOMI
P3.7/PM_UCA2TXD/PM_UCA2SIMO
P4.0/PM_UCA2CLK
P4.1/PM_UCA3RXD/M_UCA3SOMI
P4.2/PM_UCA3TXD/PM_UCA3SIMO
P4.3/PM_UCA3CLK
P4.4/PM_UCB1SOMI/PM_UCB1SCL
P4.5/PM_UCB1SIMO/PM_UCB1SDA
P4.6/PM_UCB1CLK
P4.7/PM_TA3.0
P6.1/SD4DIO/S39
P6.2/SD5DIOS38
P6.3/SD6DIO/S37
P6.4/S36
P6.5/S35
P6.6/S34
P6.7/S33
P7.0/S32
P7.1/S31
P7.2/S30
P7.3/S29
P7.4/S28
P7.5/S27
P7.6/S26
P7.7/S25
P8.0/S24
P8.1/S23
P8.2/S22
P8.3/S21
DVCC
XIN
1
XOUT
2
AUXVCC3 3
VCORE
DVSS1
DVCC
VDSYS1
AUXVCC1
AUXVCC2
VASYS1
AVCC
AVSS1
SD6N0
SD6P0
SD5N0
SD5P0
SD4N0
SD4P0
VREF
AVSS2
VASYS2
SD3N0
SD3P0
SD2N0
SD2P0
SD1N0
SD1P0
SD0N0
SD0P0
AUXVCC3
DGND
R70
PM_UCA3RXD
PM_UCA3TXD
P4.3
PM_UCB1SCL
PM_UCB1SDA
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
DGND
VDSYS1
P5.5
P5.6
P5.7
P6.0
PM_UCA2SOMI
PM_UCA2SIMO
PM_UCA2CLK
RST/NMI/SBWTDIO
PJ.3/TCK
PJ.2/TMS
PJ.1/TDI/TCLK
PJ.0/TDO
TEST/SBWTCK
P2.3/PM_TA1.0
P2.2/PM_TA0.2
P2.1/PM_TA0.1/BSL_RX
P2.0/PM_TA0.0/BSL_TX
P11.5/TACLK/RTCCLK
P11.4/CBOUT
P11.3/TA2.1
P11.2/TA1.1
P11.1/TA3.1/CB3
P11.0/S0
P10.7/S1
P10.6/S2
P10.5/S3
P10.4/S4
P10.3/S5
P10.2/S6
P10.1/S7
P10.0/S8
P9.7/S9
P9.6/S10
P9.5/S11
P9.4/S12
P9.3/S13
P9.2/S14
P9.1/S15
P9.0/S16
DVSS2
VDSYS2
P8.7/S17
P8.6/S18
P8.5/S19
P8.4/S20
RESET
TCK
TMS
TDI
TDO
TEST/SBWTCK
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
RESET
TCK
TMS
TDI
TDO
TEST/SBWTCK
P2.4
P1.0
P1.1
P1.2
SDCLK
PM_UCA3RXD
PM_UCA3TXD
P4.3
PM_UCB1SCL
PM_UCB1SDA
P2.4
P1.0
P1.1
P1.2
SDCLK
TP11
TP8
TP9
TP7
TP10
TP4
TP5
TP1
TP2
DGND
VDSYS1
P8.7
P8.6
P8.5
P8.4
VDSYS1
P8.7
P8.6
P8.5
P8.4
R62
2.2k
DVCC
R63
2.2k
P4.6
P4.7
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
P7.0
P7.1
P7.2
P7.3
P7.4
P7.5
P7.6
P7.7
P8.0
P8.1
P8.2
P8.3
DVCC
PM_UCA3RXD
PM_UCA3TXD
P4.3
PM_UCB1SCL
PM_UCB1SDA
P4.6
P4.7
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
P7.0
P7.1
P7.2
P7.3
P7.4
P7.5
P7.6
P7.7
P8.0
P8.1
P8.2
P8.3
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
DGND
SDCLK
1
P5.6
3
P6.0
5
PM_UCA2SIMO7
PM_UCA3RXD 9
P4.3
11
PM_UCB1SDA13
P4.7
15
SDCLK
P5.6
P6.0
PM_UCA2SIMO
PM_UCA3RXD
P4.3
PM_UCB1SDA
P4.7
P5.5
P5.7
PM_UCA2SOMI
PM_UCA2CLK
PM_UCA3TXD
PM_UCB1SCL
P4.6
2
4
6
8
10
12
14
16
J1
P5.5
P5.7
PM_UCA2SOMI
PM_UCA2CLK
PM_UCA3TXD
PM_UCB1SCL
P4.6
1 PM_UCA0TXD
2 PM_UCA0RXD
3 P2.7
PM_UCA0TXD
PM_UCA0RXD
P2.7
4
DVCC
5
67997-416HLF
HEADER_1X5
DGND
J4
P1.2
P1.1
P1.0
P2.4
PM_UCB0SCL
PM_UCB0SDA
P3.2
PM_UCA1CLK
PM_UCA1SOMI
PM_UCA1SIMO
1
2
3
4
5
6
7
8
9
10
P1.2
P1.1
P1.0
P2.4
PM_UCB0SCL
PM_UCB0SDA
P3.2
PM_UCA1CLK
PM_UCA1SOMI
PM_UCA1SIMO
HEADER_2X5
J2
P6.1
P6.3
P6.5
P6.7
P7.1
P7.3
P7.5
P7.7
P8.1
P8.3
P8.5
P8.7
P6.1
P6.3
P6.5
P6.7
P7.1
P7.3
P7.5
P7.7
P8.1
P8.3
P8.5
P8.7
1
3
5
7
9
11
13
15
17
19
21
23
2
4
6
8
10
12
14
16
18
20
22
24
P6.2
P6.4
P6.6
P7.0
P7.2
P7.4
P7.6
P8.0
P8.2
P8.4
P8.6
P6.2
P6.4
P6.6
P7.0
P7.2
P7.4
P7.6
P8.0
P8.2
P8.4
P8.6
67997-424HLF
40
Design Files
www.ti.com
8.2
PART DESCRIPTION
MANUFACTURER
MANUFACTURER PART
NUMBER
!PCB1
Any
TIDA-00222
C1, C7
TDK
C1608X7R1C105K
0603
C2, C13
Kemet
C0603C104K5RACTU
0603
13
AVX
06033C104JAT2A
0603
C5, C6
TDK
C1608C0G1E103J
0603
AVX
06035A101FAT2A
0603
C11, C15
AVX
06035A120JAT2A
0603
C17
Vishay-Sprague
293D475X9035C2TE3
6032-28
AVX
08055C153KAT2A
0805_HV
14
MuRata
GRM21A5C2E470JW01D
0805_HV
C40, C43
AVX
06033C104JAT2A
0603
Vishay-Dale
CRCW06030000Z0EA
0603
AVX
0603ZD475KAT2A
0603
C46, C47
MuRata
GRM188R71E474KA12J
0603
D1, D2
VISHAY
TLHR6405
LED_5MM
D3
OSRAM
LG L29K-G2J1-24-Z
LED0603AA
D4
Diodes Inc.
BAS21-7-F
SOT-23
D5
Diodes Incorporated
MMSZ5228B-7-F
sod-123
FB1, FB3
TAIYO YUDEN
FBMJ2125HS420-T
0805_hv
FB2
TDK Corporation
MMZ1608B102C
0603
J1
TE Connectivity
826926-5
HEADER_5P
J2
FCI
67997-424HLF
TSW-112-07G-D
J3
FCI
67997-416HLF
TSW-108-07G-D
J4
FCI
67997-410HLF
HDR2X5
J5
3 pin berger
FCI
68001-403HLF
HDR1X3
QTY
PCB
FOOTPRINT
DNIe
DNI
41
Design Files
www.ti.com
PART DESCRIPTION
MANUFACTURER
MANUFACTURER PART
NUMBER
PCB
FOOTPRINT
J6
FCI
67997-404HLF
HDR_2X2
J7, J9, J10, J11, J12, J13, J14, TERMINAL BLOCK 5.08MM VERT 2POS, TH
J15, J16
On-Shore Technology
ED120/2DS
CONN_ED12
0-2DS
J8
Molex
N2514-6002-RB
3M_N25146002-RB
Q1, Q2
TEXAS INSTRUMENTS
CSD17571Q2
SON_CSD17
571Q2
Vishay-Dale
CRCW06032K20JNEA
0603
Vishay-Dale
CRCW0603300RJNEA
0603
Vishay-Dale
CRCW060310K0JNEA
0603
Vishay-Dale
CRCW0603100RFKEA
0603
R9, R92
Vishay Dale
CRCW0603390KFKEA
0603
R10, R91
Vishay-Dale
CRCW0603200KFKEA
0603
R11
Vishay-Dale
CRCW08052K40FKEA
0805_hv
R12
Vishay-Dale
CRCW08052K40FKEA
0805_hv
Vishay-Dale
CRCW0603100KFKEA
0603
Vishay-Dale
CRCW0805332KFKEA
0805_HV
R21
Vishay-Dale
CRCW060347K0JNEA
0603
R26
Vishay-Dale
CRCW060330K0JNEA
0603
R30
Vishay-Dale
CRCW0603470RJNEA
0603
R31
Vishay-Dale
CRCW060310K0FKEA
0603
QTY
42
DNIe
DNI
R32
Vishay-Dale
CRCW06031M00FKEA
0603
14
Vishay-Dale
CRCW06031K00JNEA
0603
R41
Vishay-Dale
CRCW08050000Z0EA
0805_HV
DNI
Vishay-Dale
CRCW080513R0FKEA
0805_HV
DNI
Vishay-Dale
CRCW080513R0FKEA
0805_HV
Vishay-Dale
CRCW0603560KFKEA
0603
Vishay-Dale
CRCW08050000Z0EA
0805_HV
Vishay-Dale
CRCW080510R0JNEA
0805_HV
20
R70,
R76,
R81,
R86,
R72
R71,
R77,
R82,
R87,
R73,
R78,
R83,
R88,
R74,
R79,
R84,
R89,
R75,
R80,
R85,
R90
DNI
Design Files
www.ti.com
PART DESCRIPTION
MANUFACTURER
MANUFACTURER PART
NUMBER
PCB
FOOTPRINT
S1
Bourns
7914G-1-000E
SW_7914G1-000E
U1
TI
TPS7A6533QKVURQ1
KVU_1
U2
Texas Instruments
OPA4314AIPW
PW0014A_N
U3
TEXAS INSTRUMENTS
MSP430F6779IPEU
QFP50P1600
X2200X160128N
U4
TI
LM4041BIDBZ
SOT-23
QTY
DNIe
43
Design Files
8.3
www.ti.com
Layer Plots
To download the layer plots, see the design files at TIDA-00222.
44
Design Files
www.ti.com
8.4
Altium Project
To download the Altium project files, see the design files at TIDA-00222.
45
Design Files
www.ti.com
46
Design Files
www.ti.com
8.5
Assembly Drawings
8.6
Software Files
To download the software files, see the design files at TIDA-00222.
References
47
10
www.ti.com
48