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International Journal of Modern Trends in Engineering


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IMPROVED PERFORMANCE RS DECODER USING LCC


DECODING BASED ON USC
G.Meenakshi1, V.Leela.Satyanaraya2,
M.tech_VLSI/SD1, Assistant.Professor, Dept.of E.C.E.2
ECE, Nimra college of Engineering and technology1,2

Abstract---- ReedSolomon (RS) codes are widely used in digital communication and storage
systems. Algebraic soft decision decoding (ASD) of RS codes can obtain significant coding gain
over the hard-decision decoding (HDD). Compared with other ASD algorithms, the low-complexity
Chase (LCC) decoding algorithm needs less computation complexity with similar or higher coding
gain. Besides employing complicated interpolation algorithm, the LCC decoding can also be
implemented based on the HDD. However, the previous syndrome computation for 2 test vectors
and the key equation solver (KES) in the HDD requires long latency and remarkable hardware. In
this brief, a unified syndrome computation algorithm and the corresponding architecture are
proposed. Cooperating with the KES in the reduced inversion-free Berlekamp- Messy algorithm, the
reduced complexity LCC RS decoder can speed up by 57% and the area will be reduced to 62%
compared with the original design for = 3.
Keywords: ASD (Algebraic soft decision), LCC (Low Complexity Chase Decoding), USD (Unified
Syndrome Computation),RS (Reed Solomon Codes)
I. INTRODUCTION
ReedSolomon (RS) codes are widely employed as the error control code in numerous digital
communication and storage systems. Berlekamp developed the first practical decoding procedure for
RS codes in 1968. In recent years, the error control capability was improved by Koetter and Vardy,
by incorporating the reliability information from the channel into the algebraic soft-decision (ASD)
decoding process. Among all ASD algorithms, the low-complexity Chase (LCC) decoding needs to
interpolate 2 test vectors with maximum multiplicity one. Hence, the LCC decoding has less
computation complexity and similar or higher coding gain compared with other ASD algorithms.
Usually, the interpolation is the common method in the LCC decoding algorithm to get the error
locator and the evaluator polynomial.
A reduced-complexity LCC decoding based on the unified syndrome computation (USC) algorithm
is proposed in which the syndromes of one test vector can be obtained from the syndromes of
previous test vector, and an efficient architecture of the USC is also given. The KES in the reduced
iBM (RiBM) algorithm is adopted to match the speed of the USC, and a modified polynomial
selection architecture is employed to choose the right error locator polynomial. As the result, the
decoding latency and the area are reduced to 64% and 62% for = 3, respectively, which leads to 2.5
times speed over area ratio than the decoder in[12] .
Further analysis shows the area of the proposed decoder is 69% of the decoder based on
RCMI for = 5, with 13% speed up. The interpolation polynomials of 2 test vectors, the
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International Journal of Modern Trends in Engineering and Research (IJMTER)


Volume 01, Issue 05, [November - 2014] e-ISSN: 2349-9745, p-ISSN: 2393-8161

polynomial selection algorithm is required to select the correct interpolation polynomial for the
successful decoding. The error locator polynomial in the interpolation polynomial indicates the error
number in the codeword. By comparing the degree of the error location polynomial and its roots
number, the correct interpolation result can be selected. If the degree equals the root number, this
polynomial will be regarded as the right interpolation result. After the polynomial selection, the
Chien search and Forney algorithm (CSFA) could be applied to correct the error symbols in the
codeword. Finally, an erasure decoding is used to recover the whole codeword.
II. PROPOSED SYSTEM
Among all ASD algorithms, the low-complexity Chase (LCC) decoding needs to interpolate
2 test vectors with maximum multiplicity one. ReedSolomon (RS) codes are widely used in digital
communication and storage systems. Algebraic soft decision decoding (ASD) of RS codes can obtain
significant coding gain over the hard-decision decoding (HDD). Compared with other ASD
algorithms, the low-complexity Chase (LCC) decoding algorithm needs less computation complexity
with similar or higher coding gain. Besides employing complicated interpolation algorithm, the LCC
decoding can also be implemented based on the HDD. However, the previous syndrome computation
for 2 test vectors and the key equation solver (KES) in the HDD requires long latency and
remarkable hardware. In this brief, a unified syndrome computation algorithm and the corresponding
architecture are proposed.
2.1 Proposed system explanation
The architecture of the USC consists of the syndrome calculation architecture and the
syndrome update architecture. They are separated into different pipelining stages. The block diagram
of the reduced-complexity LCC decoder based on the USC algorithm is given in Fig.1. For the
syndrome calculation architecture, it is the same as ordinary syndrome architecture in HDD decoders
as shown in Fig. 3. The syndromes of the first test vector are calculated and stored in registers from
S1 to S2t, and later pass the syndrome update module in order.

Figure 1: Improved performance RS decoder using LCC decoding based on USC

At the same time, the positions of unreliable points with their ri_HD and ri_2HD, i Z, are also
stored. The syndrome update module is shown in Fig. 4. It works simultaneously with the KES
module. Since the KES algorithm and architecture in the RiBM require 2t clock periods to get the
error locator and the evaluation polynomial, the syndrome update module has to finish the syndrome
update in 2t clock periods to provide the syndromes of next test vector to the KES. This selected
point is the only different point between the current test vector and the next one. The difference of
r_HD and r_2HD is calculated by sending them into a GF (28) adder and stored in D2.

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Volume 01, Issue 05, [November - 2014] e-ISSN: 2349-9745, p-ISSN: 2393-8161

2.1.1 USC Algorithm


In the syndrome computation with the HDD algorithm, 2t syndromes of the received
codeword rHD(x) are computed as
Sj=

r _ HD.aij , for j=1 to 2t

Where is the distinct element of GF(2q ). For the LCC decoding based on the HDD, the syndromes
of all 2 test vectors are required. For the th test vector, the symbol in position i , i Z, can be
ri_HD or ri_2HD and this choice is denoted as i_ . i_ is HD or 2HD according to the different
point selection in the th test vector. For i that is not included in Z, i_ = HD
Sj_r=

r _ i_r.i j , for j = 1 to 2t, = 1 to 2.

The syndrome computation algorithm proposed. first calculate the syndrome sum of reliable points in
R as the common syndrome s j_com, 1 j 2t, which is shared by all test vectors. Then, every
separated syndrome of the points in position i , i Z for both ri_HD and ri_2HD is calculated
independently and denoted as s j_l_HD and s j_l_2HD, 1 j 2t and 1 l . l is used to count the
number of points in Z. The final syndrome of the test vector can be got by adding the common
syndrome and separated syndromes together. However, if all the test vectors are arranged in an order
in which adjacent test vectors only have one different symbol, the syndromes can be calculated
directly from the previous result. For the first test vector, which selects all ri_HD, i Z
Sj_1 =

ri_HD i j , for j = 1 to 2t.

For the rest test vectors, since there is only one different symbol in adjacent two test vectors, the
syndromes of the th test vector can be calculated from the result of the ( 1)th test vector
Sj_ =

ri _i_ ij , for j = 1 to 2t

Sj_ = Sj_(1)

ri_i_(1) ij +

= Sj_(1) +

(ri_ ri_(1))ij

ri _i_ ij

There is only one different symbol between the ( 1)th and the th test vectors and its position is
denoted as
Sj_ = Sj_(1) + (r__ r __(1)).j One of r__ and r__(1)
must be r_HD and the other must be r_2HD in symbol position in Z. (r__r__(1))
j can be regarded as the syndrome difference between the and
( 1) test vectors. So, as shown in Algorithm 1, the USC algorithm only requires calculating the
syndromes for the first test vector. After that, syndromes for other test vectors can be updated based
on the result of the first test vector by adding the syndrome difference.
2.1.2. USC Architecture
The architecture of the USC consists of the syndrome calculation architecture and the
syndrome update architecture. They are separated into different pipelining stages. The block diagram
of the reduced-complexity LCC decoder based on the USC algorithm is given in Fig. 1For the
syndrome calculation architecture, it is the same as ordinary syndrome architecture in HDD decoders
. The syndromes of the first test vector are calculated and stored in registers from S1 to S2t, and later
pass the syndrome update module in order. At the same time, the positions of unreliable points
with their ri_HD and ri_2HD, i Z, are also stored.

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Volume 01, Issue 05, [November - 2014] e-ISSN: 2349-9745, p-ISSN: 2393-8161

2.1.3 Syndrome Computation architecture

Figure 2: Syndrome calculation architecture

2.1.4 Kes And Polynomial Selection


2.1.4.1 Ribm Algorithm
Different from the IBM employed in [12], the KES in the RiBM in [13] is selected by the
decoder presented in this brief. The RiBM algorithm introduces the (x) and _(x), where (x) = 3t
x3t+3t1x3t1+ +1x+0 and _(x) = 3t x3t +3t1x3t1+ +1x+0. Both (x) and
(x) load the Sj (x), then the RiBM simultaneously updates these two polynomials. After 2t iterations,
the error locator polynomial (x) and error evaluator polynomial (x) can be obtained from the
coefficients of the (x) polynomial. Key architecture of the RiBM . The advantage of the RiBM is
that each step in the KES algorithm of the RiBM can be implemented simultaneously. Consequently,
there is no free clock period for each unit in the KES module and no KES architecture needs to be
shared as in although the RiBM requires more registers and multipliers than the IBM, it provides
higher throughput which increase the decoding speed of the whole decoder. Moreover, the KES can
match the speed of the syndrome update perfectly.

Figure 3: Key architecture of RiBM

III. MODULE DESCRIPTION


3.1. Syndrome Calculation Architecture
The syndrome calculation architecture, it is the same as ordinary syndrome architecture in HDD
decoders. The syndromes of the first test vector are calculated and stored in registers from S1 to S2t,
and later pass the syndrome update module in order. At the same time, the positions of unreliable
points with their ri HD and ri 2HD, i Z, are also stored.

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Volume 01, Issue 05, [November - 2014] e-ISSN: 2349-9745, p-ISSN: 2393-8161

Figure 4: Syndrome calculation architecture

Figure5: Syndrome Cell

3.2 Syndrome Updates Architecture


The syndrome update module is worked simultaneously with the KES module. Since the KES
algorithm and architecture in the RiBM require 2t clock periods to get the error locator and the
evaluation polynomial, the syndrome update module has to finish the syndrome update in 2t clock
periods to provide the syndromes of next test vector to the to the KES.

Figure 6: Syndrome updates architecture

3.3 KES architecture in RiBM


The KES in the RiBM is selected by the decoder presented in this brief. The RiBM algorithm
introduces the (x) and (x), then the RiBM simultaneously updates these two polynomials. After 2t
iterations, the error locator polynomial (x) and error evaluator polynomial (x) can be obtained
from the coefficients of the (x) polynomial. Key architecture of the RiBM The advantage of the
RiBM is that each step in the KES algorithm of the RiBM can be implemented simultaneously.
Consequently, there is no free clock period for each unit in the KES module and no KES architecture
needs to be shared. Although the RiBM requires more registers and multipliers than the IBM, it
provides higher throughput which increase the decoding speed of the whole decoder. Moreover, the
KES can match the speed of the syndrome update perfectly.

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Volume 01, Issue 05, [November - 2014] e-ISSN: 2349-9745, p-ISSN: 2393-8161

Figure 7: Architecture of RiBM

Figure 8: Control unit of decoder

3.3.1 Polynomial Selection


The polynomial selection is based on the Chine search algorithm. To reduce extra storage for
all error locators and evaluation polynomials, the Chine search architecture is employed to find the
root number of the candidate error locator polynomial.

Figure 9: Polynomial selection module

3.4 Chien search and forney algorithm with error correction block
After the KES block, the error locator polynomial and the error value polynomial are fed into the
Chien search block, which calculates the roots of the error locator polynomial. The Forney algorithm
block works in parallel with the Chien search block to calculate the magnitude of the error symbol at
each error location. Let the error locator polynomial of the degree over be defined where the
coefficients. It is well known that Chien search algorithm can be used to determine the roots of an
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Volume 01, Issue 05, [November - 2014] e-ISSN: 2349-9745, p-ISSN: 2393-8161

error locator polynomial of degree in , where is the maximum number of errors that can be corrected
in the RS code. the Chien search block, the Forney algorithm and the error correction blocks, which
generate the error value and then the corrected symbol.

Figure 10:Chien search and forney algorithm

3.5 FIFO memory buffers


As each error value is calculated, the corresponding received symbol is fetched from a FIFO
memory, which buffers the received symbols during the decoding process. Each error value is simply
added to the received symbol to produce a corrected symbol. At the locations where no errors have
occurred, the error values are zero and there is no change in the received polynomial at those
locations when added.
IV. IMPLEMANTATION RESULTS
4.1 Encoder

Figure11: Simulation results of encoder

4.2 Syndrome computation unit

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Figure 12: Snap shot output of syndrome computation unit

4.3 Syndrome update unit

Figure 13: Snap shot output of syndrome update unit

4.4 KES RIBM

Figure 14: Snap shot output of KES RIBM unit

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4.5 Chiensearch block

Figure 15: Snap shot output of Cheinsearch unit

4.6 PISO

Figure 16: Snap shot output of PISO unit

4.7 SIPO

Figure 17: Snap shot output of SIPO unit

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4.8 Top module

Figure 18: Snap shot output of Top module unit

4.9 Decoder

Figure 19.Simulation results of decoder error correction

V. CONCLUSION
USC algorithm was proposed in this brief and the improved LCC RS decoder, based on the USC
gives better performance on speed and area. The proposed decoder is significantly more efficient
than prior designs. Next, we will focus on further improving the throughput of the LCC RS decoder.
The proposed LCC decoder for RS(255 239) code with = 3 has been modeled with Verilog HDL
and implemented in a XC3S400PQ208 Spartan3 FPGA device with ISE 13.2 t.
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Volume 01, Issue 05, [November - 2014] e-ISSN: 2349-9745, p-ISSN: 2393-8161
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