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Takshshila Institute of Engineering & Technology

Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING

QUIZ - I
Multiple Choice Questions
1. The PIN diode is used as
(a) rectifier

(b) voltage controlled attenuator

(c) amplifier

2. The diode used for a power limitter is


(a) signal diode

(b) Zener diode

(c) PIN diode

(d) power diode

3. Most suitable diode for a phase shifter is


(a) power diode (b) avalanche diode (c) PIN diode
4. The PIN diode is used as
(a) square wave modulator

(b) triangular wave modulator (c) sine wave modulator

5. No moving part is associated with the change in capacitance of


(a) gang capacitor (b) trimmer

(c) varicap

6. The diode which permits remote tuning, is


(a) power diode (b) Varactor

(c) Zener diode

7. The Zener effect is valid


(a) below 5 V (b) above 5 V

(c) equal to 5 V

(d) none of the above

8. The avalanche effect is valid


(a) below 5 V

(b) above 5 V

(c) equal to 5 V

(d) none of these

9. The electron-hole pairs are generated in


(a) Zener mechanism (b) avalanche mechanism

(c) none of the two

10. The diode which is preferred for dc coupling is


(a) signal diode

(b) power diode

(c) LED

(d) Zener diode

11. Power diodes are used in

Page 1 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(a) rectifier

(b) amplifier

(c) mixer

12. The power diodes are made of


(a) silicon (b) germanium (c) aluminium
13. Signal diodes are called
(a) general-purpose diodes (b) special purpose diodes

(c) high power diodes

14. The PIN diode works as rectifier at


(a) low frequency (b) high frequency (c) all frequencies
15. The PIN diode has
(a) an intrinsic layer between heavily doped p and n-layers
(b) an n-layer between heavily doped p and n-layers
(c) and an p-layer between heavily doped p and n-layers
16. The Schottky diode turns OFF
(a) faster w.r.t p-n junction

(b) slower w.r.t. p-n junction

(c) at the same speed as p-n junction


17. The minority carrier storage time in the Schottky diode is
(a) infinite (b) zero

(c) 0.15 ms

18. Very close to the ideal diode is


(a) Zener diode (b) signal diode (c) Schottky diode

Page 2 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING

Questions for Practice


1. Discuss the role of emitter, base and collector regions in the operation of BJT
2. Why is the base width very thin?
3. For normal operation how the base emitter and base collector junctions are biased?
4. Draw block diagrams of n-p-n and P-N-P transistors with batteries
5. What is ? How it is related with transistor currents?
6. What is the typical value of ?
7. How transistor and are related?
8. What is the typical value of ?
9. What is collector reverse saturation current? What is the cause of it?
10. What carrier makes up the largest component of current inside p-n-p and n-p-n
transistors?
11. What are the three possible configurations of BJT?
12. What is the meaning of symbols ICEO and ICBO?
13. What is the relation between ICO and ICEO?
14. Where do you bias transistor? Why do you bias it?
15. How can you justify neglecting VBE in fixed bias circuit but not in self-bias circuit?
16. What is 'fixed' in the fixed biased circuit?
17. How does the fixed bias circuit biases the base emitter junction and collector base
junction?
18. What is thermal runaway?
19. How does self bias circuit achieve thermal stability?

Page 3 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
20. How is a DC load line plotted on the output characteristic of BJT?
21. Draw the output characteristics of an n-p-n transistor in CE configuration and indicate the
active, cut-off, and saturation regions.
22. Discuss briefly the charge transport mechanism in a BJT.
23. Derive an expression for the terminal currents in a p-n-p transistor
24. Define and of a transistor and deduce the relationship between them. Find the
expression for the collector current IC in terms of the base current IB the reverse
saturation current ICO and .
25. A Ge transistor with = 0.98 gives ICO = 12 A when used in the CB configuration.
Obtain IC when the transistor is used in CE configuration with IB = 0.2 mA
26. Why transistor action cannot be achieved by connecting two diodes back to back?

Page 4 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING

QUIZ - II
Multiple Choice Questions
1. Current amplification factor in CB configuration is
(a)

(b) 1 +

(c) 1/(1 + )

(d)

2. Current amplification factor in CE configuration is


(a) (b) 1 + (c) 1/

(d)

3. Current amplification factor in CC configuration is


(a)

(b) 1 +

(c) 1/

(d)

4. Leakage current in CB configuration is


(a) ICBO

(b) IBCO

(c) ICEO

(d) IECO

5. Leakage current in CE configuration is


(a) IC (b) ICBO

(c) ICEO

(d) ICB

6. ICEO and ICO are related as


(a) ICEO = ( + 1)ICO (b) ICEO = ICBO (c) ICEO < ICBO
7. The value of is
(a) unity(b) very near to unity(c) greater than unity(d) very much less than unity.
8. is related to as
(a) = /(1 + ) (b) = /(1 ) (c) = 1/(1 + )
(b) is related to as
(a) = /(1 + a) (b) = /(1 )

(c) = (1 )/

9. Which one is correct


(a) IE = IB + IC (b) IC = IB + IE (c) IE < (IB + IC)
10. Collector current and reverse saturation collector current are related as

Page 5 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(a) IC > ICEO (b) IC < ICEO (c) ICO = ICEO
11. Which is correct
(a) IB < IC < IE (b) IE < IB < IE

(c) IB = IC = IE

12. The arrow in a transistor terminal represents


(a) emitter

(b) collector

(c) base

13. The arrow in a transistor represents


(a) the direction of conventional current
(b) the opposite direction of conventional current
(c) the direction of flow of electrons
14. The doping level of emitter region is
(a) greater than collector and base region
(b) less than collector and base regions
(c) less than base but greater than collector region
15. The physical dimension of collector region is
(a) largest w.r.t the other two
(b) smallest w.r.t the other two
(c) equal to the rest of the two
(d) smaller than emitter but bigger than base

16. For normal amplifier operation


(a) EB junction is forward and CB junction is reverse biased
(b) EB junction is reverse biased and CB junction forward biased
(c) both are forward biased

Page 6 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
17. CB transistor has
(a) lower input and higher output resistances
(b) higher input and lower output resistances
(c) low input and output resistances
18. CE transistor has
(a) lower input and higher output resistances
(b) higher input and lower output resistances
(c) medium input and output resistances
19. CC transistor has
(a) lower input and higher output resistances
(b) higher input and lower output resistances
(c) low input and output resistances
20. The phase difference between the input and output currents in CB configuration are
(a) 180

(b) 0

(c) 90

(d) 45

21. The phase difference between the input and output current in CC configuration are
(a) 180

(b) 0

(c) 90

(d) 30

22. ICBO is
(a) collector to base current when emitter is open
(b) collector to base current when base is grounded
(c) collector to base current when base is connected to a resistance
23. ICEO flows in
(a) collector and emitter leads
(b) collector and base leads
(c) emitter and base leads

Page 7 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
24. In p-n-p transistor the emitter current flows
(a) out of emitter lead
(b) into emitter lead
(c) neither out nor in the emitter lead
25. In a BJT the
(a) base region is sandwiched between emitter and collector
(b) emitter region is sandwiched between base and collector
(c) collector is sandwiched between base and emitter
26. The quiescent state of transistor is when
(a) biased but no signal is applied
(b) it is unbiased
(c) no current flows
27. Maximum swing of signals occurs when Q-point along load line is selected at
(a) middle of the output characteristic
(b) the saturation point
(c) the cutoff point
28. The emitter efficiency of a junction transistor decreases with
(a) decrease of emitter doping
(b) increase of emitter doping
(c) decrease of base width
(d) decrease of base doping

Page 8 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
Questions for Practice
1. Explain operation of a MOSFET and its use as an amplifier.
2. Draw the h.f. equivalent circuit of a MOSFET and explain the significance of the different
elements of the circuit.
3. With the help of suitable band diagrams, distinguish between conditions of accumulation,
depletion and inversion in relation to a MOS structure. What is the condition of strong
inversion?
4. What is meant by static and dynamic RAM? Sketch the circuits of (a) a MOS inverter and
(b) a 1-bit memory cell using MOSFETs and explain how they operate.

Page 9 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING

QUIZ - III
Multiple Choice Questions
1. The main types of field effect transistors are
(a) UJT and FET (b) BJT and FET (c) JFET and MOSFET
2. The input impedance of the field effect transistor is
(a) very low w.r.t. BJT (b) very high w.r.t. BJT (c) medium w.r.t. BJT
3. The field effect transistor is an
(a) unipolar device (b) bipolar device (c) none of the above
4. The doping of substrate is
(a) high w.r.t. the source or drain
(b) low w.r.t. the source or drain
(c) moderate w.r.t. the source or drain
5. The n-channel field effect transistor has
(a) p-type substrate (b) n-type substrate (c) no substrate
6. The polarity of the gate w.r.t. the source in n-channel JFET is
(a) positive (b) negative (c) neutral
7. The charge carriers in an n-channel JFET are
(a) electrons (b) holes

(c) protons

(d) neutrons

8. The drain current of the n-channel JFET increases with


(a) increasing positive voltage at the gate
(b) decreasing positive voltage at the gate
(c) constant voltage at the gate

Page 10 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
9. The JFET are normally used in
(a) Ohmic region(b) saturation region(c) cut-off region
10. The parameters of JFET are related as
(a) gm = rd/

(b) gm = /rd

(c) gm = rd

11. The input resistance of MOSFET is of the order of


(a) 100 M

(b) 10

(c) 1 K

12. The field effect transistors are


(a) voltage controlled device(b) current controlled device
(c) neither current nor voltage controlled device
13. The field effect transistor offer
(a) low degree of isolation between input and output
(b) high degree of isolation between input and output
(c) complete short circuit between input and output
14. The field effect transistor is
(a) less noisy w.r.t. BJT

(b) more noisy w.r.t. BJT

15. For quiet reception the front end of FM tuner contains


(a) BJT (b) FET (c) UJT (d) SCR

16. The gain-bandwidth of the field effect transistor is


(a) high w.r.t. BJT (b) low w.r.t. BJT (c) equal to the BJT
17. The IDSS of the FET is
(a) independent of pinch off voltage (b) dependent on pinch off voltage
18. At pinch-off, the drain current becomes
(a) zero (b) infinite (c) constant

Page 11 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
19. The high frequency gain of the FET is mainly limited by
(a) Cgs (b) Cds (c) Cgd
20. In an FET
(a) both junctions are forward biased
(b) both junctions are reverse biased
(c) one junction forward biased and the other reverse biased
21. When the reverse bias between the gate and the source increases, the pinch-off voltage
will become
(a) more
(b) less
(c) remains unaffected
22. For an amplifier, the FET is operated in
(a) VVR region (b) pinch-off region (c) avalanche breakdown region
23. If the reverse bias in a FET is increased, its gm will
(a) increase (b) decrease (c) not be affected (d) suddenly falls to zero
24. The minimum value of VDS to operate in the pinch-off region with Vpo = 4 V, IDSS = 8
mA, and VGS = 3 V is
(a) 4 V (b) 1 V (c) 4 V (d) 7 V
(Hint: VDS = VGS VPO = 3 V (4 V) =1 V)
25. The Vpo of an n-channel JFET with ND = 1016/cm3, r = 16, o = 8.854 1014 F/cm, a =
0.5 m is
(a) 1.5 V (b) 1.4 V (c) 5 V (d) 0
26. The rd(ON) of an n-channel JFET with parameters in prob. 29 alongwith L = 20 m, Z =
103 m, n = 0.13 m2/Vs is
(a) 1 K (b) 961 K (c) 0.931 K (d) 0.0961 K

Page 12 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
27. The IDSS of an n-channel JFET with ND = 1022/m, a = 0.5 m, L = 20 m, z = 103m, n =
0.13 m2/Vs, Vpo = 5 V, is
(a) 10.4 mA (b) 100.4 mA (c) 1.04 mA(d) 0.104 mA
28. In a MOSFET, a low threshold voltage can be achieved by
(a) using the gate dielectric of lower dielectric constant
(b) increasing the substrate concentration
(c) decreasing the substrate concentration
(d) using a thick gate oxide.
29. In a MOSFET the threshold voltage can be lowered by
(a) increasing the gateoxide thickness
(b) reducing the substrate concentration
(c) increasing the substrate concentration
(d) using the dielectric of lower constant.
30. JFETs are normally used in
(a) Ohmic region (b) saturation region (c) cut-off region (d) breakdown region.
31. For values of drain voltage smaller than gate voltage, a MOSFET acts as a voltage
controlled
(a) current source (b) resistor (c) voltage source (d) capacitor.

Questions for Practice


1. Why is the bias stabilization required in transistor amplifiers? What are the various bias
stabilization methods? Draw the circuits and discuss their relative advantages and
disadvantages.
2. Draw fixed bias and a self-bias circuit for CE configuration. Discuss the operation of each
circuit and hence, explain which circuit gives better stability.

Page 13 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING

QUIZ IV
Multiple Choice Questions
1. The maximum output swing can be obtained when the Q-point is
(a) near saturation point (b) near cut-off point (c) in the middle of the load line
2. What value of stability factor should be selected?
(a) infinity (b) zero (c) finite
3. For good stability the Q-point should
(a) vary (b) fixed (c) none of these
4. The positive peak of the signal will be clipped off if the Q-point shifts towards
(a) cut-off (b) saturation (c) active regions
5. The voltage divider bias is used to make the Q-point
(a) independent of (b) independent of VBE (c) dependent of
6. Most popular bias arrangement is
(a) fixed base bias (b) collector to base bias (c) voltage divider bias
7. Improper biasing leads to
(a) distortion in output (b) distortion in input (c) heavy loading
8. For an amplifier junctions of BJT should be biased as
(a) base-emitter and base-collector both reverse biased
(b) base-emitter forward and base-collector reverse biased
(c) base-emitter and base-collector both forward biased
9. The stability factor lies in between
(a) zero and unity
(b) unity and (1 + )

Page 14 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(c) (1 + ) and infinity
10. The best Q-point in an amplifier for faithful reproduction of the signal is selected
(a) near cut-off
(b) near saturation
(c) in the middle of the active region
11. With increasing value of the stability factor, the Q-point
(a) becomes poor
(b) becomes better
(c) is not affected
12. The thermal stability of fixed base bias circuit is
(a) poor
(b) good
(c) best
13. In the saturation region of the BJT
(a) VCE = VCC
(b) VCE 0
(c) VCE = 5V
14. The bypass capacitor across the emitter resistance
(a) increases the emitter current
(b) increases the output signal
(c) improves the stability factor
15. The stability factor S = + 1 is in the case of
(a) fixed base bias
(b) (b) collector to base bias

Page 15 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(c) fixed base bias with emitter resistance
16. The stability factor of collector to base bias is better
(a) w.r.t. the fixed base bias
(b) (b) collector to base bias with emitter resistance
(c) self bias
17. Inclusion of an emitter resistance in any type of biasing circuit
(a) improves stability factor
(b) (b) worsens stability factor
(c) does not change stability factor

Questions for Practice


1. Draw the small signal low frequency model of a BJT in CE configuration. Using this
configuration, derive expression for the voltage gain of an emitter follower amplifier.
2. Derive an expression for the voltage gain in the CE transistor amplifier in terms of hparameters.
3. Why the value of R3 in bootstrapped amplifier cannot be more than few hundred ohm?
Justify it.
4. Show that the voltage gain of the bootstrapped amplifier is essentially unity.

Page 16 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING

QUIZ V
Multiple Choice Questions
1. The relationship between input and output voltage of a common emitter amplifier is
(a) always unity
(b) always positive
(c) always negative
(d) less than unity
2. The voltage gain of a common collector amplifier is
(a) always equal
(b) always positive
(c) always negative
3. The voltage gain of a common base amplifier is
(a) less than unity
(b) always positive
(c) always negative
4. The output current in a Class-C amplifier flows for
(a) full cycle
(b) more than half cycle
(c) less than half cycle
(d) half cycle
5. In Class-AB amplifier the output current flows for
(a) full cycle
(b) more than half cycle

Page 17 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(c) less than half cycle
(d) half cycle
6. In Class-A amplifier the output current flows for
(a) full cycle
(b) more than half cycle
(c) less than half cycle
(d) half cycle
7. Voltage gain of CB amplifier configuration has phase shift of
(a) 180
(b) 90
(c) 360
(d) 45
8. The h-parameters of a BJT are
(a) dependent on RL
(b) dependent on ICQ
(c) independent of ICQ
(d) constant
9. The dimension of all the four h-parameters of a BJT are
(a) the same
(b) different
(c) none of these
10. The typical value of h-parameters of a BJT are
(a) hie = 1 K, hfe = 100, hre = 10 104, hoe = 10 106S
(b) hie = 10 K, hfe = 100, hre = 10 104, hoe = 10 106S

Page 18 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(c) hie = 1 K, hfe = 100, hre = 10 104, hoe = 10106S
(d) hie = 100 K, hfe = 100, hre = 10 104, hoe = 10 106S
11. In an amplifier the output varies
(a) linearly for any amount of input amplitude
(b) linearly for restricted range of input amplitude
(c) nonlinearly for any amount of input amplitude
12. The h-parameters of a BJT are called
(a) small signal parameters
(b) large signal parameters
(c) T-parameters
(d) Z-parameter
13. The h-parameters of a BJT at high frequency
(a) remains constant
(b) varies with frequency
(c) none of these
14. The configuration that offers highest input resistance is
(a) CE
(b) CB
(c) CC
15. The amplifier that offers highest input resistance and the lowest output resistance
(a) CE
(b) CB
(c) CC

Page 19 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
16. The configuration that offers highest current amplification ratio but lowest voltage
amplification is
(a) CE
(b) CB
(c) CC
17. The configuration that offers highest power gain is
(a) CE
(b) CB
(c) CC
18. The important considerations in cascading of different configurations of BJT amplifier is
(a) matching of impedances
(b) matching of current gain
(c) matching of loads
19. The most popular general purpose amplifier configuration is
(a) CC
(b) CE
(c) CC
20. The CE amplifier configuration is preferred over others because it offers
(a) highest current gain, voltage, and power gains
(b) medium current gain, voltage, and power gains
(c) lowest current gain, voltage, and power gains
21. The input resistance of a CC configuration is 100 K with its load of 1 K, the hfe of the
BJT is approximately
(a) 500

Page 20 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(b) 100
(c) 50
22. The configuration that behaves as a constant current source is
(a) CB
(b) CE
(c) CC
23. The two stage CC amplifier configuration provides approximately
(a) unity voltage gain
(b) 50 voltage gain
(c) none of these
24. The input voltage connected across the input of a CC stage is 50. Its output voltage
would be
(a) 5360
(b) 5180
(c) 50
(d) none of these
25. The buffer stage can employ the configuration
(a) CB
(b) CE
(c) CC
26. The stage which avoids loading the previous stage is called buffer amplifier. What is the
other name?
(a) CB
(b) CE

Page 21 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(c) CC
27. The prime importance in designing a circuit is voltage amplification. Which configuration
is preferred for such case
(a) CB
(b) CB
(c) CC
28. The gain-bandwidth of an amplifier is
(a) always constant
(b) always variable
(c) none of these
29. The gain of an amplifier reduces by a factor of 10, the bandwidth
(a) remains constant
(b) increased by the same factor
(c) decreased by the same factor
(d) none of the above
30. The upper 3dB frequency of n-identical cascaded stages is
(a)
(b)
(c) nf2
31. (d) The upper 3dB frequency of a single stage amplifier is 1 MHZ, how many identical
stages will result in approximately 510 kHz upper 3 dB frequency.
(a) 2
(b) 33
(c) 4

Page 22 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(d) 10
32. The upper 3 dB frequency of a single stage amplifier is 1MHz, what will be the 3 dB
frequency of ten identical cascaded stages
(a) 0.1 MHz
(b) 100 kHz
(c) 268 kHz
(d) 168 kHz
33. The effective bandwidth of indentically cascaded stages
(a) decreases
(b) very low
(c) none of the above
34. The bandwidth of an amplifier is approximately
(a) proportional to its upper 3 dB frequency
(b) inversely proportional to its upper 3 dB frequency
(c) product of its 3 dB frequencies
35. The rise time tr for a square wave input of an amplifier is related to its 3 dB frequency in
case of square wave input as
(a) tr = 0.35/f2
(b) tr = 0.90/f2
(c)
(d)
36. The bootstrap amplifier is associated with
(a) high input impedance
(b) low input impedance

Page 23 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(c) none of these
37. The Darlington pair is characterized with
(a) very large output impedance
(b) very large input impedance
(c) very low input resistance
38. The output impedance of the Darlington pair amplifier is
(a) very large
(b) very low
(c) none of the above
39. The current gain of a Darlington pair is approximately
(a) / (1 + )
(b)
(c) 2
40. At half power frequencies, an amplifier voltage gain is lowered by
(a) 6 dB
(b) 3 dB
(c) 2 dB
(d) 0.5 dB
41. Compared to a CB amplifier, the CE amplifier has
(a) lower input resistance
(b) lower current amplification
(c) higher output resistance
(d) higher current amplification
42. One of the effects of negative feedback in amplifier is to

Page 24 of 25
Prof.D.K.singh

Takshshila Institute of Engineering & Technology


Department of Electronics and Communication

2012

EDC
(CS-304)- NON- GRADING
(a) increase the noise
(b) decrease the bandwidth
(c) increase the harmonic distortion
(d) decrease the harmonic distortion

http://my.safaribooksonline.com/book/electrical-engineering/semiconductortechnology/9788177589788/feedback-in-amplifiers/solved_problems011#X2ludGVybmFsX0ZsYXNoUmVhZGVyP3htbGlkPTk3ODgxNzc1ODk3ODglMkZleGVyY2lzZXMtMDA3

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Prof.D.K.singh

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