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1. General description
The 74HC564 is a high-speed Si-gate CMOS device and is pin compatible with low-power
Schottky TTL (LSTTL). The 74HC564 is specified in compliance with JEDEC
standard no. 7A.
The 74HC564 is a octal D-type flip-flop featuring separate D-type inputs for each flip-flop
and inverting 3-state outputs for bus oriented applications. A clock (CP) and an output
enable (OE) input are common to all flip-flops.
The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold
times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of
the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs go to the
high-impedance OFF-state. Operation of the OE input does not affect the state of the
flip-flops.
The 74HC564 is functionally identical to the 74HC574 but has inverting outputs. The
74HC564 is functionally identical to the 74HC534, but has a different pinning.
2. Features
74HC564
Philips Semiconductors
Parameter
tPHL, tPLH
Min
Typ
Max
Unit
15
ns
fmax
maximum clock
frequency
127
MHz
CI
input capacitance
3.5
pF
27
pF
power dissipation
capacitance per
flip-flop
CPD
[1]
Conditions
CL = 15 pF;
VCC = 5 V
VI = GND to VCC
[1]
4. Ordering information
Table 2:
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74HC564N
40 C to +125 C
DIP20
SOT146-1
74HC564D
40 C to +125 C
SO20
SOT163-1
2 of 18
74HC564
Philips Semiconductors
5. Functional diagram
2 D0
Q0 19
3 D1
Q1 18
4 D2
Q2 17
Q3 16
5 D3
FF1 TO
FF8
6 D4
3 STATE
OUTPUTS
Q4 15
7 D5
Q5 14
8 D6
Q6 13
9 D7
Q7 12
11 CP
1 OE
001aab936
1
11
2
3
4
5
6
7
8
9
11
CP
D0
Q0
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
EN
C1
19
18
17
18
16
17
16
15
14
13
12
15
19
1D
14
13
12
OE
1
001aab934
001aab935
3 of 18
74HC564
Philips Semiconductors
D0
D1
D2
CP
CP
FF
1
CP
FF
2
D4
D3
CP
FF
3
D5
CP
FF
4
CP
FF
5
D7
D6
CP
FF
6
CP
FF
7
FF
8
CP
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
001aab937
6. Pinning information
6.1 Pinning
OE
20 VCC
D0
19 Q0
D1
18 Q1
D2
17 Q2
D3
16 Q3
564
D4
15 Q4
D5
14 Q5
D6
13 Q6
D7
12 Q7
GND 10
11 CP
001aab844
4 of 18
74HC564
Philips Semiconductors
Pin description
Symbol
Pin
Description
OE
D0
data input 0
D1
data input 1
D2
data input 2
D3
data input 3
D4
data input 4
D5
data input 5
D6
data input 6
D7
data input 7
GND
10
ground (0 V)
CP
11
Q7
12
Q6
13
Q5
14
Q4
15
Q3
16
Q2
17
Q1
18
Q0
19
VCC
20
7. Functional description
7.1 Function table
Table 4:
Operating mode
Input
OE
CP
[1]
Qn
Output
Dn
Internal
flip-flop
5 of 18
74HC564
Philips Semiconductors
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
IIK
0.5
+7
20
mA
IOK
VO < 0.5 V or
VO > VCC + 0.5 V
20
mA
IO
35
mA
ICC, IGND
70
mA
Tstg
storage temperature
65
+150
Ptot
power dissipation
DIP20 package
[1]
750
mW
SO20 package
[2]
500
mW
[1]
[2]
Symbol
Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
tr, tf
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
Tamb
Conditions
ambient temperature
Min
Typ
Max
Unit
2.0
5.0
6.0
VCC
VCC
1000
ns
6.0
500
ns
400
ns
40
+125
6 of 18
74HC564
Philips Semiconductors
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 C
VIH
VIL
VOH
VOL
VCC = 2.0 V
1.5
1.2
VCC = 4.5 V
3.15 2.4
VCC = 6.0 V
4.2
3.2
VCC = 2.0 V
0.8
0.5
VCC = 4.5 V
2.1
1.35
VCC = 6.0 V
2.8
1.8
IO = 20 A; VCC = 2.0 V
1.9
2.0
IO = 20 A; VCC = 4.5 V
4.4
4.5
IO = 20 A; VCC = 6.0 V
5.9
6.0
3.98 4.32 -
5.48 5.81 -
IO = 20 A; VCC = 2.0 V
0.1
IO = 20 A; VCC = 4.5 V
0.1
IO = 20 A; VCC = 6.0 V
0.1
0.15 0.26
0.16 0.26
VI = VIH or VIL
VI = VIH or VIL
ILI
0.1
IOZ
0.5
ICC
CI
input capacitance
8.0
3.5
pF
VCC = 2.0 V
1.5
VCC = 4.5 V
3.15 -
VCC = 6.0 V
4.2
VCC = 2.0 V
0.5
VCC = 4.5 V
1.35
VCC = 6.0 V
1.8
IO = 20 A; VCC = 2.0 V
1.9
IO = 20 A; VCC = 4.5 V
4.4
IO = 20 A; VCC = 6.0 V
5.9
3.84 -
5.34 -
Tamb = 40 C to +85 C
VIH
VIL
VOH
VI = VIH or VIL
7 of 18
74HC564
Philips Semiconductors
Table 7:
Static characteristics continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOL
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
0.1
IO = 20 A; VCC = 4.5 V
0.1
IO = 20 A; VCC = 6.0 V
0.1
0.33
0.33
ILI
1.0
IOZ
5.0
ICC
80
Tamb = 40 C to +125 C
VIH
VIL
VOH
VOL
VCC = 2.0 V
1.5
VCC = 4.5 V
3.15 -
VCC = 6.0 V
4.2
VCC = 2.0 V
0.5
VCC = 4.5 V
1.35
VCC = 6.0 V
1.8
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
1.9
IO = 20 A; VCC = 4.5 V
4.4
IO = 20 A; VCC = 6.0 V
5.9
3.7
5.2
IO = 20 A; VCC = 2.0 V
0.1
IO = 20 A; VCC = 4.5 V
0.1
IO = 20 A; VCC = 6.0 V
0.1
0.4
0.4
V
A
VI = VIH or VIL
ILI
1.0
IOZ
10.0 A
ICC
160
8 of 18
74HC564
Philips Semiconductors
Parameter
Conditions
Min
Typ
Max
Unit
VCC = 2.0 V
50
165
ns
VCC = 4.5 V
18
33
ns
VCC = 6.0 V
14
28
ns
VCC = 5.0 V; CL = 15 pF
15
ns
VCC = 2.0 V
44
140
ns
VCC = 4.5 V
16
28
ns
VCC = 6.0 V
13
24
ns
VCC = 2.0 V
50
135
ns
VCC = 4.5 V
18
27
ns
VCC = 6.0 V
14
23
ns
VCC = 2.0 V
14
60
ns
VCC = 4.5 V
12
ns
VCC = 6.0 V
10
ns
VCC = 2.0 V
80
14
ns
VCC = 4.5 V
16
ns
VCC = 6.0 V
14
ns
VCC = 2.0 V
60
ns
VCC = 4.5 V
12
ns
VCC = 6.0 V
10
ns
VCC = 2.0 V
ns
VCC = 4.5 V
ns
VCC = 6.0 V
ns
VCC = 2.0 V
6.0
38
MHz
VCC = 4.5 V
30
115
MHz
Tamb = 25 C
tPHL, tPLH propagation delay CP to Qn
tPZH, tPZL
tPHZ, tPLZ
tTHL, tTLH
tW
tsu
th
fmax
CPD
set-up time Dn to CP
hold time Dn to CP
see Figure 6
see Figure 7
see Figure 7
see Figure 6
see Figure 6
see Figure 8
see Figure 8
see Figure 6
VCC = 6.0 V
35
137
MHz
VCC = 5.0 V; CL = 15 pF
127
MHz
27
pF
[1]
9 of 18
74HC564
Philips Semiconductors
Table 8:
Dynamic characteristics continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 9.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 40 C to +85 C
tPHL, tPLH propagation delay CP to Qn
tPZH, tPZL
tPHZ, tPLZ
tTHL, tTLH
tW
tsu
th
fmax
set-up time Dn to CP
hold time Dn to CP
see Figure 6
VCC = 2.0 V
205
ns
VCC = 4.5 V
41
ns
VCC = 6.0 V
35
ns
see Figure 7
VCC = 2.0 V
175
ns
VCC = 4.5 V
35
ns
VCC = 6.0 V
30
ns
see Figure 7
VCC = 2.0 V
170
ns
VCC = 4.5 V
34
ns
VCC = 6.0 V
29
ns
see Figure 6
VCC = 2.0 V
75
ns
VCC = 4.5 V
15
ns
VCC = 6.0 V
13
ns
see Figure 6
VCC = 2.0 V
100
ns
VCC = 4.5 V
20
ns
VCC = 6.0 V
17
ns
see Figure 8
VCC = 2.0 V
75
ns
VCC = 4.5 V
15
ns
VCC = 6.0 V
13
ns
see Figure 8
VCC = 2.0 V
ns
VCC = 4.5 V
ns
VCC = 6.0 V
ns
see Figure 6
VCC = 2.0 V
4.8
MHz
VCC = 4.5 V
24
MHz
VCC = 6.0 V
28
MHz
10 of 18
74HC564
Philips Semiconductors
Table 8:
Dynamic characteristics continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 9.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 40 C to +125 C
tPHL, tPLH propagation delay CP to Qn
tPZH, tPZL
tPHZ, tPLZ
tTHL, tTLH
tW
set-up time Dn to CP
tsu
hold time Dn to CP
th
fmax
[1]
see Figure 6
VCC = 2.0 V
250
ns
VCC = 4.5 V
50
ns
VCC = 6.0 V
43
ns
see Figure 7
VCC = 2.0 V
210
ns
VCC = 4.5 V
42
ns
VCC = 6.0 V
36
ns
see Figure 7
VCC = 2.0 V
205
ns
VCC = 4.5 V
41
ns
VCC = 6.0 V
35
ns
see Figure 6
VCC = 2.0 V
90
ns
VCC = 4.5 V
18
ns
VCC = 6.0 V
15
ns
see Figure 6
VCC = 2.0 V
120
ns
VCC = 4.5 V
24
ns
VCC = 6.0 V
20
ns
see Figure 8
VCC = 2.0 V
90
ns
VCC = 4.5 V
18
ns
VCC = 6.0 V
15
ns
see Figure 8
VCC = 2.0 V
ns
VCC = 4.5 V
ns
VCC = 6.0 V
ns
see Figure 6
VCC = 2.0 V
4.0
MHz
VCC = 4.5 V
20
MHz
VCC = 6.0 V
24
MHz
11 of 18
74HC564
Philips Semiconductors
12. Waveforms
1/fmax
CP input
VM
tW
tPHL
Qn output
tPLH
VM
tTHL
tTLH
001aab938
VM = 0.5 VI.
Fig 6. Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock
pulse width, the output transition times and the maximum clock frequency
tr
OE input
10 %
tf
90 %
VM
tPLZ
output
LOW to OFF
OFF to LOW
tPZL
VM
10 %
tPHZ
tPZH
90 %
output
HIGH to OFF
OFF to HIGH
VM
outputs
enabled
outputs
enabled
outputs
disabled
001aab940
VM = 0.5 VI.
12 of 18
74HC564
Philips Semiconductors
VM
CP input
tsu
tsu
th
th
VM
Dn input
VM
Qn input
001aab939
The shaded areas indicate when the input is permitted to change for predictable output
performance.
VM = 0.5 VI.
Fig 8. Waveforms showing the data set-up and hold times for the data input (Dn)
S1
VCC
PULSE
GENERATOR
VI
RL =
1000
VO
VCC
open
GND
D.U.T.
CL
RT
mna232
Test data
Supply
Input
Load
S1
VCC
VI
tr = tf
CL
RL
tPZL, tPLZ
tPZH, tPHZ
tPHL, tPLH
2.0 V
VCC
6 ns
50 pF
1 k
VCC
GND
open
4.5 V
VCC
6 ns
50 pF
1 k
VCC
GND
open
6.0 V
VCC
6 ns
50 pF
1 k
VCC
GND
open
5.0 V
VCC
6 ns
15 pF
1 k
VCC
GND
open
13 of 18
74HC564
Philips Semiconductors
SOT146-1
ME
seating plane
A2
A1
c
e
b1
w M
(e 1)
b
MH
11
20
pin 1 index
E
10
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b1
mm
4.2
0.51
3.2
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
inches
0.17
0.02
0.13
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
e1
ME
MH
Z (1)
max.
6.40
6.22
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
0.25
0.24
0.1
0.3
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.078
(1)
(1)
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
OUTLINE
VERSION
SOT146-1
REFERENCES
IEC
JEDEC
JEITA
MS-001
SC-603
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-13
14 of 18
74HC564
Philips Semiconductors
SOT163-1
A
X
c
HE
v M A
Z
20
11
Q
A2
(A 3)
A1
pin 1 index
Lp
L
10
1
e
bp
detail X
w M
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
D (1)
E (1)
HE
Lp
mm
2.65
0.3
0.1
2.45
2.25
0.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.01
0.019 0.013
0.014 0.009
0.51
0.49
0.30
0.29
0.05
0.419
0.043
0.055
0.394
0.016
inches
0.1
0.012 0.096
0.004 0.089
0.043
0.039
0.01
0.01
(1)
0.9
0.4
0.035
0.004
0.016
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT163-1
075E04
MS-013
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
15 of 18
74HC564
Philips Semiconductors
Revision history
Document ID
Release
date
74HC564_3
Modifications:
Supersedes
The format of this data sheet has been redesigned to comply with the current presentation
and information standard of Philips Semiconductors.
74HC_HCT564_CNV_2
74HC_HCT564_1
74HC_HCT564_1
16 of 18
74HC564
Philips Semiconductors
Definition
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
[2]
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
16. Definitions
17. Disclaimers
Life support These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
17 of 18
74HC564
Philips Semiconductors
19. Contents
1
2
3
4
5
6
6.1
6.2
7
7.1
8
9
10
11
12
13
14
15
16
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . 5
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 17
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Contact information . . . . . . . . . . . . . . . . . . . . 17