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S.MATHANKUMAR, AP/EEE
QUESTION BANK
Subject Name
Objective
Question Bank
UNIT - I
PART A
S.MATHANKUMAR, AP/EEE
QUESTION BANK
26. List out the applications of an instrumentation amplifier and what are the requirements of
instrumentation amplifier?
27. State the applications of monostable multivibrator.
28. What is clamper circuit? How clamper circuits are classified?
29. List the applications of Log amplifiers.
UNIT - I
PART B
1. Draw the circuit of inverting and non inverting amplifiers using Op Amp and Derive an
expression for their gain.
(12 Marks)
2. Explain integrator and differentiator with a neat diagram.
(12 Marks)
(7 Marks)
(5 Marks)
4. i) Draw the block schematic of an Op Amp and briefly explain each block.
ii) What are the Advantages and Disadvantages of Op - Amp?
iii) List the Applications and Features of Op - Amp.
(6 Marks)
(4 Marks)
(2 Marks)
5. Explain Astable & Monostable multivibrator using Op - Amp with a neat diagram.
(12 Marks)
6. Briefly explain triangular wave generators with a neat circuit diagram.
(12 Marks)
7. Explain in detail about V to I converter and I to V converter.
(12 Marks)
8. Explain about instrumentation amplifier with a neat sketch.
(12 Marks)
9. Explain briefly about summing inverting and Non inverting amplifier.
(12 Marks)
10. i) Write short notes on adder, subtractor, and bridge amplifier.
(6 Marks)
ii) Write short notes on half wave rectifier.
(2 Marks)
iii) Explain the peak detector circuit using integrator.
(4 Marks)
S.MATHANKUMAR, AP/EEE
QUESTION BANK
UNIT II
PART A
S.MATHANKUMAR, AP/EEE
QUESTION BANK
UNIT II
PART B
1. i) Draw and explain the working principle of op-amp based voltage controlled oscillator
circuit.
(7 Marks)
ii) Derive the expression for capture range of PLL.
(5 Marks)
2. i) Derive the expression for lock range of PLL.
ii) Explain AM demodulation using PLL.
(5 Marks)
(7 Marks)
(8 Marks)
(4 Marks)
(6 Marks)
(6 Marks)
(8 Marks)
(4 Marks)
(8 Marks)
(4 Marks)
(8 Marks)
(4 Marks)
8. Explain the operation of D/A converter and give some of the Advantages and
Disadvantages
(12 Marks)
S.MATHANKUMAR, AP/EEE
QUESTION BANK
UNIT III
PART A
1. Define radix.
2. What are the number systems?
3. Define the following: minterm and maxterm.
4. What is meant by prime implicant?
5. Convert the given binary (1101010110)10 into gray code.
6. Distinguish between 1s and 2s complements.
7. Define the terms disjunction and conjunction.
8. What are the logic gates?
9. Define SOP and POS.
10. What do you meant by LSB and MSB?
11. How will you find 2s complement of a binary number?
12. What are the alphanumeric codes?
13. Convert the given gray code (1011011101) into binary code.
14. Define karnaugh maps.
15. Write the truth table of AND, OR and NAND gates.
16. What is meant by excess 3 decimal numbers?
17. Define the law of Boolean algebra.
18. What is meant by universal gates?
19. What is Multivariable Theorem?
20. Convert (25)10 to binary.
21. What are the types of karnaugh map?
22. Write the truth table of X-OR and X-NOR.
23. Distinguish between Boolean addition and Binary addition.
24. What is meant by multilevel gates networks?
25. What are the drawbacks of K map method?
26. State De Morgans law.
27. What is the number of bits in ASCII code? What is the need for ASCII code?
DEPARTMENT OF BIOMEDICAL ENGINEERING
S.MATHANKUMAR, AP/EEE
QUESTION BANK
28. Simplify : A AB A B
UNIT III
PART B
f ( A, B, C, D) m(0,1, 4,8,9,10)
(6 Marks)
ii) What are the methods for converting Decimal to Binary conversion?
Give some examples.
(6 Marks)
ii) Explain De Morgans theorem and the duality principle with proof.
3. i) Minimize the Boolean expression: AB ABC ABC ABC
(6 Marks)
(6 Marks)
(6 Marks)
(6 Marks)
(2 Marks)
ii) Convert the following (25B) 16, (5A9.B4)16 to octal and binary.
(4 Marks)
(3 Marks)
(3 Marks)
i) (CB9.F5)16 + (AB8.CD)16.
(3 Marks)
(3 Marks)
(3 Marks)
(3 Marks)
(3 Marks)
(ii)
(3 Marks)
S.MATHANKUMAR, AP/EEE
QUESTION BANK
(iii)
(3 Marks)
(iv)
(3 Marks)
(6 Marks)
(6 Marks)
9.
(3 Marks)
(3 Marks)
(3 Marks)
(3 Marks)
f ( A, B, C, D) m(5,6,7,12,13) d (4,9,14,15)
(6 Marks)
(6 Marks)
S.MATHANKUMAR, AP/EEE
QUESTION BANK
UNIT IV
PART A
S.MATHANKUMAR, AP/EEE
QUESTION BANK
UNIT IV
PART B
(8 Marks)
(4 Marks)
(8 Marks)
(4 Marks)
(8 Marks)
(4 Marks)
(4 Marks)
(8 Marks)
5. i) Explain in detail about parallel binary adder with neat block diagram.
ii) Give the comparison between PROM, PLA and PAL.
(6 Marks)
(6 Marks)
6. Explain details about the design procedure of circuit 4 - bit multiplier with example. (12 Marks)
(6 Marks)
(6 Marks)
8. How will you build a full adder using two half adders and an OR gate? Explain briefly. (12 Marks)
9. Draw and explain the block diagram of n - bit parallel and binary adder subtractor.
(12 Marks)
(4 Marks)
(8 Marks)
S.MATHANKUMAR, AP/EEE
QUESTION BANK
UNIT V
PART A
10
S.MATHANKUMAR, AP/EEE
QUESTION BANK
UNIT V
PART B
(6 Marks)
(6 Marks)
(12 Marks)
3. Explain synchronous decade counter using JK flip-flop with block diagram in detail. (12 Marks)
4. i) Distinguish between synchronous and asynchronous sequential circuits.
ii) Comparison between synchronous and asynchronous counters.
5. Explain in detail JK & T flip-flop with neat circuit diagram
6. i) Briefly explain about Ring counter with neat block diagram.
ii) Write a short notes on State tables and State diagram
7. Explain right shift register using JK flip-flop with block diagram in detail.
(6 Marks)
(6 Marks)
(12 Marks)
(8 Marks)
(4 Marks)
(12 Marks)
8. Explain synchronous decade counter using D flip-flop with block diagram in detail. (12 Marks)
9. Explain right shift register using D flip-flop with block diagram in detail.
(12 Marks)
10. Explain synchronous decade counter using T flip-flop with block diagram in detail. (12 Marks)
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