Académique Documents
Professionnel Documents
Culture Documents
ME - Curriculum
Electronics & Telecommunication Engineering Department
July, 2013
Course
Code
Subject
Scheme of
Teaching
(Hrs/Week)
L
T
P
Total
Credits
Test
ET 541
2
3
ET 542
ET 543
ET 544
5
ET
LABORATORY COURSES
6
ET 549
Seminar-I
7
ET 550
System Lab-I
Elective I:
Theory
TA
ESE
Term
Work
Practical/
Viva-voce
Total
20
20
60
100
3
3
1
1
4
4
20
20
20
20
60
60
100
100
20
20
60
100
20
20
60
100
4
4
2
2
50
-
50
50
50
15
24
100
100
300
50
50
600
ET 545 (i) VLSI Design ET 546(ii) Digital Image Processing and Applications
ET 547(iii) Advance Antennas & Arrays ET 548(iv) Solid State Devices
SEMESTER-II
THEORY COURSES
S.
No.
Course
Code
Subject
Scheme of
Teaching
(Hrs/Week)
L
T
P
Total
Credits
Test
ET
ET
ET
ET
5
ET
LABORATORY COURSES
6
ET
Seminar-II
7
ET
System Lab-II
Elective-II: ET
Theory
TA
ESE
Term
Work
Practical/
Viva-voce
Total
20
20
60
100
20
20
60
100
20
20
60
100
20
20
60
100
20
20
60
100
4
4
2
2
50
-
50
50
50
15
24
100
100
300
50
50
600
Course
Code
Subject
1
Institute Elective
LABORATORY COURSES
1
ET603
Dissertation-I
Scheme of
Teaching
(Hrs/Week)
L
T
P
Total
Credits
03
01
04
Test
20
03
01
20
20
10
14
20
Theory
TA
ESE
20
60
20
60
Term
Work
Practical/
Viva-voce
Total
100
100
100
100
200
SEMESTER-IV
LABORATORY COURSES
S.
No.
Course
Code
Subject
Scheme of
Teaching
(Hrs/Week)
L
T
P
Total
Credits
Test
ET604
Dissertation-II
28
Theory
TA
ESE
14
14
L-Lectures, T-Tutorials, P-Practical, TA-Teacher Assessment, ESE-End-Semester Examination
Term
Work
100
Practical/
Viva-voce
100
Total
200
200
Course
Code
Subject
Scheme of
Teaching
(Hrs/Week)
L
T
P
Total
Credits
Test
SEMESTER-I
Advance Digital Signal
Processing
2
ET542
Digital System Design
3
ET544
Digital Communication System
Total Credit for Sem-I
SEMESTER-II
1
ET543
Advance Industrial Automation
2
ET
Elective-I
3
ET
Wireless and Mobile
Communication
Total Credit for Sem-II
SEMESTER-III
1
ET
Embedded System Design
2
ET
Computer Network and
Information Security
LABORATORY COURSES
3
ET549
Seminar-I
4
ET550
System Lab-I
Total Credit for Sem-III
SEMESTER-IV
1
ET528
Industrial Drives and Control
2
ET530
Elective-II
LABORATORY COURSES
3
ET531
Seminar-II
4
ET532
System Lab-II
Total Credit for Sem-IV
SEMESTER-V
1
Institute Elective
LABORATORY COURSES
2
ET603
Dissertation-I
Total Credit for Sem-V
SEMESTER-VI
1
ET604
Dissertation-II
Total Credit for Sem-VI
1
ET541
Theory
TA
ESE
Term
Work
Practical/V
iva-voce
Total
20
20
60
100
3
3
9
1
1
3
4
4
12
20
20
60
20
20
60
60
60
180
100
100
300
3
3
3
1
1
1
4
4
4
20
20
20
20
20
20
60
60
60
100
100
100
12
60
60
180
300
3
3
1
1
4
4
20
20
20
20
60
60
100
100
06
4
4
8
2
2
12
40
40
120
50
50
50
50
50
50
300
3
3
1
1
4
4
20
20
20
20
60
60
100
100
4
4
8
2
2
12
40
40
120
50
50
50
50
50
50
300
03
01
04
20
20
60
03
01
20
20
10
14
20
20
60
100
100
28
28
14
14
100
100
100
100
200
100
100
200
200
03Hrs/Week
01Hrs/Week
04
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
UNIT-1
Spectral estimation
06 Hrs
Estimation of spectra from finite duration signals, Nonparametric methods, Periodogram,
Modified periodogram, Bartlett, Welch and Blackman-Tukey methods, Parametric methods:
ARMA, AR and MA model based spectral estimation, Solution using Levinson-Durbin algorithm
UNIT-2
06 Hrs
Adaptive filters
Adaptive Signal Processing, Adaptive filters, Concepts: Adaptive filter as a Noise Canceller,
Other configurations of the adaptive filter, Main components of the adaptive filter, Basic
Wiener filter theory Wiener filter for filtering and prediction, FIR and IIR Wiener filters,
Discrete Kalman filter, The basic LMS adaptive algorithm, Practical limitations of the basic LMS
algorithm, Recursive Least Square Algorithm, Limitations, Factorization Algorithm Linear
prediction, Forward and Backward prediction
UNIT-3
UNIT-4
Wavelets
06 Hrs
Wavelet Analysis, The Continuous Wavelet Transform, scaling, shifting, scale and frequency,
The Discrete Wavelet Transform, One Stage filtering, Approximation and Details, Filter bank
analysis, Multilevel Decomposition, Number of levels, Wavelet reconstruction, Reconstruction
filter, Reconstructing Approximations and details Multilevel Reconstruction, Wavelet packet
synthesis- Typical Applications
UNIT-5
06 Hrs
DSP processor
General and special purpose DSP Processors, Computer Architecture for signal processing,
Havard Architecture, Pipelining, Hardware Multiply and Accumulate, Special Instructions,
Replication, On-chip Memory Cache, Extended Parallelism, SIMD, VLIW and static super-scalar
Processing, Brief study of TMS320C XX and ADSP 2106 processors
Teaching Scheme
Lectures
Tutorials
Total Credits
Objectives
03Hrs/Week
01Hrs/Week
04
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
UNIT-1
Analysis of Sequential systems: State tables and Diagrams, latches, flip flops, sequential 06Hrs
machine analysis and design, Algorthmic State Machine diagrams, Design using ASM.
UNIT-2
Design using VHDL: Hardware Description Languages, HDL Design Flow, Hardware Simulation, 06Hrs
Hardware Synthesis, Levels of Abstraction, Entities and architectures, Data objects, types,
design description, libraries, synthesis basics, mapping statements to Gates, model
optimization, verification, test benches, Architectural synthesis, optimization.
UNIT-3
UNIT-4
UNIT-5
06Hrs
06Hrs
Course Outcomes
03Hrs/Week
01Hrs/Week
04
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
UNIT-1
UNIT-2
UNIT-3
UNIT-4
UNIT-5
Fuzzy Controllers
06 Hrs
Fuzzy sets and Basic notions, Fuzzy relation calculations, Fuzzy members, Indices of Fuzziness,
comparison of Fuzzy quantities, Methods of determination of membership functions. Fuzzy
Logic Based Control: Fuzzy Controllers, case studies
06 Hrs
8. Gopal M, Digital Control and State variable Methods, Tata MH, Second Edition
9. I. J. Nagrath and M. Gopal, Control System Engineering, New Age Publication, 3rd Edition
Course Outcomes
03Hrs/Week
01Hrs/Week
04
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
UNIT-1
Sampling Process
06 Hrs
Sampling theorem, Quadrature sampling of bandpass signals, Reconstruction of a message
processes from its samples, Signal distortion in sampling, Practical aspects of sampling and
signal recovery, Pulse amplitude modulation, Time division multiplexing
UNIT-2
UNIT-3
UNIT-4
UNIT-5
06 Hrs
Course Outcomes
03Hrs/Week
01Hrs/Week
4
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
UNIT-1
06 Hrs
UNIT-2
Design Methodology
Devices: Diode, MOSFET, Process Variations, Technology Scaling. Circuit Simulation: The Wire,
Interconnect Parameters capacitance, resistance and Inductance, Electrical Wire Models,
SPICE Wire Models
06 Hrs
UNIT-3
CMOS Inverter
Static CMOS Inverter, robustness of the CMOS Inverter, static behavior, dynamic behavior,
Power, Energy and energy delay
06 Hrs
UNIT-4
06 Hrs
UNIT-5
Course Outcomes
03Hrs/Week
01Hrs/Week
4
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
UNIT-1
Introduction
06 Hrs
Digital Image Representation, Sampling and Quantization, some basic relationship between
Pixels, Image Geometry, Image Enhancement in spatial domain, spatial filtering
UNIT-2
Image Transformation
06 Hrs
Fourier Transform, The discrete Fourier Transform, properties of the Two dimensional Fourier
Transform, The Fast Fourier Transform, Hadamand-Hough-Hotelling transform, Wavelet
transforms, Enhancement in the Frequency Domain, Color Image Processing
UNIT-3
Image Restoration
06 Hrs
Degradation Model, Diagonalisation of Circulant and Block circulant Matrices, Algebraic
approach to Restoration, Inverse Filtering, Least Mean SquareFilter, Geometric
Transformation.
Image Compression: Fundamentals Image Compression Models, Error-free Compression Lossy
Compression
UNIT-4
Image Segmentation
06 Hrs
Edge Detection, Thresholding, Region based and motion based Segmentation, Morphology,
Representation and Description:- Representation Schemes, Boundary Descriptors, Regional
Descriptions, Relation Descriptors
UNIT-5
UNIT-1
UNIT-2
UNIT-3
UNIT-4
UNIT-5
03Hrs/Week
01Hrs/Week
4
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
04 Hrs
06 Hrs
06 Hrs
06 Hrs
08 Hrs
Objectives
03Hrs/Week
01Hrs/Week
4
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
UNIT-1
Review of Physics of Semiconductor Theory: Introduction, crystal structure of solids, types of 6 Hrs
solids, Space lattices, Atomic bonding, Imperfections and impurities in solids, growth of
semiconductor materials, theory of solids, principles of quantum mechanics, Energy
quantization and probability concepts, energy band theory, density of states function,
statistical mechanics
UNIT-2
Semiconductors in equilibrium: charge carriers in semiconductors, dopant atoms and energy 6 Hrs
levels, carrier distributions in extrinsic semiconductor, statistics of donor and acceptors, carrier
concentrations-effects of doping, position of Fermi energy level-effects of doping and
temperature, Carrier transport and excess carrier phenomenon-carrier drift, carrier diffusion,
graded impurity distribution, carrier generation and recombination, hall effect
UNIT-3
The pn junction and metal semiconductor contact- basic structure of pn junction, zero bias 6 Hrs
applied, metal semiconductor contact-rectifying junction, forward bias, metal semiconductor
ohmic contacts, non uniformly doped pn junction, device fabrication technique
UNIT-4
MOSFET- MOS field effect transistor action, MOS capacitor-potential difference, CV 6 Hrs
characteristics, MOSFET operation, small signal equivalent circuits and frequency limitation
factors, Device fabrication techniques, MOSFET scaling, non ideal effects, threshold voltage
modification, electrical characteristics, device fabrication techniques
UNIT-5
Non-equilibrium Excess Carriers in Semi Conductor- carrier generation and recombination, 6 Hrs
analysis of excess carriers, ambipolar transport, Quasi-Fermi energy levels, excess carrier life
time, surface effects
Course Outcomes
ET549: Seminar I
Teaching Scheme
Evaluation Scheme
Practical
04Hrs/Week
Term Work
50Marks
Credits
02
Practical/Viva-voce
-Objectives
To make the students collect, compile, comprehend and present research literature in any
field of Electronics Engineering
To apply effective strategies in literature searches
To document properly according to a prescribed style
Seminar at the end of first semester in Full Time M.E. (Electronics) course and at the end of
the third semester in the part time M.E. (Electronics) course shall be the term work
submitted by the candidate in the form of a technical essay or a report or analysis and/ or
design on any current topic in the field of Electronics or in the allied field. The candidates will
deliver a talk on that topic and assessment will be made on the basis of term work and talk
there on by two internal examiners, one of whom will be the guide and the other being
appointed by the principal of the institution.
Outcomes
Objectives
Evaluation Scheme
Term Work
Practical/Viva-voce
--50 Marks
Individual student or group of two (max)student will perform the work as per following and submit the
report based on result obtained and/or study perform under the guidance of respective guide (min 25
pages)
The work will be assessed by oral/practical examination of two hours duration by two examiners out of
which one will be respective guide or the teacher nominated by head of the department in the absence
of respective guide on schedule .second examiner will be eminent teacher or professional / expert from
industry.
Work will be carried out by the student:
i)
Student will perform
experimentation in any subject laboratory of the
department/institute as assigned by the respective guide, leading towards concept
understanding, development of laboratory set up and/or learning resources
OR
ii)
Student will perform literature survey about the topic and /or concerned subject laboratory
assign by respective guide, leading towards the details for modernization, research and
development or thrust area subject laboratories
(Thrust area should be as per Government of Maharashtra / Govt. of India policies and
AICTE/UGC/DST/DRDO/ISRO etc guide lines)
OR
iii)
Student will develop ,specific software using C/C++/VB/VC/JAVA etc which will improve
functions of system (Subject Laboratory/ Library /Student Section/ Office/ Exam System etc)
as assigned by respective guide
OR
iv)
Student will perform detailed hardware and software designing of product /system
concerned to the subject laboratory leading towards post graduate dissertation
Outcomes
03Hrs/Week
01Hrs/Week
04
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
Objectives
UNIT-1
UNIT-2
UNIT-3
UNIT-4
UNIT-5
Client-server, Web, HTTP, FTP, SMTP, POP3, and DNS, Peer-to-peer file sharing networks,
Networking simulation and modeling techniques,
Managing network devices such as switch, Router, Firewall & modems.
Sockets Programming and Implementation. Client-server implementation, Web server
implementation, Case Studies
Advanced IP multicast, including IPv6 multicast and SSM, Peer-to-Peer network architectures
IP network management and monitoring, Host configuration methods, Trends in network
threats Information security principles
Cryptography, Goals, Attacks, Services and mechanisms Design principle of Block Ciphers &
Block Cipher algorithms, Modern symmetric key ciphers, DES $ AES Public Key Cryptography
RSA, Elliptic curve cryptosystems
Electronic mail security applied to mail server and mail clients, PGP and S/MIME, IP and Web
Security Protocols, SSL (Secure Sockets Layer), HTTPS (Hyper Text Transport Protocol Secure)
System Security: Computer virus, Firewall and Intrusion detection, Electronic commerce
security Introduction to web based bio authentication, Smart card, RF ID, Cyber laws related to
E commerce, IT Act-2005
6 Hrs
6 Hrs
6 Hrs
6 Hrs
6 Hrs
UNIT-1
UNIT-2
UNIT-3
UNIT-4
UNIT-5
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
03Hrs/Week
01Hrs/Week
04
20 Marks
20 Marks
60 Marks
Understand modern embedded systems and the interface issues related to it.
learn latest microcontrollers and their hardware intrefacing
Learn RTOS
Introduction:
Overview of embedded systems, embedded system design challenges, common design metrics
and optimizing them. Survey of different embedded system design technologies, tradeoffs, Custom Single-Purpose Processors, Design of custom single purpose processors.
Advanced Microcontrollers:
Only brief general architecture of AVR and PIC; Instruction Set Architecture, CISC and RISC
instruction set architecture, timers, memory, I/O port expansions, Interrupts, programming
with AVR and PIC, Hardware interfacing.
ARM Processor :
ARM Design Philosophy, ARM Architecture, Registers, Program Status Register, Instruction
Pipeline, Interrupts and Vector Table, ARM Processor Families.
Programming
Instruction Set: Data Processing Instructions, Addressing Modes, Branch, Load, Store
Instructions, PSR Instructions, Conditional Instructions,
Thumb Instruction Set: Register Usage, Other Branch Instructions, Data Processing
Instructions, Single-Register and Multi Register Load-Store Instructions, Stack, Software
Interrupt Instructions, case studies.
Introduction To RTOS
Introduction of real time Operating System, features of operating system, kernel scheduling
and data structures, RTOS design issues, Examples using Real-time OS- VxWorks /RT-Linux/
COS, RTOS porting on Embedded system.
06 Hrs
06 Hrs
06 Hrs
06 Hrs
06 Hrs
Understand and implement the key technology building blocks one need to master
to design embedded systems
Interface the hardware to the controller used
Take on the challenges of the changing scenario in embedded system
UNIT-1
UNIT-2
UNIT-3
UNIT-4
UNIT-5
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
03Hrs/Week
01Hrs/Week
04
20 Marks
20 Marks
60 Marks
06 Hrs
06 Hrs
06 Hrs
06 Hrs
06 Hrs
03Hrs/Week
01Hrs/Week
04
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
To describe different types of diversity and how they improve performance for mobile
radio channels
To enable the student to synthesis and analyze wireless channel modelling and mobile
cellular communication systems
To understand the Multicarrier modulation and OFDM issues
To learn the MIMO communication and its types
To explore the Ultra Wide Band modulation and Wireless Standards.
UNIT-1
UNIT-2
UNIT-3
OFDM
06 Hrs
Introduction to OFDM, Multicarrier Modulation and Cyclic Prefix, Channel model and SNR
performance, OFDM Issues PAPR, Frequency and Timing Offset Issues.
UNIT-4
MIMO
Introduction to MIMO, MIMO Channel Capacity, SVD and Eigenmodes of the MIMO Channel,
MIMO Spatial Multiplexing BLAST, MIMO Diversity Alamouti, OSTBC, MRT, MIMO,OFDM
06 Hrs
UNIT-5
06 Hrs
06 Hrs
Course outcomes
Objectives
03Hrs/Week
01Hrs/Week
4
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
UNIT-1
UNIT-2
RF Modulation:
6 Hrs
Analog and digital modulation of RF circuits, Comparison of various techniques for power
efficiency, Coherent and non-coherent detection, Mobile RF communication and basics of
Multiple Access techniques.
Receiver and Transmitter architectures, Direct conversion and two-step transmitters
UNIT-3
RF Circuits Design:
6 Hrs
Overview of RF Filter design, Active RF components & modeling, Matching and Biasing
Networks. Basic blocks in RF systems and their VLSI implementation, Low noise Amplifier
design in various technologies, Design of Mixers at GHz frequency range, Various mixersworking and implementation.
UNIT-4
UNIT-5
Objectives
03Hrs/Week
01Hrs/Week
4
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
UNIT-1
6 Hrs
UNIT-2
UNIT-3
UNIT-4
Clustering
6 Hrs
Various clustering techniques, cluster analysis, Hierarchical Clustering, Partitional Clustering,
algorithms for clustering data
UNIT-5
Applications
6 Hrs
Applications of Pattern Recognition, typical case studies of Pattern Recognition in data mining,
medical imaging, industrial automation.
UNIT-1
UNIT-2
UNIT-3
UNIT-4
UNIT-5
03Hrs/Week
01Hrs/Week
04
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
20 Marks
20 Marks
60 Marks
06Hrs
06Hrs
06Hrs
06Hrs
Course Outcomes
Objectives
Evaluation Scheme
Test
Teacher Assessment
End-Semester Examination
03Hrs/Week
01Hrs/Week
4
20 Marks
20 Marks
60 Marks
UNIT-1
UNIT-2
Smart materials & Sensors, self healing structures, heterogeneous Nano structures & 6 Hrs
composites, encapsulations, Natural Nano Scale Sensors, electromagnetic sensors, biosensors,
electronic noses. Nanostructures, Micro/Nano devices
UNIT-3
UNIT-4
6 Hrs
UNIT-5
Scanning Probe Microscopy, Noncontact Atomic Force Microscopy and Its Related Topics, Low
Temperature Scanning Probe Microscopy, Dynamic Force, and Microscopy. Nanolithography,
Lithography using photons, electron beams soft lithography. Bio-medical applications.
6 Hrs
Course Outcomes
6 Hrs
ET____: Seminar II
Teaching Scheme
Evaluation Scheme
Practical
04Hrs/Week
Term Work
50 Marks
Credits
02
Practical/Viva-voce
-Objectives
To make the students collect, compile, comprehend and present research literature in any
field of Electronics Engineering
To apply effective strategies in literature searches
To document properly according to a prescribed style
Seminar at the end of first semester in Full Time M.E. (Electronics ) course and at the end of
the third semester in the part time M.E. (Electronics ) course shall be the term work
submitted by the candidate in the form of a technical essay or a report or analysis and/ or
design on any current topic in the field of Electronics or in the allied field . The candidates will
deliver a talk on that topic and assessment will be made on the basis of term work and talk
there on by two internal examiners, one of whom will be the guide and the other being
appointed by the principal of the institution.
Outcomes
Objectives
Evaluation Scheme
Term Work
Practical/Viva-voce
--50 Marks
Individual student or group of two (max)student will perform the work as per following and submit the report
based on result obtained and/or study perform under the guidance of respective guide (min 25 pages)
The work will be assessed by oral/practical examination of two hours duration by two examiners out of which
one will be respective guide or the teacher nominated by head of the department in the absence of respective
guide on schedule .second examiner will be eminent teacher or professional / expert from industry.
Work will be carried out by the student:
i)
Student will perform experimentation in any subject laboratory of the department/institute as
assigned by the respective guide ,leading towards concept understanding ,development of
laboratory set up and/or learning resources
OR
ii)
Student will perform literature survey about the topic and /or concerned subject laboratory
assign by respective guide, leading towards the details for modernization, research and
development or thrust area subject laboratories
(Thrust area should be as per government of Maharashtra / govt. of India policies and
AICTE/UGC/DST/DRDO/ISRO etc. guide lines)
OR
iii)
Student will develop ,specific software using C/C++/VB/VC/JAVA etc. which will improve
functions of system (Subject Laboratory/ Library /Student Section/ Office/ Exam System etc.) as
assigned by respective guide
OR
iv)
Student will perform detailed hardware and software designing of product /system concerned
to the subject laboratory leading towards post graduate dissertation
Outcomes