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Introduction

CMOS Basics, IC Design

Flow, Fabrication

Basic Circuit Entry, Stick Diagram

3. Custom
Layouts

Introduction to basic Layout

concepts

4. Std. Cell
Layout

NOT, NAND, NOR, AND, OR, XOR,

TG, AOI, OAI, ADDER, LATCH, D-FLOP

25

5. Memory
Layout

Bitcell, R/W Circuit, Senseamp, Row

decoder, 8x8 SRAM

25

6. Analog Layout Resistor, Capacitor, Opamp, Matching

25

2. Layout Entry

, Shielding

7. Quality Checks

DRC, LVS, EMIR, Antenna, Latchup,

Proximity Effects
Short Channel Effects, STI
Advanced Topics - Finfet, Double

10

Patterning

8. Labs & Exam

Two Theory and 4 Lab sessions for

project
Written and Mock Interview

ASIC Flow

1. Introduction to front & back end flow

2. General Physical Design(PD) flow
5
graph
3. Common PD terminologies

2. Data setup &

basic flow

1. Data setup: logical libraries, physical

libraries, technology files, extraction
model files
2. Defining power connectivity, timing 20
constraints
3. Basics of design planning
4. Power network synthesis

3. Design
Planning

1. Creating floorplan: Area parameters,

macro placements & pin locations
15
2. Dynamic Behavior: Propagation
Delay, Dynamic Power, Static Power,
Energy, Delay and Energy-Delay

4. Placement

1. Placement setup & checks

2. Placement & optimization based on
timing & congestion
3. Incremental optimization, defining
path groups, refine placement
4. Scan chain based re-ordering
5. Global route during optimization

20

5. Clock Tree
Synthesis(CTS)

1. CTS Gloals: clock-specific targets,

generated & gated clocks, SDC
latencies, NDR Rules
2. CTS & Timing optimization
3. Enable hold time fixing

20

6. Routing

1. Route Steps: Global Route, Track

Assignment, Detail Routing
2. Routing optimization, antenna
violations, blockages & DFM
optimizations

20

1. Chip finishing flow

2. Wire spreading, filler cells insertion,
redundant via insertion
3. Final validation: Parasitics, Netlist,
GDSII

10

7. Chip Finishing

8. Labs & Exam

1. Two Theory and 4 Lab sessions for

project

10

2. Written and Mock Interview

Circuit Design:
1. Digital
Logic
Design
Basics
2. Basics of
CMOS
Devices
3. The
Inverter
4. Combinati
onal Logic
Design
5. Sequential
Logic Design
6. Labs

Layout Design:
1. Layout Basics, Fabrication
2. Standard Cell Layout Design

Physical Design:
1.
2.

3. Memory Layout Design

4. Analog Layout Design

3.

5. Physical Verification
6. Labs

ASIC
Flow
Data
setup &
basic
flow
Design
Plannin
g

4.

Placement

5.

Cock Tree
Synthesis

6.

Routing

7.

Chip
Finishing

8.

Labs