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Semiconductor PN Junction
Theory and Applications
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1.0 Introduction
Semiconductor pn junction is a two-terminal device. It is the most fundamental
device element that forms the basis of many electronic devices such as pn
diodes, optoelectronic devices like light-emitting diode and photodetector, field
effect transistors and bipolar transistor. PN junction conducts high current in
one direction and conduct very small amount of current in the reversed
direction. Thus, pn junction has the property of rectification.
PN junction is formed in a single crystal of semiconductor by making one
end of the crystal p-type by doping it with acceptor atom and making the other
end n-type by doping with donor atoms. The region where p-type and n-type
meet is the junction.
(1.1)
Jn(drift) + Jn(diff.) = 0
(1.2)
As the result of this process, a depletion region meaning a region that lack of
carrier of certain thickness is created at both side of the junction. At time the
depletion region is also termed as space charge region. Figure 1.1 to Fig. 1.3
illustrate the flow process of carriers in p-type and n-type materials and how
equilibrium is attained when they come in contact.
Figure 1.2: A pn junction showing depletion region, space charge layer and electric field
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band diagram showing the location of the carrier at zero bias voltage
equilibrium condition.
Figure 1.4: The energy band diagram of a pn junction showing the location of carriers under
zero voltage bias
Figure 1.5: The energy band diagram of a pn junction showing the location of carriers under
forward bias voltage
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Figure 1.6: The energy band diagram of a pn junction showing the location of carriers under
reverse bias voltage
If the pn junction is forward biased, the diffusion would increase and drift
current is negligible. If the pn junction is reverse biased, the diffusion current
would be negligible and the drift current would increase drastically.
VB =
kT N A N D
ln
q n i2
(1.3)
ni is the intrinsic concentration, and NA and ND are doping concentration of ptype and n-type of diode.
In reverse biased mode, the current flowed in the diode is extremely small.
However, upon further applying the reverse biased voltage until the point VBR
where breakdown occurs. The current would increase rapidly. Normally diode
breakdowns at about negative 25.0V and avalanche breakdown occurs beyond
this voltage point.
From the characteristic curve, an ideal diode equation can be obtained
from equation (1.4).
IF = I S [e qV / kT 1]
(1.4)
called thermal voltage VT. At room temperature, the thermal voltage VT is equal
to 25.8mV.
At forward bias voltage region, for a forward voltage V of a few thermal
voltage value say 5, the term e V / V is much greater than 1. Thus, the forward
current IF is approximated equal to I F = I S e V / V , which is shown as an
exponential curve.
T
At breakdown, the current through the diode increases sharply. There are
two types of breakdown, which are zener effect and avalanche breakdown. If
the breakdown voltage VBR is less the 4EG/q, which is 4.48V, zener effect would
occur. If the breakdown voltage VBR is greater than 6EG/q, which is 6.72V,
avalanche breakdown would occur. EG is the energy band-gap of the
semiconductor. For silicon, it is 1.12eV.
For zener effect to occur, it requires a very high electric field. Typical
electric field for silicon and gallium arsenide is about 106V/cm or higher. To
achieve such a high electric field, the doping concentration of both p and n
regions must be greater than 1017cm-3.
(a)
(b)
Figure 1.8: Zener effect shown by a heavily doped diode
-7-
When the heavily doped diode is reverse-biased, the energy bands become
crossed at the relatively reverse low voltage, which is shown in Fig. 1.8. The nregion conduction band appears opposite the p-region valence band. The
crossing of band aligns the large number of empty states, which are holes in the
n-region conduction band and filled with electrons valence band in p-region. If
the barrier separation between the two bands is narrow, tunneling of electrons
can occur. Tunneling of electron constitutes a reverse current.
For lightly doped diode, which has doping concentration less than 1015cm-3,
electron tunneling is negligible and the breakdown mechanism involves the
impact ionization of host atoms by the energy of the carriers. Normally latticescattering event can result in the creation of electron-hole pair EHP if the carrier
being scattered has sufficient high energy. If the reverse voltage is sufficient
high, the kinetic energy of the electron enters the n-region from p-region would
cause ionizing collision with the lattice as shown in Fig. 1.9. A single such
event results in creation of an EHP pair. The created EHP would also have the
chance to impact and create second EHP pair. The process multiple and would
go on. This process is termed as avalanche process or breakdown. The electronhole multiplication factor M is M =
1
, whereas n is a value between
1 (V / VBR ) n
4 and 6.
2
K S o E Crit
, which is equal to 21.6V if critical electric field
2qN B
(a) I-V characteristic of ideal diode where V < 0, IF = 0 and IF > 0,V = 0
(b) I-V characteristic of piecewise linear model of diode IF <, V <Vturn-on and IF> 0,V >Vturn-on
Figure 1.10: Current-voltage I-V characteristics of an ideal diode
The ideal diode is modeled as an element with zero forward voltage, zero
forward resistance, zero reverse current, infinite reverse resistance and no
breakdown voltage as shown in Fig. 1.10(a) or as piecewise linear model with
non-zero forward voltage, zero forward resistance, zero reverse current, infinite
reverse resistance, and no breakdown voltage as shown in Fig. 1.10(b). The
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non-zero forward voltage of the diode depends on the material type used. For
silicon type, it is about 0.7V, whereas it is about 0.4V for germanium type.
The real diode has a finite forward resistance RF and reverse-biased
resistance RB, which are shown in Fig. 1.7. Thus, the forward voltage VF for the
diode beyond turn-on shall be
VF = VB + IFRF
(1.5)
Based on ohms law, the input voltage Vin is Vin = VB + IFR. If the current IF is
equals to zero ampere then the barrier potential is VB = Vin. Likewise, if VB is
equal to zero volt, then forward current is IF = Vin/R. From the results, the load
line of the circuit is drawn and shown in Fig. 1.12.
The point of intersection is called quiescent or Q-point, which is the staticpoint defined for a dc network. The Q-point can also be determined iteratively
by solving the transcendental equation Vin = VB + I S (e V / V 1)R .
B
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If the input voltage Vin of the circuit shown in Fig. 1.12 is replaced by an ac
voltage Vi = Vpsint riding on dc voltage Vm, then the Q-point will dynamically
move along the forward current (IFQ, VBQ) point. The ac resistance rD of the
diode is the reciprocal of the differentiation of equation IF = I S [e qV / kT 1] at Qpoint, which is equal to
rD = VT/IFQ
(1.6)
Lp
qD n n po
. Dp and
L n
Dn are the diffusion coefficient of hole and electron. Lp and Ln are diffusion
length of hole and electron. pno and npo are the minority hole concentration in ntype material and minority electron concentration in p-type material. A is the
cross sectional area of the diode.
A silicon diode at temperature T = 300K has doping concentration NA = ND
= 1.2x1016cm-3, ni = 1.5 x1010cm-3, Dn = 25cm2s-1, Dp = 10cm2s-1, KS = 11.7, Lp
= 2.2x10-3cm and Ln = 3.5x10-3cm, and cross section area = 1x10-2cm2. The
minority hole in n-region pno is 2.25x1020/1.2x1016 = 1.875x104cm-3. The
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saturation
current
Is
is
equal
to
qD p p n 0 qD n n p 0
+
A
L n
L p
10x1.875x10 4 25x1.875x10 4
-13
1.602x10 19 x1x10 2
+
= 3.51x10 A.
3
3
3.5x10
2.2 x10
Rectifier diode
Zener diode
LED
Photo diode
There are a few important applications for pn junction or diode, which depend
on how the diode is biased. Figure 1.15 shows different quadrants of the I-V
characteristic of diode used for six diode types, which are rectifying diode,
light-emitting diode, laser diode, zener diode, photodetector, and the solar cell.
Rectifying diode operates in quadrant one and three as shown in Fig.
1.15(a). Light-emitting diode and laser-diode operate in quadrant one as shown
in Fig. 1.15(b). Zener diode and photodetector operate in quadrant three shown
in Fig. 1.15(c). Lastly, solar cell operates in quadrant four as shown in Fig.
1.15(d).
(a)
(b)
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(c)
(d)
Figure 1.15: The operating quadrants of important diode types
(a)
(b)
Figure 1.16: A half wave rectifier circuit and its output results
One can also use the dc load line curve shown in Fig. 1.12 to obtain the Q-point
and subsequently obtaining the result shown in Fig. 1.16. The average output
voltage is equal to Vavg =
1
T
T/2
(V
Vp 0.7
, which approximately
(a)
(b)
Figure 1.17: The circuit and output result of a half wave rectifier with filter capacitor
For a small ripple voltage Vpp as compared with dc voltage level Vdc, this
condition is called light loading. The load current in resistor R shall be
considered constant. For small ripple voltage, the charging and discharging can
be considered linear. The change in ripple voltage Vpp follows equation (1.7).
VPP =
I F t
C
(1.7)
V
IF
= dc
fC fRC
(1.8)
From the result shown in Fig. 1.17, the dc voltage Vdc is equal to equation (1.9).
Vdc = Vp 0.7 Vpp/2
(1.9)
Substituting equation (1.8) into (1.9), it yields equation (1.10) for dc voltage
Vdc.
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Vdc =
VP 0.7
1
1+
2 fRC
(1.10)
1
is defined ripple factor for half
fRC
wave rectification.
A full-wave rectification circuit and its corresponding output are shown
Fig. 1.18. The voltage at the secondary coil is VSec =
Vp sin t
n
VP
, where n is the coil ratio. Since it is a centre tapped type
n
V
V
rectifier, the maximum voltage at the resistance R is sec 0.7 = p 0.7 .
2
2n
voltage is Vsec =
substituting Vdc = IFR. The dc voltage Vdc = Vsec/2 0.7 Vpp/2. Thus, the dc
voltage Vdc is equal to Vdc =
1
=
T
Vsec / 2 0.7
. The average dc voltage before filtering
1
1+
4 fRC
T/2
2(V
sec
1
for full-wave rectifier circuit.
2 fRC
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2(Vsec / 2 0.7)
. The ripple factor
During the positive input cycle, the maximum voltage at the cathode
terminal of diode D1 and diode D2 is Vsec/2-0.7V. The anode of diode D2 is
receiving a maximum voltage Vsec/2. Thus, the maximum reverse bias voltage
across diode D2 is Vsec/2-0.7 (-Vsec/2) = Vsec -0.7V. Based on the analysis, the
peak inverse voltage of the diode used for the circuit should be at least (Vp/n0.7) volt since the peak voltage of Vsec is Vp/n.
A full- wave bridge rectifier circuit is shown in Fig. 1.19. The peak voltage
of the secondary coil is Vsec = Vp/n. The maximum voltage at node D shall be
Vsec 1.4V, which is Vp/n-1.4V.
During the positive cycle of the signal, the maximum voltage at node B is Vp/n.
The minimum voltage at node A is zero. Therefore, the reverse bias across
diode D1 is Vp/n. Thus, the peak inverse voltage PIV of diode is Vp/n.
Vin VZ
IZ + IL
(1.11)
IZ is the zener current flows in the zener diode in breakdown region and IL is the
load current. Vin is the power supply voltage. Zener diode also has a maximum
power rating PZM which defined as maximum allowable current flows into the
zener diode IZM multiply by VZ.
alloy semiconductor, LED that produces visible light range from red to violet
can be achieved. Figure 1.21 illustrates the structure of light-emitting diode
LED.
Light-emitting diode LED integrated into an optical cavity is laser diode. The
working principle is similar to an LED that it is essentially forward biased pn
junction in which recombining carrier produces light. In the laser diode, the
excited electrons are stimulated to recombine simultaneously to produce an
intense beam of photon of the same wavelength. Some of these photons are then
reflected back in the optical cavity through the device to generate more
electron-hole pair, which in turn recombines to produce more light. Figure 1.22
illustrates the structure of laser diode.
Fig. 1.23. The method of creating minority carrier is also known as optical
injection. The carriers are called "excess" carriers because they are extra to
those generated thermally.
Figure 1.23: Typical I-V characteristic of pn junction under dark and light condition
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Power is generated from solar cell since it operates in forth quadrant of the
current-voltage I-V characteristic curve of the diode. The negative generated
current, which comes from minority carrier and forward bias of the pn junction
given rise to negative power, which shall mean power is generated. Usually the
contact area of electrode should be large and at the same time the exposed area
for the incident photon should very much larger than the area of electrode. The
electrode is usually designed having comb-like structure. Individual solar cell is
not capable of delivering sufficient power, so it is commonly connected in the
form of large arrays.
Figure 1.26 shows the characteristic curve of a solar cell. The power
generated is the product of Imax and Vmax.
- 21 -
All solar cells have a figure of merit associated with them, which is used to
indicate how good the device is. The figure of merit is the fill factor or power
efficiency , which is defined as
=
Pmax
I V
= max max
I sc Voc
I sc Voc
(1.12)
where Isc is the short circuit current, Voc is the open-circuit voltage. Imax and
Vmax are maximum current and voltage respectively.
Solar efficiency s is defined as
s =
Pmax
Psolar
(1.13)
where Psolar is the amount of solar power reaching the cell. Ideally, s would be
equal to one indicating that all incident solar radiation is being converted to
electrical power. However, the known solar efficiency so far is less than 30%
utilizing gallium arsenide.
(1.14)
(1.15)
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(a)
(b)
Figure 1.27: Logic gate (a) OR gate and (b) AND gate
In the analysis of clipper circuit, one may use ideal diode model shown in
Fig. 1.10(a), where the diode is in forward bias mode, it is assumed to have zero
forward voltage. When it is in reverse bias mode, it is assumed to be an open
circuit. The piecewise linear model of the diode shown in Fig. 1.10(b) can also
be used depending on the significance of the forward bias voltage to the overall
results.
Negative series clipper clips the negative portion of the ac voltage, while
the positive series clipper clips the positive portion of the ac voltage. If the
amplitude of the ac voltage is Vp, then the maximum voltage of the clipper shall
be (Vp 0.7) for negative series clipper circuit and minimum voltage is (Vp0.7) for positive series clipper circuit.
From Kirchhoffs voltage law, the equation for the load voltage VL for negative
series clipper is
VL = (VP sin t 0.7 ) t = 0
t =T / 2
t =T
; VL = 0 t =T / 2
(1.16)
t =T / 2
(1.17)
During the positive cycle of the ac signal, diode D1 is in reverse bias mode.
Thus, by voltage divider law, the voltage across the load RL is equal to
RL
RL
VP sin t .
Vin =
RL + RS
RL + RS
For positive bias clipper circuit, during the positive cycle of the ac signal, the
diode is in forward bias. Thus, the voltage across the load RL is clipped to 0.7V
+ VB.
During the negative cycle of the ac signal, diode D1 is in reverse bias
mode. Thus, the voltage across the load RL is equal to
RL
RL
VP sin t .
Vin =
RL + RS
R L + RS
For negative bias clipper circuit, during the positive cycle of the ac signal,
diode D1 is in reverse bias mode. Thus, the voltage across the load RL shall be
RL
RL
VP sin t .
Vin =
RL + RS
RL + RS
During the negative cycle of the ac signal, diode is in reverse bias mode.
Thus, the voltage drops across the load resistor shall be forward bias voltage of
the diode, which is (0.7 V + VB).
1.8.4 Clamper
A clamper is a circuit designed to shift ac waveform either above or below a
given reference voltage, which is usually the zero reference. A negative clamper
circuit is shown in Fig. 1.32.
During positive cycle of the ac signal, the diode is in forward bias mode and the
capacitor will be charged very quickly to its amplitude Vp due short time
constant. During negative cycle of the ac signal, the diode is in reverse bias.
Owing to large discharging time, the capacitor is able to maintain its charge.
Thus, from Kirchhoffs voltage law, the maximum voltage across the load RL
shall be approximately equal to 2Vp. If the input ac voltage is Vin = Vp sint,
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by KVL, during the positive cycle, Vpsint = VC + VL. Knowing that during the
positive cycle VC is approximately equal to Vp, the voltage across the load L
shall be
VL = -Vp(sint + 1)
(1.18)
A positive bias clamper circuit is shown in Fig. 1.33. The bias voltage VB is
used to shift the negative clamped signal to a voltage level VB above the zero
reference level.
During the positive cycle of the input voltage Vin = Vpsint, the maximum
voltage across the capacitance VC is VC = Vp - 0.7 - VB Vp - VB if the ideal
model of diode is used. By Kirchhoffs voltage law, during the positive cycle,
Vpsin t = VC + VL = Vp - VB + VL. Thus, the load voltage VL is
VL = Vpsin t (Vp VB)
(1.19)
If one changes the bias voltage VB to a negative value, the output negative
clamped signal would shift a voltage level VB below the zero reference level.
The equation of the voltage across the load VL is equal to equation (1.20) if
ideal model of diode is used.
VL = Vpsin t (Vp + VB)
(1.20)
The input voltage Vin would produce a high-level voltage at the output. This
would cause forward bias of the diode and begins to charge the capacitor C. As
soon as the voltage of the capacitor C reaches the voltage of the input voltage
Vin. It causes the output of comparator to swing low. This prevents to the
capacitor to discharge because the diode is in reversed bias mode and the input
current of the operational amplifier is negligible. For next instant, if the Vin is
less than previous instant, the Vout would hold the highest voltage value of the
previous instant.
1.8.5.1 Positive Signal Detector
The diode and operational amplifier are configured as current buffer for a
positive signal detector as shown in Fig. 1.35.
The current source is used to keep the diode current constant irrespective of the
value of input voltage. Thus, the voltage drop across diode shall remain
constant. The diode that has highest input voltage will conduct and the output
voltage is approximately equal to the input voltage.
As the line dc input change, which should be within a certain limit, there is no
change at the output is called line regulation. Line regulation can also be
defined as the percentage change in the output voltage for a given change in the
line input voltage. Thus, mathematically line regulation can be expressed as
Line regulation =
(1.21)
When the output voltage remains constant within a certain limit for a change of
output load is called load regulation. Load regulation also is defined as the
percentage change of output voltage for a given change in load current. Thus,
Load Regulation =
% of output voltage
given change of load current
(1.22)
Load regulation =
(1.23)
Tutorials
1.1.
1.2.
There are four current components for a pn junction, describe what are
they and how are they generated?
1.3.
1.4.
At zero bias voltage and thermal equilibrium, we know that Jp(drift) + Jp(diff.)
= 0 and Jn(drift) + Jn(diff.) = 0, discuss their implications ?
1.5.
1.6.
1.7.
If you need to have violet color LED, what should be the energy bandgap of semiconductor be chosen.
1.8.
Determine current IF, voltage drop across diode D, and resistor R for the
circuit shown below.
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1.9.
The diodes shown in the circuit are non-ideal type and the forward
voltage is 0.7V. Calculate the current ID2, ID1, and voltage at point A.
1.10. Find the current flow in the circuit and voltage Vout.
1.13. The full-wave rectifier circuit shown in figure has input voltage Vin =
120sin(250t), transformer coil ratio 5:1, capacitance C1 = 1000F, and R
= 200. Calculate, the values of dc voltage, the ripple voltage, and ripple
factor at node D.
1.14. Given circuit has ripple voltage of 1.2V at node A, C1 = C2 = 1000F and
R = 200, RL = 1.0k, calculate the ripple voltage and dc voltage at
node B.
- 32 -
1.16. Given the value of R1 is equal to 1.0k, what is the value or R2 in order
the zener diode to be conducting? If the value of R2 is 3.0k, determine
the power dissipation of the zener diode.
1.17. Design the voltage tripler and quadrupler circuit and derive the equations
for the voltages.
1.18. Derive the equation for the minimum and maximum output voltage for
the circuit with input shown below.
- 33 -
1.19. The input voltage Vin of the circuit is a square wave of amplitude 4.0V.
Using Piecewise linear model to analyze the maximum and minimum
voltage of the output Vout.
1.20. The input voltage Vin of the circuit is a negative 5V offset square wave of
amplitude 15.0V. Using Piecewise linear model to analyze the maximum
and minimum voltage of the output voltage Vout.
- 34 -
References
1. Thomas L. Floyd, "ElectronicDevices: Conventional Current Version ",
eighth edition, Pearson International Edition, 2008.
2. Robert L. Boylestad, and Louis Nashelsky, Electronic Devices and Circuit
Theory, Nineth edition, Prentice Hall, 2008.
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