Set Instrucciones Motorola

ADC #opr8
ADC opr8
ADC opr16
ADC ,X
ADC opr8,X
ADC opr16,X
ADC opr8,SP
ADC opr16,SP
ADD #opr8
ADD opr8
ADD opr16
ADD ,X
ADD opr8,X
ADD opr16,X
ADD opr8,SP
ADD opr16,SP
Operacin
Suma con acarreo

(Add with Carry)
Suma sin acarreo

(Add without Carry)
Funcin
A = A + C + opr8
A = A + C + (opr8)
A = A + C + (opr16)
A = A + C + (HX)
A = A + C + (opr8 + HX)
A = A + C + (opr16 + HX)
A = A + C + (opr8 + SP)
A = A + C + (opr16 + SP)
A = A + opr8
A = A + (opr8)
A = A + (opr16)
A = A + (HX)
A = A + (opr8 + HX)
A = A + (opr16 + HX)
A = A + (opr8 + SP)
A = A + (opr16 + SP)
Suma entre valor Inmediato con signo y SP

SPH:SPL = SPH:SPL + opr8
(Add Immediate value (signed) to SP)
Suma entre valor Inmediato con signo y
HX
AIX #opr8
H:X = H:X + opr8
(Add Immediate value (signed) to Index
Register HX)
AND #opr8
A = A & opr8
AND opr8
A = A & (opr8)
AND opr16
A = A & (opr16)
AND ,X
Funcin Lgica AND
A = A & (HX)
AND opr8,X
(Logical AND)
A = A & (opr8 + HX)
AND opr16,X
A = A & (opr16 + HX)
AND opr8,SP
A = A & (opr8 + SP)
AND opr16,SP
A = A & (opr16 + SP)
ASL opr8
C (opr8) 0
ASL ,X
C (HX) 0
Corrimiento Aritmtico a la izquierda
ASL opr8,X
(Arithmetic Shift Left)
C (opr8 + HX) 0
ASL opr8,SP
C (opr8 + SP) 0
Corrimiento Aritmtico a la izquierda del
ASLA
Acumulador
C A 0
(Arithmetic Shift Left Acc)
Corrimiento Aritmtico a la izquierda de X
CX0
ASLX
(Arithmetic Shift Left X)
ASR opr8
M7 (opr8) C
ASR ,X
M7 (HX) C
Corrimiento Aritmtico a la derecha
ASR opr8,X
(Arithmetic Shift Right)
M7 (opr8 + HX) C
ASR opr8,SP
M7 (opr8 + SP) C
Corrimiento Aritmtico a la derecha del
A7 A C
ASRA
Acumulador
(Arithmetic Shift Right Acc)
Corrimiento Aritmtico a la derecha de X
ASRX
X7 X C
(Arithmetic Shift Right X)
Bifurcar si Acarreo = 0
If C = 0 then Branch
BCC rel
(Branch if Carry Bit Clear)
Branch = PC + 2 + rel
V H I
N Z C
AIS #opr8
BCLR n,opr8
BCS rel
BEQ rel
BGE rel
BGT rel
BHCC rel
Borrar Bit n en Memoria

(Clear Bit n in Memory)
Bifurcar si Acarreo = 1
(Branch if Carry Bit Set)
Bifurcar si es igual
(Branch if Equal)
Bifurcar si es (operandos con signo)
(Branch if Greater Than or Equal To)
Bifurcar si es > (operandos con signo)
(Branch if Greater Than)
Bifurcar si Acarreo Intermedio = 0
(Branch if Half Carry Bit Clear)
Mn 0; (n = 0,1,..7)
M(opr8) can be any RAM or
I/O register address
If C = 1 then Branch Branch
= PC + 2 + rel
If Z = 1 then Branch Branch
= PC + 2 + rel
If (N V) = 0 then Branch
If (Z & (N V)) = 0 then
Branch
If H = 0 then Branch
Modo de
Direccionamiento
(IMM) 8 bit immediate

(DIR) 8 bit direct
(EXT) 16 bit extended
(IX) indexed, no offset
*
(IX1) indexed, 8 bit offset
(SP1) SP with bit offset
(DIR) 8 bit direct
*
# Ciclos
Nemnico
Banderas
afectadas en
CCR
OperacinCdigo de
Set de Instrucciones Familia de Microcontroladores FREESCALE HC08
A9
B9
C9
F9
D9
E9
9EE9
9ED9
AB
BB
CB
FB
DB
EB
9EEB
9EDB
2
3
4
2
3
4
4
5
2
3
4
2
3
4
4
5
A7
AF

(DIR) 8 bit direct
(SP1) SP with8 bit offset
(SP2) SP with 16 bit offset
(DIR) 8 bit direct
(IX) indexed no offset
* (IX1) indexed, 8 bit offset
A4
B4
C4
F4
D4
E4
9EE4
9ED4
38
78
68
9E68
2
3
4
2
3
4
4
5
4
3
4
5
* (INH) inherent mode
48
58
37
77
67
9E67
4
3
4
5
(DIR) 8 bit direct

* (IX1) indexed, 8 bit offset
47
57
(REL) relative addressing
24
(DIR) 1 bit direct
11,13,
15,17,
19,1B,
1D,1F
25
27
90
92
28
BHI rel
BHS rel
BIH rel
BIL rel
BIT #opr8
BIT opr8
BIT opr16
BIT ,X
BIT opr8,X
BIT opr16,X
BIT opr8,SP
BIT opr16,SP
BLE rel
BLO rel
BLS rel
BLT rel
BMC rel
BMI rel
BMS rel
BNE rel
BPL rel
BRA rel
BRCLR
n,opr8,rel
BRN rel
BRSET
n,opr8,rel
BSET n,opr8
BSR rel
Operacin
Bifurcar si est por encima

(Branch if Higher)
Bifurcar si esta por encima o es igual
(Branch if Higher or Same)
Bifurcar si Pin IRQ = 1
(Branch if IRQ Pin is High)
Bifurcar si Pin IRQ = 0
(Branch if IRQ Pin is Low)
Bit Test
Bifurcar si es (operandos con signo)

(Branch if Less Than or Equal To)
Bifurcar si est por debajo
(Branch if Lower)
Bifurcar si esta por debajo o es igual
(Branch if Lower or Same)
Bifurcar si es < (operandos con signo)
(Branch if Less Than)
Bifurcar si Mscara de Interrupcin = 0
(Branch if Interrupt Mask Clear)
Bifurcar si negativo
Bifurcar si Mscara de Interrupcin = 1
(Branch if Interrupt Mask Set)
Bifurcar si no es igual
(Branch if Not Equal)
Bifurcar si es positivo
(Branch if Plus)
Bifurcar Siempre
(Branch Always)
Bifurcar si Bit n en Memoria = 0
(Branch if Bit n in Memory Clear)
Nunca bifurcar
(Branch Never)
Bifurcar si Bit n en Memoria = 1
(Branch if Bit n in Memory Set)
Hacer Bit n =1 en Memoria
(Set Bit n in Memory)
Bifurcar a Subrutina
(Branch to Subroutine)
CBEQ
opr8,rel
Compara y salta si es Igual

(Compare and Branch if Equal)
CBEQ
opr8,SP,rel
CBEQA
Funcin
Banderas
afectadas en
CCR
V H I
If (C & Z) = 0 then Branch

If IRQ = 1 then Branch
If IRQ = 0 then Branch
A & opr8
A & (opr8)
A & (opr16)
A & (HX)
0
A & (opr8 + HX)
A & (opr16 + HX)
A & (opr8 + SP)
A & (opr16 + SP)
If (Z & (N V)) = 1 then
Branch
If (C & Z) = 1 then Branch
If (N V) = 1 then Branch
If I = 0 then Branch
If N = 1 then Branch Branch
= PC + 2 + rel
If I = 1 then Branch
If Z = 0 then Branch
If N = 0 then Branch
PC = PC + 2 + rel
If Mn = 0 then Branch
PC = PC + 2
If Mn = 1 then Branch
Mn <--- 1; ;(n = 0,1,..7)
M(opr8) can be any RAM or
I/O register address
PC = PC + 2
Push PCL ; SP = SP - 1
Push PCH ; SP = SP 1
PC = PC + rel
If A- (opr8) = 0 then Branch
If A - (HX) = 0 then Branch
HX = HX + 1
CBEQ X+,rel
CBEQ
opr8,X+,rel
If H = 1 then Branch
If A - (opr8 + HX) = 0 then

Branch
HX = HX + 1
If A - (opr8 + SP) = 0 then
Branch
If A - opr8 = 0 then Branch
N Z C
Modo de
Direccionamiento
29
# Ciclos
Nemnico
Bifurcar si Acarreo Intermedio = 1

(Branch if Half Carry Bit Set)
OperacinCdigo de
BHCS rel
22
24
2F
2E

(DIR) 8 bit direct
A5
B5
C5
F5
E5
D5
9EE5
9ED5
2
3
4
2
3
4
4
5
93
25
23
91
2C
2B
2D
26
2A
20
01,03,05,
07,09,0B
0D,0F
21
00,02,04,
06,08,0A
0C,0E
(DIR) 1 bit direct
10,12,
14,16,
18,1A,
1C,1E
(REL) relative mode
AD
(DIR) 8 Bit Direct
31
(IX+) indexed with post

increment
71
(IX1+) indexed, 8 bit offset

with post increment
61
(SP1) Stack with 8 bit

offset
9E61
(IMM) 8 Bit Immediate
41
* (DIR) 1 bit Direct

(REL) relative mode
* (DIR) 1 bit Direct
CLC
CLI
CLR opr8
CLR ,X
CLR opr8,X
CLR opr8,SP
CLRA
CLRX
CLRH
CMP #opr8
CMP opr8
CMP opr16
CMP ,X
CMP opr8,X
CMP opr16,X
CMP opr8,SP
CMP opr16,SP
COM opr8
COM ,X
COM opr8,X
COM opr8,SP
COMA
COMX
CPHX #opr16
CPHX opr16
CPX #opr8
CPX opr8
CPX opr16
CPX ,X
CPX opr8,X
CPX opr16,X
CPX opr8,SP
CPX opr16,SP
DAA
Operacin
Borrar Bit de Acarreo

(Clear Carry Bit)
Borrar Mscara de Interrupcin
(Clear Interrupt Mask Bit)
Borrar
(Clear)
Borrar Acumulador
(Clear Accumulator)
Borrar Registro Indice X
(Clear Index Register X)
Borrar Registro Indice H
(Clear Index Register H)
Comparar Acumulador con Memoria

(Compare Accumulator with Memory)
Complemento a uno
(One's Complement)
Complemento a uno del Acumulador
(One's Complement Acc.)
Complemento a uno de X
(One's Complement X)
Comparar H:X con Memoria
(Compare Index Register with Memory)
Comparar Registro X con Memoria

(Compare Index Register X with Memory)
Ajuste Decimal del Acumulador

(Decimal Adjust Accumulator)
DBNZ opr8,rel
DBNZ X,rel
DBNZ
opr8,X,rel
Decrementar y bifurcar
si 0
(Decrement and Branch if Not Zero)
DBNZX rel
DEC opr8
DEC ,X
DEC opr8,X
Funcin
(IMM) 8 Bit Immediate
Banderas
afectadas en
CCR
V H I
N Z C
C0
I0
Modo de
Direccionamiento
51
0 (INH) Inherent Addressing
98
(INH) Inherent Addressing
9A
(opr8) = 0
(HX) = 0
(opr8 + HX) = 0
(opr8 + SP) = 0
(DIR) 8 Bit Direct

(SP1) SP, 8 bit offset
3F
7F
6F
9E6F
3
2
3
4
A= 0
(INH) inherent addressing
4F
X= 0
5F
H= 0
A - opr8
A - (opr8)
A - (opr16)
A - (HX)
A - (opr8 + HX)
A - (opr16 + HX)
A - (opr8 + SP)
A - (opr16 + SP)
(opr8) = $FF - (opr8)
(HX) = $FF - (HX)
8C

(DIR) 8 bit direct
*
(DIR) 8 bit direct
1
(IX1) indexed,8 bit offset
A1
B1
C1
F1
E1
D1
9EE1
9ED1
33
73
63
9E63
2
3
4
2
3
4
4
5
4
3
4
5
A = $FF - A
1 (INH) inherent addressing
43
X = $FF - X
53

(DIR) direct, 16 bit data
(DIR) 8 bit direct
*
65
75
A3
B3
C3
F3
E3
D3
9EE3
9ED3
3
4
2
3
4
2
3
4
4
5
* (INH) inherent addressing
72
(opr8+HX) = $FF-(opr8+HX)
(opr8+SP) = $FF-(opr8+SP)
HX - opr16
HX - (opr16)
X - opr8
X - (opr8)
X - (opr16)
X - (HX)
X - (opr8 + HX)
X - (opr16 + HX)
X - (opr8 + SP)
X - (opr16 + SP)
A10
(opr8) = (opr8) 1
If (opr8) 0 then Branch
(DIR) direct mode
3B
(HX) = (HX) 1
If (HX) 0 then Branch
7B
(opr8+HX) = (opr8+HX) 1
(IX1) indexed,8-bit offset
6B
(SP1) SP , 8-bit offset
9E6B
(INH) inherent mode
4B
(INH) inherent mode
5B
(DIR) 8 bit direct

(IX) indexed,no offset
3A
7A
6A
4
3
4
If (opr8+HX) 0 then Branch
DBNZ
opr8,SP,rel
DBNZA rel
If X - opr8 = 0 then Branch
# Ciclos
Nemnico

OperacinCdigo de
#opr8,rel
CBEQX
#opr8,rel
Decrementar el Acumulador y bifurcar si

0
(Decrement and Branch if Acc Not Zero)
Decrementar X y bifurcar
si 0
(Decrement and Branch if X Not Zero)
Decrementar
(Decrement)
(opr8+SP) = (opr8+SP) - 1
If opr8 0 then Branch
A= A- 1
If A 0 then Branch
X=X1
If X 0 then Branch
(opr8) = (opr8) 1
(HX) = (HX) 1
(opr8+HX) = (opr8+HX) 1
DECX
Nemnico
DIV
EOR #opr8
EOR opr8
EOR opr16
EOR ,X
EOR opr8,X
EOR opr16,X
EOR opr8,SP
EOR opr16,SP
INC opr8
INC ,X
INC opr8,X
INC opr8,SP
INCA
INCX
JMP opr8
JMP opr16
JMP ,X
JMP opr8,X
JMP opr16,X
JSR opr8
JSR opr16
JSR ,X
JSR opr8,X
JSR opr16,X
LDA #opr8
LDA opr8
LDA opr16
LDA ,X
LDA opr8,X
LDA opr16,X
LDA opr8,SP
LDA opr16,SP
LDHX #opr16
LDHX opr16
LDX #opr8
LDX opr8
LDX opr16
LDX ,X
LDX opr8,X
LDX opr16,X
LDX opr8,SP
LDX opr16,SP
LSL opr8
LSL ,X
LSL opr8,X
LSL opr8,SP
LSLA
LSLX
LSR opr8
LSR ,X
LSR opr8,X
LSR opr8,SP
LSRA
LSRX
MOV
(INH) inherent mode
4A
X=X-1
(INH) inherent mode
5A
Divisin
(Divide)
A = H:A
H = Residuo
X
A = A opr8
A = A (opr8)
A = A (opr16)
A = A (HX)
A = A (opr8 + HX)
A = A (opr16 + HX)
A = A (opr8 + SP)
A = A (opr16 + SP)
(opr8) = (opr8)+ 1
(HX) = (HX) + 1
(opr8+HX) = (opr8+HX) + 1
(opr8+SP) = (opr8+SP)+ 1
Incrementar Acumulador
(Increment Accumulator)
Incrementar X
(Increment Index Register )
Salto Incondicional
(Jump to Address)
Salto a subrutina
(Jump to Subroutine)
Cargar el Acumulador
(Load Accumulator from Memory)
Cargar HX
(Load Index Register H:X from Memory)
Cargar X
(Load Index Register X from Memory)
Corrimiento Lgico a la Izquierda

(Logical Shift Left)
Corrimiento Lgico a la Izquierda de A
(Logical Shift Left Accumulator)
Corrimiento Lgico a la Izquierda de X
(Logical Shift Left Index Register X)
Corrimiento Lgico a la Derecha
(Logical Shift Right)
Corrimiento Lgico a la Derecha de A
(Logical Shift Right Accumulator)
Corrimiento Lgico a la Derecha de X
(Logical Shift Right Index Register X)
Mover Byte
Funcin
Incrementar
(Increment)
9E6A
A= A- 1
Operacin
OR Exclusiva entre Acumulador y

Memoria
(Exclusive-OR Memory with
Accumulator)
Banderas
afectadas en
CCR
V H I
N Z C
Modo de
Direccionamiento
# Ciclos
DECA
(opr8+SP) = (opr8+SP) - 1
Decrementar Acumulador
(Decrement Accumulator)
Decrementar X
(Decrement Index Register)
OperacinCdigo de
DEC opr8,SP
52
A8
B8
C8
F8
E8
D8
9EE8
9ED8
2
3
4
2
3
4
4
5

(DIR) 8 bit direct
(DIR) 8 bit direct

3C
7C
6C
9E6C
4
3
4
5
A= A+ 1
4C
X=X+1
5C
(DIR) 8 bit direct

(DIR) 8 bit direct
(DIR) 8 bit direct
(DIR) direct 16 bit data
(DIR) 8 bit direct
BC
CC
FC
EC
DC
BD
CD
FD
ED
DD
A6
B6
C6
F6
E6
D6
9EE6
9ED6
45
55
AE
BE
CE
FE
EE
DE
9EEE
9EDE
2
3
2
3
4
4
5
4
5
6
2
3
4
2
3
4
4
5
3
4
2
3
4
2
3
4
4
5
(DIR) 8 bit direct

38
78
68
9E68
4
3
4
5
PC = opr8
PC = opr16
PC = (HX)
PC = (HX + opr8)
PC = (HX + opr16)
PC = opr8
PC = opr16
PC = (HX)
PC = (HX + opr8)
PC = (HX + opr16)
A = opr8
A = (opr8)
A = (opr16)
A = (HX)
A = (opr8+ HX)
A = (opr16+ HX)
A = (opr8+ SP)
A = (opr16+ SP)
HX = opr16
HX = (opr16:opr16+1)
X = opr8
X = (opr8)
X = (opr16)
X = (HX)
X = (opr8 + HX)
X = (opr16 + HX)
X = (opr8 + SP)
X = (opr16 + SP)
C (opr8) 0
C (HX) 0
C (opr8 + HX) 0
C (opr8 + SP) 0
C A 0
48
CX0
58
0 (opr8) C
0 (HX) C
0 (opr8 + HX) C
0 (opr8 + SP) C
34
74
64
9E64
4
3
4
5
0 A C
44
0XC
54
(opr8_2) = opr8_1
6E
(DIR) 8 bit direct

(IMD) immediate-direct
#opr8_1,opr8_2
(Move Data Byte)
MOV opr8,X+
Nemnico
MUL
NEG opr8
NEG ,X
NEG opr8,X
NEG opr8,SP
NEGA
NEGX
NOP
NSA
ORA #opr8
ORA opr8
ORA opr16
ORA ,X
ORA opr8,X
ORA opr16,X
ORA opr8,SP
ORA opr16,SP
PSHA
PSHH
PSHX
PULA
PULH
PULX
ROL opr8
ROL ,X
ROL opr8,X
ROL opr8,SP
ROLA
ROLX
Operacin
Multiplicacin sin signo

(Unsigned Multiply)
Complemento a Dos
(Negate (Two's Complement))
Complemento a Dos del Acumulador
(Two's Complement Accumulator)
Complemento a Dos de X
(Two's Complement Index Register X)
No Operacin
Nibble Swap Accumulator
OR entre Acumulador y Memoria

(Inclusive-OR Accumulator and Memory)
Guardar el Acumulador de la pila

(Push Accumulator onto Stack )
Guardar H en la pila
(Push Index Register H onto Stack)
Guardar X en la pila
(Push Index Register X onto Stack)
Sacar Acumulador de la pila
(Pull Accumulator from Stack)
Sacar H de la pila
(Pull Index Register H from Stack)
Sacar X de la pila
(Pull Index Register X from Stack)
Rotacin a la izquierda a travs del
Acarreo
(Rotate Left through Carry)
Rotacin a la izquierda del Acumulador a
travs del Acarreo
(Rotate Left Accumulator)
Rotacin a la izquierda de X a travs del
Acarreo
(DD) direct to direct
4E
(opr8) = (HX)
HX = HX + 1
(IX+D) indexed to direct

with post increment
7E
(HX) = (opr8)
HX = HX + 1
(DIX+) direct to indexed

with post increment
5E
Funcin
Banderas
afectadas en
CCR
V H I
X:A = A * X
N Z C
Modo de
Direccionamiento
# Ciclos
MOV X+,opr8
(opr8_2) = (opr8_1)
OperacinCdigo de
MOV
opr8_1,opr8_2
42
30
70
60
9E60
4
3
4
5
(DIR) 8 bit direct

*
A = $00 - A
40
X = $00 - X
50

(DIR) 8 bit direct
(IX1) indexed/8 bit offset
(IX2) indexed/16 bit offset
9D
62
AA
BA
CA
FA
EA
DA
9EEA
9EDA
1
3
2
3
4
2
3
4
4
5
87
8B
89
86
8A
88
(DIR) 8 bit direct

(IX1) indexed 8 bit offset
39
79
69
9E69
4
3
4
5
(opr8) = $00 - (opr8)

(HX) = $00 - (HX)
(opr8+HX) = $00 - (opr8+HX)
(opr8+SP) = $00 - (opr8+SP)
Does nothing
A = A[3:0]:A[7:4]
A = A or opr8
A = A or (opr8)
A = A or (opr16)
A = A or (HX)
A = A or (opr8 + HX)
A = A or (opr16 + HX)
A = A or (opr8 + SP)
A = A or (opr16 + SP)
Push A to stack
SP = SP - 1
Push H to stack
SP = SP - 1
Push X to stack
SP = SP - 1
SP = SP + 1
Pull A
SP = SP + 1
Pull H
SP = SP + 1
Pull X
C (opr8) C
C (HX) C
C (opr8 + HX) C
C (opr8 + SP) C
C A C
49
CXC
59
36
76
66
9E66
4
3
4
5
(Rotate Left Index Register X)
ROR opr8
ROR ,X
ROR opr8,X
ROR opr8,SP
RORA
RORX
RSP
RTI
Rotacin a la derecha a travs del Acarreo

(Rotate Right through Carry)
Rotacin a la derecha del Acumulador a
travs del Acarreo
(Rotate Right Accumulator)
Rotacin a la derecha de X a travs del
Acarreo
(Rotate Right Index Register X)
Inicializar SP
(Reset Stack Pointer)
Retorno de Interrupcin
(Return from Interrupt)
C (opr8) C
C (HX) C
C (opr8 + HX) C
C (opr8 + SP) C
(DIR) 8 bit direct

*
C A C
46
CXC
56
9C
80
SP = $FF
SP = SP + 1
Pull CCR ;
SP = SP + 1
Pull A
SP = SP + 1
Pull X
SP = SP + 1
SBC #opr8
SBC opr8
SBC opr16
SBC ,X
SBC opr8,X
SBC opr16,X
SBC opr8,SP
SBC opr16,SP
SEC
SEI
STA opr8
STA opr16
STA ,X
STA opr8,X
STA opr16,X
STA opr8,SP
STA opr16,SP
STHX opr8
STOP
STX opr8
STX opr16
STX ,X
STX opr8,X
STX opr16,X
STX opr8,SP
STX opr16,SP
SUB #opr8
SUB opr8
SUB opr16
SUB ,X
SUB opr8,X
SUB opr16,X
SUB opr8,SP
SUB opr16,SP
SWI
TAP
TAX
TPA
TST opr8
TST ,X
TST opr8,X
TST opr8,SP
TSTA
TSTX
TSX
Operacin
Resta con Prstamo

(Subtract with Carry)
Hacer 1 el Acarreo
(Set Carry Bit)
Hacer 1 el bit de mscara de Interrupcin
(Set Interrupt Mask Bit)
Almacenar Acumulador en Memoria

(Store Accumulator in Memory)
Almacenar HX en Memoria
(Store Index Register HX)
Enter STOP Mode, Enable ~IRQ Pin
Almacenar X en Memoria
(Store Index Register X in Memory)
Resta
(Subtract)
Interrupcin por Software

(Software Interrupt)
(Transfer Accumulator to CCR)

Transfer Accumulator to Index Register X
Transfer CCR to Accumulator
Test for Negative or Zero
Transfer Stack Pointer to Index Register
H:X
Funcin
A = A - C - opr8
A = A - C - (opr8)
A = A - C - (opr16)
A = A - C - (HX)
A = A - C - (opr8 + HX)
A = A - C - (opr16 + HX)
A = A - C - (opr8 + SP)
A = A - C - (opr16 + SP)
(INH) inherent address
Banderas
afectadas en
CCR
V H I
N Z C
C1
I1
Modo de
Direccionamiento
81
# Ciclos
Nemnico
Retorno de Subrutina
(Return from Subroutine)
OperacinCdigo de
RTS
Pull PCH
SP = SP + 1
Pull PCL
SP = SP + 1
Pull PCH
SP = SP + 1
Pull PCL

(DIR) 8 bit direct
*
A2
B2
C2
F2
E2
D2
9EE2
9ED2
2
3
4
2
3
4
4
5
99
9B
B7
C7
F7
E7
D7
9EE7
9ED7
2
3
2
3
4
4
5
(opr8) = A
(opr16) = A
(HX) = A
(opr8 + HX) = A
(opr16 + HX) = A
(opr8 + SP) = A
(opr16 + SP) = A
(DIR) 8 bit direct

(opr8:opr8+1) = HX
(DIR) direct addressing
35
(INH) inherent mode
8E
BF
CF
FF
EF
DF
9EE7
9ED7
A0
B0
C0
F0
E0
D0
9EE0
9ED0
3
4
2
3
4
4
5
2
3
4
2
3
4
4
5
83
84
97
85
3D
7D
6D
9E6D
4D
5D
2
1
1
3
2
3
4
1
1
95
I0
Stop Oscillator
(opr8) = X
(opr16) = X
(HX) = X
(opr8 + HX) = X
(opr16 + HX) = X
(opr8 + SP) = X
(opr16 + SP) = X
A = A - opr8
A = A - (opr8)
A = A - (opr16)
A = A - (HX)
A = A - (opr8 + HX)
A = A - (opr16 + HX)
A = A - (opr8 + SP)
A = A - (opr16 + SP)
PC = PC + 1
Push PCL
SP = SP - 1
Push PCH
SP = SP - 1
Push X
SP = SP - 1
Push A
SP= SP - 1
Push CCR
SP = SP - 1
I=0
PCH = ($FFFC)
PCL = ($FFFD)
CCR = A
X=A
A = CCR
(opr8) - $00
(HX) - $00
(opr8 + HX) - $00
(opr8 + SP) - $00
A - $00
X - $00
H:X = SPH:SPL
(DIR) 8 bit direct

(DIR) 8 bit direct
*
0
0
*
*
*
*

(DIR) 8 bit direct
TXA
TXS
WAIT
Transfer Index Register X to Accumulator

Tansfer Index Register H:X to Stack
Pointer
Enter Wait Mode
A= X
9F
SPH:SPL = H:X
94
I=0

Set Instrucciones Motorola

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Set Instrucciones Motorola

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ADC #opr8

Suma con acarreo

Suma sin acarreo

Suma entre valor Inmediato con signo y SP

Borrar Bit n en Memoria

(IMM) 8 bit immediate

Set de Instrucciones Familia de Microcontroladores FREESCALE HC08

(IMM) 8 bit immediate

(IMM) 8 bit immediate

(IMM) 8 bit immediate

* (INH) inherent mode

* (INH) inherent mode

(DIR) 8 bit direct

* (INH) inherent mode

* (INH) inherent mode

(REL) relative addressing

(DIR) 1 bit direct

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

Bifurcar si est por encima

Bifurcar si es (operandos con signo)

Compara y salta si es Igual

Compara y salta si es Igual

(REL) relative addressing

If (C & Z) = 0 then Branch

If A - (opr8 + HX) = 0 then

Bifurcar si Acarreo Intermedio = 1

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(IMM) 8 bit immediate

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(REL) relative addressing

(DIR) 1 bit direct

(REL) relative mode

(DIR) 8 Bit Direct

(IX+) indexed with post

(IX1+) indexed, 8 bit offset

(SP1) Stack with 8 bit

(IMM) 8 Bit Immediate

* (DIR) 1 bit Direct

Borrar Bit de Acarreo

Comparar Acumulador con Memoria

Comparar Registro X con Memoria

Ajuste Decimal del Acumulador

(IMM) 8 Bit Immediate

0 (INH) Inherent Addressing

(INH) Inherent Addressing

(DIR) 8 Bit Direct

(INH) inherent addressing

(INH) inherent addressing

(INH) inherent addressing