Digital VLSI Circuits

E0-284

Bharadwaj Amrutur
amrutur@ece.iisc.ernet.in
http://chips.ece.iisc.ernet.in
Associate Professor
ECE Department
IISc Bangalore

Logistics
Class Timings: M-W-F 2:00pm to 2:50pm in ECE 1.08
Lab Timings: Anytime you can get access to a machine with
opensource tools: LTI-SPICE. You can also use Eldo if you want
Grading: Periodic quizzes, mid-term, mini-project, final

Class website: http://chips.ece.iisc.ernet.in (courses link)

Text:
CMOS VLSI Design. 4th Edition. Weste/Harris

Why should we care about Digital IC Design?

Digital ICs in FORBES top 30 innovations in 30 years

1. Internet, broadband, www (browser and html)
2. PC/laptop computers
3. Mobile phones
4. E-mail
5. DNA testing and sequencing/human genome mapping
6. Magnetic Resonance Imaging (MRI)
7. Microprocessors
8. Fiber optics
9. Office software (spreadsheets, word processors)
10. Non-invasive laser/robotic surgery (laparoscopy)
11. Open-source software and services (e.g., Linux, Wikipedia)
12. Light-emitting diodes
13. Liquid crystal display (LCD)
14. GPS systems
15. Online shopping/e-commerce/auctions (e.g., eBay)
http://www.forbes.com/2009/02/19/innovation-internet-health-entrepreneurs-technology_wharton.html

Digital ICs in FORBES top 30 innovations in 30 years

16. Media file compression (jpeg, mpeg, mp3)

17. Microfinance
18. Photovoltaic solar energy
19. Large- scale wind turbines
20. Social networking via the Internet
21. Graphic user interface (GUI)
22. Digital photography/videography
23. RFID and applications (e.g., EZ Pass)
24. Genetically modified plants
25. Bio fuels
26. Bar codes and scanners
27. ATMs
28. Stents
29. SRAM flash memory
30. Anti-retroviral treatment for AIDS
http://www.forbes.com/2009/02/19/innovation-internet-health-entrepreneurs-technology_wharton.html

The physical view

What is an IC (Integrated Circuit)?

Jack S. Kilby: Nobel Prize in Physics 2000

Physical View: IC is built up in layers

Passivation
Metal 3
ILD: Inter layer dielectric
Metal 2
ILD: Inter layer dielectric
Metal 1
ILD: Inter layer dielectric
Xtor gate

Transistor
(Xtor)

High-k Gate oxide

Silicon base

Other
active
devices

Patterning of each layer and inter layer connection

Geometric patterns for
each layer

Metal pad to connect to

outside world

vv
v
Passivation
Metal 3
ILD: Inter layer dielectric
Metal 2
ILD: Inter layer dielectric
Metal 1
ILD: Inter layer dielectric
Xtor gate
High-k Gate oxide
Silicon base

Via

Active devices: Transistors, Diodes, .

NMOS

PMOS

Gate (g)
Source (s)

Drain (d)

High-k Gate
oxide

n+

n+

p+

p+

Silicon Substrate (P)

Diode
NWELL (n-doping)
Can also make BJTs, standalone
diodes, ..

The functional view

Functional View: a typical Mixed Signal IC

ANALOG IP

DIGITAL IP

Some lingo

IP : Intellectual Property
SoC : System on Chip
NoC : Network on Chip
EDA: Electronic Design Automation
ASIC: Application Specific Integrated
Circuit
HDL : Hardware Description Language
Full Custom/Semi Custom/ASIC Flow
Physical Design

Digital Design Tasks

Functional description
HDL description

Assemble chip

Std.
Cells

RAMs

IO
cells

Macros

Digital Design Tasks

Functional description
HDL description

Chip
Development
Component
Development

Assemble chip

Std.
Cells

RAMs

IO
cells

Macros

Digital Design Tasks

Design
Functional description
Manual
(mostly)

HDL description

Assemble chip

Automated
(mostly)

Manual
(mostly)

Std.
Cells

RAMs

IO
cells

Macros

Digital Design Tasks

Design

Verification
Functional description

Manual
(mostly)

HDL description
Automated
(mostly)

Assemble chip

Automated
(mostly)

Manual
(mostly)

Manual
(mostly)

Std.
Cells

RAMs

IO
cells

Macros

Manual
(mostly)

Design Goals
Meet functional Specs
Minimize Power
Minimize Area
Maximize speed (or meet speed target)
Meet reliability requirements
Minimize verification cost
Minimize test cost
Minimize Packaging cost
Minimize system integration cost

Two basic aspects to design

Functional/Logical Design
Physical design
Where the logical design meets physics

Deal with area, power, speed, reliability, integrity

Course Goals
Largely focused on physical design aspects
Transistors, wires, deep submicron issues
delay, power and energy for digital circuits
digital circuit design concepts, basic digital cells,
sequencing elements
Clocking, clock distribution techniques, timing
constraints
Memory structures
Low power techniques like power gating, multithreshold, sizing, parallelism, minimum energy
operation
IO and packaging