Basic Design of a computer

a) COMPONENTS
Basic design of a computer consist of mainly 7 components as listed below
each with unique application and usage that intern design the basic
components of a computer.
1)
2)
3)
4)

Memory Unit : 4096 x 16

Registers: AR, PC, DR, AC, IR, TR, OUTR, INPR, and SC
Flip-Flops(Status): I, S, E, R, IEN, FGI, and FGO
Decoders:
3x8 Opcode decoder
4x16 timing decoder
5) Common bus: 16 bits
6) Control logic gates
7) Adder and Logic circuit: Connected to AC
Apart from control logic gates & Adder and logic circuit we are familiar
with the rest of the terms. So lets study control logic gates & ALC in
details
b) Control Logic Gates
The input of the control logic gates comes from the two decoders
the I flip-flop and bit zero through l1 of IR.The other inputs are from Ac
and DR and the values of 7 flip-flops. With respect to its input it
produces different output. The following are the instance of the output
produced by the control logic Gates.
Input Controls of the nine registers

Read and Write Controls of memory

Set, Clear, or Complement Controls of the flip-flops
S2, S1, S0 Controls to select a register for the bus
AC, and Adder and Logic circuit
c) Control of Register and memory
Registers of the computer are connected to a commom bus
system. The control input of thr registers are LD(load), CLR(clear)
,INC(increment). When we study all the statements that change the
content of AR we gets the following set instructions.
RT0 : AR PC LD(AR)
RT2 : AR IR(0-11) LD(AR)
D 7 IT3 : AR M[AR] LD(AR)
RT0 : AR 0 CLR(AR)
D5T4 : AR AR + 1 INR(AR)
LD(AR) = R'T0 + R'T2 + D'7
IT3
CLR(AR) = RT0
INR(AR) = D5T4

d) CONTROL OF COMMON BUS

16 bit common bus controls the selection inputs s1,s2,s3 .The

decimal number shown in bus is converted to its equalent binary to
select the corresponding register. 2^n is the value which is 2^3=8, so
the value ranges from 0-7 .Corresponding to each decimal value its
converted to binary and equalent register are selected. For example the
binary number 100 is for accumulator (AC),101 for IR .The binary value
represent the corresponding selection of selection lines.

e)

Design of Accumulator Logic:

The adder of logic circuit has three set of inputs.One set of 16 input comes
from the output of AC.Another 16 bit comes from data register.and set of 8
inputs comes from the input register.the output of ALC provides the data input
for the register.we aslo include logic gates to control ld,INCR,CLR functions.the
logical associated with AC is given below.

RISC(Reduced instruction set computing)

RISC is basically used for providing high performance in architecture reducing
the effort and producing better result. The general concept is that of a system
that uses a small, highly optimized set of instructions, rather than a more
versatile set of instructions often found in other types of architectures.
Another common trait is that RISC systems use the load/store architecture,
where memory is normally accessed only through specific instructions, rather
than accessed as part of other instructions like add. RISC uses fewer
instruction with sample constructs which uses memory less often.

RISC Characteristic
RISC architecture reduces the execution time by simplifying the instruction set
of the computer.Major characteristic of a RISK are

Relatively few Instruction

Relatively few addressing modes

Memory acess is limited to load and store instreuction

All operations done with the register of CPU

Single Cycle Instruction set.

Hardware rather than microprogramed.

Fixed length

Easily decoded instruction format.

Large number of registers in the process Unit.

Efficient instruction pipeline.

Compiler support efficient translation of high level language to machine

language

Overlap window to speed up procedure call and return.

Cycle instruction: Most of the instructions complete their execution in 1

CPU clock
cycle - like a microoperation

Functions of the instruction (contrast to CISC)

- Very simple functions
- Very simple instruction format
- Similar to microinstructions
-No need for microprogrammed control

Register-Register Instructions
- Avoid memory reference instructions except
- Load and Store instructions
- Most of the operands can be found in the
Registers instead of main memory
=> Shorter instructions
=> Uniform instruction cycle
=> Requirement of large number of registers

The RISC concept has led to a more thoughtful design of the

microprocessor. Among design considerations are how well an instruction can
be mapped to the clock speed of the microprocessor (ideally, an instruction
can be performed in one clock cycle); how "simple" an architecture is
required; and how much work can be done by the microchip itself without
resorting to software help.

Advantages of RISC

A new microprocessor can be developed and tested more quickly if

one of its aims is to be less complicated.

Operating system and application programmers who use the

microprocessor's instructions will find it easier to develop code with
a smaller instruction set.

The simplicity of RISC allows more freedom to choose how to use the
space on a microprocessor.

Higher-level language compilers produce more efficient code than

formerly because they have always tended to use the smaller set of
instructions to be found in a RISC computer.

STACK ORGANIZATION
Stack is a storage structure that organize and stores data . PUSH/POP is 2
important functions of STACK organization . The stack is a "FILO" (first in,
last out) data structure, that is managed and optimized by the CPU quite
closely. Every time a function declares a new variable, it is "pushed" onto
the stack. Then every time a function exits, all of the variables pushed
onto the stack by that function, are freed (that is to say, they are deleted).
Once a stack variable is freed, that region of memory becomes available
for other stack variables. The advantage of using the stack to store
variables, is that memory is managed for you. You don't have to allocate
memory by hand, or free it once you don't need it any more. What's more,
because the CPU organizes stack memory so efficiently, reading from and
writing to stack variables is very fast. The main functions of stacks are as
follows
The stack grows and shrinks as functions push and pop local variables
There is no need to manage the memory yourself, variables are
allocated and freed automatically
The stack has size limits
Stack variables only exist while the function that created them, is
running

Basically there are two types of stack organization

Register stack organization

Memory stack organization

a) REGISTER STACK ORGANIZATION

A stack can be organized as a collection of finite number of registers
that are used to store temporary information during the execution of a
program. The stack pointer (SP) is a register that holds the address of
top of element of the stack.

The example show above demonstrate 64 location stack unit with

SP that stores address of the word that is currently on the top of
stack.
SP Caries the address of top of stack .In the 3 items that are
placed in the stack A, B, and C. Item C is in top of stack so that SP
holds 3 which the address of item C.
To remove top item from stack (popping stack) we start by
reading content of address 3 and decrementing the content of SP.
Item B is now in top of stack holding address 2

To insert new item (pushing the stack) we start by incrementing

SP then writing a new word where SP now points to (top of stack)
In 64 word stack we need to have SP of 6 bits only (from 000000
to 111111). If 111111 is reached then at next push SP will be
000000, that is when the stack is FULL. Similarly when SP is
000001 then at next pop SP will go to 000000 that is when the
stack is EMTY.

Initially, SP = 0, EMPTY = 1, FULL =0

Procedures for pushing stack

 SP SP + 1
M[SP] DR
IF (SP = 0) THEN (FULL = 1)
EMTY 0
Always we use DR to pass word into stack .M[SP] memory word
specified by address currently in SP . First item stored in stack is at
address 1 . Last item stored in stack is at address 0. That is FULL =
1 . Any push to stack means EMTY = 0

Procedures for popping stack

DR M[SP]
SP SP 1
IF (SP = 0) THEN (EMTY = 1)
FULL 0
Top of stack is read into DR . If SP reached 0 then stack is EMTY = 1.
That when SP was 1 then pop occurred. No more pops can happen from
here. Any pop from stacks means FULL = 0

b) MEMORY STACK ORGANIZATION

A portion of memory is used as a stack with a processor register as a stack

pointer.Memory is partitioned into program which basically contains
instructions ,data which contains operations to be performed,and stack
array .Basically three flags are used in memory organization to handle data
flow.
PC(program counter) -PC points to the address of the next instruction
AR(Adress register)- AR points to an array of data
SP(Stack pointer)- SP points to the top of the stack
All these three registers are connected by a bus.PC is used in fetch phase to
read an instruction.AR is used in execution phase to read an instruction and
last register SP is used for push/pop operations.

PUSH:
SP SP - 1
M[SP] DR

POP:
DR M[SP]

SP SP + 1

- Most computers do not provide hardware to check

2 registers upper limit address & lower limit registers are used to
check the stack limit.
Stack overflow (full stack) or underflow(empty stack