Problema 3.

b:
Describir en VHDL un comparador de 2 numeros binarios A,B de 8 bits c/u,
que indique en sus tres salidas si A>B, A=B, A<B. Comentarios.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity punto3b is
Port ( A : in STD_LOGIC_VECTOR (7 downto 0);
B : in STD_LOGIC_VECTOR (7 downto 0);
MAY : out STD_LOGIC;
IGU : out STD_LOGIC;
MEN : out STD_LOGIC);
end punto3b;
architecture Behavioral of punto3b is
begin
MAY<='1' when A>B else '0';
IGU<='1' when A=B else '0';
MEN<='1' when A<B else '0';
end Behavioral;