ABSTRACT

In this dissertation, a new approach for single-stage three level power factor correction
converter is projected to increase their power ratings to be in several kilowatts levels with a
universal input voltage range from 90Vrms to 265Vrms. The projected technique is based on
the utilization of customized three-level resonant converter topology. This technique offer
low voltage stress on switches, made possibility of operation with high frequency, possibility
of zero voltage switching, can be applied under a wide range of input and output conditions
as well as high flexibility in operation and control can be achieved.
The described method works on the principle of combined control of frequency and
asymmetrical pulse width modulation control to regulate the output voltage, shape the input
current as well as to control the dc bus voltage, where pulse width modulation control is to
regulate the dc bus voltage & shape the input current while the variable frequency provides a
tightly regulated output voltage. The output voltage is regulated through the variation of
frequency, whereas, dc-bus voltage is regulation and input power factor correction are
obtained through pulse width modulation control. The proposed converter topology is
characterized by its ability to regulate the dc bus voltage as well as the output voltage.
In the proposed converter two control variables are used to give the required output the range
of frequency is reduced. All state variables are broken down into their frequency components
and the amplitude of the frequency components are used as the new state variables. Also in
proposed topology switching is achieved over a very wide range of loading and input voltage
variation.
The proposed converter topology & its operation with the steady state and dynamic analysis
explained and analyzed in details.
The proposed topology has been implemented and investigated in the MATLAB/Simulink
and the various results are provided to verify the proposed concepts.

Chapter 1

INTRODUCTION
1.1 Introduction
The power supply unit is an essential circuit block in all electronic equipment. It is the
interface between the ac mains and the rest of the functional circuits of the equipment. These
functional circuits usually need power at one or more fixed dc voltage levels. Switch mode
power supplies (SMPS) are most commonly used for powering electronic equipment since
they provide an economical, efficient and high power density solution compared to linear
regulators.
Switch mode alternating current/ direct current (AC/DC) converters are the first building
block to supply power from ac mains to down-stream converters for the electronics circuits
(normally known as loads). Therefore, they should provide performance characteristics that
are acceptable by both the ac mains and the output load. From the ac mains point of view, a
power supply should provide good power quality, such that, the input current and input
voltage are purely sinusoidal at the line frequency (50 or 60 Hz) and are in phase. Whereas,
from the load point of view, a well regulated output voltage with low ripples is required. In
order to conserve energy, high overall power conversion efficiency is required.
However, conventional ac/dc switch mode power supplies introduce some adverse effects on
the ac side. Examples of such effects are distortion of input current/voltage, input voltage dip
due to the presence of bulk capacitors and electromagnetic interference (EMI) due to high
frequency switching in recent years power factor correction (PFC) circuitry have become
integral part of the ac/dc power supply design to meet the input power quality requirement as
per standards
1.2 Objectives of Dissertation
The techniques proposed in this work integrate the boost power factor pre-regulator, threelevel and resonant dc/dc converters.
The following are the objectives of this dissertation:

Development of SSPF correction topologies suitable for higher power applications (in the
range of multiple kilowatts) and with the following features:

Tightly regulated output voltage with minimal low-order harmonic components. The
converter should be able to provide this output for the universal input voltage range (90265Vrms).

An input ac line current that complies with the IEC1000-3-2 and IEC1000- 3-4 standards and
gives a high power factor.

Elimination/reduction of the switching losses. This can be achieved by operating the resonant
circuit above its resonance frequency, in addition to the use of the rectified line current to
assist in obtaining zero voltage switching (ZVS) of the switches.

Reduce the dc-bus voltage, and regulate it to a fixed level throughout the different input and
load conditions.

Balance the voltages in the three-level converter, in order to be able to use switches of
smaller ratings, as the voltage stress per switch is half that of the dc-bus. This leads to higher
conversion efficiency; therefore, the converter becomes more suitable for higher power
applications.

Development and implementation of control strategies for optimum operation of the proposed
converters.

Modeling analysis and simulation of the proposed converter topologies to study their steadystate and dynamic performance.

Chapter 2

LITERATURE SURVEY
Sakkeer Hussain et al. [1] discussed that conventional SSPFC (single-stage power factor
correction) converters suffer from low efficiency because of high voltage and current stresses
acting on switching devices and other circuit parameters. The introduction of resonant
converters along with the conventional SSPFC provides a very sensible solution for the above
mentioned problem. Since this resonant SSPFC converter operation carried out with variable
frequency, it provides an efficient operation only at full load. Below full load, the operation
results in efficiency drop due to the shift from resonant frequency. A load dependent strategy
helps in maintaining the efficiency level as constant even below full load. Two variables are
to be controlled in this circuit, which are resonant frequency and duty ratio. Normally two
controllers are essential to perform the operation which cause increased cost and requires
more processing time. This paper proposes a single PI controller to control the both variables
to provide high converter efficiency and to reduce the cost and the processing time. The
proposed system provides a constant efficiency in conversion process up to 50% of full load
current. The MATLAB simulation is presented to verify the performance analysis
K. Umamaheswari et al. [2] proposed flyback converter type single-stage converter and a half
wave rectifier with time-multiplexing control (TMC) for power factor correction. It has the
advantage of better magnetic core utilization and better performance for high power
applications. The major portion of the input is transferred to the load through ac-dc
conversion. And the part of the input power is delivered to the auxiliary output through the
flyback conversion and stored in the capacitor. The voltage ripple of the main output can also
be reduced. With TMC the power processes can be achieved by single transformer to reduce
the cost and the size of the converter. The simulation result of the proposed converter
presents, simplicity, high power factor with low cost and size.
R. Venugopa et al. [3] presented a high power factor, high frequency single stage single
switch resonant inverter for the application of high frequency applications. The power circuit
is designed with a power factor corrector with single-switch current-fed high frequency
resonant inverter. Number of switches used in conventional ballast circuits is reduced in
single switch approach. SEPIC (Single ended primary inductor converter) is operated in

DCM (discontinuous conduction mode) and the drawbacks of conventional class E resonant
are overcome. The problem of gate circuit design of switches and isolation are greatly
reduced due to the usage of single switch. The presence of input filters makes the input
current ripple free. The simulation results of single switch High Frequency Resonant Inverter
for CFL Applications circuit for high frequency of 80 kHz have been presented.
Y.Sukhi et al. [4] presented a microcontroller based series parallel resonant converter suitable
for the single stage single phase power factor correction circuits. The performance of the
proposed converter is improved from no-load up to full-load. The steady state characteristics
of the proposed converter are developed and a design example is given in detail. The
proposed converter allows zero voltage switching at any loading condition with a reasonable
power factor and with a promising efficiency. Simulation and experimental results verify the
analysis made and the design specifications
Azimur Rahman et al. [5] presented a new ZVT (zero-voltage transition) single-stage ac-todc converter using PWM (pulse width modulation) and HF (high frequency) transformer
isolation with capacitive output filter. In this converter a front-end power factor corrected
boost stage integrates with a cascaded dc-to-dc bridge HF converter. The front-end boost
converter operates in discontinuous current mode and ensures natural power factor correction
with very simple control. The auxiliary circuit of this topology deals with very small power
and is placed out of the main power path. As a result, the auxiliary circuit components have
smaller power rating as opposed to main converter components. Also, output rectifier voltage
is clamped to output voltage due to capacitive output filter. Identification and analyses of
different operating modes of this converter are presented. Based on these analyses design
example of a 50 kHz, 48 V, 1 kW ac-to-dc converter is presented. PSPICE simulation results
of the designed converter are presented and explained to verify the performance of this
converter.
Pekik A. Dahono [6] presented and simulated a new concept of virtual inductor to reduce the
low-frequency dc output current ripple of ac-dc dc converters is introduced in this paper.
Virtual inductor is defined as an additional control algorithm that changes the system
behavior into the one that has an additional inductor connected on it. The virtual nature of the
inductor makes the inductance can be designed without weight and volume restrictions. How
to use the virtual inductor to improve the performance of converter current controller is of
5

discussed in this paper. Several simulated and experimental results are included to show the
validity of the proposed concept.
Slobodan uk [7] introduced a new Hybrid Switching Method (HSM) which for the first time
makes possible AC/DC power conversion in a single power processing stage providing both
Power Factor Correction and isolation at high switching frequency. This single-phase rectifier
is extended to a three-phase rectifier, which for the first time enables direct conversion from
three-phase input power to output DC power resulting simultaneously in the highest
efficiency and lowest size.
Byoung-Hee Lee [8] discussed about conventional Single-Stage Power-Factor-Correction
(PFC) AC/DC converter has a link capacitor voltage problem under high line input and low
load conditions. They analyzed problem this by using the voltage conversion ratio of the
DC/DC conversion cell. By applying this analysis, a new Single-Stage PFC AC/DC converter
with a boost PFC cell integrated with a Voltage-Doubler Rectified Asymmetrical Half-Bridge
(VDRAHB) is proposed. The proposed converter features are good power factor correction,
low current harmonic distortions, tight output regulations and low voltage of the link
capacitor. An 85W prototype was implemented to show that it meets harmonic requirements
and standards satisfactorily with near unity power factor and high efficiency over universal
input.
A. K. Jha et al. [9] discussed about single stage single switch AC/DC converter, which is an
integration of input current shaper and a DC/DC cell with a shared controller and one active
switch. The converter is applicable for digital input power supply with high input power
factor and tight output voltage regulation. The focus of the topology is to reduce the DC bus
voltage at light load without compromising with input power factor and voltage regulation.
The concept behind this topology is direct power transfer scheme. Using special
configuration of DC/DC cell does reduction of DC bus voltage and DC/DC cell works on the
principle of series charging and parallel discharging. The power output of this converter can
go up to 200W.
Chien-Ming Wang [10] proposes a new single-phase high power-factor rectifier, which
features regulation by conventional pulse width modulation (PWM), soft commutation,
and instantaneous average line current control. A new zero-current switching PWM (ZCS-

PWM) auxiliary circuit is configured in the presented ZCS-PWM rectifier to perform

ZCS in the active switches and zero-voltage switching (ZVS) in the passive switches.
Souvik Chattopadhyay et al. [11] discussed about a simple digital current mode control
technique for dc-dc converters. It has been shown that we can implement any one of the
average, peak and valley current mode controls by adjustment of the sampling instant of
the inductor current with respect to the turn on instant of the switch.
W. Choi et al. [12] studied two switch topologies half-bridge converters for single phase
applications either in symmetrical or asymmetrical modes of operation. Although they are
able to provide high input power factor they still suffer from high circulating currents, high
dc-bus voltages or discontinuous output current.
Ying-Chun Chuang [13] introduced a new filtering technique named resonant energy storage
filter for AC/DC converter. As compared with the conventional active filter, this approach is
advantageous of lower current stress and higher control flexibility. He implemented the
proposed filtering approach with class-D series-parallel resonant inverter. The experimental
results were provided to validate the theoretical analyses. It was proven that the proposed
approach can achieve nearly unity power factor and very low harmonic distortion.
Dwaraka S. Padimiti et al. [14] have reviewed and summarized different digital control
techniques, including predictive control and dead-beat control technique. Advantages
and disadvantages of each method are analyzed by them and their benefits to
EVs/HEVs are investigated. They also discussed a predictive digital control method
that works well in both continuous and discontinuous mode.
Dragan MaksimoviC et al. [15] discussed about the impact of digital control in highfrequency switched-mode power supplies (SMPS), including point-of-load and isolated
DC-DC converters, microprocessor power supplies, power-factor-correction rectifiers,
electronic ballasts, etc., where switching frequencies are typically in the hundreds of
kilohertz to megahertz range.
Peng Li et al. [16] have proposes a new current sharing method which is based on
current mode controlled dcdc converters and achieved the current sharing by forcing
all inner current loops to have the same current reference. They also recognize both the

benefits and limitations of master-slave methods and the methods using the inherent
current source properties of CMC converters.
Anthony Kelly et al. [17] have introduced a digital current-mode controller for dc-dc
converters. The current-mode loop is sensor-less, relying on constants and internal loop
states, removing the need to sense controlled voltages or currents for the inner loop.
They also implemented a fast current-mode control mechanism by utilizing dead-beat
control.
Jingquan Chen et al. [18] discussed about the predictive digital current programmed
control for valley, peak or average current. The control laws are derived for the three basic
converters: buck, boost, and buckboost.
M. Veerachary [19] has presented a systematic development of a unified signal flow graph
model for an interleaved boost converter with coupled inductor system operating in
continuous current mode. This signal flow graph approach provides a means to
directly translate the switching converter to its graphic model, from which steady-state and
dynamic behaviour of the converter can be studied.
Bo Feng e t a l . [20] have proposed a PFC converter employing compound active
clamping technique. It can effectively reduce the loss caused by diode reverse recovery.
The parasitic oscillation caused by the parasitic capacitance of the boost diode is
eliminated. The maximum voltage stress of switches and the soft-switching region with
relation to the resonant inductor and resonant capacitance are investigated.
F. Hamdad et al. [21] proposed a three-phase single-stage full bridge ac/dc converter, using a
boost integrated bridge converter with an auxiliary circuit and a switching sequence set to
achieve ZVS over a wide range of loading. The drawbacks of this method are that it operates
with discontinuous current at both input and output. The part count is the same as that of the
two-stage method due to the use of an auxiliary circuit to achieve ZVS. The input voltage
range is limited due to the high dc-bus voltage stress. The converter efficiency is less than
90%, which is better than previously presented single-stage topologies, but not considered
good for a three-phase application and still needs improvement to be suitable for high power
operation.

Yuri Panov et al. [22] have considered stability and dynamic performance of the current
sharing control. The parallel operation of voltage regulator modules (VRMs) for high-end
microprocessors requires a current-sharing (CS) circuit to provide a uniform load
distribution among the modules.
Praveen Jain et al. [ 2 3 ] have proposed a novel, zero-voltage switched (ZVS) PWM
boost converter that combines soft-switching with constant frequency operation. The
converter can be operated with PWM control at a fixed frequency because ZVS operation
is achieved with a simple auxiliary resonant circuit that is activated for only a small
fraction of the switching period and handles much less power than the main power circuit.
G. Spiazzi et al. showed that limitation imposed on the achievable power level by the IEC
1000-3-2 standard in buck-derived power factor pre-regulators, is overcome by using a
combined buck-flyback power stage. Two different step-down converters are proposed in this
paper, which incorporate an auxiliary flyback stage. The auxiliary stage uses the same switch
of the main converter, plus an additional power switch commutated at the line frequency. As
compared to a simple buck rectifier, with this solution the harmonic content of the absorbed
line current, at a given power level, can be reduced, thanks to the resulting increased
conduction angle of the input rectifier bridge. Experimental results based on a 1 kW
prototype are reported to validate the theoretical analysis of the proposed topologies
Tae-Woo Kim et al. [24] have proposed an improved ZVT-PWM boost converter. The
main switch of the conventional ZVT-PWM converter is always switched at zero
voltage. But the auxiliary switch is turn-off with switching loss due to hard switching
condition. The proposed converter is reducing the turn-off switching loss of the
auxiliary switch by using additional circuit.
Po-Wa Lee et al. [25] have investigated and proposed a converter consisting of two
interleaved and inter-coupled boost converter cells. The boost converter cells have very
good current sharing characteristics even in the presence of relatively large duty cycle
mis-match. They designed it to have small input current ripple and zero boost-rectifier
reverse-recovery loss. They also presented the operating principle, steady-state analysis,
and comparison with the conventional boost converter.

M. Qiu et al. [26] presented a PWM controlled full bridge. In this case, natural current
shaping for the input current is achieved. This topology has an input inductor directly
connected to the isolation transformer through two diodes. The voltage stress on the storage
capacitor in this case is limited to 450 V but this comes at the expense of higher low
frequency distortion in the input current. If these low frequency distortions are to be
eliminated, the dc-bus capacitor voltage will take much higher values. The resulting
conversion efficiency also makes the application of this converter limited to low power
levels.
Pekik A. Dahono et al. [27] have presented an output ripple analysis of polyphase dc-dc
converters that having an output LC filter and derived analytical expressions for the output
voltage ripple of two- and three-phase dc-dc converters. Influence of the coupling
coefficient of the output filter inductor on the output ripple is investigated. They also
presented a comparative evaluation of single-phase, two-phase, and three-phase dc-dc
converters.
Isao Matsuura et al. [28] have made a comparison of the efficiencies of active and
passive soft switching methods for PWM converters. A boost converter was built and
tested under the static and dynamic PFC operation condition as well as DC-DC operation
condition and found that the passive method has better efficiency in the high power
operation region, while the active method outperforms the passive method in the low
power region.
Ching-Jung Tseng et al. [29] have proposed an active snubber cell is to contrive zero
voltage-transition (ZVT) pulse width-modulated (ZVT-PWM) converters. Except for the
auxiliary switch, all active and passive Semi-conductor devices in a ZVT-PWM
converter operates at zero-voltage-switching (ZVS) turn on and turn off.
Milan M. Jovanovic [30] has described a circuit technique that reduces the boost-converter
losses caused by the reverse recovery characteristics of the rectifier. The losses are reduced
by inserting an inductor in the series path of the boost switch and the rectifier to control
the di/dt rate of the rectifier during its turn-off. The energy from the inductor after the
boost switch turn-off is returned to the input or delivered to the output via an active
snubber.

10

K. Mark Smith et al. [31] have conducted a comparison study to characterize the loss
mechanisms, component stresses, and overall efficiencies of a group of voltage-mode
soft-switching pulse width modulation (PWM) methods. They found that only those
methods that softly switch the auxiliary switches, minimize redirection current and
recover the auxiliary circuit energy over most of the load range.
Cliludio M. C. et al. [32] have introduced a new family of ZVS-PWM active-clamping
DC-to-DC

boost

converters.

The

technique

presents

ZVS

commutation without

additional voltage stress and a significant increase in the circulating reactive energy
throughout the converters so the efficiency and the power density become advantages
when compared to the hard-switching boost converter.
Slobodan Cuk et al. [33] have presented a new concept in the design of switched-mode
power conversion circuitry. Because of its extreme simplicity, flexibility, and efficiency
it has the potential to replace some conventional electrical power processing methods
currently in use.
Here we address several issues concerning the application to single-phase PFC of various
high-frequency switching converter topologies. The inherent PFC properties of second-order
switching converters operating in Discontinuous conduction mode (DCM) are well known,
and Boost converters are widely used. However, their output voltage is always higher than
the amplitude of the rectified-sinusoid input voltage. In addition, it is expected that the level
of the differential-mode EMI is much higher in DICM, as compared to the Continuous
Inductor Current Mode CICM. Therefore, we first investigated the requirements for the
EMI filter for a PFC stage based on a Boost converter operating in DICM.
Matlab, developed in 1981 by Math Woks Inc., [36] is a software package for high
performance numerical computation and visualization. The combination of analysis
capabilities, flexibility, reliability and powerful graphics makes Matlab the premier software
for engineers. Matlab provides an interactive environment with hundreds of reliable and
accurate built-in mathematical functions. These functions provide solution to a broad range of
mathematical problems including matrix algebra, complex arithmetic, linear systems,
differential equations, non-linear systems, optimization and many other types of scientific
computations. The most important feature of Matlab is its programming capability. It also
allows Fortran algorithms and C codes by means of external interfaces. There are several
11

toolboxes such as control system design, system identification, fuzzy logic, statistics and
system identification, etc. Matlab has been enhanced by very powerful simulink program.
Simulink, which became available in 1992 [36] is an interactive environment for modeling,
analyzing and simulating a wide variety of dynamic systems. Simulink facilitates the
modeling and analysis of dynamic system including linear, nonlinear, continuous, discrete
and hybrid type models. Models are constructed by taking component from a block library to
a model worksheet and using the mouse to connect them up. Simulink can model systems in a
hierarchical fashion by grouping portions into subsystems. Large and complex system can be
easily modeled using Simulink.

12

Chapter 3

THREE-LEVEL CONVERTERS WITH VARIABLE FREQUENCY

ASYMMETRICAL PULSE WIDTH MODULATION CONTROL
3.1 Introduction
The problem related to the high voltage stress across the circuit components in single-stage
power factor corrected ac-dc converters can be solved by using three-level topologies.
Further, the added levels of switching circuits, in the three-level converters, can also give
more degrees of freedom in control to shape the input and output waveforms. Three-level
converters, therefore, have strong potential to be employed in the design of single-stage
power factor corrected ac-dc converters. Three-level topologies have been utilized as power
factor pre-regulators in two stage ac-dc converters using only one control variable, but this
topology suffers with high input current distortion, high-voltage stress, and increased
circulating current.
Therefore to minimize the problems, in this work a single-stage ac-dc converter topology for
high power applications that has high efficiency and high input power factor. This objective
is obtained by combining features of boost power factor corrected pre-regulators, resonant
converters and three-level dc-dc converters, and simultaneous use of two control variables,
namely; switching frequency and the duty ratio. A new single stage, three-level resonant acdc converter topology is conceived and presented. A variable frequency with asymmetrical
pulse width modulation (VFAPWM) control technique is proposed. The operation, steady
state analysis, and control of the converter are studied. Performance characteristics of the
converter are derived. Simulation results are to be presented. The proposed converter
provides low input current distortion, low voltage stress, reduced circulating current, high
conversion efficiency and well regulated output voltage. The chapter is organized as follows.
In section 2 a new single-stage, power factor corrected (SSPFC) converter topology is
proposed, its principle of operation is described and a new variable frequency asymmetrical
pulse width modulation control method is proposed. Section 3 addresses the applicability of
the proposed converter to operate in continuous conduction mode, and its limitations. In
section 4, the steady state analysis is illustrated and the key design curves for the proposed
converter are given.

13

3.2 Proposed Converter Topology and Principle of Operation

3.2.1 Basic Scheme of Proposed Topology

Fig. 3.1 Basic decoupled model of proposed converter

The proposed converter topology integrates the operation of the boost power factor preregulator with the three-level resonant dc-dc converter. Figure 3.1 shows a basic block
diagram of proposed converter. The working of this converter can be understood from this
decoupled model very easily. Actually output voltage of an boost converter is controlled by
controlling the duty ratio of converter, thus using boost stage dc voltage at the DC bus is
maintained at constant level against the variation of input supply ac voltage.
Further output voltage of resonant converter which supply the load is controlled by varying
the frequency of PWM generator
In figure 3.2 shown the three-level series-parallel LCC (Ls, Cs, and Cp) resonant converter
circuit with an input boost inductor (Lin) directly connected to the lower pair of the switches.
The boost inductor can operate in either the continuous or discontinuous conduction mode.
The dc-bus is comprised of the two capacitors (Cb1) and (Cb2). These capacitors provide the
necessary hold up time and greatly reduce the effect of low frequency ripples at the output

14

voltage. If the capacitors are designed to have equal values and operate symmetrically, each
should carry half the dc-bus voltage in the steady-state condition.

Fig.3.2. The proposed single stage three- level PFC circuit topology

The two diodes (Dc1) and (Dc2) serve to clamp the switch voltages to half that of the dc-bus.
The series-parallel resonant converter is used due to the fact that it is able to operate in a
buck-boost mode according to the applied switching frequency. This feature is required in
order to be able to adjust the output voltage throughout the power line cycle. Other features
that are characteristic to LCC resonant circuit are fast output regulation and low output
voltage ripple as well as: input/output isolation; zero voltage switching; the use of an LC
output filter, which results in an almost ripple free output voltage; and high conversion
efficiency. Therefore, by designing the converter to operate close to its resonant frequency,
high efficiency can be obtained for a wide range of input voltage and output load current.
Other types of resonant circuits that have voltage step up and step down capabilities such as
series resonant LLC can also be used for this application, which will be illustrated in a later
section. The input filter is used to reduce the high frequency components of the input current,
which is especially important in the case of discontinuous input inductor current operation.

15

The output stage is comprised of a Schottky rectifier followed by an LC filter (Lo and Co) to
smooth the output voltage waveform.
3.2.2 Principle of Operation
The stages of operation for this converter during one switching cycle are almost the same for
continuous and discontinuous conduction modes with a few minor differences that are
outlined in the following discussion. The different stages of operation of this converter can be
described using the timing diagram shown in figure 3.3 and the equivalent circuits shown in
figures 3.4 and 3.5.

Fig.3.3 Switching sequence during one switching cycle for VFAPWM control for the circuit proposed

These steps of operation are given as follows:

Step 1 (t0<t<t1): During this time interval, switches S 3 and S4 are ON and current flowing
through the boost inductor (Lin) increases linearly. The whole current flowing through the
switches is the sum of the current of resonant circuit and boost inductor. The capacitor Cb2
delivering energy to the output through the resonant circuit and the voltage across the

V
bus
terminals of the resonant circuit is 2 . The maximum values of input inductor current are
16

different in continuous and discontinuous modes of operation; here it is also important

observation that the minimum and maximum values here indicate those during one switching
cycle not absolute maxima and minima. This stage of operation ends at t 1=DTs, where D is
the duty ratio of the boost stage and Ts is the switching period.

Step 2 (t1<t<t2): At the beginning of this time interval, switch S4 is turned OFF and the drain

V
bus
2
source capacitor of switch S4 starts charging. When the switch voltage (vds 4) reaches
(the voltage across Cb2), the clamping diode D2 turns on and clamps the switch voltage to half
the dc-bus voltage. The current flowing through the switch S 3 and clamping diode D2 and the
voltage across the resonant circuit decreases to zero. Finally at the end of this period the
current in the boost inductor is also diverted to the upper switches, discharging their drainsource capacitors.

Step 3 (t2<t<t3): in this interval, at t=t 2, switch S3 is turned OFF and its drain-source capacitor

V
bus
2 . The inductor current continues to charge the dc-bus
progressively charges to
capacitors and the resonant current contributes to the discharge of the switch capacitances,
when they are fully discharged, both currents flow through the body diodes of switches S 1

V
bus
and S2 as the voltage across the resonant circuit rises to 2 .

Step 4 (t3<t<t4): in this interval, at the beginning of this stage, switches S1 and S 2 are turned

V
bus
ON with ZVS and the voltage across the resonant circuit remains at 2 . The current
flowing through the switches in this case is the difference between the resonant current and

17

the boost inductor current, while the capacitor Cb1 delivering energy to the output through the
resonant circuit.

Step 5 (t4<t<t5): in this interval, at t=t4, switch S1 is turned OFF and the drain-source

V
bus
capacitor of switch S1 starts to charge. When the switch voltage (vds1) reaches 2 (the
voltage across Cb1), the clamping diode D1 turns on and clamps the switch voltage to half the
dc-bus voltage. The resonant circuit voltage again drops to zero, with the resonant current
circulating through S2 and Dc1.

For the case of discontinuous conduction mode, the only current circulating in the circuit will
be the resonant current and the inductor current decayed to zero at this point.

For continuous conduction mode, until the end of stage 6, the input inductor current will
continue flowing through the body diodes of switches S1 and S2.

Step 6 (t5<t<t6): in this interval, at t= t5, switch S2 is turned OFF and its drain-source capacitor

V
bus
gradually charges to 2 . While the resonant current is diverted to discharge the drainsource capacitors of switches S3 and S4 and when these capacitors are fully discharged, the
body diodes of the switches start conducting. The cycle is then again repeated with switches
S3 and S4 being turned ON with ZVS and the boost inductor starts charging in the new
switching cycle.
The following remarks can be made regarding the operation of the proposed converter:

This operation scheme shows that the input voltage to the resonant circuit is not symmetrical.
However, the dc-component of the current is blocked by the series capacitor and the higher
frequency harmonics are attenuated by the resonant circuit. The current flowing in the
resonant circuit can, therefore, be considered sinusoidal and has a frequency equal to the

18

1
f
s T
s and resonant current provide ZVS for the upper switches,
switching frequency

while only resonant current provides ZVS for the lower switches 3. The current stress on the
lower switches is higher than those on the upper switches, since the lower switches carry the
sum of the input and resonant currents while the upper switches carry their difference only.

V
bus
The voltage stress on all switches is equal to 2
.

Equivalent circuits for each stage for the converter operating in DCM are as given bellow in
figure 3.4

Step-1

Step-2

19

Step-3

Step-4

Step-5

Step-6

Fig. 3.4 Equivalent circuits for each operation stage for the converter operating in DCM

Equivalent circuits for each stage for the converter operating in CCM are as given bellow in
figure 3.5

Step-1

Step-2
20

Step-3

Step-4

Step-5

Step-6

Fig. 3.5 Equivalent circuits for each operation stage for the converter operating in CCM

3.2.3 Control Method

In the three-level resonant converter topologies, more than one variable can be used for the
control purpose. In the proposed topology here, two different control variables are used
simultaneously to control both the output voltage and the dc-bus voltage. Options for these
control variables are: 1) switching frequency (fs) of the resonant converter to control the
output voltage and 2) duty ratio (D) of the lower switches to regulate the dc-bus voltage. An
asymmetrical pulse width modulation control in which the bottom switches have a duty ratio
of D and the upper switches have a duty ratio of (1-D) is employed. The input voltage to the
resonant circuit, therefore, is a variable frequency asymmetrical voltage. With this type of
control, the dc-bus voltage can be adjusted to a desired level regardless of the load current.

21

Fig.3.6. Block diagram of the proposed VFAPWM controller

Figure 3.6 shows a block diagram of the proposed ac-dc converter including the power and
control circuitry. Whether the input inductor current is measured as a feedback signal or not
depends on the continuous or discontinuous conduction mode of converter operation. Another
advantage of using two control variables is that the required change in the values of switching
frequency and duty ratio is lower. This results in operating the converter closer to the
resonant frequency of the circuit and still maintaining ZVS under wide input voltage and load
range.
In discontinuous conduction mode the input current automatically follows the sinusoidal
input voltage, whereas in continuous conduction mode active current control is required to
sinusoidal shape the input current. However, continuous conduction mode has the advantage
of having lower high-frequency ripples in the input current but requires complex control
circuitry.
3.3 Operation in Continuous Conduction Mode
As mentioned in the previous section, continuous conduction mode of operation gives lower
high-frequency ripples in the input current. In order to achieve such mode of operation, a
current mode control method is required to get a sinusoidal input current in phase with the

22

input voltage as compared to voltage mode control used for the case of discontinuous
conduction mode. Therefore, an additional input current feedback signal is required.
For the purpose of sinusoidal current the duty ratio of the boost converter must change
continuously along the half-cycle of the input line voltage. Therefore, near the peaks of the
input sinusoid it should be at its minimum, whereas, at the valleys of the input voltage signal
a duty ratio very close to unity is required to boost the voltage to the required level at the dcbus. On the other hand, having such a high duty ratio leads to a voltage waveform at the input
of the resonant circuit. The harmonic analysis of this waveform shows that the input voltage
to the resonant circuit will primarily be composed of a dc-component that will be blocked by
the series resonant capacitor, whereas the fundamental ac-component at the switching
frequency becomes very low. A higher duty ratio is needed the closer we get to the zero
crossing of the input voltage sine wave, and thus the fundamental component of the input
voltage to the resonant circuit is insufficient to provide the desired output voltage. This leads
to undesirable high low frequency ripples, due to dips in the output load voltage at double the
frequency of the input voltage. Therefore, the circuit gain has to be greatly increased to
compensate, especially at lower input voltage and higher output load current. Nevertheless,
relying only on increasing the circuit gain leads to an increase in the circulating currents in
the resonant circuit, leading to higher conduction losses. Therefore, a trade-off has to be
made, in which some harmonic distortion is allowed in the input current, while still ensuring
that the IEC standards of harmonic content are met. In this case, if the dc-bus voltage is set to
a higher level at the lower line voltage levels, the required increase in the circuit gain is less
and thus, the efficiency does not have to be severely penalized in order to maintain the output
voltage level.
The following changes have to be made in the circuit parameters in this case:

The minimum limit of the dc-bus voltage has to be increased in order to accommodate the
reduced input to output voltage conversion ratio without the need for an excessive increase in
the voltage gain of the resonant circuit or excessive limitation of the duty ratio that would
cause distortion in the input line current.

The maximum allowable duty ratio for the boost operation has to be limited (as an example,
in this case it is set to attain a maximum value of 0.92).

23

The transformer turns-ratio must be increased to increase the converter voltage gain.

The ratio of the value of parallel to series resonant capacitors may also be increased to adjust
the gain of the resonant circuit.

The input inductor Lin must be increased to ensure continuous conduction mode. An
acceptable harmonic distortion level in the input current has to be kept into consideration
while selecting the value of Lin.
It is also worth noting that despite the increased asymmetry in the voltage input to the
resonant circuit, the voltage across the resonant capacitors remains balanced due to the fact
that they are charged in series by the input inductor current and the energy discharged is
equivalent to that of the shorter period of DTs or (1-D) Ts, because of the blocking action of
the series capacitor that prevents any dc current component from flowing through the
resonant circuit.
3.4 Steady State Analysis
The operation of the proposed converter at steady state can be separated into two main
sections: the first is from the ac input to the dc-bus, and the second from the dc-bus to the
output through the resonant circuit. The two variables controlling the operation in both
sections are the duty ratio (D) and the switching frequency (fs). Dead times between
switching transitions are neglected in the analysis as these times are very short compared to
power transfer and freewheeling modes. The following subsections include a detailed
description of the steady state operation for the whole converter in addition to key design and
performance characteristics curves. All these derivations are still made under the assumption
that the switching frequency is much higher than the power line frequency, and thus the input
ac voltage can be considered constant during the switching cycle.
3.4.1 Analysis of the Boost Operation (from ac input to dc-bus)
The operation in this part of the converter differs according to whether the input inductor is
operating in the discontinuous or continuous conduction mode.
3.4.1.1 Discontinuous Conduction Mode

24

For discontinuous conduction mode operation, the input current starts and end at zero, and at
the end of energy storage time (stage 1 described in section 3.2.2) in one switching cycle it an
be given as:

Lin

diLin(ch arg ing )

vs k
dt

iLin(ch arg ing ) iLinpeak

(3.1)

vs D T
k k sk
L
in

(3.2)

where, iLin: is the input inductor current, which is the rectified input current (is)

iLin is

(3.3)

Vs: is the input ac supply voltage,

D: is the duty ratio,
Ts: is the switching period

1
T
s f
s

(3.4)

Such that, fs is the switching frequency,

Lin: is the input inductor, and subscript (k): denotes the switching cycle where calculation is
made.
During the freewheeling mode (stage 3 described in section 3.2.2), the current decays to zero,
and is thus given by:

D T

(d D)T
k sk
sk

i
dt
i
dt

Lin(ave)k T k
Lin(ch arg ing )
Lin(disch arg ing )

0
D T
s
k kk

25

(3.4)

iLin ( ch argin g ) (t ( D d )T ) 0 i

k
k sk
in peak

(V
v )d T
bus (k )
s k k sk
L
in

(3.5)

Where, Vbus: is the dc-bus voltage (the sum of the voltages across capacitors Cb1 and Cb2)

d T
k k / s is the time required for the current to decay to zero.
By substituting from (3.2) in (3.5) dk can be expressed as:
v

sk
d
D
k V
k
v
bus( k )
sk
(3.6)
Therefore, the average input inductor current over one switching cycle is given by:

D T

(d D)T
k sk
sk

i
dt
i
dt

Lin(ave)k T k
Lin(ch arg ing )
Lin(disch arg ing )

0
D T
s
k kk

(3.7)
Equation (3.7) can thus be solved as:

v
sk

Lin(ave)k

L f k
in s

D 2
k

2
V
v L f

bus(k )
s k in s k

2
v
sk

(3.8)

Therefore, the average value of the AC input current per switching cycle can be given by:

v
sk

i
sgn(v )

s (ave)k
s L f

m
s
k

2
v
sk
V bus(k ) vs k Lm f k

D 2
k

2
k

Where, sgn(Vs): takes the values 1 according to the sign of the input voltage.

26

(3.9)

From equations (3.8) and (3.9), it is apparent that the harmonic content of the input current
depends on the switching frequency, duty ratio as well as the dc-bus voltage level. The
distortion level is inversely proportional to the switching frequency, directly proportional to
the square of the duty ratio and inversely proportional to the difference between the output
and input voltages, that is, the higher the dc-bus voltage the lower the distortion. High and
low switching frequencies are considered. From the harmonics analysis it can be seen that, as
an example the dc-bus voltage can be chosen to be 400V for the case of an input voltage of
110V RMS and 600V for an input voltage of 220V RMS.
The condition of discontinuous conduction mode can be guaranteed if the input inductor (L in)
satisfies the following condition [34]:
V 2 T D 1 D 2
L bus s
in
2P
o
(3.10)
Where, Po is the required output power.
The selection of Lin influences the allowable range of duty ratio operation. That is, the higher
the input inductor, the lower the permissible range of duty ratio swing can be made. As an
example, in for Lin=1H, the allowable D changes from 0.035 to 0.8. It is also worth noting
that the input inductor value has to be below the curve of the minimum input voltage range at
full load such that discontinuous conduction would be guaranteed even at the maximum input
current.
Based on the relations in equation (3.9) a dc-bus voltage range can be selected to range from
350V to 650 V for an input voltage range of 90Vrms to 265Vrms, therefore,

V
1.22V 195
bus (ref )
m
(3.11)
Where, Vbus(ref) is the reference value for the dc-bus voltage and Vm is the peak of the
sinusoidal input waveform.

27

3.4.1.2 Continuous Conduction Mode

For continuous conduction mode, the input inductor has to satisfy the condition in (3.12) and
the duty ratio are, therefore, related to the circuit voltages by equations (3.13) and (3.14) as
follows:
V 2 T D 1 D 2
L bus s
in
2P
o

(3.12)

V
1
bus

V sin t 1 D(t )
m
t

(3.13)

V
m sin t
t
V
bus

(3.14)

D(t ) 1

Therefore,
Where, the notation D(t) indicates that the duty ratio changes during the line frequency halfcycle. Using average current mode control, the whole converter is seen by the supply as an
equivalent resistor Re whose value varies continuously with the sinusoidal cycle of the input
voltage in such a way that the average power remains balanced between the input and the
output [36]. For average current mode control, the value of Re is determined by the control
signal generated from the dc-bus voltage and input current control signal.
In this case the average input current in one switching cycle is given as in equation (3.15):
V sin t
t
ILin( ave)k m
R
o

(3.15)

The current ripple around the average in this case is given by:

28

V sin t DT
t
s
iLin m
2L
in

(3.16)

And thus, the peak input current can be expressed as:

V sin t vs Dk Tsk
t
k
iLin
ILin (ave)k iLin m
peak
R
2L
e
in

(3.17)

Which is much less than, that in discontinuous conduction mode due to the larger value of
input inductance needed to maintain continuous conduction. It is seen here that for ideal
operation the input current should follow the sinusoidal input waveform better than the case
of discontinuous conduction, but some design considerations, which will be discussed later in
this section, lead to deviations from this ideal case.
Referring to figure 3.5, this mode of operation requires an additional measurement of the
input current in order to be able to operate with a current mode control. This additional
feedback signal can be eliminated if a current estimation technique is used.
This will consequently lead to a smaller size and more reliable converter.

V
V
D
bus m
min
V
bus and a
The duty ratio in this case ranges between a minimum value of
maximum value of 1 occurring at the zero crossings of the sinusoidal input voltage. As
mentioned in section 3.3, the duty ratio should be limited to a certain value below 1 such that
the power flow to the output remains sufficient to supply the load. Therefore, based on the
selection of the dc-bus voltage, the range of variation of the duty ratio over the line frequency
period is determined.
3.4.2 Analysis of the Resonant Circuit (from dc-bus to output)
Frequency analysis techniques are used to model the circuit in order to study the performance
of the resonant circuit stage. For a series-parallel LCC resonant circuit the equivalent ac load
is given by [56]:

29

 2 N1

R
R
ac
8 N L
2

(3.18)

where, N1 and N2 are the primary and secondary turns, respectively, of the isolating
transformer.
The input voltage to the resonant circuit is shown in figure 3.2. The Fourier series expansion
of this waveform is given by:
R 1 jn R C
ac
s ac p
Z

p (n)
1 n2 2 R 2 C 2

s ac p

(3.19)

The dc-component of VAB is blocked by the resonant circuit. Therefore, the transformer
primary voltage can be given as:

V Z

sin
m p ( n)

1
n

v
sin 2 nf t tan

p
s
pn n

cos

n 1 Ztot
n

( n)

Where,

2 n 1 D
n

(3.20)
(3.21)

fs is the switching frequency and, n is the harmonic order.

R 1 jn R C
ac
s ac p
Z

p ( n)
1 n2 2 R 2 C 2

s ac p

And,

pn is the angle of Zp(n) such that,

(3.22)

Im( Z

pn

)
p ( n)
Re( Z
)
p ( n)

tan 1

n R 2 C
R

1
s ac p
ac
Z

j n L

tot ( n)
s s n C
1 n2 2 R 2 C 2
1 n 2 2 R 2 C 2

s
s
s ac p
s ac p

and
30

(3.23)

(3.24)

 is the angle of Ztot (n) such that,

Im( Z
)
tot (n)

tan
n
Re( Z
)
tot (n)

r (n)

The resonant circuit current is, therefore, given by:

2V

bus
i
r
n 1 n Z
tot (n)

(3.25)

AB (n)
Z
tot (n)

sin
n
1 cos sin 2 nf t tan 1
n
s
n
1 cos

(3.26)

(3.27)

Where, has a positive value as long as the circuit is operating in the above resonant mode.
This leads to a resonant current (ir) lagging the input voltage to the resonant circuit (V AB), and
that contributes to achieving zero voltage switching.
The transformer primary current is given by:
N
i I 1 sgn(v )
p
0 N
p
2

(3.28)

Where, Io is the output load current

As mentioned earlier, the series-parallel resonant converter is found to be convenient for this
application because of its ability to operate as a buck-boost converter according to the
frequency variation. The transfer function of this circuit (transformer primary voltage V p(s) to
input voltage VAB(s) in the Laplace domain can be given by:

V ( s)
R C s
p
ac s

V ( s ) R L C C s3 L C s 2 R (C C ) s 1
AB
ac s s p
s s
ac s
p

(3.29)

Therefore, for the cases where the duty ratio is farther away from 0.5 (either above or below
this value), this may occur at the valleys of the input voltage waveform or in some cases near
its peak; the fundamental ac-component of the voltage input to the resonant circuit is reduced.
Hence, a boosting action in the resonant circuit is required to maintain the output voltage
within the required limits.
31

32

Chapter -4

MULTIPLE FREQUENCY AVERAGE MODELLING OF THREELEVEL SINGLE-STAGE PFC CONVERTERS

4.1 Introduction
In this chapter modeling approach for single-stage three-level PFC converters are discussed.
A state-space approach based on combined averaging and multiple frequency modeling is
used. This method allows the separation of both the duty ratio and the switching frequency as
two explicit control variables. The model can describe the operation of the converter,
including the effect of non-linear and parasitic component. It can also be simplified to a
decoupled linearized model for small-signal analysis, and provides good prediction of the
steady state behavior. This model is applied to converters operating with either variable
frequency APWM or variable frequency PSM control.
4.2

Modeling Issues of SSPFC Converters

As discussed in the previous chapters, the operation of the SSPFC converters must cope with
two sets of dynamic behaviors. The first is the slow dynamic of the input current and dc-bus
voltage (if it exists in the converter), and the second is the fast dynamic response required at
the output side. Modeling approaches for this type of converter have been primarily based on
averaging and/or small-signal analysis techniques. Another modeling issue is that many of the
models are developed for certain applications or modes of operation. That is, the model is
able to express the performance of discontinuous conduction mode only or continuous
conduction mode only; in other cases the model can only represent either constant or variable
frequency operation, but this modeling approach ends up using time varying circuit
parameters to solve for the different frequency components.
An added difficulty for the SSPFC converter proposed and discussed in chapters 2 and 3
arises because of the use of two control variables in the two separate control loops: the
switching frequency and duty ratio (or phase-shift angle). Thus, the objective of the analysis
presented in this chapter is to develop a systematic state-space modeling procedure that is
suitable for expressing the different system dynamics in the converter as well as separating
the two control variables explicitly in order to facilitate better understanding of system
33

performance and better controller design. This model is also able to express the non-linearties
as well as parasitic component effects in the converter such that it can be used at a high
complexity level if needed and can also be simplified to an approximate decoupled model if
only an approximation of the system performance is needed.
In this chapter a state space model based on combined averaging [36] is proposed. In section
4.3, a description of the modeling procedure is presented. This is followed by the application
of this procedure to SSPFC converters operating with variable frequency APWM.
4.3

The Proposed Averaging Multiple Frequency (AMF) Model

In order to develop the AMF state space model the following procedure is followed:

The modes of operation of the converter, through a switching cycle, are determined along
with their respective equivalent circuits.

The state-space model for each mode of operation is derived and they are combined using
weighted averaging to get the average system model.

The state-space variables are broken down into their harmonic components. This gives an
infinite series for each variable, but based on the knowledge of the system the significant
harmonics can be chosen to reduce the computational effort.

These harmonic components are differentiated to obtain a new set of state variables.

The magnitudes of the harmonic components thus become the new state variables and are
substituted in the original average model by equating harmonic components for each state
variable.

These steps lead to the derivation of a full order detailed large signal model that, in most
cases, will be a non-linear model. Both the fast and slow transients are expressed in the same
model. Some of the important characteristics of this method can be noted as follows:

A significant feature of this method is that it does not include state variables that change
at different rates at steady state when using standard averaging. Instead, using the
magnitudes of the harmonic components as the new state variables means that the state

34

variables end up at a dc steady-state value for all system variables. These components can
then be added up to reconstruct the original signal.

Although this model can be highly non-linear and complex depending on the circuit
structure, it can then be linearized around a specific operating point or even simplified to
a decoupled model with the fast and slow dynamics separated.

This procedure is also indifferent to whether the converter is operating in continuous or

discontinuous conduction mode.

The use of the harmonic series for the state variables leads to a straightforward means of
extracting the switching frequency as an explicit variable in the model in addition to the
duty ratio (or phase shift angle) for any mode of operation. Throughout the following
analysis these assumptions are made to simplify the analysis:

The dead times between switching transitions are ignored since they are much smaller
than the switching period.

Initially, the ac equivalent resistance of the output of the resonant circuit is used for the
purpose of clarity, then the effects of transformer, output rectifier and parasitic elements
are introduced.

The main switching modes of operation are considered in the average model for the
VFAPWM-CCM, VFAPWM-DCM control methods.

4.4 Modeling VFAPWM Converters

Depending on the chosen mode of operation the modeling of the converters with VFPWM
control is performed for the cases of:
4.4.1 Continuous input current conduction mode.
4.4.2 Discontinuous input current conduction mode.
4.4.1 Continuous Conduction Mode
For the case of CCM the operation of the converter can be divided into two main periods that
are illustrated in figure 4.1:

When lower switches (S3 & S4) are on, 0 t DTs and
35

When upper switches (S1 & S2) are on, s DT t T.

Therefore, the state space model is given by equations (4.1) & (4.3) for cases (a) and (b) of
figure 4.1 respectively.
diLin vs
=
dt
L
in

dV
1 0
dt

(1)

Input

inductor

charging:

dV
i
2 r
dt
C
b2
di
r 1 V v v

p
dt L 2 cs

(4.1)

dv
i
cs r
dt
C
s
dv

v
i
p
p
r

dt
C
R C
p
ac p
All state variable notations are defined on the circuit diagram in figure 4.1 and

2
2 N1

R
R
ac
L
8 N
2

(4.2)

Where Rac is the ac equivalent resistance of the output of the resonant circuit .

36

Fig.4.1. Equivalent Circuits for the two stages of operation (CCM) input inductor charging

Fig.4.2. Equivalent Circuits for the two stages of operation (CCM) input inductor discharging

diLin vs V1 V2

dt
L
in

dV iLin i
s
1
dt
C
b1
(2) Input inductor discharging:

dV
2 iLin
dt
C
b2
di
r 1 V v v

p
dt L 1 cs

s
37

(4.3)

dv
i
cs r
dt
C
s
dv

v
i
p
p
r

dt
C
R C
p
ac p

Combining equations (4.1) and (4.3) the overall average model of the converter over the
switching period is given by:
1 D

Cb1
1 D

C
b2

iLin

V1
V
d 2

dt ir
v
cs
v

p

1 D
L
s

D
L
s

1 D

C
b1
D
C
b2
0
1
C
s
1
C
p
1
C
p

1
L
s

1
L
s

iLin

L
V
in
1
0
V

2
i 0 vs
0
r

v
cs 0
v 0

C R
p ac

(4.4)
The next step is to decompose each of the state variables into their dominant harmonic
components. Note that s indicates the angular switching frequency and l indicates the
angular power line frequency. This decomposition is found to be adequate due to the fact that
higher harmonic orders are blocked by the resonant circuit. The rectified input voltage can
thus be given as:

2V
4V
m n cos( n t )
v m

s
t
2

n 2, 4, 6... n 1
Similarly, on the output rectifier side

38

(4.5)

v sgn(v )
p
p

2v

p(max)

n 2, 4, 6...

4v

p (max) n
cos(n t )
s
2

n 1

(4.6)

The input voltage to the resonant circuit (VAB) in terms of V1 and V2 and referring to figure
3.2 can be given as:

V V
V V
V (1 D ) V D 1 2 sin(2 (1 D)) cos t 1 2 1 cos(2 (1 D)) sin
AB
1
2
s

..... (4.7)

The effect of higher harmonics is very small and can be neglected here. Finally the state
variables are expressed in terms of their dominant harmonics as follows:
i i
i cos t i sin t irql cos 2 t irdl sin 2 t
r r (dc ) rq
s rql
l
l
l
v v
v
cos t v
sin t v
cos 2 t v
sin 2 t
cs
s (dc ) csq
s
csd
s
csql
l
csdl
l
v v
v cos t v sin t v
cos 2 t v
sin 2 t
p
p ( dc)
pq
s
pd
s
pql
l
pdl
l
V V
V cos 2 t V sin 2 t V 1q cos t V sin t
1 1(dc) 1ql
l
1dl
l
s
1d
s

(4.8)

V V
V
cos 2 t V sin 2 t V cos t V sin t
2
2(dc) 2ql
l
2dl
l
2q
s
2d
s
iLin iLin(dc ) iLinql cos 2 t iLindl sin 2 t iLinq cos t iLind sin t
l
l
s
s
Only even harmonic components appear in the expansion of the low frequency variables
since they are all on the dc side of the rectifier and thus have waveforms symmetrical about
the vertical axis.
The following step is to differentiate the variables in equation (4.8). The resulting expansion
is as shown in equation (4.9).By substituting (4.5) to (4.9) into (4.4) and equating harmonic
components taking into consideration the average power balance between input and output.
We can reformulate the model in (4.4) as shown in (4.9) - (4.13):

39

i i
i cos t i sin t i sin t i cos t
r r ( dc) rq
s
rq s
s
rd
s
rd s
s
v v
v
cos t v sin t v
sin t v cos t
cs
cs(dc) csq
s
csq s
s
csd
s
csd s
s
v v
v cos t v sin t v sin t v cos t
p
p (dc)
pq
s
pq s
s
pd
s
pd s
s
V V
V cos t 2 V sin 2 t V sin 2 t 2 V cos 2 t
1 1( dc) 1ql
l
l 1ql
l
1dl
l
l 1dl
l
V cos t V sin t V sin t V cos t
1q
s
1q s
s
1d
s
1d s
s
V V
V
cos 2 t 2 V
sin 2 t V
sin 2 t 2 V
cos 2 t
2
2( dc)
2ql
l
l 2ql
l
`2dl
l
l 2dl
l
V cos t V sin t V sin t V cos t
2q
s
2q s
s
2d
s
2d s
s
i
i
i
cos 2 t 2 i
sin 2 t i
sin 2 t 2 i
Lin Lin(dc ) Linql
l
l Linql
l
Lindl
l
l Linql
cos 2 t i
cos t i
sin t i
sin t i
cos t
l
Linq
s
Linq s
s
Lind
s
Lind s
s

High frequency state variables

di
1
r (dc)

1 D V1(dc) DV2(dc) vcs(dc) v p(dc)

dt
L

s
di

1 Vid V2d
rq
i
sin 2 1 D v
v

s id L
csq
pq
dt

s
V V

di
2q
rd i 1 iq
1 cos 2 1 D v
v
s iq L
csq
pq
dt

(4.10)
di
1
rql
2 i
1 D V1ql DV2ql vcsql v pql

l
rdl
dt
L

di
rdl 2 i 1 1 D V DV
v
v

l
rql
1
dl
2
dl
csdl
pdl
dt
L
s
Low frequency state variables

40

(4.9)

diLin(dc) 2Vm 1 D

(V
V
)
1(dc) 2( dc)
dt
L
L
in
in
8V
diLinql
1 D
m 2 i

(V V )
lL
1ql
2ql
dt
3 L
L
indl
in
in
diLindl
1 D
2 i

(V V )
lL
1dl
2dl
dt
L
inql
in

(4.11)

diLinq
1 D
1 D
i

V
V
sL
1q L
2q
dt
L
ind
in
in
diLind
1 D
1 D
i

V
V
s
L
1
d
2d
dt
L
L
inq
in
in

Similarly for the second capacitor

dV
D
2(dc) 1 D

i
L
r (dc)
dt
C
C
b 2 in(dc)
b2
dV
1 D
D
2ql
2 V

i
l
2
dl
L
rql
dt
C
C
b 2 inql
b2
dV
1 D
D
2dl 2 V

i
l 2ql C
L
rdl
dt
C
indl
b2
b2

(4.12)

dV
1 D
D
2q
V
i

i
s 2d C
L
rq
dt
C
inq
b2
b2
dV
D
2d V 1 D i

i
s 2q C
L
rq
dt
C
b 2 inq
b2
and thus,
V V2
V 2 V 2 V 2 V 2
2
2(dc) 2ql
2dl
2q 2d

(4.13)

It should be noted that the all newly derived state variables are now dc variables whose
values represent the peak values of the sinusoidal components to which the original variables

41

were decomposed, instead of having variables that are at different harmonic frequencies as
was the case in equation (4.4).
Equations (4.9) to (4.13) show that both control variables: (D) and (s) now appear explicitly
in the system model. It is worth noting that the value (l), which is the angular frequency of
the line voltage, is dealt with as a constant (either 314 rad/sec or 377 rad/sec depending on
the operating line frequency.) The effects of the low frequency dynamics on the high
frequency variables can also be modeled and vice versa, as it is apparent the model in this
case is non-linear due to the multiplication of the control variables and the state variables. If
the effect of any parasitic component needs to be accounted for, it is simply inserted in the
state equations. Steady state operation of the converter can be predicted by setting the
derivatives of the state variables to zero and calculating the values of these variables for the
different operating points.

4.4.2 Case 2: Discontinuous Conduction Mode

For the case of DCM the three main modes of operation are as follows:

Switches S3 and S4 are ON; this occurs in the interval 0 t DTs

The second set of dynamic equations occurs when switches S1 and S2 are ON with the
input inductor discharging its energy. This occurs during the time period

DT t (D+ d T)

At the end of this period the value of the input inductor current iLin should reach zero.

(4.14)

Following this period the third stage takes place with switches S1 and S2 still in the ON
state. The duration of this period is d2Ts. taking into consideration that:
d2 = 1 - D d

(4.15)

42

Fig.4.3. Equivalent Circuits for the three stages of operation (DCM) input inductor charging

The three modes of operation are shown in figure 4.3 4.5. The first two modes of operation
are similar to equations (4.1) and (4.3) for the case of CCM with (D) in (4.1) retaining the
same definition and (1-D) in (4.3) replaced by (d). Therefore, the modified equations are
given in equations (4.18) and (4.19). Mode (iii) that is shown in figure 4.5 is given by
equation (4.20).

43

Fig.4.4. Equivalent Circuits for the three stages of operation (DCM) input inductor discharging

Fig.4.5. Equivalent Circuits for the three stages of operation (DCM) Energy transfer to output

44

diLin vs
=
dt
L
in

dV
1 0
dt

(1)

Input

inductor

charging:

dV
i
2 r
dt
C
b2

(4.16)

di
r 1 V v v

p
dt L 2 cs

s
dvcs ir

dt
Cs
dv p
dt

v
ir
p
C p RacC p

diLin
0
dt
dV
i
1 r
dt C
b1
(2) Input inductor discharging:

dV
2 0
dt

di
r 1 V v v

p
dt L 1 cs

(4.17)

dv
i
cs r
dt
C
s
dv

v
i
p
p
r
dt
C
R C
p
ac p

Equations (4.15), (4.16) and (4.17) can be combined to obtain an average model in the form:

45

 .
x Aeq x Beq vin

i
L
in

V V
1 2

(4.18)

i
r

t'

v
p

v
cs

(4.19)

Is the state vector

C
b1
d
C
b1

A
eq

1 D
L
s

d
L
in
0

d
L
in

1
C
s
1
C
p

C
b1
D
C
b2
0

1 D

D
L
s
0

1
L
s

1
L
s

R C
ac p

(4.20)

is the plant matrix,

Dd
B
eq L
in

0 0 0 0 0

t
(4.21)

is the input matrix.

This is followed by substituting the state variables with their harmonic components. The
resulting model is thus formulated as follows: The input voltage to the resonant circuit (V AB)
in

terms

V 1 D V D sin(2 1 D cos t (1 cos (2 1 D ) sin t

1
2
s
s

AB

of

V1

and

V2

and

referring

to

figure

3.2

is

expanded

(4.22)

46

to:

High frequency state variables

dvcs ( dc )
dt
dvcsq
dt

ir ( dc )
Cs

s vcsd

irq
Cs

dvcsd
i
s vcsq rd
dt
Cs
dvcsql
dt

2l vcsdl

(4.23)

irql
Cs

dvcsdl
i
2l vcsql rdl
dt
Cs
dv

i
v
p (dc ) r (dc)
p (dc )

dt
C
R
p
ac

dv

i
v
pq
rq
pq
v

s
pd

dt
C
C R
p
p ac

dv

v
i
pd
pd
rd
v

s
pq

dt
C
C R
p
p ac
(4.24)

dv

i
v
pql
rql
pql
2 v

l pdl C
dt
C R
p
p ac

dv

v
i
pdl
rdl pdl
2 v
l pql C
dt
C R
p
p ac

dv

v
i
pdl
pdl
rdl
2 v

l
pql

dt
C
C R
p
p ac

47

Low frequency state variables

di

L
d
in( dc) 2Vm

D d V1(dc) V2(dc)
dt
L
L

in
in
di
L
8V
d
inql

m D d 2 i

V1ql V2ql
l
L
dt
3 L

indl Lin
in
di
L
d
indl 2 i

V V
lL
1dl
2dl
dt
inql Lin
di
L
d
inq

V1q V2q
s
L
dt

ind Lin
di
L
d
ind i

V V
s
L
1d
2d
dt
inq Lin

(4.25)

dV
1 D i
d
1(dc)

r (dc )
dt
C Lin( dc)
C
b1
b1
dV
1 D i
d
1ql
2 V
i

l 1dl C L
rql
dt
C
b1 inql
b1
dV
1 D i
1dl 2 V d i

l 1ql C L
rdl
dt
C
b1 indl
b1
dV
1 D i
d
1q
V
i

s 1d C L
rq
dt
C
b1 inq
b1
dV
1 D i
1d V d i

s 1q C L
rd
dt
C
b1 ind
b1

(4.26)

Thus, equations (4.24) to (4.26) describe the operation of the output resonant stage of the
converter.
and thus,
V 1= V 2
V 2 V 2 V 2 V 2
1(dc) 1ql 1dl 1q 1d

(4.27)

Similarly for the second capacitor,

48

dV
d
D
2(dc)

i
L
r (dc)
dt
C
C
b2 in(dc)
b2
dV
d
D
2ql
2 V

i
l 2dl C
L
rql
dt
C
b 2 Linql
b2
dV
d
D
2dl 2 V

i
l
2
ql
L
rdl
dt
C
C
b2 Lindl
b2
dV
d
D
2q
V
i

i
s
2
d
L
rq
dt
C
C
b2 Linq
b2
dV
D
2d V d i

i
s 2q C
L
rd
dt
C
Lind
b2
b2

(4.28)

and thus,
V 2= V 2
V 2 V 2 V 2 V 2
2(dc ) 2ql
2dl
2 q 2d

(4.29)

The two ratios d1 and d2 must be replaced by a single value or at least one of them must be
expressed in terms of the other. Figure 4.6 shows the input inductor current over one
switching period.

Fig.4.6. Input inductor current in discontinuous conduction mode

The peak input inductor current is given by:

iLin( peak )

vs
2 Dvs
DTs
Lin
sLin

(4.30)
49

One way of obtaining a relation between D and d is by means of averaging the input current
over one switching cycle [17].

1
iLin(dc) iLin( peak )( D d )
2

(4.31)

Therefore, the relationship between the two variables D and d can be obtained by substituting
from equation (4.30) into (4.31):
d

2 LiniLin(dc)
D
2 Dvs

(4.32)

Therefore, D can be expressed in terms of d or vice-versa. In order to simplify the obtained

model, d is substituted for in terms of D.

50

Chapter 5

SIMULATION AND RESULTS

5.1 Simulink Models
5.1.1 Introduction
The complexity of device models and switching nature of switching converters make
simulation difficult due to converge in Pspice. Simulink is a windows oriented dynamic
modeling package that is an extension to Matlab. The advantage is that models are entered as
block diagrams after corresponding mathematical equations are developed for the target
system.
Matlab uses ordinary differential equation solver (ode45) to solve sets of linear and nonlinear differential equations which in this case are emulated by block diagrams. Thus to
simulate an electrical system such as DC/DC converter, one has to write equations for various
blocks in the system and construct an equivalent block diagram using icons in simulink. The
parameters for individual icons can be set for the process. Finally, a choice of equation solver
and simulation time is made. The output of system could be observed or recorded into file.
Simulink also provides the feature of writing S-functions which implements the equations of
a block. The disadvantage in using s-functions is that no bode plots can be observed if an sfunction is in the block diagram.
5.2 Mathematical Schematic of DC/DC Boost Converter
It includes the expansion of the equations expressing dynamics of the DC/DC boost converter
in continuous and discontinuous conduction mode during charging and discharging of
operation of input inductor.
5.2.1 Matlab schematic of DC/DC Boost Converter in CCM
Referring back to the equations for boost converter in its two switch positions in chapter 4, a
simulink model for input inductor charging equation of DC/DC boost converter in CCM can
readily be constructed as shown in figure 5.1.

51

Fig.5.1. Expansion of input inductor charging equation of DC/DC boost converter in CCM

A simulink model for input inductor discharging equation of DC/DC boost converter in CCM
can readily be constructed as shown in figure 5.2.

Fig.5.2. Expansion of input inductor discharging equation of DC/DC boost converter in CCM

5.2.2 Matlab Schematic of DC/DC Boost Converter in CCM

A simulink model for input inductor charging equation of DC/DC boost converter in DCM
can readily be constructed as shown in figure 5.3.

52

Fig. 5.3. Expansion of input inductor charging equation of DC/DC boost converter in DCM

A simulink model for input inductor discharging equation of DC/DC boost converter in DCM
can readily be constructed as shown in figure 5.4.

Fig.5.4. Expansion of input inductor discharging equation of DC/DC boost converter in DCM

53

5.3 Mathematical Schematic of Controller Block

Fig.5.5. Simulink Schematic of control block

Figure 5.5 presents simulation of controller block of single stage power factor corrected
resonant converter. It includes the proportional plus integral inner current loop controller,
proportional plus integral outer loop voltage controller and S-function based frequency
controller. Matlab models for systems are developed using the blocks of simulink and the
same are used for simulation studies. The closed loop system is able to maintain constant
voltage. This converter has advantages like reduced hardware and good output voltage
regulation.
5.3.1 Matlab Schematic Frequency Controller
A frequency controller model has been implemented in simulink using an embedded Sfunction shown in figure 5.5. The model has the input parameters of load voltage and
reference voltage Vref. The S-function implements the equations that govern the controller
operation. Frequency thus calculated is given as input to saw-tooth generator which regulate
the output voltage Vo
function fs = FC(Vo,Vr)
% This block supports the Embedded MATLAB subset.

54

% See the help menu for details.

if Vo < Vr
fs = 170000-500
elseif Vo > Vr
fs = 170000+500
else
fs = 170000
end
5.3.2 Matlab Schematic DC Bus Voltage Controller
The following equation is used in PI controller
Ve K p e K1 edt

(5.1)

And this equation is simulated as shown in figure 5.6.

Fig.5.6. PI controller for DC bus voltage control

Output voltage is sensed and it is compared with a reference voltage. The error is processed
by a PI voltage controller; output of PI voltage controller is compared with a signal
proportional to input inductor current for power factor correction. The error is processed by a
another PI controller which adjusts the pulse width to maintain the output voltage constant
with unity power factor as close as possible at AC supply.

55

5.4 Simulink Implementation of Proposed converter

A 2.3 kW three-level full-bridge converter is designed to investigate the effectiveness of the
proposed methods. The converter parameters are given in Table 5.1. The resonant frequency
is 170 kHz and the converter is always operated above resonance frequency to guarantee
ZVS.
It is observed that, the harmonic content of the input current is higher in the case of
continuous conduction mode at low input voltage due to the limitations placed on the duty
ratio as mentioned in section 3.3. The values of simulated input power factor confirm this fact
and are shown in figure 5.9. The minimum value obtained for the input power factor is 0.97
and the maximum value is 0.993. Figure 5.10 and 5.11 shows the input voltage and input
current and the harmonic content of the input current for different operating conditions. The
input current harmonics are compliant with the IEC1000-3-2 and IEC1000-3-4 harmonic
standards for high and low input voltages respectively.
ZVS is achieved for all switches. Figures 5.12 and 5.13 illustrate the current and voltage
polarities of one of the upper and one of the lower switches, which guarantee ZVS. The high
current peak for the upper switch is due to the energy discharge from the boost inductor Lin.
This current peak is not present in the case of continuous conduction mode.
The dc-bus voltage is maintained constant over the range of operation of the converter
according to the ranges specified by equation (5.1) for DCM operation. For CCM the dc-bus
voltage range is changed to 400-650 V for a 90-265 volt root mean square (RMS) input range
in order to reduce the required gain of the resonant circuit to guarantee the desired output
voltage level. Therefore the voltage range is given by:
V
1.03V 269.3
bus
in

(5.1)
TABLE 5.1

CONVERTER PARAMETERS FOR VFAPWM OPERATION

Parameter

Value

Output voltage

Vo 48V 2.5%

Input filter

Inductor: 2 H, capacitor: 4.4 F

56

Switches S1, S2, S3, S4

IRFPS43N50K

Dc-bus capacitors Cb1, Cb2

4700 F

Series resonant inductor Ls

22 H

Parallel resonant capacitor Cp

47 nF

Output rectifier

80CPQ150PbF

Output capacitor Co

470 F

Input voltage Vs

90-265V RMS

Output current Io

48A

Input rectifier

MP506W-BPMS-ND

Boost inductor Lin

5H (DCM), 25 H (CCM)

Clamping diodes Dc1, Dc2

RHRP1560

Series resonant capacitor Cs

47 nF

Transformer turns-ratio N1/N2

6/1

Output inductor Lo

20 H

Below figure 5.7 shows the matlab schematic of proposed topology for single stage power
factor corrected resonant converter. It includes the input AC source whose value can be
varied from 90V to 265V. An input full bridge diode rectifier which gives uncontrolled DC
output which feeds the boost converter. Voltage at DC bus followed by boost converter is
tightly regulated by asymmetrical PWM technique. This regulated DC voltage is again
converted to AC then fed to resonant converter. The operations of boost converter, conversion
of regulated DC to AC and power factor correction are done through four MOSFET switches
in a single stage. Output of resonant converter stage is rectified through diode bridge rectifier
and is supplied to load. At this stage 2 diode rectifier may also be employed using centre tap
transformer. Frequency of PWM is controlled to further regulate output DC voltage.

57

58

Fig.5.7. Simulink Schematic of SSPFC converter with control block

5.5 Simulation Results

Fig.5.8. Input Power Factor at different values of load current for DCM

The values of input power factor obtained by each of these methods for a converter are shown
in figures 5.8 and 5.9. The best input power factor is obtained using VFAPWM in CCM with
high input voltage where there is very little restriction on the duty ratio, but in all case the
power factor is above 0.97 and harmonic content is compliant with the IEC standards.

Fig. 5.9. Input Power Factor at different load current for CCM

As can be seen from figure 5.8 and 5.9 for higher input voltage the power factor is highest at
full load 99.5% in CCM, but power factor in DCM mode is low because there is no limitation
on duty ratio in case of CCM whereas D cannot be more than 0.5 in case of DCM.
59

Fig.5.10. Input Voltage (Vs) and input line current (Is) in CCM

Figures 5.10 show the input voltage and input current for different operating conditions.
From the figure it is seen that input current follows the input voltage closely thus, power
factor in all conditions is more than 0.97. The input current harmonics are compliant with the
IEC1000-3-2 and IEC1000-3-4 harmonic standards for high and low input voltages
respectively.

Fig.5.11. Peak harmonic current content

Figure 5.11 show the harmonic content of the input current for different operating conditions.
The input current harmonics are compliant with the IEC1000-3-2 and IEC1000-3-4 harmonic
standards for high and low input voltages respectively.

60

In DCM the input current automatically follows the sinusoidal input

voltage, whereas in CCM active current control is required to sinusoidal
shape the input current. However, CCM has the advantage of having lower
high-frequency ripples in the input current but requires complex control
circuitry.
From equation s(4.8) and (4.9), it appears that distortion level is inversely
proportional to the switching frequency, directly proportional to the square
of the duty ratio and inversely proportional to the difference between the
output and input voltages, that is, the higher the dc-bus voltage the lower
the distortion.

Fig. 5.12. Switch voltage Vds and switch current Id to illustrate the Z VS for switch S1 in DCM .

61

Fig.5.13. Switch voltage Vds and switch current Id to illustrate the ZVS: for switch S4 in DCM

ZVS is achieved for all switches. In figure 5.12 and 5.13 dark line show switch voltage and
light color line is for switch current Figure 5.12 illustrate the current and voltage polarities of
one of the upper and one of the lower switches in DCM, which guarantee ZVS. The high
current peak for the upper switch is due to the energy discharge from the boost inductor Lin.
Below figures 5.14 and 5.15 illustrate the current and voltage polarities of one of the upper
and one of the lower switches in CCM respectively, which illustrate that zero voltage
switching is achieved in CCM also. There is no high current peak for the upper switch in
CCM as occur in DCM; this is because no energy discharge from the boost inductor Lin
occurs in CCM.
From figures 5.14 to 5.15 it can be concluded that current stress on the
lower switches is higher than those on the upper switches, since the lower
switches carry the sum of the input and resonant currents while the upper
switches carry their difference only.

Fig.5.14. Switch voltage Vds and switch current Id to illustrate the ZVS: for switch S1 in CCM

Vbus
The voltage stress on all switches is equal to 2 Both input current and
resonant current provide zero voltage switching for the upper switches,

62

while only resonant current provides zero voltage switching for the lower
switches.

Fig.5.15. Switch voltage Vds and switch current Id to illustrate the ZVS: for switch S4 in CCM

Fig.5.16. DC bus Voltage at different values of load current for DCM

Figures 5.16 show the dc-bus voltage at different values of output load current for CCM. In
figure dotted line show DC bus voltage for higher input voltage and continuous line is for
lower input voltage. It illustrates that the voltage Vbus remains constant throughout the
converter operation at the level determined by the input voltage. Finally, figure 5.17 show the
estimated conversion efficiency for the simulation model is given over the loading range of
the circuit. A maximum estimated efficiency of 95% is obtained in the case of maximum
63

input voltage in DCM operation. The CCM operation is a little less efficient than the DCM
operation, with maximum estimated value of approximately 92.3%, due to the limitations
placed on the duty ratio. This leads to the need for higher converter gain and thus higher
circulating current in the resonant circuit and a higher range of switching frequency variation,
which, consequently, forces the converter to operate further away from the optimum
efficiency point.

Fig.5.17. Converter efficiency at different values of load current for DCM

Fig.5.18. Converter efficiency at different values of load current for CCM

Figure 5.17 and 5.18 show the variation of converter efficiency at different conditions of load
current. The dotted line is for higher input voltage and dark line is for low voltage. From the
64

two figures for DCM and CCM it is seen that higher efficiency of 95% is obtained at full load
for higher voltage. Thus, converter is more efficient for high input voltage and full load. The
CCM operation is a little less efficient than the DCM operation, with maximum estimated
value of approximately 92.3%, due to the limitations placed on the duty ratio. This leads to
the need for higher converter gain and thus higher circulating current in the resonant circuit
and a higher range of switching frequency variation, which, consequently, forces the
converter to operate further away from the optimum efficiency point.
5.6 Comparisons between Existing and Proposed SSPFC Topologies
TABLE 5.2
COMPARISON BETWEEN THEORETICAL AND EXPERIMENTAL RESULTS

S. No.
1.

Existing SSPFC Topologies

Proposed SSPFC Topologies
Power ratings are only several Power ratings are in Kilo-watt range.
hundred watts.

2.

High

component

voltage

and

Zero voltage switching is achieved

for all switches and reduced

current stresses.

current stress.
3.

High circulating currents.

4.

Low frequency oscillations in the Oscillation in the output are further

5.

Reduced circulating current.

output.

reduced.

High ripple in the output voltage.

Tightly regulated output voltage with

minimal low-order harmonic Components.

6.

Output voltage vary considerably Output voltage remains constant

with variation of input voltage.

for the

universal input voltage range (from 90V to

265V input).

7.

High circuit complexity with a Simple

circuit

with

less

number

of

large number of components.

components.

8.

Auxiliary Circuit are required.

No Auxiliary Circuit required.

9.

Maximum Efficiency is up to 92%.

Maximum Efficiency is upto 95%, so high

conversion efficiency.

65

Chapter 6

Conclusion and Future Work

Conventional single-stage power factor correction converters have limitations on their input
voltage range and power handling capability due to the increased component voltage stress,
high circulating current, and/or high value of low frequency voltage ripples in the output.
These limitations result in reduced efficiency or inadequate output voltage waveforms, which
make these converters useful only for low power applications. In this thesis the problem of
extending the power handling capabilities of SSPFC converters with universal input voltage
range has been investigated. Both converter topologies and control techniques have been
proposed in order to provide SSPFC circuits capable of handling multiple kilowatts of power
with high efficiency and reduced component stresses. The main contributions of this thesis
can be summarized as follows:
1. A single-stage three-level resonant converter topology has been proposed by integrating the
three-level half-bridge resonant dc-dc converter with the boost power factor pre-regulator.
This has been achieved by having an input inductor directly connected to the bottom pair of
switches of the half-bridge resonant converter. The proposed topology gives reduced voltage
stress across all switches, since each switch is supposed to carry only half the dc-bus voltage.
The use of three-level converters, as compared to two level circuits, also provides more
flexibility in controlling the converter operations through the increased number of control
variables. This makes the converter suitable for operation at wide ranges of input voltage and
also capable of handling higher power levels with universal input voltage.
2. A variable frequency asymmetrical pulse width modulation (VFAPWM) control method
has been proposed. Variable frequency control is used to regulate the output voltage to the
required level, where the APWM control is used for input current shaping as well as dc-bus
voltage regulation. The frequency control loop is responsible for providing the carrier
frequency to the APWM controller. Having two control loops in this fashion also provides the
advantage of not having the extremely high dc-bus voltage values at load conditions as in the
conventional single-stage power factor correction circuits. This control is suitable for
converter operation in both continuous and discontinuous conduction modes.

66

.
3. A state space approach using combined averaging and multiple frequency techniques has
been proposed for modeling the proposed converters. This modeling procedure can be used
for either continuous or discontinuous conduction mode. This approach enables the
separation of both frequency and duty ratio (or phase shift) as two explicit control variables.
The converter dynamics in this case can be obtained through the large signal model, including
the effects of non-linear ties and circuit parasitic components, or it can be simplified to obtain
a small signal model or a decoupled model.

Suggested Future Work

The proposed topology should be implemented variable frequency phase shift key
modulation and results must be compared for better option. A fully digitized implementation
of the proposed control methods should be carried out through the development of FPGA.
Further the development of application specific integrated circuit (ASIC) should be explored
to provide a smaller, more reliable and cheaper controllers.

67

APPENDIX A
A.1 Decoupled Model
A approximation is possible for the derived model, since it is possible to decouple the high
and low frequency variables. This approximation can be used owing to the significant
difference in the dynamic performance of the input to bus portion of the converter as
compared to the bus to output portion. The former is much slower in dynamic response as
compared to the latter. This is achieved by considering the input to the high frequency
resonant stage as a rectangular wave voltage source whose magnitude is determined by the
value of the dc-bus voltage. In case of fundamental analysis, this would be a sinusoidal
voltage source whose magnitude depends on Vbus, whereas, the low frequency current shaping
boost operation can be separated as having a dc load at the output determined by the output of
the converter. A simplified schematic diagram of this separation is shown in fig (A.1)

Fig A.1 Decoupled Model of SSPFC Resonant Converter

So the input current shaping pre regulator which is a boost converter here can be controlled
separately with some approximation.

68

Fig A.2 Boost Converter with equivalent load

Fig A.3 Boost PFC circuit topology

In above circuit of boost converter power factor control can be applied as shown; such that
the boost inductor is in series with the applied uncontrolled rectified input supply.

(a)

(b)

Fig.A.4 Switching state of Boost PFC circuit topology (a) On State (b) Off state

This topology inherently accepts a wide input voltage range without an input voltage selector
switch. The equivalent circuits of the system are derived based on the on and off states of
the converter switch as shown in figure A.4
69

Vin (t ) Vm sin t

(a.1)

Under the CCM, whenS is turned on, the state equations are
di t
Vin (t ) L L
, 0 t DT
dt

(a.2)

and at output

Vo
dV
C o
Re
dt
(a.3)

Similarly, when S is turned off, the output equation of (a.3) still holds, while the state
equations becomes
Vin (t ) Vo L

diL t
, DT t T
dt

(a.4)

Vo
dV
iL C o
Re
dt

(a.5)

To obtain a small signal model of boost converters, it is required to apply the averaging
technique, perturbation, and the linearization technique. First, by applying the averaging
technique, the averaged state equations and output equation are
Vin L

diL
(1 D )Vo
dt

(a.6)

Vo
dV o
(1 D )iL C
Re
dt

(a.7)

where D is the duty cycle, X is the averaged variable for the variable X. Second, by
applying small signal perturbations to (a.6) and (a.7), i.e. let
X X x$
(a.8)
$
where X and x are nominal (DC) and perturbed (AC) variables,
$
vin sLiL (1 D)vo dV
o

(a.9)
70

vo
$
(1 D)iL sCvo di
L
Re
(a.10)

Third, by applying the linearization technique (assume that the high order non-linear terms
are small and negligible), a set of DC and AC equations can be obtained as follows:
DC equations:
From (a.9)

Vin (1 D)Vo
(a.11)
From (a.10)

Vo
(1 D)iL
Re
(a.12)

AC equations:
From (a.9)

$
vin sLiL (1 D )vo dV
o
(a.13)
From (a.10)

vo
$
(1 D)iL sCvo di
L
Re
(a.14)

Substitute (a.11), (a.12) and (a.13) into (14), we get the various transfer function as follows

Vin Re (1 D ) 2 sL
vo

(1 D )[ s 2 LCRe sL Re (1 D ) 2 ]
d
(a.15)

71

vo
Re (1 D)
2
2

vin s LCRe sL Re (1 D)

(a.16)
Now using the parameter of our boost stage as given in table the output to control transfer
function is obtained as

600 7.2 25 106 s

vo

5 2
6
d$ [1.057 10 s 25 10 s 7.2]
(a.17)

A.2 Design of PI Controller

A.2.1 Converter Parameters
Po

= 20 W

Vin = 24 V
Vo = 48 V
Fs

= 100 KHz

= 1-Vin/Vo = 0.5

Iin = 0.2(20%)
Vo = 0.01(1%)
R

= Vo*Vo/Po = 120

= (Vin*D*Ts)/Iin = 80mH

= (D*Ts*Vo)/(R*Vo) =1.68mF

A.2.2 MATLAB Program for Bode Plot of the Boost Converter

Vi=24;
Vo=48;
72

Po=20;
Fs=100e3;
deli=0.2;
delv=0.01;
D=1-Vi/Vo;
Ts=1/Fs;
R=Vo^2/Po;
L=D*(1-D)^2*R*Ts/deli;
C=D*Ts/(R*delv);
num=[1/(1-D)];
den=[L*C/(1-D)^2 L/(R*(1-D)^2) 1];
H=tf(num,den);
bode(num,den);
grid on;

A.2.2.1 Bode Plot

73

Fig A.5 Bode plot of the boost converter

A.2.3 Calculation Kp, Ki from Bode Plot

Kp

cos
A

(4.19)
= 2.3792e-3

Ki

sin
A

(4.20)
= 397.3783

= 60-87.6

74

where, d u
(4.21)

d = desired phase margin,

u = phase margin of uncompensated system.

75