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Internal Use Only

North/Latin America
Europe/Africa
Asia/Oceania

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LED TV
SERVICE MANUAL
CHASSIS : LD3AC

MODEL: 55LA625C

55LA625C-ZA

CAUTION

BEFORE SERVICING THE CHASSIS,


READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67800113(1309-REV00)

Printed in Korea

CONTENTS

CONTENTS . ............................................................................................. 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS ................................................................... 4
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION .............................................................. 10
TROUBLE SHOOTING GUIDE................................................................ 16
BLOCK DIAGRAM ................................................................................. 21
EXPLODED VIEW .................................................................................. 22
SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-2-

LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.

An isolation Transformer should always be used during the


servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.

Do not use a line Isolation Transformer during this check.


Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

Before returning the receiver to the customer,


Always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an


electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 M and 5.2 M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-3-

LGE Internal Use Only

SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions. Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug
or other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication
of contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks
are correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors
and semiconductor chip components. The following techniques
should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

2. After removing an electrical assembly equipped with ES


devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder
ES devices.
4. Use only an anti-static type solder removal device. Some solder removal devices not classified as anti-static can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will
be installed.
CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within
the range or 500 F to 600 F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 F to 600 F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 F to 600 F)
b. First, hold the soldering iron tip and solder the strand
against the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.

-4-

LGE Internal Use Only

IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.

3. Solder the connections.


CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. Carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

Fuse and Conventional Resistor


Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-5-

LGE Internal Use Only

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range

This specification is applied to the LED TV used LD3AC


chassis.

3. Test method

2. Requirement for Test

1) Performance: LGE TV test method followed


2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC

Each part is tested as below without special appointment.


1) Temperature: 25 C 5 C(77 F 9 F), CST: 40 C 5 C
2) Relative Humidity: 65 % 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.

4. Model General Specification


No.
1

Item
Market

Specification

Remarks
DTV & Analog (Total 37 countries)
DTV (MPEG2/4, DVB-T) :37 countries
UK/Italy/Germany/France/Spain/Sweden/Finland/Netherlands/ Belgium/Luxemburg/ Greece/Denmark/Czech/
Austria /Hungary/Swiss/Croatia/TurkeyNorway/Slovenia/
Poland/Ukraine/Portugal/Ireland/Morocco/Latvia/Estonia/
Lithania/Rumania/Bulgaria/Russia/SlovakiaBosnia/Serbia/
Albania/Kazakhstan/Belarus

EU(PAL Market-37Countries)

DTV (MPEG2/4, DVB-T2): 8 countries


UK/Denmark/Sweden/Finland/Norway/Ireland/Ukraine/
Kazakhstan
DTV (MPEG2/4, DVB-C): 11 countries
Sweden/Finland/Austria/Swiss/Germany/Netherlands/Hungary/Slovenia/Norway/Denmark/Bulgaria
2

Broadcasting system

Program coverage

1) PAL-BG
2) PAL-DK
3) PAL_I/I
4) SECAM L/L
5) DVB-T/T2/C
1) Digital TV
- VHF, UHF
2) Analogue TV
- VHF : E2 to E12
- UHF : E21 to E69
- CATV : S1 to S20
- HYPER : S21 to S47

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-6-

LGE Internal Use Only

No.

5
6
7
8
9
10
11
12
13

Item

Receiving system

Specification

Remarks
DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-T2
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

Analog : Upper Heterodyne


Digital : COFDM, QAM

Scart Jack (1EA)

PAL, SECAM
Y/Cb/Cr
Component Input (1EA)
Y/Pb/Pr
RGB Input
RGB-PC
HDMI1-DTV/DVI
HDMI Input (3EA)
HDMI2-DTV
HDMI3-DTV
Audio Input (1EA)
RGB/DVI/Component Audio
SDPIF out (1EA)
SPDIF out
External Speaker out (1EA) Stereo, 1W (8 ), Single-End
Antenna, AV, Component, RGB,
Earphone out (1EA)
HDMI1, HDMI2, HDMI3
EMF,
USB (1EA)
DivX HD,
For SVC (download)
DVB-T

14

DVB
DVB-C

15

RS232C(1EA)

Interactive mode support

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-7-

DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM
Scart 1 Jack is Full scart and support RF-OUT(analog).
Phone Jack type
Video only(Rear)
Analog(D-SUB 15PIN)
PC(HDMI version 1.3)
Support HDCP
The number of Input ports is different by model.
RGB/DVI & Component Audio common port
3P Phone Jack type

JPEG, MP3, DivX HD


CI : UK, Finland, Denmark, Norway, Sweden, Russia,
Spain, Ireland, Luxemburg, Belgium, Netherland
CI+ : France(Canal+), Italy(DGTVi)
CI : Switzerland, Austria, Slovenia, Hungary, Bulgaria
CI+ : Switzerland(UPC,Cablecom), Netherland(Ziggo),
Germany(KDG,CWB), Finland(labwise)

LGE Internal Use Only

5. Video resolutions (2D)

5.1. Component Input (Y, CB/PB, CR/PR)


No.
1

Resolution
720*576

H-freq(kHz)
15.625

V-freq(Hz)
50.00

13.5

Proposed
SDTV ,DVD 576I

720*480

15.73

60.00

13.5135

SDTV ,DVD 480I

3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

720*480
720*576
720*480
720*480
1280*720
1280*720
1280*720
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080

15.73
31.25
31.50
31.47
37.50
45.00
44.96
28.125
33.75
33.72
56.25
67.50
67.432
27.00
26.97
33.75
33.71

59.94
50.00
60.00
59.94
50.00
60.00
59.94
50.00
60.00
59.94
50.00
60.00
59.94
24.00
23.94
30.00
29.97

13.50
27.00
27.027
27.00
74.25
74.25
74.176
74.25
74.25
74.176
148.50
148.50
148.352
74.25
74.176
74.25
74.176

SDTV ,DVD 480I


SDTV 576P
SDTV 480P
SDTV 480P
HDTV 720P
HDTV 720P
HDTV 720P
HDTV 1080I
HDTV 1080I
HDTV 1080I
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P

19

Pixel clock(MHz)

5.2. RGB Input (PC) - HD Model


No.
1
2
3
4

Resolution
640*480

H-freq(kHz)
31.469

V-freq(Hz)
59.94

Pixel clock(MHz)
25.17

Proposed
VESA(VGA)

DDC
O

800*600

37.879

60.31

40.00

VESA(SVGA)

1024*768
1152*864

48.363
54.348

60.00
60.053

65.00
80.00

VESA(XGA)
VESA

O
O

5.3. RGB Input (PC) - FHD Model


No.
1
2
3
4
5
6
7
8

Resolution
640*350

H-freq(kHz)
31.468

V-freq(Hz)
70.09

Pixel clock(MHz)
25.17

EGA

DDC
X

720*400

31.469

70.08

28.32

DOS

640*480
800*600
1024*768
1152*864
1360*768
1920*1080

31.469
37.879
48.363
54.348
47.712
66.587

59.94
60.31
60.00
60.053
60.015
59.934

25.17
40.00
65.00
80.00
85.50
138.5

VESA(VGA)
VESA(SVGA)
VESA(XGA)
VESA
VESA (WXGA)
HDTV 1080P

O
O
O
O
O
O

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-8-

Proposed

LGE Internal Use Only

5.3. HDMI Input(PC/DTV)


No.
PC(DVI)
1
2
3
4
5
6
7
8
9

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

640*350
720*400
640*480
800*600
1024*768
1152*864
1360*768
1280*1024
1920*1080

31.468
31.469
31.469
37.879
48.363
54.348
47.712
63.981
67.50

70.09
70.08
59.94
60.31
60.00
60.053
60.015
60.020
60.00

25.17
28.32
25.17
40.00
65.00
80.00
85.50
108.0
148.5

Proposed
DDC
EGA
DOS
VESA(VGA)
VESA(SVGA)
VESA(XGA)
VESA
VESA (WXGA)
VESA (SXGA)
HDTV 1080P

720*480

31.47

59.94

27.00

SDTV 480P

2
3
4
5
6
7
8
9
10
11
12
13
14
15

720*480
720*576
1280*720
1280*720
1280*720
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080

31.50
31.250
37.50
45.00
44.96
28.125
33.75
33.72
56.250
67.50
67.432
27.00
26.97
33.75

60.00
50.00
50.00
60.00
59.94
50.00
60.00
59.94
50.00
60.00
59.94
24.00
23.976
30.00

27.027
27.00
74.25
74.25
74.176
74.25
74.25
74.176
148.50
148.50
148.352
74.25
74.176
74.25

Remark
X
O
O
O
O
O
O
O
O

DTV

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-9-

SDTV 480P
SDTV 576P
HDTV 720P
HDTV 720P
HDTV 720P
HDTV 1080I
HDTV 1080I
HDTV 1080I
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P

LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Range

(4) Click "Connect" tab. If "Can't" is displayed, check connection


between computer, jig, and set.

This specification sheet is applied to all of the LED TV with


LD3AC chassis.

(2)

(3)

2. Designation

(1) The adjustment is according to the order which is designated


and which must be followed, according to the plan which
can be changed only on agreeing.
(2) Power adjustment : Free Voltage.
(3) Magnetic Field Condition: Nil.
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation : Above 5 Minutes (Heat Run)
Temperature : at 25 C 5 C
Relative humidity : 65 10 %
Input voltage : 220 V, 60 Hz
(6) Adjustment equipments: Color Analyzer(CA-210 or CA-110),
DDC Adjustment Jig, Service remote control.
(7) Push the "IN STOP" key - For memory initialization.

Please Check the Speed :


To use speed between
from 200KHz to 400KHz

(5) Click "Auto" tab and set as below.


(6) Click "Run".
(7) After downloading, check "OK" message.

Case1 : Software version up


1. After downloading S/W by USB , TV set will reboot
automatically.
2. Push In-stop key.
3. Push Power on key.
4. Function inspection
5. After function inspection, Push In-stop key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
In-stop key at first.
2. Push Power on key for turning it on.
If you push Power on key, TV set will recover
channel information by itself.
3. After function inspection, Push In-stop key.

(4)
filexxx.bin

(5)

(7)...........OK

(6)

* USB DOWNLOAD

3. Main PCB check process


APC - After Manual-Insert, executing APC

* Boot file Download

(1) Execute ISP program "Mstar ISP Utility" and then click
"Config" tab.
(2) Set as below, and then click "Auto Detect" and check "OK"
message.
If "Error" is displayed, check connection between computer,
jig, and set.
(3) Click "Read" tab, and then load download file(XXXX.bin)
by clicking "Read".
(1)
filexxx.bin

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 10 -

(1) Put the USB Stick to the USB socket.


(2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting.
(3) Show the message "Copying files from memory".
(4) Updating is starting.

(5) Updating Completed, The TV will restart automatically in 5


seconds.
(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didnt have a DTV/
ATV test on production line.

LGE Internal Use Only

3.3. EDID data

* After downloading, have to adjust Tool Option again.


(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and push "OK" key.
(3) Punch in the number. (Each model has their number)
(4) Completed selecting Tool option.

(1) HD RGB EDID data

3.1. ADC Process

* If ADC processes as OTP, There is no need to proceed


internal ADC.
- Enter Service Mode by pushing "ADJ" key,
- Enter Internal ADC mode by pushing "" key at "7. ADC
Calibration".
EZ ADJUST

ADC Comp 480i

1. Tool Option2

NG

ADC Comp 1080p

2. Tool Option3

NG

ADC RGB

NG

3. Tool Option4
Start

4. Tool Option5

Reset

5. 5. Commercial Tool Option


6. Country Group
7.ADC Calibration

8. White Balance

0
00

1
2
3
4
5
FF FF FF FF FF
c
01 03 68 A0
0F 50 54 A1 08 00
01 01 01 01 01 01
35 00 40 84 00 00
6E 28 55 00 A0 5A
3E 1E 53 10 00 0A

6
FF
5A
71
1B
00
00
20

7
00
78
40
21
1C
00
20

8
1E
0A
61
50
01
00
20

9
6D
EE
40
A0
1D
1E
20

7
00
78
40
3A
1E
00
20

8
1E
0A
45
80
66
00
20

9
6D
EE
40
18
21
1E
20

0
00

1
2
3
4
5
FF FF FF FF FF
c
01 03 68 A0
0F 50 54 A1 08 00
01 01 01 01 01 01
45 00 A0 5A 00 00
40 70 36 00 A0 5A
3E 1E 53 10 00 0A

6
FF
5A
31
02
00
00
20

a
91
45
51
00
00
20

b
A3 54 4C 99 26
40 31 40 01 01
00 1E 30 48 88
72 51 D0 1E 20
00 00 FD 00 3A
20
d
00 e

(2) FHD RGB EDID data


00
10
20
30
40
50
60
70

ADC Calibration

0. Tool Option1

00
10
20
30
40
50
60
70

a
91
61
71
50
00
20

b
A3 54 4C 99 26
40 71 40 81 80
38 2D 40 58 2C
B0 51 00 1B 30
00 00 FD 00 3A
20
d
00 e

9. 10 Point WB

(3) HD HDMI EDID data

10. Test Pattern


11 EDID D/L
12. Sub B/C
13. Ext. Input Adjust

<Caution> U sing "P-ONLY" key of the Adjustment remote


control, power on TV.
* ADC Calibration Protocol (RS232)
NO

Item

CMD 1

CMD 2

Data 0

Enter
Adjust MODE

Adjust
Mode In

When transfer the Mode In,


Carry the command.

ADC adjust

ADC Adjust

Automatically adjustment
(The use of a internal pattern)

Adjust Sequence
aa 00 00 [Enter Adjust Mode]
xb 00 40 [Component Input480i)]
ad 00 10 [Adjust 480i & 1080p Comp]
xb 00 60 [RGB Input (1024*768)]
ad 00 10 [Adjust 1024*768 RGB]
aa 00 90 End Adjust mode
* Required equipment : Adjustment remote control.

00
10
20
30
40
50
60
70
80
90
A0
B0
C0
D0
E0
F0

(1) After enter Service Mode by pushing "ADJ" key.


(2) Enter EDID D/L menu.
(3) Enter "START" by pushing "OK" key.
EDID D/L

EZ ADJUST
HDMI1

NG

1. Tool Option2

HDMI2

NG

2. Tool Option3

HDMI3

NG

3. Tool Option4

RGB

4. Tool Option5

NG
Start

5. Country Group

0
00

1
2
3
4
5
FF FF FF FF FF
c
01 03 80 A0
0F 50 54 A1 08 00
01 01 01 01 01 01
36 00 40 84 63 00
18 88 03 06 40 84
3E 1E 53 10 00 0A
02 03 22
22 15 01
80 1E 01
00 00 00
20 C2 31
96 00 A0
58 2C 45
00 00 00

F1
26
1D
9E
00
5A
00
00

4E 10
15 07
80 18
01 1D
00 1E
00 00
A0 5A
00 00

6
FF
5A
31
66
00
63
20

7
8
9
A B C D E
00 1E 6D
a
b
78 0A EE 91 A3 54 4C 99
40 45 40 61 40 71 40 01
21 50 B0 51 00 1B 30 40
1E 64 19 00 40 41 00 26
00 00 18 00 00 00 FD 00
20 20 20 20 20
d
d
01
1F 04 93 05 14 03 02 12 20
50 09 57 07
f
71 1C 16 20 58 2C 25 00 A0
00 72 51 D0 1E 20 6E 28 55
8C 0A D0 8A 20 E0 2D 10 10
00 18 02 3A 80 18 71 38 2D
00 00 00 1E 00 00 00 00 00
00 00 00 00 00 00 00 00 00

F
26
01
70
30
3A
e
21
5A
00
3E
40
00
e

(4) FHD HDMI EDID data

3.2. EDID Download

0. Tool Option1

00
10
20
30
40
50
60
70
80
90
A0
B0
C0
D0
E0
F0

Reset

6. ADC Calibration

0
00

1
2
3
4
5
FF FF FF FF FF
c
01 03 80 A0
0F 50 54 A1 08 00
01 01 01 01 01 01
45 00 A0 5A 00 00
40 70 36 00 A0 5A
3E 1E 53 10 00 0A
02
22

03
15

22
01
f
01
31 00 00
20 C2 31
45 00 A0
B8 28 55
00 00 00

F1
26
1D
9E
00
5A
40
00

4E
15
80
01
00
00
C4
00

10
07
18
1D
1E
00
8E
00

6
FF
5A
31
02
00
00
20

7
00
78
40
3A
1E
00
20

8
1E
0A
45
80
66
00
20

9
6D
EE
40
18
21
1E
20

B
a

91
61
71
50
00
20

d
9F 04 13 05 14
50 09 57 07
71 1C 16 20 58
00 72 51 D0 1E
02 3A 80 18 71
00 1E 01 1D 00
21 00 00 1E 00
00 00 00 00 00

b
A3 54 4C 99
40 71 40 81
38 2D 40 58
B0 51 00 1B
00 00 FD 00
20
d
01
03 02 12 20
f
2C 25 00 20
20 6E 28 55
38 2D 40 58
BC 52 D0 1E
00 00 00 00
00 00 00 00

26
80
2C
30
3A
e
21
C2
00
2C
20
00
e

7. White Balance
8. 10 Point WB
9. Test Pattern
10. EDID D/L

11. Sub B/C

<Caution> Never connect HDMI & D-sub cable when EDID


downloaded.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 11 -

LGE Internal Use Only

4. Total Assembly line process

(5) Detail EDID Options are below


a. Product ID
MODEL NAME
HEX
EDID Table

DDC Function

FHD/HD Model

Analog/Digital

0001

01 00

4.1. White Balance adjustment

W/B Equipment condition


CA210 : LED -> CH14, Test signal: Inner pattern(80IRE)
Above 5 minutes H/run in the inner pattern. (power on key
of adjust remote control)
If it is executed W/B adjustment in 2~3 minutes H/run, it is
adjusted by Target data.
(For OS LED / Direct LED module)

b. Serial No: Controlled on production line.


c. Month, Year: Controlled on production line:
ex) Week : '01' -> '01'
Year : '2013' -> '17' fix
d. Model Name(Hex):
cf) TV sets model name in EDID data is below.
Model name

MODEL NAME(HEX)

LG TV

00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)

Color
Temperature

e. Checksum: Changeable by total EDID data.


EDID C/S data
Block 0
Check sum
(Hex)

Block 1

FHD

HD

HDMI

RGB

43

5C

HDMI

RGB

A4

A5

25 (HDMI1)

5B (HDMI1)

15 (HDMI2)

4B (HDMI2)

05 (HDMI3)

3B (HDMI3)

Input

Model name(HEX)
67030C001000801E

HDMI2

67030C002000801E

HDMI3

67030C003000801E

- HD model
Input

Model name(HEX)

HDMI1

67030C001000

HDMI2

67030C002000

HDMI3

67030C003000

Temp

Cool

13,000 K

Medium

9,300 K

Warm

6,500 K

Coordinate spec
X=0.269 (0.002)
Y=0.273 (0.002)
X=0.285 (0.002)
Y=0.293 (0.002)
X=0.313 (0.002)
Y=0.329 (0.002)

Normal line

f. Vendor Specific(HDMI)
- FHD model
HDMI1

Mode

NetCase4

Aging time
(Min)

1
2
3
4
5
6
7
8
9

0-2
3-5
6-9
10-19
20-35
36-49
50-79
80-119
Over 120

Cool
X
y
271
270
281
287
280
285
278
284
276
281
275
277
274
274
273
272
272
271
271
270

Medium
x
y
285
293
295
310
294
308
292
307
290
304
289
300
288
297
287
295
286
294
285
293

Warm
x
y
313
329
320
342
319
340
317
339
315
336
314
332
313
329
312
327
311
326
310
325

Cool
X
y
271
270
280
285
276
280
272
275
269
272
267
268
266
265
265
263
264
261
264
260

Medium
x
y
285
293
294
308
290
303
286
298
283
295
281
291
280
288
279
286
278
284
278
283

Warm
x
y
313
329
319
340
315
335
311
330
308
327
306
323
305
320
304
318
303
316
303
315

* Aging chamber

3.4 Function Check

- Check display and sound


Check Input and Signal items.
(1) TV
(2) AV (SCART)
(3) COMPONENT (480i)
(4) RGB (PC : 1024 x 768 @ 60hz)
(5) HDMI
(6) PC Audio In
* D isplay and Sound check is executed by Remote
controller
<Caution>
Not to push the INSTOP key after completion if the function
inspection.

NetCase4

Aging time
(Min)

1
2
3
4
5
6
7
8
9

0-5
6-10
11-20
21-30
31-40
41-50
51-80
81-119
Over 120

* Connecting picture of the measuring instrument


(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C P-ONLY Enter the
mode of White-Balance, the pattern will come out.

Full White Pattern

CA-210

COLOR
ANALYZER
TYPE : CA-210

RS-232C Communication

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 12 -

LGE Internal Use Only

* Auto-control interface and directions

(1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10 lux).
(2) Adhere closely the Color analyzer(CA210) to the module
less than 10 cm distance, keep it with the surface of the
Module and Color analyzer's prove vertically.(80 ~ 100).
(3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes.
- Using 'no signal' or 'POWER ONLY' or the others, check
the back light on.

Auto adjustment Map(using RS-232C to USB cable)


RS-232C COMMAND
[CMD ID DATA]
Wb
00 00
White Balance Start
Wb
00 ff
White Balance End
RS-232C COMMAND
[CMD ID DATA]
Cool

Mid

Warm

CENTER
(DEFAULT)

MIN

5. GND and HI-POT Test

5.1. HI-POT auto-check preparation

- Check the POWER cable and SIGNAL cable insertion condition

5.2. HI-POT auto-check

(1) Pallet moves in the station. (POWER CORD / AV CORD is


tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next process automatically.

5.3. Checkpoint

(1) Test voltage


- Touchable Metal : 3 KV / min at 100 mA
- SIGNAL : 3KV / min at 100 mA
(2) TEST time: 1 second. (case : mass production )
(3) TEST POINT
- Touchable Metal => LIVE & NEUTRAL : Touchable Metal.
- SIGNAL => LIVE & NEUTRAL : SIGNAL.

MAX

Cool

Mid

Warm

R Gain

jg

Ja

jd

00

172

192

192

192

G Gain

jh

Jb

je

00

172

192

192

192

B Gain

ji

Jc

jf

00

192

192

172

192

R Cut

64

64

64

128

G Cut

64

64

64

128

B Cut

64

64

64

128

6. Model name & Serial number D/L

Press "Power on" key of service remote control.


(Baud rate : 115200 bps)
Connect RS232 Signal Cable to RS-232 Jack.
Write Serial number
Must check the serial number at the Diagnostics of SET UP menu.
(Refer to below).

<Caution>
Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.(When R/G/B Gain are all
C0, it is the FULL Dynamic Range of Module)

* Manual W/B process using adjust Remote control.

After enter Service Mode by pushing "ADJ" key,


E nter White Balance by pushing " " key at "8. White
Balance".
EZ ADJUST
0. Tool Option1

Whit Balance

1. Tool Option2
2. Tool Option3

Color Temp.

3. Tool Option4

R-Gain

172

4. Tool Option5

G-Gain

172

5. Commercial Tool Option

B-Gain

192

6. Country Group

R-Cut

64

G-Cut

64

B-Cut

64

7. ADC Calibration
8. White Balance

9. 10 Point WB

Test-Pattern

10. Test Pattern

Backlight

11. EDID D/L

Reset

Cool

6.1. Signal Table

CMD

ON
100

12. Sub B/C


13. Ext. Input Adjust

ADL

6.2. Command Set

4.5. Outgoing condition Configuration

When pressing IN-STOP key by SVC remocon, Red LED


are blinked alternatively. And then automatically turn off.
(Must not AC power OFF during blinking)

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

ADH

DATA_1

...

Data_n

CS

DELAY

CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +...+ Data_n
Delay : 20ms

To Set

* After you finished all adjustments, Press "In-start" key and


compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
For correct it to the model's module from factory Jig model.
* P ush the "IN STOP" key after completing the function
inspection. And Mechanical Power Switch must be set ON.

LENGTH

- 13 -

Adjust mode

CMD(hex)

LENGTH(hex)

EEPROM WRITE

A0h

84h+n

Description
n-bytes Write (n = 1~16)

* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in EEPROM,.

LGE Internal Use Only

6.3. Method & notice

(1) Serial number D/L is using of scan equipment.


(2) S etting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced in
production line, because serial number D/L is mandatory by
D-book 4.0.

7. CI+ key download

7.1. Communication Prot connection

* Manual Download(Model Name and Serial Number)

If the TV set is downloaded by OTA or Service man, sometimes


model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
1) Press the "Instart" key of Adjustment remote control.
2) Go to the menu "6.Model Number D/L" like below photo.
3) Input the Factory model name(ex 32LP360H-ZA) or Serial
number like photo.

Connection : PCBA (USB Port) USB to Serial Adapter


(UC-232A) RS-232C cable PC(RS-232C port)

7.2. CI+ Key Download

Set CI+ Key path Directory at Start Mac & CI+ Download
Programme
Com 1,2,3,4 and 115200(Baudrate)

GP4_LOW
4) Check the model name Instart menu. Factory name displayed.
(ex 32LP360H-ZA)
5) C
 heck the Diagnostics.(DTV country only) Buyer model
displayed.(ex 32LP360H)

Port connection button click(1)


Push the (2) MAC Address write.
At success Download, check the OK (3).
Start CI+ Key Download, Push the (4).
Check the OK or NG.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 14 -

LGE Internal Use Only

8. Check Commercial Features.

8.1. External speaker(8OHM, 1W, Single-End)


<Equipment & Condition>
External speaker and Oscilloscope
Power only mode

(1) Connect external speaker(8 ohm) to speaker out port with


phone jack on TV side as below.
(2) Check the Max. speaker output is 1W or not. Sine wave
with 1KHz will be displayed.

8.2. IR OUT

< Equipment & Condition >


Simple Jig (commercial check JIG)
Power only mode



(1) C onnect each other RS232C port on the Commercial


Check JIG.
(2) Press any key on Service Remote-control.
(3) Check the LED status of the Check JIG.
- IR LED(OK condition: blinking) (LED #1)

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 15 -

LGE Internal Use Only

TROUBLE SHOOTING GUIDE


1. Check the booting Voltage

2. Digital TV Video

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 16 -

LGE Internal Use Only

3. Analog TV Video

4. AV Video

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 17 -

LGE Internal Use Only

5. RGB Video

6. HDMI Video

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 18 -

LGE Internal Use Only

7. Audio of All iput

8. TV Audio

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 19 -

LGE Internal Use Only

9. AV Audio

10. RGB Audio

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 20 -

LGE Internal Use Only

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 21 -

EXT
Speaker

Speaker

USB

SCART

COM P

RGB

CI

Digital

An alog

AM P

Headphone

SPIDIF

PC/COM P L/R

CI

Sub Amp

FE_TS_Parallel

DVB- T/C

Tuner

S7LR2
(LGE211A-T8)

TV Link

650M

74.25M

LVDS

M AX3232

M odule

HDMI1

HDMI2

Side HDMI

NVR AM

NAND
Flash 1Gb

DDR 2
1Gb x 2

BLOCK DIAGRAM

LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

LV1

200

521
400
540
530

123

501

500

502

200T
Only LGD Module

122

120

910

510

A2

A10

AG1

900

* Set + Stand
* Stand Base + Body

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 22 -

LGE Internal Use Only

+3.3V_Normal

/PF_CE0
NC_7
NC_8
C101
0.1uF

VDD_1
VSS_1
NC_9
NC_10
CL

/PF_CE1
AL
PF_ALE
W
/PF_WE
WP
/PF_WP
NC_11
R106
1K

NC_12
NC_13
NC_14
NC_15

42

41
40

9
10

39

11

38

12

37

13

36

14

35

15

34
33

16

32

17
18

31

19

30

20

29

21

28

22

27

23

26

24

25

I/O6

PCM_A[6]

I/O5

PCM_A[5]

B51_no_EJ
SB51_WOS
SB51_WS
MIPS_SPE_NO_EJ
MIPS_SPI_EJ_1
MIPS_SPI_EJ_2
MIPS_WOS
MIPS_WS

PCM_A[4]

I/O4
NC_25
NC_24
NC_23
VDD_2
VSS_2

: 4b0000 Boot from 8051 with SPI flash


: 4b0001 Secure B51 without scramble
: 4b0010 Secure B51 with scramble
: 4b0100 Boot from MIPS with SPI flash
: 4b0101 Boot from MIPS with SPI flash
: 4b0110 Boot from MIPS with SPI flash
: 4b1001 Secure MIPS without scramble
: 4b1010 Scerur MIPS with SCRAMBLE

NC_20

I/O2
I/O1
I/O0
NC_19

AE20

PCM_D[4]

AA15

PCM_D[5]
PCM_D[6]

AE21

LED_R

R148
56

AUD_MASTER_CLK

Y15

PCM_A[0]

W20

PCM_A[1]

V20
W22

PCM_A[3]

AB18

PCM_A[4]

AA20

PCM_A[3]

AUD_MASTER_CLK_0

C112
100pF
50V

PCM_A[2]

PWM1

PCM_A[0]

22

PCM_A[6]

Y19

PCM_A[7]

AB17

PCM_A[8]

Y16
AB19

PCM_A[10]

AB20

PCM_A[11]

AA16

PCM_A[12]

AA19

PCM_A[13]

AC21

PCM_A[14]

PWM0

PCM_A[1]

AA21

PCM_A[9]

AUD_SCK

AA17
Y20

/PCM_REG

AB15

/PCM_OE

NC_18
+5V_Normal

NC_17
NC_16

R132
10K

DIMMING

R133
10K

AA22

/PCM_WE
/PCM_IORD

AD22
AD20

/PCM_IOWR

AD21

/PCM_CE
/PCM_IRQA

AC20
Y18

/PCM_CD

Y21

/PCM_WAIT

Y22

PCM_RST

NAND_FLASH_1G_TOSHIBA

NAND_FLASH_1G_HYNIX_13
EAN35669103
IC102-*5
H27U1G8F2CTR-BC

R157

PWM_DIM

EAN61508001
IC102-*3
TC58NVG0S3ETA0BBBH

PWM2

AB21

PCM_D[7]

PCM_A[5]

NC_21

I/O3

AB22

PCM_D[3]

PCM_A[0-14]

+3.3V_Normal

NC_22

AR102

AA18

PCM_A[2]

CAP_10uF_X7R
C102
10uF 10V CAP_10uF_X5R
C102-*1
10uF
10V
85C
C103
0.1uF

R123
OPT1K
R152
OPT1K

43

<CHIP Config>
(I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)

W21

PCM_D[1]
PCM_D[2]

R153

R
/PF_OE

PCM_A[7]

I/O7

S7LR_DIVX_MS10

PCM_D[0]

1K

/F_RB

44

22
AR101

R165
1K

RB

45

NC_26

R124

NC_6

PCM_D[0-7]
PCM_A[0-7]

NC_27

R121
1K OPT

NC_5

IC101
LGE2112-T8

NC_28

1K

R109
3.9K

46

47

R115
OPT1K
R117
OPT 1K

R107
1K

R118

NC_4

48

R116

NC_3

1
NAND_FLASH_1G_NUMONYX
EAN60762401
2

1b0
1b1

NC_29

1K

NC_2

+3.3V_Normal

1K

NC_1

R102
3.3K

<CHIP Config(LED_R/BUZZ)>
Boot from SPI CS1N(EXT_FLASH)
Boot from SPI_CS0N(INT_FLASH)

IC102
NAND01GW3B2CN6E

NAND FLASH MEMORY

C109
0.1uF

USB1_OCD

U21

USB1_CTL

V21
R20
T20

PCM_5V_CTL

U22

NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15

47

46

45

44

43

42

41

40

10

39

11

38
37

12

36

13
14

35

15

34

16

33

17

32

18

31

19

30

20

29

21

28
27

22

26

23
24

25

NC_1

NC_28

NC_2

NC_27

NC_3

NC_26

NC_4

I/O7

NC_5

I/O6

NC_6

I/O5

RY/BY

I/O4

RE

NC_25

CE

NC_24

NC_7

NC_23

NC_8

VCC_2

VCC_1

VSS_2

VSS_1

NC_22

NC_9

NC_21

NC_10

NC_20

CLE

I/O3

ALE

I/O2

WE

I/O1

WP

I/O0

NC_11

NC_19

NC_12

NC_18

NC_13

NC_17

NC_14

NC_16

NC_15

48

47

46

4
5

45
44

43

42

41

40

10

39

11

38

12
13

37
36

14

35

15

34

16

33

17

32

18

31

19

30

20

29

21

28

22
23
24

27
26
25

NC_29

E4

NC_28
NC_27
NC_26
I/O8

for SYSTEM/HDCP
EEPROM&URSA3

I/O7
I/O6

RGB_DDC_SDA

NC_25

RGB_DDC_SCL

NC_23

VSS_2

NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15

6
7

43
42

41

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32

18
19

31
30

20

29

21

28

22

27

23

26

24

25

N23

PWM2

P22

I/O3

SUB_AMP_MUTE

I/O2

SCART1_MUTE

PCMDATA[4]/GPIO119

AR103
22

PCMDATA[5]/GPIO118
PCMDATA[6]/GPIO117

NF_CE1Z/GPIO138

PCMDATA[7]/GPIO116

NF_WPZ/GPIO198
NF_CEZ/GPIO137

PCMADR[0]/GPIO125

NF_CLE/GPIO136

PCMADR[1]/GPIO124

NF_REZ/GPIO139

PCMADR[2]/GPIO122

NF_WEZ/GPIO140

PCMADR[3]/GPIO121

NF_ALE/GPIO141

PCMADR[4]/GPIO99

NF_RBZ/GPIO142

AE18
AC17

/PF_WP

AD18

/PF_CE0

AC18

/PF_CE1

AC19

/PF_OE

AD17

/PF_WE

AE17

PF_ALE

AD19

/F_RB

PCMADR[5]/GPIO101

AR104
22

PCMADR[6]/GPIO102
PCMADR[7]/GPIO103
PCMADR[8]/GPIO108
GPIO_PM[0]/GPIO6

PCMADR[9]/GPIO110
PCMADR[10]/GPIO114

PM_UART_TX/GPIO_PM[1]/GPIO7
GPIO_PM[2]/GPIO8

PCMADR[11]/GPIO112
PCMADR[12]/GPIO104

GPIO_PM[3]/GPIO9

PCMADR[13]/GPIO107

GPIO_PM[4]/GPIO10

PCMADR[14]/GPIO106

PM_UART_RX/GPIO_PM[5]/GPIO11
PM_SPI_SCZ1/GPIO_PM[6]/GPIO12
GPIO_PM[7]/GPIO13

PCMREG_N/GPIO123

GPIO_PM[8]/GPIO14
GPIO_PM[9]/GPIO15

PCMOE_N/GPIO113
PCMWE_N/GPIO197

PM_SPI_SCZ2/GPIO_PM[10]/GPIO16
GPIO_PM[11]/GPIO17

PCMIORD_N/GPIO111
PCMIOWR_N/GPIO109

PM_SPI_SCK/GPIO1
PCMCE_N/GPIO115

PM_SPI_CZ0/GPIO_PM[12]/GPIO0

PCMIRQA_N/GPIO105
PCMCD_N/GPIO130

PM_SPI_SDI/GPIO2
PM_SPI_SDO/GPIO3

H5
POWER_DET
PM_TXD

K6
K5

INV_CTL

J6

RL_ON

K4

POWER_ON/OFF_1

L6

PM_RXD

C2
L5

/FLASH_WP

M6

SIDE_HP_MUTE

M5

PANEL_CTL

C1

PM_MODEL_OPT_0

M4

AMP_MUTE

A2
D3

SPI_SCK
DELETE

R21
P20
F6

R154

22

/SPI_CS

B2

SPI_SDI

B1

SPI_SDO

for SERIAL FLASH

PCMWAIT_N/GPIO100
PCM_RESET/GPIO129
TS0CLK/GPIO87
PCM2_CE_N/GPIO131
PCM2_IRQA_N/GPIO132

TS0VALID/GPIO85
TS0SYNC/GPIO86

PCM2_CD_N/GPIO135
PCM2_WAIT_N/GPIO133

TS0DATA_[0]/GPIO77

PCM2_RESET/GPIO134

TS0DATA_[1]/GPIO78
TS0DATA_[2]/GPIO79

UART1_TX/GPIO43

TS0DATA_[3]/GPIO80

UART1_RX/GPIO44

TS0DATA_[4]/GPIO81

UART2_TX/GPIO65

TS0DATA_[5]/GPIO82

UART2_RX/GPIO64

TS0DATA_[6]/GPIO83

UART3_TX/GPIO47

TS0DATA_[7]/GPIO84

UART3_RX/GPIO48
TS1CLK/GPIO98
I2C_SCKM2/DDCR_CK/GPIO72
I2C_SDAM2/DDCR_DA/GPIO71

TS1VALID/GPI96
TS1SYNC/GPIO97

CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC

Y14
AA10
Y12

CI_TS_DATA[0-7]

Y13

CI_TS_DATA[0]

Y11

CI_TS_DATA[1]

AA12

CI_TS_DATA[2]

AB12

CI_TS_DATA[3]

AA14

CI_TS_DATA[4]

AB14

CI_TS_DATA[5]

AA13

CI_TS_DATA[6]

AB11

CI_TS_DATA[7]

DDCA_DA/UART0_TX

TS1DATA_[0]/GPIO88

DDCA_CK/UART0_RX

TS1DATA_[1]/GPIO89
TS1DATA_[3]/GPIO91

PWM0/GPIO66

TS1DATA_[4]/GPIO92

PWM1/GPIO67

TS1DATA_[5]/GPIO93

PWM2/GPIO68

TS1DATA_[6]/GPIO94

PWM3/GPIO69

TS1DATA_[7]/GPIO95

from CI SLOT

FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYNC

AC15
AD15

FE_TS_DATA[0-7]

AC16
AD16

FE_TS_DATA[0]

AE15

FE_TS_DATA[1]

AE14

FE_TS_DATA[2]

AC13

FE_TS_DATA[3]

AC14

FE_TS_DATA[4]

AD12

FE_TS_DATA[5]

AD13

FE_TS_DATA[6]

AD14

FE_TS_DATA[7]

Internal demod out

PWM4/GPIO70
PWM_PM/GPIO199

G5
G4
J5
R164

IC101-*1
LGE2111A-T8

NC_19

R24
C7

NC_17

E6

NC_16

B6

F5

NC_28

E5

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N
LVB3P

IC104-*1
M24256-BRMN6TP
NVRAM_ST

LVB3N
LVB4P
LVB4N
LVACKP

NC_27
NC_26

E0

VCC

LVACKN
LVBCKP
LVBCKN

I/O7

E1

WC

GPIO196
GPIO193

I/O6
E2

GPIO194

SCL

GPIO195

I/O5
I/O4

J4

SAR1/GPIO32
SAR2/GPIO33
SAR3/GPIO34
SAR4/GPIO35

EU_OPT
R23

NC_18

NC_29

22

SAR0/GPIO31

UO4_LGE2111A-T8

I/O1

AB2

44

P21

PWM1

KEY1
KEY2

I/O4

N6

PWM0

H6

AB1

45

D1

LED_R

F4

D2

NC_20

AC2

NC_4

PCMDATA[3]/GPIO120

NC_21

EAN60708702
IC102-*6
H27U2G8F2CTR

46

P24

AMP_SDA
AMP_SCL

NC_22

F7

47

P23

EXT_SPK_DET

A9

A8

I2C_SCL

AB3

MODEL_OPT_7

I2C_SDA

VCC_2

AB5

NC_3

MODEL_OPT_6

B8

PCMDATA[2]/GPIO128

TS1DATA_[2]/GPIO90
NC_24

NAND_FLASH_2G_HYNIX_13

NC_2

N24

I2C_SCL

I/O5

E7

48

N25

PM_RXD

PCMDATA[1]/GPIO127

+3.3V_Normal

B7

PM_TXD

I2C_SDA

I2C

D5

NC_1

D4

to delete CI or gate for

R145
2.2K

NC_4

NC_29

R144
2.2K

NC_3

48

R141
1K

NC_2

R140
1K

NC_1

PCMDATA[0]/GPIO126

AB25

R25

AB23
AC25

T21

AB24

T22

AD25

VSYNC_LIKE/GPIO145
SPI1_CK/GPIO201
SPI1_DI/GPIO202
SPI2_CK/GPIO203
SPI2_DI/GPIO204

AC24
AE23
AC23
AC22
AD23
V23
U24
V25
V24
W25

S7LR_DIVX_MS10
IC101
LGE2112-T8

W23
AA23
Y24
AA25
AA24
AE24
AD24
Y23

AMP_RESET

W24

5V_DET_HDMI_1
T25

5V_DET_HDMI_2

U23

5V_DET_HDMI_4

T24
T23

DSUB_DET
VSS

SDA

SC1_DET
HP_DET

NC_25
NC_24

EAN61548301

TUNER_RESET
MODEL_OPT_0

NC_23
VCC_2
VSS_2

+3.3V_Normal

EEPROM

+3.5V_ST
MODEL_OPT_2

DELETE

IC104
AT24C256C-SSHL-T

NC_20

C105
0.1uF

NVRAM_ATMEL

A0

I/O2

I/O0

F5
B6
E5
D5
B7
E7
F7
AB5
AB3
A9
F4
AB1

R174
10K
OPT

A1

AC2

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N
LVB3N

R177
10K
OPT

LVB4P
LVB4N

VCC

PM_MODEL_OPT_0
LVACKP

WP

PM_MODEL_OPT_1

A0h
A2

AB2

GPIO36

LVB3P

I/O3

I/O1

E6

N6

NC_22
NC_21

MODEL_OPT_1

PM MODEL OPTION

C7

SCL

R111

22

R112

22

I2C_SCL

R175
10K

LVACKN
LVBCKP

R176
10K

LVBCKN

AB25

RXA0+

AB23

RXA0-

AC25

RXA1+

AB24

RXA1-

AD25

RXA2+

AC24

RXA2-

AE23

RXA3+

AC23

RXA3-

AC22

RXA4+

AD23

RXA4-

V23

RXB0+

U24

RXB0-

V25

RXB1+

V24

RXB1-

W25

RXB2+

W23

RXB2-

AA23

RXB3+

Y24

RXB3-

AA25

RXB4+

AA24

RXB4-

AE24

RXACK+

AD24

RXACK-

Y23

RXBCK+

W24

RXBCK-

NC_19
GND

NC_18

SDA

I2C_SDA

GPIO196
GPIO193

NC_17

GPIO194

NC_16

GPIO195

T25

MODEL_OPT_3

U23

MODEL_OPT_4

T24

MODEL_OPT_5

T23

OLP

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

OLP

TP100

applied on only SMALL PCB

2013 S7LR2
FLASH/EEPROM/MAIN

2012.11.12
1

LGE Internal Use Only

MODEL OPTION
PIN NO.

HD

PHM_OFF

PHM_ON

+1.10V_VDDC

ASIA
C293-*1
68pF

0.1uF

READY

0.1uF

READY

MODEL_OPT_5

C255

A8

MODEL_OPT_4

C248

MODEL_OPT_7

MODEL_OPT_3

0.1uF

READEY

C235

DVB_S

READY

0.1uF

NON_DVB_S

B8

0.1uF

T24

MODEL_OPT_6

MODEL_OPT_2

C283

MODEL_OPT_5

MODEL_OPT_0
MODEL_OPT_1

RF_SWITCH_CTL

C280

3D
OLED

10uF

NON_3D
NON_OLED

0.1uF

T25
U23

C276

MODEL_OPT_3
MODEL_OPT_4

NON_DVB_T2 DVB_T2

C277

MODEL_OPT_2

+1.10V_VDDC

VDDC 1.05V
10uF

F4
AB2

HIGH

FHD

1K

MODEL_OPT_1

LOW

10uF

AB3

C275

MODEL_OPT_0

HD
R226

PHM_ON
R211
1K

1K

DVB_T2
R208
1K

OLED 1K

3D
R206

R291

R223

1K

DVB_S
R224
1K

1K
OPT

OPT
R290
RF_SW_OPT
R203
100

+3.3V_Normal

C228

PIN NAME
+2.5V_Normal

+3.3V_Normal

VDDC : 2026mA

ASIA
C294-*1
68pF

L2

D2+_HDMI1

L3

D2-_HDMI1

T5

DDC_SDA_1

T4

DDC_SCL_1

V5

HPD1

RXA1N
RXA2P
RXA2N

SIFP
SIFM

DDCDA_CK/GPIO23
HOTPLUGA/GPIO19

I2C_SCKM1/GPIO75
I2C_SDAM1/GPIO76

XIN

HDMI

PM_MODEL_OPT_1

AE9

CK+_HDMI4

AC9

CK-_HDMI4

AC10

D0+_HDMI4

AD9

D0-_HDMI4
D1+_HDMI4

AC11
AD10

D1-_HDMI4

AE11

D2+_HDMI4

AD11

D2-_HDMI4

AE8

DDC_SDA_4

AD8

DDC_SCL_4

AC8

HPD4

F2

CK+_HDMI2

F3

CK-_HDMI2

G3

D0+_HDMI2

F1

D0-_HDMI2
D1+_HDMI2

G2
G1

D1-_HDMI2

H3

D2-_HDMI2

R6

DDC_SDA_2

U6

DDC_SCL_2

P5

HPD2

RXCCKN

SPDIF_IN/GPIO152
SPDIF_OUT/GPIO153

RXC1P
RXC1N

USB0_DM
USB0_DP

RXC2P
RXC2N
DDCDC_DA/GPIO28

USB1_DM
USB1_DP

RXDCKP

I2S_IN_SD/GPIO151

RXDCKN

I2S_IN_WS/GPIO149

RXD0P
RXD0N
RXD1P
RXD1N

I2S_OUT_BCK/GPIO156
I2S_OUT_MCK/GPIO154
I2S_OUT_SD/GPIO157

I2S_OUT_WS/GPIO155

AUL0
DSUB_HSYNC

DSUB

DSUB_VSYNC
DSUB_R+
DSUB_G+

510

P2

R220

510

R3

R228

33

C204

0.047uF

N2

R229

68

C205

0.047uF

P3

R230

33

C206

0.047uF

N3

R231

68

C207

0.047uF

N1

R232

33

C208

0.047uF

M3

R233

68

C209

0.047uF

M2

C210

1000pF

M1

2.4K

10K

R4023

SCART1_RGB/COMP1

R222

DSUB_B+

R221

V2

SC1_ID
SC1_FB
SC1_R+
SC1_G+
SC1_B+

V3
R253 33

C211

0.047uF

U3

R254 68

C212

0.047uF

U2

R255 33
R256 68

C213

0.047uF

T1

C214

T2

R257 33

C215

0.047uF
0.047uF

R2

R258 68

C216

0.047uF

R1

C217

1000pF

SC1_SOG_IN

T3

TUNER_I2C

AE6

AUR0
HSYNC0

AUL1

VSYNC0

AUR1

RIN0P

AUL2

RIN0M

AUR2

GIN0P

AUL3

GIN0M

AUR3

BIN0P

AUL4

BIN0M

AUR4

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

C232

C267

C265

C266

C259

C254

FB_CORE

AD6

SIDE_COMP_Pb+

Close to MSTAR
C261

AD1
X201
24MHz

Y17

Normal 2.5V

22pF

C262

+2.5V_Normal

22pF

D7
D6

CAP_10uF_X7R
C269
10uF

E3

W15

AVSS_PGA
C271
0.1uF

C270
0.1uF

C273
0.1uF

C274
0.1uF

AC12

SIDE_USB_DM

AE12

P7

SIDE_USB_DP

C8

AVDD25_PGA:13mA
L229
BLM18PG121SN1D

AMP_SCL

D8

AMP_SDA

D9

C295
0.1uF
16V

SIDE_COMP_DET

B10

AUD_SCK

C9

R7
C285

AVDD_AU33

VDD33

AUD_MASTER_CLK_0

B9

AUD_LRCK

AB9

C236

2 . 2 u F EU_OPT

AA11

C237

2 . 2 u F EU_OPT
2.2uF
2 . 2 u F COMPONENT & PC

Y9

C238

AA9

C239

SC1_L_IN
SC1_R_IN
PC_L_IN
PC_R_IN

AA7

C224

1000pF

W1

TU_CVBS

CVBS In/OUT

SC1_CVBS_IN

33

C225

0 . 0 4 7 u F AA8

R245

33

C226

0.047uF

Y4
W4
AA5
Y5
AA4

TP210

Y6
AA1

DTV/MNT_VOUT
R252

68

C233

0.047uF

AB4

Close to MSTAR

VDD33

C260
0.1uF

VDDC_5

GND_38

VDDC_6

GND_39

VDDC_7

GND_40

VDDC_8

GND_41

VDDC_9

GND_42

VDDC_10

GND_43

VDDC_11

GND_44

VDDC_12

GND_45

VDDC_13

GND_46

VDDC_14

GND_47
GND_49

AVDD1P0

GND_50

FB_CORE

GND_51

AVDDL_MOD

GND_52

AVDD10_LAN

GND_53

DVDD_DDR

GND_54
GND_56

AVDD2P5_ADC_1

GND_57

AVDD2P5_ADC_2

GND_58

AVDD2P5_ADC_3

GND_59

AVDD25_REF

GND_60
GND_61
GND_62

AVDD25_LAN

GND_63
AVDD_MOD_1

GND_64

AVDD_MOD_2

GND_65

W7
R19

V19

GND_67
AVDD25_PGA

GND_68

AVSS_PGA

GND_69
GND_70
GND_71

AVDD_NODIE

GND_72
AVDD_DVI_USB_1

GND_73

AVDD_DVI_USB_2

GND_74

AVDD3P3_MPLL

GND_75

AVDD_DMPLL

GND_76
GND_77
GND_78

DVDD_NODIE

GND_79
AVDD_AU33

GND_80

AVDD_EAR33

GND_81
GND_82

VDDP_1

GND_83

VDDP_2

GND_84
GND_85

AVDD_LPLL_1

GND_86

AVDD_LPLL_2

GND_87
GND_88
GND_89

VDDP_NAND

GND_90

L223
AVSS_PGA

AVDD_MIU

BLM18SG121TN1D

J17
K15
K16

Close to IC with width trace

L15

AB8
Y8

K17

Y10

L17

AC7

M17

AD7

L16

E9

SCART OUT
HSYNC1

GND_91
AVDD_DDR0_D_1

GND_92

AVDD_DDR0_D_2

GND_93

AVDD_DDR0_D_3

GND_94

AVDD_DDR0_C

GND_95
GND_96

AVDD_DDR1_D_1

GND_97

AVDD_DDR1_D_2

GND_98

AVDD_DDR1_D_3

GND_99
GND_100

AVDD_DDR1_C

VSYNC1

AUOUTL0

RIN1P

AUOUTL2

RIN1M

AUOUTL3

GIN1P

AUOUTR0

GIN1M

AUOUTR2

BIN1P

AUOUTR3

W6
V6

A23

SCART1_Lout

V4

B17

EXT_AMP_L

Y7

C23

TP208

W5

DDR3 1.5V

SCART1_Rout

U5

A5
C11

EXT_AMP_R

C19

+1.5V_DDR

AVDD_DDR0:55mA

C22

SOGIN1

D14

L202
BLM18SG121TN1D
AUVRM

GIN2M
BIN2P

AUVAG

BIN2M

AUVRP

SOGIN2
EARPHONE_OUTR

AD5

CVBS1
CVBS2

ET_RXD[0]/RP/GPIO60

CVBS3

ET_TXD[0]/TP/GPIO57

CVBS4
ET_RXD[1]/RN/GPIO63
ET_TXD[1]/LED1/GPIO56

CVBSOUT1
ET_TX_CLK/TN/GPIO59
VCOM

ET_TX_EN/GPIO58
ET_MDC/GPIO61
ET_MDIO/GPIO62

C249
4.7uF

AE5

C253
1uF

C256
0.1uF

C263
10uF

ARC0
HWRESET

E19
E22
F8

AA6
AB6

C6
C5

F17
L203

5.6uH HEAD_PHONE

L205

5.6uH HEAD_PHONE
C268
4.7uF
10V
HEAD_PHONE

H/P OUT

F19

HP_LOUT

G8

HP_ROUT

H8

C272
4.7uF
10V
HEAD_PHONE

N22
N21
N20

SOC_RESET
A6

M22
+3.5V_ST

C4

STby 3.5V

TOP Side, RESET


R201
470
RESET_IC_SOC_RESET

C3
A3

C297
4.7uF
10V
RESET_IC_SOC_RESET

B3
B4

+3.5V_ST

3.5V_SOC_RESET
C200
4.7uF
10V

T6
N5

M20

MIUVDDC
AVDD_NODIE:7.362mA

B5

M21

RSDS Power OPT

POWER_DET_RESET

N4

F18

AVDD_DDR1:55mA

OPT
D200
R200
KDS181
62K
IRIN/GPIO4

E18

AC6

CVBS0

CVBSOUT0

D19
E17

RIN2P

CVBS5

D18

L209
BLM18PG121SN1D

HSYNC2

GIN2P

GND_103

GND_EFUSE

GND_104

BIN1M

RIN2M

GND_102

EXTERNAL SPEAKER

F10

+1.10V_VDDC

V15
L228
BLM18PG121SN1D

AVDD_NODIE

W16
V8

L206
BLM18PG121SN1D
R217
0
SOC_RESET

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

GND_37

GND_101

ET_COL/LED0/GPIO55

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

GND_36

VDDC_4

SOGIN0

EARPHONE_OUTL
R244

V7

W19

0.1uF

0 . 0 4 7 u F W3

M19

W18

L219
BLM18PG121SN1D

C279

C223

V1

1uF

T19

AVDD25_PGA

AUD_LRCH

C10

M7

AVDD2P5_MOD

0.1uF

R242 68

0.047uF

L7

VDD33

C234

R241 33

C221
C222

U7

AVDD_NODIE

E2

0.1uF

C220

0 . 0 4 7 u F W2
0 . 0 4 7 u F Y3

R239 33
R240 68

W14

AVDD25_PGA

SPDIF_OUT

C299

0 . 0 4 7 u F AA3

VDDC_3

AVDD2P5:172mA

L211
BLM18PG121SN1D

0.1uF

C219

VDDC_2

GND_35

GND_66

C298

R238 68

U19

AVDD2P5

10uF

0.047uF

V18

AVDD2P5_MOD

C278

C218

W10

TU_SDA

0.1uF

SIDE_COMP_Y+

Y2

R237 33

W9

W12

C287

SIDE COMP

SIDE_COMP_Pr+

M14

W11

AVDD_MIU
AA2

R16

TU_SCL

HOTPLUGD/GPIO22
CEC/GPIO5

P19

AVDD2P5

RXD2N
DDCDD_CK/GPIO29

GND_34

GND_55

RXD2P
DDCDD_DA/GPIO30

VDDC_1

GND_48
P10

C291
0.047uF
25V
NON_DVB_T2

SIDE USB
I2S_IN_BCK/GPIO150

GND_33

IF_AGC_MAIN

AE2

AC1

GND_32

AVDDLV_USB

FB_CORE

MIUVDDC

DDCDC_CK/GPIO27
HOTPLUGC/GPIO21

T10

L11

RXC0P
RXC0N

R15

NON_DVB_T2
R219
0

AD2

HOTPLUGB/GPIO20
RXCCKP

NON_DVB_T2
R218
10K

AUDIO IN

R4

CEC_REMOTE_S7

XOUT

C241
0.1uF

C240
0.1uF

I2S_I/F

H2

D2+_HDMI2

AC5

C290
0.1uF
NON_DVB_T2

IF_AGC

R5

AD4

DDCDA_DA/GPIO24

RF_AGC

L208
BLM18PG121SN1D

NON_DVB_T2
L227
BLM18PG121SN1D

85C

RXA1P

+3.3V_Normal

AE3

R14

10V

D1-_HDMI1

IP
IM

AVDD_AU33

CAP_10uF_X5R
C202-*1 10uF

K1

RXA0N

AC3

85C

K2

P14
R10

10V

D0-_HDMI1
D1+_HDMI1

RXA0P

ANALOG SIF
Close to MSTAR

AD3

N12
P15

CAP_10uF_X5R
C284-*1 10uF

J1

VIFP
VIFM

M12

85C

D0+_HDMI1

RXACKN

47

L10

10V

K3

RXACKP

0 . 1 u F R204

CAP_10uF_X5R
C269-*1 10uF

J3

CK-_HDMI1

1M

CK+_HDMI1

C251

TU_SIF

AC4

R287

J2

47

K11

M13
C247

S7LR_DIVX_MS10

0 . 1 u F R213

K10

C246

NON_DVB_T2
C294
100pF

IC101
LGE2112-T8
C250

L204
BLM18PG121SN1D

IF_N_MSTAR

NON_DVB_T2

H9

CAP_10uF_X7R
C229
0.1uF

NON_DVB_T2

0.1uF

G9

C202 10uF

C258

NON_DVB_T2
C293
100pF

K12

VDD33

+3.3V_Normal

CAP_10uF_X7R
C284 10uF

100

Normal Power 3.3V

IF_P_MSTAR

0.1uF

R289

S7LR_DIVX_MS10

DTV_IF

0.1uF

NON_DVB_T2

C282

C257

0.1uF

100

C281

1K

Close to MSTAR
R288

NON_DVB_T2
FHD
R227

PHM_OFF
R212
1K

NON_DVB_T2
R209
1K

NON_3D
R207
1K

NON_OLED
R225
1K

1K

NON_DVB_S
R234
1K

R294

R293

1K

MODEL_OPT_7

IC101
LGE2112-T8

+1.10V_VDDC

MODEL_OPT_6

T18
C286
0.1uF

C252
0.1uF

C296
10uF

C289
0.1uF

GND_105
GND_1

GND_106

GND_2

GND_107

GND_3

GND_108

GND_4

GND_109

GND_5

GND_110

GND_6

GND_111

GND_7

GND_112

GND_8

GND_113

GND_9

GND_114

GND_10

GND_115

GND_11

GND_116

GND_12

GND_117

GND_13

GND_118

GND_14

GND_119

GND_15

GND_120

GND_16

GND_121

GND_17

GND_122

GND_18

GND_123

GND_19

GND_124

GND_20

GND_125

GND_21

GND_126

GND_22

GND_127

GND_23

GND_128

GND_24

GND_129

GND_25

GND_130

GND_26

GND_131

GND_27

GND_132

GND_28

GND_133

GND_29

GND_134

GND_30

GND_135

GND_31

GND_136

G10
G11
G12
G13
G14
G17
G18
G19
G24
H11
H12
H13
H14
H15
H16
H17
H18
H19
J9
J10
J11
J12
J13
J14
J15
J16
J18
J19
J25
K9
K13
K14
H10
K18
K19
K22
L8
L9
J8
L12
L13
L18
L19
M8
K8
M10
M11
L14
M15
M16
M18
M25
N10
N11
N13
N14
N15
N16
N17
N19
K7
P8
P9
M9
P11
P13
P16
P17
P18
P12
R8
R9
R11
R12
R13
R17
T8
T9
N7
T11
T12
T13
T14
T15
T16
T17
U8
U9
U10
U11
U12
U13
U14
U15
U16
U17
R18
V9
V10
V11
V12
V14
V17
T7
E8
R298
0

C201
0.1uF

IR
SOC_RESET

2013 S7LR2
MAIN2

2012.11.12
2

LGE Internal Use Only

PANEL_POWER

FROM LIPS & POWER B/D

R405-*2
R405-*1
5.1K
3K
3K_PANEL_DISCHARGE 5.1K_PANEL_DISCHARGE

+12V

ST_3.5V--> 3.375V --> 3.46V


24V-->3.78V --> 3.92V (3.79V)

Power_DET

12V -->3.58V --> 3.82V (3.68V)


RESET_IC_SOC_RESET

L412
SS

C438
0.1uF
16V

C442
10uF
16V
DELETE

S
R439
33K

SAMWHA
+3.3V_Normal
3
+3.5V_ST

R406
4.7K

C
Q401
MMBT3904(NXP)

0.1uF

MLB-201209-0120P-N2

PDIM#1

PDIM#2

GND

GND

24V

10

24V

GND

11

12

GND

12V

13

14

12V

12V

15

16

N.C

GND

17

18

GND

SAMWHA

100

PWM1

IC408-*1

C461
10uF
10V

+5V_Normal

R1

EN

1%

R457
4.3K

FB

1.5A
5

R1

C472
22uF
10V

C476
0.1uF
16V

D403
5V
OPT

FET_AOS
Q403
AO3407A

C435
0.1uF
16V

SS

C467
560pF
50V

GND

R434
10K

C475
0.1uF
16V

POWER_ON/OFF_1

R2

L413-*1
500-ohm

10K
R428

0.1uF
16V

+3.5V_ST

GND

VIN_1
VIN_2

4
RLIM

C440
0.1uF
16V

D402
5V
OPT

C430
10uF
10V

C431
0.1uF
16V

R413
20K

C410
3300pF
50V

BOOT

PWRGD

PH_3

GND_1

11

PH_2

10
IC403
TPS54319TRE
9

PH_1

GND_2

THERMAL
17

AGND

R411
2K

10uF 10V
CAP_10uF_X7R

EN

12

C417-*1

C403
10uF
10V

+1.10V_VDDC

16V

13

R473
1

VIN_3

L413
SS

VOUT

C441
0.1uF

L415
3.6uH
NR8040T3R6N
C453
22uF
10V

SS/TR C488

C444
0.1uF
16V

R414
0

C456
22uF
10V

D404
5V
OPT

3300pF

RT/CLK

Vd=550mV
1

14

USB1_CTL

C432
0.1uF
16V

COMP

VIN

USB1_OCD

15

C426
100pF
50V
DELETE

R417
4.7K
DELETE

EN_SW

ROSC

SS

EN
[EP]

R412
10K

FAULT

COMP

V7V

C447

+2.5V_Normal

TJ3940S-2.5V-3L
AGND

FET_2.5V_AOS
AO3435
Q403-*2

+3.3V_Normal

SAMWHA

+5V_Normal +3.3V_Normal

VIN

D405
5V
OPT

S7LR core 1.2V volt

300 mA

SW_IN
9

FB
10

11

LX

BST
12
13
14

C419
4 . 7 u F 10V

IC401
TPS65281RGV

FET_2.5V_DIODE
DMP2130L
Q403-*1

C437
22uF
10V

IC402

16

R410
100K

+2.5V/+1.8V
+3.3V_Normal

SW_OUT

FET_2.5V
R445-*1
2.2K

Q400
MMBT3904(NXP)

C445
0.1uF
16V
DELETE

C425
0.1uF
16V

Vout=0.8*(1+R1/R2)=1.5319

C417 CAP_10uF_X5R
10uF
CHANGE TO
10V
10UF/10V/X5R
85C

PGND

15

C405
10uF
16V

+5V_USB

+3.3V_Normal
L403
BLM18PG121SN1D

FET_2.5V
C423-*1
2.2uF
10V

R445
100
FET_AOS
C

R443
10K

R2

C423
4.7uF
16V
FET_AOS

R438
22K

R456
4.7K
1%

C422
0.1uF
16V
DELETE

C424
330pF
50V

780 mA

OUT

VSENSE

R453
27K
1%

R454

THERMAL
17

SAMWHA

L401
CIC21J501NE
SS

RESET

+1.5V_DDR

EP[GND]

R452
33K
1%

11K 1%

L401-*1
500-ohm

2
1

16

L406
3.6uH

CHANGE TO
16V/X5R

Vout=0.8*(1+R1/R2)

+12V

IC409-*1
NCP803SN293
VCC

GND

DELETE
R490
10K

R491
0

RESET

PD_+24V_PWR_DET_ON_SEMI

GND

+3.5V_ST
IN

+3.3V_Normal
R433
10K

C421
22uF
16V
OPT

RESET

+3.3V_Normal

[EP]

L420

VCC

C420
22uF
16V

2
1

R480
100

Max 1000mA

BLM18PG121SN1D

PG

C413
0.047uF
25V

PD_+24V
GND

VCC

IC407
AP7173-SPG-13 HF(DIODES)

SAMWHA

+5V_Normal
&
+5V_USB

VCC

APX803D29

PD_+24V
R403
1.5K
1%

C412
0.1uF
16V
PD_+24V

NCP803SN293

PD_+24V_PWR_DET_DIODES
IC409

PD_+24V
R482
8.2K
1%

+1.5V_DDR
+3.5V_ST

19
L404-*1
500-ohm

+24V

PWM_DIM
R408

PWM2_2CH_POWER

16V
L408-*1
500-ohm

POWER_DET_ON_SEMI

C404

DRV ON

PD_+24V

L402

+12V

3.5V

POWER_DET_RESET
R404
100K

MLB-201209-0120P-N2

50V

3.5V

POWER_DET_DIODES

0.1uF

POWER_DET
C474
0.1uF

1
GND

DELETE

MMBT3904(NXP)

3.5V_SOC_RESET
R402
100

RESET

L407

+24V
C418

R489
10K

DELETE
R407
2.2K

PWR ON

CIC21J501NE

16V

DELETE

Q405
MMBT3904(NXP)

R405
2.2K

Q407
MMBT3904(NXP)

R435
22K
DELETE

0.1uF

C
DELETE
Q406

THERMAL

SS
L404

+3.5V_ST
C406

PANEL_CTL

C
B

C455
0.1uF
16V

P401
SMAW200-H18S1

5V OPT

SS
CIC21J501NE
L408

R429
47K

INV_CTL

JP_GND4

D401

R421
10K

JP_GND3

R462
10K

JP_GND1

RL_ON

R430
10K

R426
10K

JP_GND2

R461
10K
OPT R401
10K B

C451
0.1uF
DELETE

PD_+12V
R447
1.21K
1%

C411
0.1uF
16V

RESET_IC_SOC_RESET
R463
10K

IC408
APX803D29
VCC

R440
5.6K

R431
22K
DELETE

R419
1K

PD_+3.5V
R450
0
5%

R409
10K

+3.5V_ST

C443
10uF
25V

R402-*1
300

+3.5V_ST
R488
100K

Q409
AO3407A
PANEL_VCC

MMBT3906(NXP)

+3.5V_ST

PD_+12V
R448
2.7K
1%

New item

L412-*1
500-ohm

Q402

+12V

0.015uF
0.01uF
C409
C436
0.015uF
0.01uF
50V
50V

+3.5V_ST

+3.5V_ST -> 3.375V

R407-*1
R407-*2
5.1K
3K
3K_PANEL_DISCHARGE 5.1K_PANEL_DISCHARGE

R1

R432
1/16W 330K 5%
R436
15K

R442
27K
1%

50V
100pF
C439

C448
3300pF
50V

4A

$ 0.165

R2

R441
56K
1%

Vout=0.827*(1+R1/R2)=1.225V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

2013 S7LR2
POWER

2012.11.12
4

LGE Internal Use Only

AMP_RESET
R521
10K
+3.3V_Normal

C516
1000pF
50V

AVDD_PLL

DVDD_PLL

LF

GND_1

PVDD1_2

PVDD1_3

OUT1A_1

OUT1A_2

BST1A

/RESET

AD

37

38

39

40

41

42

43

44

45

33

BST1B

32

VDR1

31

VCC_5

L506
10.0uH

C537
0.1uF
50V

R516
4.7K

C535
0.47uF
50V

SPEAKER_L
C538
0.1uF
50V

R513
12

R517
4.7K

11

26

OUT2A_2

SDA

12

25

OUT2A_1

C526
22000pF
50V

WAFER-ANGLE

SPK_L+

SPK_L-

SPK_R+

C528
1uF
25V

C529
1uF
25V

C534
1uF
25V

SPK_R-

C527
22000pF
50V

P501

24

BCK

23

PGND2A

22

27

21

10

20

WCK

19

BST2A

18

28

17

L505
10.0uH

SPK_L-

C518
22000pF
50V

PVDD2_3

PVDD2_2

SPK_R+

PVDD2_1

Q501
MMBT3904(NXP)

10K

PGND1B

SDATA

OUT2B_2

AMP_MUTE

C505
1000pF
50V

34

VDR2

OUT2B_1

R501

100

OUT1B_1

AGND

PGND2B

R506

35

R509
12

29

SCL

R502
10K

R520
10K

C509
33pF
50V

C531
390pF
50V

30

BST2B

C507
33pF
50V

+3.5V_ST

OUT1B_2

16

AMP_SCL

100

IC501
NTP-7500L

R515
12

C530
390pF
50V

AUD_SCK
100

SPK_L+
R508
12

DVDD

AUD_LRCK

R504

C523
10uF
35V

C521
0.1uF
50V

DGND

AUD_LRCH

R503

DGND_PLL

MONITOR2

C513
0.1uF
16V

THERMAL
49

15

3.3K

AMP_SDA

C519
0.1uF
50V

36

MONITOR1

R505

46

AGND_PLL

100pF
50V

MONITOR0

C503

DELETE
C511
10uF
10V

+24V_AMP

C512
0.1uF
16V

47

C510
10uF
10V

14

C508
0.1uF
16V

/FAULT

C506
10uF
10V

48

C504
1000pF
50V

GND_IO

16V

CLK_I

C515
10uF
10V

VDD_IO

0.1uF

[EP]

C514

PGND1A

C517

AUD_MASTER_CLK

C502
0.1uF
50V

13

C501
0.1uF
50V

22000pF

L502
BLM18PG121SN1D

50V

L501
MLB-201209-0120P-N2

PVDD1_1

+24V_AMP

+24V

+24V_AMP

R510
12

R514
12

C532
390pF
50V
C520

C522

C524

0.1uF
50V

0.1uF
50V

10uF
35V

L504
10.0uH

C533
390pF
50V
R511
12

L503
10.0uH

R512
12

C536
0.47uF
50V

C539

R518

0.1uF
50V

4.7K

C540

R519

0.1uF
50V

4.7K

SPEAKER_R

SPK_RR522
0
POWER_DET

DELETE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

2013 S7LR2
POWER

2012.11.12
5

LGE Internal Use Only

CONTROL
IR & LED
+3.5V_ST

R602
10K
1%

R603
10K
1%

CONTROL_NO_FILTER
R614
0
CONTROL_FILTER
L601
BLM18PG121SN1D

KEY1
L602
BLM18PG121SN1D
KEY2

P600
12507WR-08L

CONTROL_FILTER

CONTROL_FILTER
CONTROL_FILTER
C609
0.1uF

C608
0.1uF

R615
0

CONTROL_NO_FILTER
2

+3.5V_ST

3
L600
BLM18PG121SN1D
4
C602
0.1uF
16V

C603
1000pF
50V

R610
1.8K

LED_R

+3.5V_ST

R607
47K
R604
22

IR
C604
100pF
50V

D603
5.6V

IR OUT
+3.5V_ST

IR_OUT
R605
22

IR_OUT
R606
10K

+3.5V_ST
IR_OUT
R608
IR_OUT
47K
R609
10K

IR_OUT
Q600
2SC3052
IR_OUT

C
B
E

R611
0

C
IR_OUT
B
Q601 E
2SC3052

IR_OUT
R612
47K

OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

2013 S7LR2
IR/CONTROL

2012.11.12
6

LGE Internal Use Only

LVDS
[51Pin LVDS Connector]
(For FHD 60Hz)

FOR FHD REVERSE(10bit)

[30Pin LVDS Connector]


(For HD 60Hz_Normal)

Change in S7LR

FHD
P703
FI-RE51S-HF-J-R1500

MIRROR

Pol-change
HD

RXA4+

RXA0+

RXA0-

RXA4-

RXA0-

RXA0+

RXA3+

RXA1+

RXA1-

RXA3-

RXA1-

RXA1+

RXACK+

RXA2+

RXA2-

RXACK-

RXA2-

RXA2+

RXA2+

RXACK+

RXACK-

RXA2-

RXACK-

RXACK+

RXA1+

RXA3+

RXA3-

RXA3+

RXA1-

RXA3-

RXA3+

RXA3-

RXA0+

RXA4+

RXA4-

RXA0-

RXA4-

RXA4+

RXACK+

10

RXACK-

P705

FF10001-30

2
LVDS_SEL

+3.3V_Normal

4
5

OPT
R705
3.3K

6
7

OPT
R710
10K

8
9
10
11
12

RXA4+

13

RXA4-

14

RXA3+

15

RXA3-

16

RXACK+

17

RXACK-

RXB4+

18
19

RXA2+

RXB0+

RXB0-

11

RXB4-

RXB0-

RXB0+

12

RXA2+

RXB3+

RXB1+

RXB1-

13

RXA2-

RXB3-

RXB1-

RXB1+

14

RXBCK+

RXB2+

RXB2-

15

RXA1+

RXBCK-

RXB2-

RXB2+

16

RXA1-

RXB2+

RXBCK+

RXBCK-

17

21

RXB2-

RXBCK-

RXBCK+

18

RXA0+

22

RXB3+

RXB3-

19

RXA1+

RXB1+

RXA0-

23

RXB1-

RXB3-

RXB3+

20

RXA1-

24

RXB0+

RXB4+

RXB4-

21

RXA0+

RXB4+

22

20

25

RXA2-

RXB4-

RXB0-

RXA0-

OPT
R711
10K

24

27

PANEL_VCC

25

28

RXB4+

29

RXB4-

30

RXB3+

31

RXB3-

32

RXBCK+

33

RXBCK-

HD_SS
L701
120

26
27
HD
C703
0.1uF
16V

29

Change in S7LR

L701-*1
120OHM
HD_SUNLORD

28

FOR FHD REVERSE(8bit)

30
31

34

36

OPT
R712
3.3K

23

26

35

LVDS_SEL
+3.3V_Normal

MIRROR
RXB2+
RXB2-

Pol-change

Shift

RXA4+

RXA4+

RXA4-

RXA0-

RXA4-

RXA4-

RXA4+

RXA0+

RXA3+

RXA0+

RXA0-

RXA1-

RXA3-

RXA0-

RXA0+

RXA1+

RXACK+

RXA1+

RXA1-

RXA2-

RXACK-

RXA1-

RXA1+

RXA2+

RXA2+

RXA2+

RXA2-

RXACK-

RXA2-

RXA2-

RXA2+

RXACK+

RXA1+

RXACK+

RXACK-

RXA3-

RXA1-

RXACK-

RXACK+

RXA3+

RXA0+

RXA3+

RXA3-

RXA4-

RXA0-

RXA3-

RXA3+

RXA4+

RXB4+

RXB4+

RXB4-

RXB0-

RXB4-

RXB4-

RXB4+

RXB0+

RXB3+

RXB0+

RXB0-

RXB1-

RXB3-

RXB0-

RXB0+

RXB1+

RXBCK+

RXB1+

RXB1-

RXB2-

RXBCK-

RXB1-

RXB1+

RXB2+

RXB2+

RXB2+

RXB2-

RXBCK-

RXB2-

RXB2-

RXB2+

RXBCK+

RXB1+

RXBCK+

RXBCK-

RXB3-

RXB1-

RXBCK-

RXBCK+

RXB3+

RXB0+

RXB3+

RXB3-

RXB4-

RXB0-

RXB3-

RXB3+

RXB4+

37
38

RXB1+

39

RXB1-

40

RXB0+

41

RXB0-

42
43
44

PANEL_VCC

45
46
47

FHD_SS
L702
120

L702-*1
120OHM
FHD_SUNLORD

48
49
50
51

FHD
C710
0.1uF
16V

52

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

2013 S7LR2
LVDS

2012.11.12
7

LGE Internal Use Only

HDMI EEPROM
HDMI_1
5V_HDMI_1

5V_DET_HDMI_1

19

DDC_SCL_1

D823
ESD_HDMI

D804
ESD_HDMI

R884

R888

2.7K

2.7K

4
3
2
1

2.7K

CK+

D0-

D0_GND

DDC_SCL_1

DDC_SDA_4

DDC_SCL_2

DDC_SCL_4

D0-_HDMI1
D0+_HDMI1

D1-

ESD_HDMI_SEMTECH
D806
RCLAMP0524PA
1
10

D1_GND
D1+

D2-

D2_GND

For CEC

D1-_HDMI1
D1+_HDMI1
D2-_HDMI1
D2+_HDMI1

D2+
R855
100
HDMI_CEC

CEC_REMOTE_S7

D803
DELETE

GND

SIDE_HDMI

HDMI_2
5V_HDMI_2

5V_DET_HDMI_2

5V_HDMI_4

5V_DET_HDMI_4
R808
10K

R807
10K

SHIELD

BODY_SHIELD

R895
1K

20

Q801
MMBT3904(NXP)
B

HPD2

R803
1.8K
D807
ESD_HDMI

17
16

R801
3.3K

15

Q803
MMBT3904(NXP)

D815
ESD_HDMI

DDC_SDA_4

R835
3.3K

DDC_SCL_4
D817
ESD_HDMI

16

14
ESD_HDMI_SEMTECH
D812
RCLAMP0524PA
1
10

12

4
3
2
1

CK-_HDMI2

CK+

D0-

D0-_HDMI2

D0+_HDMI2

D0_GND

CK+_HDMI2

EAG62611201

13

HDMI_SIDE

HDMI_2

EAG59023302

HDMI_CEC

D818
ESD_HDMI

15

14

HPD4

1.8K

17

D810
ESD_HDMI

R862
10K

D816
ESD_HDMI

R837

18

DDC_SCL_2

D809
ESD_HDMI

C
19

DDC_SDA_2

18

R897
1K

20

R828
10K

D808
ESD_HDMI

19

2.7K

D0+

JK802

R891

2.7K

CK+_HDMI1

DELETE
D802
5.6V
200pF

11
10

R887

DDC_SDA_2

CK-_HDMI1

AVRL161A1R1NT

HDMI_1

EAG59023302

ESD_HDMI_SEMTECH
D805
RCLAMP0524PA
1
10

12

R889

2.7K

HDMI_CEC

13

R885

DDC_SDA_1

14

A1

DDC_SDA_1

15

A2

A2

R830
10K

16

11
10

ENKMC2838-T112
D824
C

HPD1

R802
3.3K

D800
ESD_HDMI

17

ENKMC2838-T112
D822

ENKMC2838-T112
D821

B
E

18

A1

Q802
MMBT3904(NXP)

C
D801
ESD_HDMI

R804
1.8K

A2

R896
1K

20

5V_HDMI_4 +5V_Normal

5V_HDMI_2 +5V_Normal

5V_HDMI_1 +5V_Normal

SHIELD

A1

R806
10K

11
10
9
8
7

D1-

ESD_HDMI_SEMTECH
D813
RCLAMP0524PA
1
10

D1+

D2-

D2_GND

6
5

D1-_HDMI2
D1+_HDMI2

4
3

D2-_HDMI2
D2+_HDMI2

D2+

JK801

1
DELETE
D814
5.6V
200pF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

ESD_HDMI_SEMTECH
D819
RCLAMP0524PA
1
10

12

D0+

D1_GND

HDMI_CEC

13

JK803

CK+

D0-

D0_GND

CK-_HDMI4
CK+_HDMI4
D0-_HDMI4

D0+_HDMI4

D0+
D1-

ESD_HDMI_SEMTECH
D820
RCLAMP0524PA
1
10

D1_GND
D1+

D2-

D2_GND

D1-_HDMI4
D1+_HDMI4
D2-_HDMI4
D2+_HDMI4

D2+
DELETE
D811
5.6V
200pF

2013 S7LR2
HDMI

2012.11.12
8

LGE Internal Use Only

RS232C

10
5
9
IR_OUT

4
8

R1001
100

JP1121

R1002
100

JP1122

3
+3.5V_ST

7
2

D1007
CDS3C30GTH
30V
DELETE

D1008
CDS3C30GTH
30V
DELETE

C1001 0 . 3 3 u F

SPG09-DB-009
IC1000

C1006
0.1uF

MAX3232CDR

C1+
C1002
0.1uF
C1003
0.1uF

V+

C1-

C2+
C1004
0.1uF

C2-

VC1005
0 . 1 u FDOUT2

RIN2

16

15

14

13

12

11

10

JK1001
+3.5V_ST

VCC

D1001
BAP70-02

GND

50V

R1003
1K

DOUT1

RIN1

ROUT1
PM_RXD
DIN1
PM_TXD
DIN2

ROUT2

EAN41348201

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

2013 S7LR2
RS-232C

2012.11.12
10

LGE Internal Use Only

RGB PC

+5V_Normal
D1115
ENKMC2838-T112
A1

HEADPHONE

C
A2

HP_LOUT

Q1104
MMBT3904(NXP)
CHEAD_PHONE

+3.3V_Normal

R1155
1K

GND

DETECT

HP_DET

HEAD_PHONE
R

RGB_DDC_SDA
C1127
18pF
50V

C1128
18pF
50V

R1175
22

R1162
22

Q1103
MMBT3904(NXP)
C HEAD_PHONE

R1129
3.3K
HEAD_PHONE

C
B
Q1106
MMBT3904(NXP)
E
HEAD_PHONE

SIDE_HP_MUTE

DSUB_VSYNC

DSUB_HSYNC

ADUC 20S 02 010L

B
ADUC 20S 02 010L

HEAD_PHONE
C
R1128
Q1102
1K
MMBT3904(NXP)
HEAD_PHONE
E

C1116
1000pF
50V
OPT

RGB_DDC_SCL
+3.5V_ST
HEAD_PHONE
Q1105
MMBT3906(NXP)

C1119
10uF
16V
HEAD_PHONE

C1129
0.1uF
16V

HEAD_PHONE
JK1101
KJA-PH-0-0177

HEAD_PHONE
R1130
10K

HP_ROUT

R1140
2.2K

R1139
2.2K

E
B

HEAD_PHONE
C
HEAD_PHONE
R1125
Q1101
1K MMBT3904(NXP)

C1115
1000pF
50V
OPT

C1118
10uF
16V
HEAD_PHONE

D1109
20V

D1113
20V

DSUB_B+
R1133
75

RGB_ZENER
D1110
20V
ADUC 20S 02 010L

R1135
75

RGB_ZENER
D1111
20V
ADUC 20S 02 010L

DSUB_G+

SIDE USB

+3.3V_Normal

22uF
16V

DSUB_R+

DSUB_DET
R1147
1K
D1117
5.6V

16

SHILED

DDC_GND

DDC_CLOCK

SYNC_GND

GND_1

10
4

9
3

15

V_SYNC

NC

14

BLUE

H_SYNC

BLUE_GND

13

GREEN

DDC_DATA

RED

GREEN_GND

12

11
7

SPG09-DB-010

JK1104

D1100
RCLAMP0502BA
OPT

R1146
10K

DELETE

GND_2

SIDE_USB_DM

SIDE_USB_DP

D1112
20V
RGB_ZENER
ADUC 20S 02 010L

RED_GND

R1137
75

C1117

USB DOWN STREAM

3AU04S-305-ZC-(LG)

JK1105

ADMC 5M 02 200L

+5V_USB

PC AUDIO
SPDIF OPTIC JACK
5.15 Mstar Circuit Application

JK1102
+3.3V_Normal

VCC

VIN
SPDIF_OUT
C1109
22uF
R1104
10K
16V
DELETE DELETE

C1110
10uF
16V
DELETE

C1131
0.1uF
16V

C1121
100pF
50V

4
SHIELD

GND

Fiber Optic

JK1103
2F01TC1-CLM97-4F

PEJ027-04
3

T_TERMINAL1

7A

B_TERMINAL1
R_SPRING

T_SPRING

7B

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

R1107
15K
PC_R_IN

6B

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

E_SPRING

6A

DELETE
D1101
5.6V
200pF

C1107
100pF R1102
50V
470K

R1110
10K

R1108
15K

B_TERMINAL2

PC_L_IN
T_TERMINAL2

DELETE
D1102
5.6V
200pF

C1108 R1103
100pF 470K
50V

R1111
10K

2013 S7LR2
RGB/HP/USB

2012.11.12
11

LGE Internal Use Only

A3

N1
N9
R1
R9

VDD_3

A11

VDD_4

A12/BC

VDD_5

A13

L7

VDD_6
VDD_7

A8
C1
C9

BA0

D2
E9
F1
H2
H9
J1
J9
L1
L9
A-MA14

T7

CK
CKE

K7
K9

VDDQ_5
VDDQ_6

ODT

VDDQ_8

RAS

VDDQ_9

CAS

B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B9
D1
D8
E2
E8
F9
G1
G9

A-MRASB
A-MCASB
A-MWEB

T2

RESET

NC_4

AVDD_DDR0
R1231
10K

DQSU

VSS_2

DQSU

VSS_4

DML

VSS_5

DMU
DQL0

VSS_8

DQL1

VSS_9

DQL2

VSS_10

DQL3

VSS_11

DQL4

VSS_12

DQL5

VSSQ_2

DQU0

VSSQ_3

DQU1

VSSQ_4

DQU2

VSSQ_5

DQU3

VSSQ_6

DQU4

VSSQ_7

DQU5

VSSQ_8

DQU6

VSSQ_9

DQU7

R8
T8
R3
L7
R7
N7
T3
M7
M2
N8
M3
J7
K7
K9
L2
K1
J3
K3
L3
T2

EAN61829003
DDR_1600_1G_HYNIX

IC1202-*1
H5TQ1G63EFR-PBC

VREFCA

F3

C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3

N3

H1

N2

P7

P8
P2

A6

ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

NC_7

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R7
N7

K8

T3

N1
N9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

R9

M2
N8

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

B_DDR3_A[3]

A_DDR3_A[4]

B_DDR3_A[4]

A_DDR3_A[5]

B_DDR3_A[5]

A_DDR3_A[6]

B_DDR3_A[6]

A_DDR3_A[7]

B_DDR3_A[7]

A_DDR3_A[8]

B_DDR3_A[8]

A_DDR3_A[9]

B_DDR3_A[9]

A_DDR3_A[10]

B_DDR3_A[10]

A_DDR3_A[11]

B_DDR3_A[11]

A_DDR3_A[12]

B_DDR3_A[12]

A_DDR3_A[13]

B_DDR3_A[13]

A_DDR3_A[14]

B_DDR3_A[14]

A_DDR3_BA[0]

B_DDR3_BA[0]

A_DDR3_BA[1]

B_DDR3_BA[1]

A_DDR3_BA[2]

B_DDR3_BA[2]
B_DDR3_MCLK

A_DDR3_MCLK
A_DDR3_MCLKZ

B_DDR3_MCLKZ

A_DDR3_MCLKE

B_DDR3_MCLKE

B_DDR3_ODT

A_DDR3_ODT
A_DDR3_RASZ

B_DDR3_RASZ

A_DDR3_CASZ

B_DDR3_CASZ
B_DDR3_WEZ

A_DDR3_WEZ

B_DDR3_RESET

A_DDR3_RESET

T7

F3
G3

A9

C7

B3

B7

E1
G8
J2

E7
D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A3

M8

N3

H1

N2

P7
P3

A2
A3

VREFDQ

P8

A4

P2

A5
A6

ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

NC_7

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R7
N7

K8

T3

N1
N9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

R9

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

B20
F16
C21
E16
A20
D16
C20

T7

F3
G3

A9

C7

B3

B7

E1
G8
J2

E7
D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

VREFDQ

A6

A_DDR3_DQML

B_DDR3_DQML

A_DDR3_DQMU

B_DDR3_DQMU

A_DDR3_DQL[0]

B_DDR3_DQL[0]

A_DDR3_DQL[1]

B_DDR3_DQL[1]

A_DDR3_DQL[2]

B_DDR3_DQL[2]

A_DDR3_DQL[3]

B_DDR3_DQL[3]

A_DDR3_DQL[4]

B_DDR3_DQL[4]

A_DDR3_DQL[5]

B_DDR3_DQL[5]

A_DDR3_DQL[6]

B_DDR3_DQL[6]

A_DDR3_DQL[7]

B_DDR3_DQL[7]

A_DDR3_DQU[0]

B_DDR3_DQU[0]

A_DDR3_DQU[1]

B_DDR3_DQU[1]

A_DDR3_DQU[2]

B_DDR3_DQU[2]

A_DDR3_DQU[3]

B_DDR3_DQU[3]

A_DDR3_DQU[4]

B_DDR3_DQU[4]

A_DDR3_DQU[5]

B_DDR3_DQU[5]

A_DDR3_DQU[6]

B_DDR3_DQU[6]

A_DDR3_DQU[7]

B_DDR3_DQU[7]

A3

N3

H1

N2

P7

P8
P2

ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R7
N7

K8

T3

N1
N9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

R9

M2
N8

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1
T7

F3
G3

A9

C7

B3

B7

E1
G8
J2

E7
D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A3

M8

N3

H1

N2

P7
P3

A2
A3

VREFDQ

P8

A4

P2

A5
A6

ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R7
N7

K8

T3

N1
N9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

R9

M2
N8

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

B-MA0

D25

B-MA0

B-MA1

F22

B-MA1

B-MA2

G22

B-MA2

B-MA3

E24

B-MA3

B-MA4

F21

B-MA4

B-MA5

E23

B-MA5

B-MA6

D22

B-MA6

B-MA7

D24

B-MA7

B-MA8

D21

B-MA8

B-MA9

C24

B-MA9

B-MA10

C25

B-MA10

B-MA11

F23

B-MA11

B-MA12

E21

B-MA12

B-MA13

D23

B-MA13

B-MA14

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

G20

B-MBA0

F24

B-MBA1

F20

B-MCK

B-MBA2
C1240

G25

B-MBA0

B-MCK

G23

B-MCKB

F25

0.01uF
50V

B-MCKE

B-MBA1
B-MBA2

B-MCKE

M2
N8
M3
J7
K7
K9
L2

D20

B-MODT

B25

B-MRASB

B24

B-MCASB

A24

B-MWEB

E20

B-MRESETB

B-MODT
AVDD_DDR1

B-MRASB
B-MCASB

R1232
10K

B-MWEB
B-MRESETB

K1
J3
K3
L3
T2

A0

VREFCA

T7

F3
G3

A9

C7

B3

B7

E1
G8
J2

E7
D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

VREFDQ

A6

ZQ

VDD_1
VDD_2

A11

VDD_3

A12

VDD_4

NC_6

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
RESET

NC_2

A3

NC_4
DQSL

NC_7

DQSU

VSS_1
VSS_2

DML

VSS_4

VSS_3
DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B-MDQL3

M24

B-MDQL4

H23

B-MDQL5

M23

B-MDQL6

K23

B-MDQL7

G21

B-MDQU0

L22

B-MDQU1

H22

B-MDQU2

K20

B-MDQU3

H20

B-MDQU4

L21

B-MDQU5

H21

B-MDQU6

K21

P8
L8

R8
R2

B2
D9

R3
L7

G7

R7

K2

N7

K8

T3

N1
N9

M7

R1
R9

M2
N8

A1
A8

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1

B-MDQU7

A2

B-MDQSL
B-MDQSLB
B-MDQSU
B-MDQSUB
B-MDML
B-MDMU
B-MDQL0
B-MDQL1
B-MDQL2
B-MDQL3
B-MDQL4
B-MDQL5
B-MDQL6
B-MDQL7
B-MDQU0
B-MDQU1
B-MDQU2
B-MDQU3
B-MDQU4
B-MDQU5
B-MDQU6
B-MDQU7

F3
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3

R1227

1K 1%
1%
1K

R1228

0.1uF
C1250

1000pF

C1249

1%

0.1uF
C1248

1000pF

C1247

C1246

10uF

0.1uF

C1245

0.1uF

C1244

0.1uF

C1243

0.1uF

B-MVREFCA

A3

VREFDQ

H1

B-MVREFDQ

A4
A5
A6

ZQ

L8

240
1%

A7
A8
A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5
VDD_6

NC_5

VDD_7
VDD_8

BA0

R1226

VDD_9

B2
D9
G7
K2
K8
N1
N9
R1
R9

AVDD_DDR1

BA1
BA2
VDDQ_1
CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
RESET

NC_2
NC_4

DQSL

NC_6

A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7

B-MA14

DQSL
DQSU

VSS_1

DQSU

VSS_2
VSS_3

DML

VSS_4

DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQL6
DQL7
VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9
D1
D8
E2
E8
F9
G1
G9

A0

T7

F3

A9

C7

B3

B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3
H8
G2

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

A3

M8

N3

H1

N2

P7
P3

A2
A3

VREFDQ

P8

A4

P2

A5
A6

ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12

VDD_4

NC_6

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R7
N7

K8

T3

N1
N9

NC_7

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

R9

M2
N8

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1
T7

F3
G3

A9

C7

B3

B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

VREFCA

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

A3

M8

N3

H1

N2

P7
P3

A2
A3

VREFDQ

P8

A4

P2

A5
A6

ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R7
N7

K8

T3

N1
N9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

R9

M2
N8

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1
T7

F3
G3

A9

C7

B3

B7

E1
G8
J2

E7
D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A3

M8

N3

H1

N2

P7
P3

A2
A3

VREFDQ

P8

A4

P2

A5
A6

ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R7
N7

K8

T3

N1
N9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

R9

M2
N8

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1
T7

F3
G3

A9

C7

B3

B7

E1
G8
J2

E7
D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A3

M8

N3

H1

N2

P7
P3

A2
A3

VREFDQ

P8

A4

P2

A5
A6

ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R7
N7

K8

T3

N1
N9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

R9

M2
N8

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1
T7

F3
G3

A9

C7

B3

B7

E1
G8
J2

E7
D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A3

M8

N3

H1

N2

P7
P3

A2
A3

VREFDQ

P8

A4

P2

A5
ZQ

A6

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

R7
N7

K8

T3

N1
N9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

R9

M2
N8

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1
T7

F3
G3

A9

C7

B3

B7

E1
G8
J2

E7
D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

VREFDQ

A3

M8

N3

H1

N2

P7

P8

A4

P2

A5
A6

ZQ

L8

T8

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4

R7
N7

K8

T3

N1
N9

NC_6

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

R9

M2
N8

A1
A8

DQL5

VSS_12

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

T2

L1
T7

F3
G3

A9

C7

B3

B7

E1
G8
J2

E7
D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

VSSQ_1
VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

H8
G2

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

VREFCA

A2
A3

VREFDQ

A3

M8

H1

A4
A5
A6

ZQ

L8

A7
A8
A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

NC_5

VDD_7

BA0

VDD_9

VDD_6
VDD_8

B2
D9
G7
K2
K8
N1
N9
R1
R9

BA1
BA2
VDDQ_1
CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
RESET

NC_2
NC_3

H7

DQL7

A0
A1

L9

DQL6

DQU0

M7

R1

DQSL

DMU

L7

G7

M3
VDDQ_1

DQSL

R3

K2

BA1
BA2

RESET

R8
R2

A7
A8

CKE

EAN61848802
DDR_1600_2G_SS_800MHz
IC1202-*9
K4B2G1646E-BCK0

P3

A2
A3

NC_3

H7

DQL7

A0
A1

L9

DQL6

DQU0

M7

R1

DQSL

DMU

L7

G7

M3
VDDQ_1

RESET

R3

K2

BA1
BA2

CKE

R8
R2

A7
A8

NC_3

H7

DQL7

A0

EAN61848802
DDR_1600_2G_SS_800MHz
IC1201-*9
K4B2G1646E-BCK0

A1

L9

DQL6

DQU0

M7

R1

DQSL

DMU

L7

G7

M3
VDDQ_1

RESET

R3

K2

BA1
BA2

CKE

R8
R2

A7
A8

NC_3

H7

DQL7

A0

EAN61829203
DDR_1600_2G_HYNIX
IC1202-*8
H5TQ2G63DFR-PBC

A1

L9

DQL6

DQU0

M7

R1

DQSL

DMU

L7

G7

M3
VDDQ_1

RESET

R3

K2

BA1
BA2

CKE

R8
R2

A7
A8

NC_3

H7

DQL7

A0

EAN61829203
DDR_1600_2G_HYNIX
IC1201-*8
H5TQ2G63DFR-PBC

A1

L9

DQL6

DQU0

M7

R1

DQSL

DMU

L7

G7

M3
VDDQ_1

RESET

R3

K2

BA1
BA2

CKE

R8
R2

A7
A8

NC_3

H7

DQL7

A0

EAN61667501
DDR_1600_2G_SS
IC1202-*3
K4B2G1646C

A1

L9

DQL6

DQU0

M7

R1

DQSL

DMU

L7

G7

M3
VDDQ_1

RESET

R3

K2

BA1
BA2

CKE

R8
R2

A7
A8

NC_3

G3

T9

VREFCA

EAN61667501
DDR_1600_2G_SS
IC1201-*3
K4B2G1646C

A1

L9

H7
VSSQ_1

DQU0

B-MDQL2

J23

P7

DQL6
DQL7

B-MDQL1

L24

N2

DQSL

DQSU

B-MDQL0

J24

M3
VDDQ_1

B-MDMU

L23

N3

BA1
BA2

B-MDML

L20

T8

A9

B-MDQSUB

H24

H1

A7

A10/AP

B-MDQSU

J20

P2

A8

B-MDQSLB

J21

M8

A4
A5

B-MDQSL

K25

P3

A2
A3

NC_3

H7

DQL7

A0

K24

M8

A1

EAN61859501
DDR_1600_1G_NANYA
IC1202-*7
NT5CB64M16DP-DH

A1

L9

DQL6

DQU0

M7

R1

DQSL

DMU

L7

G7

M3
VDDQ_1

RESET

R3

K2

BA1
BA2

CKE

R8
R2

A7
A8

NC_3

H7

DQL7

A0

EAN61859501
DDR_1600_1G_NANYA
IC1201-*7
NT5CB64M16DP-DH

A1

L9

DQL6

DQU0

M7

R1

DQSL

DMU

L7

G7

M3
VDDQ_1

RESET

R3

K2

BA1
BA2

CKE

R8
R2

A7
A8

B_DDR3_DQSUB

A_DDR3_DQSUB

M8

A4
A5

B_DDR3_DQSU

A_DDR3_DQSU

P3

A2
A3

NC_3

H7

DQL7

A0

B_DDR3_DQSLB

A_DDR3_DQSLB

EAN61836301
DDR_1600_1G_SS
IC1202-*5
K4B1G1646G-BCK0

A1

L9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

M2
N8

DQL6

DQU0

M7

R1

DQSL

DMU

L7

G7

M3
VDDQ_1

RESET

R3

K2

BA1
BA2

CKE

R8
R2

A7
A8

NC_3

H7

DQL7

A0

G16

B_DDR3_DQSL

A_DDR3_DQSL

EAN61836301
DDR_1600_1G_SS
IC1201-*5
K4B1G1646G-BCK0

A1

L9

DQL6

DQU0

M7

R1

DQSL

DMU

L7

G7

M3
VDDQ_1

RESET

R3

K2

BA1
BA2

CKE

R8
R2

A7
A8

NC_3

G3

M8

P3
VREFDQ

D15

A-MDQU7

EAN61829003
DDR_1600_1G_HYNIX

A4

A22

A-MDQU6

IC1201-*1
H5TQ1G63EFR-PBC

A5

F14

A-MDQU5

A-MDQU7

A2

F15
B22

A-MDQU4

A-MDQU6

A1

B21

A-MDQU3

A-MDQU5

A3

G15

A-MDQU2

A-MDQU4

B8

D17

A-MDQU1

A-MDQU3

A2

A21

A-MDQU0

A-MDQU2

A7

E15

A-MDQL7

A-MDQU1

C2

A18

A-MDQL6

A-MDQU0

C8

B18

A-MDQL5

A-MDQL7

C3

C18

A-MDQL4

A-MDQL6

D7

B19

A-MDQL3

A-MDQL5

H7

R2

F11

A-MDQL2

A-MDQL4

G2

A3

C12

A-MDQL1

A-MDQL3

H8

A0

A12

A-MDQL0

A-MDQL2

H3

P8

B12

A-MRASB

A-MDMU

A-MDQL1

F8

P2

A-MODT

A-MDML

A-MDQL0

F2

P7

E14

A-MDQSU

A-MDMU

F7

P3

A-MCKE

A-MDQSUB

A-MDML

E3

N2

B16

A-MDQSLB

A-MDQSUB

D3

N3

A17

A-MDQSL

A-MDQSU

E7

VSSQ_1

C17

A-MCK

A-MRESETB

A-MDQSL

B7

DQL7

E13

A-MBA2

A-MWEB

A-MDQSLB

C7

VSS_6
VSS_7

A_DDR3_A[3]

B23

NC_3

G3

VSS_3

B15

A-MCASB

A-MRESETB

F3

DQSL

F13

A-MBA0

A-MCKB

NC_3

VSS_1

B_DDR3_A[2]

B-MCKB

L3

DQL6
B1

0.01uF
50V

A-MODT

K3

DQSL
A9

C1209

A-MCKB

J3

WE

NC_6

B13

A-MBA1

A-MCKE

K1

NC_1
NC_2

A-MCK

L2

CS

VDDQ_7

A-MBA2

J7

CK

VDDQ_4

A-MBA1

M3

VDDQ_1
VDDQ_3

A-MBA0

N8

BA2
VDDQ_2

A-MA13
A-MA14

M2

BA1
A1

E11

B_DDR3_A[1]

A_DDR3_A[2]

M7

VDD_8
VDD_9

A15

A-MA12

A-MA13

M7

NC_5

C13

A-MA11

A-MA12

T3

C16

A-MA10

A-MA11

N7

D12

A-MA9

A-MA10

R7

B14

A-MA8

B_DDR3_A[0]

A_DDR3_A[1]

56
R1237

K8

A10/AP

D11

A-MA7

A-MA9

A_DDR3_A[0]

56
R1238

K2

VDD_2

A-MA6

A-MA8

R3

S7LR_DIVX_MS10

1%

G7

A9

A-MA7

T8

A8
VDD_1

A14

CLose to DDR3

DDR_1333_1G_HYNIX
EAN61828901
IC1202
H5TQ1G63DFR-H9C

1%

D9

AVDD_DDR0

R2

A7
B2

E12

A-MA5

A-MA6

1%

240
1%

C15

A-MA4

A-MA5

R8

A6

F12

A-MA3

A-MA4

P2

A5
ZQ

R1235
56

L8

B11

A-MA2

A-MA3

P8

A4
R1203

C14

A-MA1

A-MA2

N2

A11

A-MA0

A-MA1

P3

A2
VREFDQ

A-MA0

P7

1%

A-MVREFDQ

C1242

0.1uF

CLose to Saturn7M IC

IC101
LGE2112-T8
N3

A0
A1

H1

C1241

0.1uF

C1239

0.1uF

C1238

0.1uF

C1237

C1235
0.1uF

C1236

0.1uF

C1234
0.1uF

0.1uF

C1233

0.1uF

C1232

0.1uF

C1231

0.1uF

C1230

0.1uF

C1229

0.1uF

C1228

0.1uF

C1227

0.1uF

0.1uF

C1224

0.1uF

C1223

0.1uF

C1222

0.1uF

C1221

0.1uF

C1220

0.1uF

C1219

0.1uF

C1218

0.1uF
C1217

0.1uF
C1216

0.1uF

C1215

0.1uF

C1214

0.1uF

C1213

0.1uF

0.1uF

C1211

0.1uF

C1210

0.1uF

C1208

0.1uF

C1207

C1206

10uF

C1205

1000pF

0.1uF
C1204

C1203

C1212

Close to DDR Power Pin

CLose to Saturn7M IC

R1236
56

VREFCA

B-MVREFDQ

B-MVREFCA

DDR_1333_1G_HYNIX
EAN61828901
IC1201
H5TQ1G63DFR-H9C
M8

R1224

L1203
BLM18PG121SN1D

A-MVREFCA

Close to DDR Power Pin

A-MVREFCA

1K 1%

DDR3 1.5V By CAP - Place these Caps near Memory

+1.5V_DDR

R1225

AVDD_DDR0

AVDD_DDR1

1K

DDR3 1.5V By CAP - Place these Caps near Memory

L1202
BLM18PG121SN1D

1%

R1205

1K

1000pF

0.1uF
C1202

+1.5V_DDR

A-MVREFDQ

CLose to DDR3

AVDD_DDR1

AVDD_DDR1

1K 1%

R1204

AVDD_DDR0

1K 1%
1%

R1202

1K

C1201

R1201

AVDD_DDR0

NC_4
DQSL

NC_6

A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7

DQSL
DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQL6
DQL7
VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9
D1
D8
E2
E8
F9
G1
G9

2013 S7LR2

2012.11.12

DDR_256

12

LGE Internal Use Only

+3.5V_ST
S_FLASH_MAIN_MACRONIX

R1404
4.7K
OPT

+3.5V_ST

+3.5V_ST

IC1401
MX25L8006EM2I-12G
CS#

/SPI_CS

C1401

VCC

0.1uF
R1403
10K
DELETE

SO/SIO1
SPI_SDO
WP#

/FLASH_WP
GND

HOLD#

SCLK
SPI_SCK
SI/SIO0

R1405
33
SPI_SDI

S_FLASH_MAIN_WINBOND

IC1401-*1
W25Q80BVSSIG
CS

DO[IO1]

%WP[IO2]

GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

VCC

HOLD[IO3]

CLK

DI[IO0]

2013 S7LR2

2012.11.12

S_FLASH

13

LGE Internal Use Only

+12V

IC1601
AZ4580MTR-E1
EU_OPT
R1600
2.2K

OUT1

DTV/MNT_L_OUT

EU_OPT
R1603
33K

EU_OPT
C1600DELETE
10uF
R1601
16V
470K

IN1-

IN1+

EU_OPT
R1615
10K

EU_OPT
C1606
33pF

EU_OPT

VEE

EU_OPT
C1642
0.1uF
50V

VCC

OUT2

IN2-

IN2+

EU_OPT
R1625
2.2K

EU_OPT
R1619
10K

EU_OPT
R1612
5.6K

EU_OPT
C1605
10uF
16V

DELETE
R1624
470K

EU_OPT
C1602
33pF

EU_OPT
R1620
5.6K

SCART1_Lout
330pF
C1601
EU_OPT

DTV/MNT_R_OUT

EU_OPT
R1621
33K

SCART1_Rout

220K
R1602
EU_OPT

EU_OPT
C1603
330pF

EU_OPT
R1622
220K

CLOSE TO MSTAR
CLOSE TO MSTAR

REAR COMPONENT PHONE JACK


Full Scart
COMPONENT
JK1600

+3.3V_Normal

R1613
10K
EU_OPT

SIDE_COMP_Pr+
D1613
ESD_COMP

PEJ029-02
8

G_SPRING

D1614
ESD_COMP

E_SPRING

R_SPRING

T_SPRING

D1615
ESD_COMP

B_TERMINAL

D1616
ESD_COMP

EU_OPT

R9908
75
COMPONENT

SC1_SOG_IN

R9909
75
COMPONENT

EU_OPT
R1609
75

22

D1612
ESD_SCART

COM_GND
21

B
C

C1608
220pF
50V
OPT

SYNC_OUT
19
SYNC_GND2
18
SYNC_GND1
17

D1603
20V
ESD_SCART

D1610
20V
ESD_SCART

EU_OPT
R1628
75

EU_OPT
C1620
100uF
16V

RGB_IO

+3.3V_Normal

Rf

EU_OPT EU_OPT
R1641 C1621
47K
47uF
16V

Rg

Gain=1+Rf/Rg

EU_OPT
R1627
22

EU_OPT
C1625
0.1uF
50V

DTV/MNT_VOUT

EU_OPT
R1635
390

20

R9910
75
COMPONENT

EU_OPT
Q1602
EU_OPT MMBT3904(NXP)
C
R4211
390

SYNC_IN

SIDE_COMP_Y+

D1620
ESD_COMP

EU_OPT
C1604
47pF
50V

EU_OPT
C1623
0.1uF
50V

EU_OPT
R1640
470

E
EU_OPT
MMBT3906(NXP)
Q1601

SC1_CVBS_IN

ESD_SCART
D1602

EU_OPT

D1617
ESD_COMP

EU_OPT
L1606

EU_OPT
R4210
0

SIDE_COMP_Pb+

T_TERMINAL

+12V

R1614
1K

EU_OPT
C1607
0.1uF
16V

D1611
5.6V

AV_DET
6

SC1_DET

ESD_SCART

EU_OPT
R1639
180

EU_OPT
R1642
15K

SC1_FB

16
R_OUT

COMPONENT
R9904
10K

15
RGB_GND
14

R9912
1K

R_GND
SIDE_COMP_DET

COMPONENT
D1619
5.6V
OPT

13
D2B_OUT
12

SC1_R+

D1604
20V
ESD_SCART

EU_OPT
R1608
75

D1605
20V
ESD_SCART

EU_OPT
R1604

D1606
20V
ESD_SCART

EU_OPT
R1605
75

EU_OPT
R1616
75

R4221
0
EU_OPT

G_OUT
SC1_G+

11
D2B_IN
10
G_GND

EU_OPT
R1623
15K

75

9
ID

SC1_ID

8
B_OUT
7
AUDIO_L_IN
6
B_GND

SC1_B+

D1618
20V
ESD_SCART

EU_OPT
R1629
3.9K

5
AUDIO_GND
4

EU_OPT
R1617
10K

AUDIO_L_OUT
3
AUDIO_R_IN
2
AUDIO_R_OUT
1

+3.5V_ST

Q1610
MMBT3906(NXP)
C

EU_OPT
C1611
330pF
50V

SC1_L_IN
EU_OPT
R1630
12K

L1603
120-ohm
EU_OPT
R1607
470K
EU_OPT

EU_OPT
C1612
330pF
50V

SC1_R_IN
R1631
12K
EU_OPT

EU_OPT
R1652
10K
DTV/MNT_L_OUT

DTV/MNT_R_OUT
EU_OPT
Q1608
MMBT3904(NXP)

L1604
120-ohm
EU_OPT

EU_OPT
R1618
10K

D1609
5.6V
ESD_SCART

DTV/MNT_L_OUT

EU_OPT
R1648
2K

R1606
470K
EU_OPT

PSC008-01
JK1602

[SCART AUDIO MUTE]

EU_OPT
Q1607
MMBT3904(NXP)

D1607
5.6V
ESD_SCART

SCART1_MUTE
EU_OPT
C1636
0.1uF

D1608
5.6V
ESD_SCART

EU_OPT
L1601
BLM18PG121SN1D

EU_OPT
C1609
1000pF
50V

EU_OPT
C1618
4700pF

EU_OPT
C1610
1000pF
50V

EU_OPT
C1619
4700pF

EU_OPT
R1650
2K
DTV/MNT_R_OUT
D1601
5.6V
ESD_SCART

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

EU_OPT
L1602
BLM18PG121SN1D

2013 S7LR2
REAR JACK

2012.11.12
16

LGE Internal Use Only

EXT_SPEAKER_AMP
SPEAKER OUT JACK

+12V

L1802
EXT_SPK

EXT_SPK
L1803
BLM18PG121SN1D

JK1800
PEJ034-01
EXT_SPK

C1806
0.1uF
16V
EXT_SPK
EXT_SPK
R1803
100

PVCCL_1
R1802
10K
EXT_SPK

SUB_AMP_MUTE

C
B

OPT

OPT
C1818
100pF
50V

IC1800
TPA3124D2PWPR

+3.5V_ST

R1801
10K

SD

OPT
Q1800
MMBT3904(NXP)

PVCCL_2

MUTE
C1800
1uF
10V

LIN

EXT_AMP_L

24

23

22

21

20

19

18

PGNDL_2

EXT_SPK
C1816
100uF
25V

PGNDL_1
EXT_SPK
L1804
22.0uH

LOUT

BSL

C1807
0.22uF
50V
EXT_SPK

AVCC_2

EXT_SPK
R1808
4.7K

RIN

C1801
1uF
10V

BYPASS

EXT_SPK
C1804
1uF
50V

L1805
22.0uH
EXT_SPK

AGND_1

AGND_2

PVCCR_1

VCLAMP
EXT_SPK
C1802
1uF
50V

PVCCR_2

17

16

10

15

11

14

12

13

R_SPRING

T_SPRING
EXT_SPK_L

7B

B_TERMINAL2

6B

T_TERMINAL2

+3.3V_Normal

EXT_SPK
R1813
68K

OPT
C1819
100pF
50V

R1812
10K
EXT_SPK

R1815
100
EXT_SPK

EXT_SPK_R

R1804
10K
OPT

EXT_SPK_R
R1811
10K
EXT_SPK

EXT_SPK_DET

R1814
4.7K
OPT

R1806
10K
OPT

GAIN1

BSR

ROUT

EXT_SPK
C1808
0.22uF
50V

R1805
10K
EXT_SPK

R1807
10K
EXT_SPK

PGNDR_2

PGNDR_1

C1805
0.1uF
16V
EXT_SPK

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

EXT_SPK_L

EXT_SPK
C1814
0.47uF
50V

C1817
100uF
25V
EXT_SPK

AVCC_1

GAIN0

EXT_SPK
C1812
1uF
50V

EXT_SPK
EXT_SPK EXT_SPK
C1813
C1815
R1809
1uF
0.47uF
4.7K
50V
50V

EXT_SPK
EXT_SPK
EXT_AMP_R

C1803
10uF
25V
EXT_SPK

E_SPRING

EXT_SPK

AMP_RESET

EXT_SPK
R1800
100

C1809
C1810
C1811
10uF
10uF
0.1uF
16V
25V
25V
OPT
EXT_SPK EXT_SPK

2013 S7LR2

2012.11.12

EXT_SPK

18

LGE Internal Use Only

* Option name of this page : CI_SLOT


(because of Hong Kong)
CI Region
CI SLOT

+5V_CI_ON

CI TS INPUT

CI_DATA[0-7]

CI_DATA[0-7]

+5V_Normal

10K

CI_SLOT
EAG41860102

AR1901

100

33

CI_TS_DATA[4]
CI_TS_DATA[5]

36

37

38

39

40

41

42

43

CI_IORD

44

10

CI_IOWR

45

11

CI_TS_DATA[6]
CI_TS_DATA[7]
R1905

10K

46

12

CI_MDI[0]

47

13

CI_MDI[1]

48

14

CI_MDI[2]

49

15

CI_MDI[3]

50

16

51

17

52

18

CI_MDI[4]

53

19

CI_MDI[5]

54

20

CI_MDI[6]

55

21

CI_MDI[7]

56

22

0.1uF

C1905
GND

R1906
PCM_RST
/PCM_WAIT
REG

57

23

R1902

47

58

24

R1901

47

59

25

60

26

61

27

R1926

33
33

62

28

R1927

33

63

29

64

30

65

31

66

32

67

33

R1925

CI_TS_CLK
CI_TS_VAL

10K

CI_TS_SYNC

CI_TS_DATA[0]

33

CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]

68

R1907

/CI_CD2

FE_TS_DATA[5]
FE_TS_DATA[4]

CI_MDI[4]
33

CI_DATA[5]
CI_DATA[6]

47

FE_TS_DATA[2]
FE_TS_DATA[1]

CI_MDI[1]

FE_TS_DATA[0]

FE_TS_DATA[0-7]
AR1904

CI_DATA[7]
R1919

69

CI_ADDR[10]

/PCM_CE

CI_ADDR[11]

CI_OE

R1929
0
FE_TS_CLK

CI_MCLKI

CI_ADDR[9]

R1928
0

CI_ADDR[8]

OPT

T2_DMOD_CAM

CI_ADDR[14]

R1920

CI_WE

100

/PCM_IRQA

C1909
0.1uF
GND

CI HOST I/F

CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]

CI_DET

IC1902

CI_ADDR[0-14]

1OE

G1

1A1
PCM_A[0]

100

TOSHIBA

20

19

+3.3V_CI
C1913
0.1uF
16V
VCC

2OE

0ITO742440D
2Y4

GND
CI_ADDR[7]

1A2
PCM_A[1]

R1904
10K

FE_TS_SYNC
FE_TS_VAL_ERR

CI_MIVAL_ERR

GND

CLOSE TO MSTAR

33

CI_MISTRT

CI_ADDR[13]

+5V_Normal

C1914
12pF
50V

FE_TS_DATA[3]

CI_MDI[0]

CI_DATA[3]
CI_DATA[4]

AR1906

CI_MDI[2]

34
G2

AR1903

FE_TS_DATA[6]

GND

2Y3
CI_ADDR[6]

C1904
0.1uF
16V

1A3
PCM_A[2]

CI_MISTRT
CI_MIVAL_ERR

2Y2
CI_ADDR[5]
1A4

CI_MCLKI

PCM_A[3]
2Y1
CI_ADDR[4]
GND

18

17
TC74LCX244FT

R1908

FE_TS_DATA[7]

CI_MDI[5]

CI_MDI[3]

35

AR1905

CI_MDI[6]

R1921
10K

C1903
0.1uF
16V

33

CI_MDI[7]

P1902
10067972-000LF

/CI_CD1

CI_DATA[0-7]

R1903

C1906
10uF
10V

16

15

14

13

12

10

11

1Y1
CI_ADDR[0]
2A4
PCM_A[7]
1Y2
CI_ADDR[1]
2A3
PCM_A[6]
1Y3
CI_ADDR[2]
2A2
PCM_A[5]
1Y4
CI_ADDR[3]
2A1
PCM_A[4]

CI DETECT

+3.3V_Normal

+3.3V_CI

+3.3V_CI

+3.3V_CI

CI_SLOT_OR_GATE_NXP

/CI_CD1

GND

VCC

C1902

CI_DATA[0]
R1915

0.1uF

CI_DATA[0-7]

CI_DET
47
R1918
/PCM_CD
47

CI POWER ENABLE CONTROL

AR1907
33

PCM_D[0]

CI_DATA[1]

PCM_D[1]

CI_DATA[2]

PCM_D[2]

CI_DATA[3]

PCM_D[3]

CI_DATA[4]

AR1908
33

PCM_D[4]

CI_DATA[5]

PCM_D[5]

CI_DATA[6]

PCM_D[6]

CI_DATA[7]

PCM_D[7]

PCM_D[0-7]

/CI_CD2

10K

L1901
BLM18PG121SN1D

R1917

IC1901
74LVC1G32GW

PCM_D[0-7]
CI_DATA[0-7]

CI_SLOT
Q1902
AO3407A

CI_SLOT
L1902
BLM18PG121SN1D

+5V_Normal

+5V_CI_ON

CI_ADDR[8]

33

AR1912
PCM_A[8]

R1914
22K

C1911
4.7uF
16V

C1910

0.1uF
16V

0.1uF

C1907

CI_ADDR[9]

PCM_A[10]

CI_ADDR[11]

PCM_A[11]

16V

CI_ADDR[12]

R1922

PCM_A[9]

CI_ADDR[10]

33

AR1913
PCM_A[12]

CI_ADDR[13]

PCM_A[13]

CI_ADDR[14]

PCM_A[14]
/PCM_REG

REG

2.2K
R1913
10K
PCM_5V_CTL

C
B
R1924
10K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

Q1901
MMBT3904(NXP)
E

CI_OE
CI_WE

AR1909
33

/PCM_OE
/PCM_WE

CI_IORD

/PCM_IORD

CI_IOWR

/PCM_IOWR

2013 S7LR2
PCMCI

2012.11.12
19

LGE Internal Use Only

GP4R_GLOBAL_TUNER_BLOCK
ERROR & VALID PIN
RF_SW_OPT
R2603
0
RF_SW_OPT
C2603
0.1uF
16V

2
3
4
5
6
7
8
9
10
11

NC_1

RESET

SDA

+3.3V

SIF
+1.8V

NC_3

10

DIF[N]

NC_4

11

NC_5

14

GND

15

ERROR

16

VALID

18

D1

21

D2

22
23

24

3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SHIELD

RESET
SCL

B1

B
C

28

TU_CVBS

R2621
0

E
Q2601
MMBT3906(NXP)

B
C

should be guarded by ground

HALF_NIM/EU_NON_T2
R2602
0

IF_P_MSTAR

+3.3V_T2_TU

IF_N_MSTAR

DVB_T2
R2606
0

OPT
C2601
0.1uF
16V

DVB_T2
C2614
100pF
50V

close to TUNER

DVB_T2
C2617
0.1uF
16V

DVB_T2
C2618
10uF
6.3V

DVB_T2
C2616
0.1uF
16V

FULL_NIM_NON_S
AR3701

Close to the tuner

+1.23V_TU
DVB_T2
L2601
BLM18PG121SN1D

+3.3V_TU

DVB_T2
C2620
0.1uF
16V

IC2603
AP1117E18G-13

+1.8V_TU

R1

INADJ/GND

47

OPT
R2873
200
1%

OUT

FE_TS_ERR

FE_TS_SYNC
AR3701-*1
33
1/16W

FE_TS_CLK
OPT
R2876
0
FULL_NIM_NON_S
AR3702

T2_DMOD_CAM
47

R2872
0

R2632
1

R2

DVB_S
FE_TS_DATA[0-7]
FE_TS_DATA[0]

FE_TS_DATA[3]

A1

A1

SDA

HALF_NIM/EU_NON_T2
R2608
0

R2625
220

R2624
220

OPT
R2622
1K

D4

D7

27
B1

R2616
4.7K

IF_AGC_MAIN

FE_TS_DATA[1]

D6

26

TU_SIF

Q2600
MMBT3906(NXP)

close to TUNER

D3

D5

25

RF_S/W_CTL

R2619
82
E

C2626
0.1uF
16V

OPT
C2606
100uF
16V

HALF_NIM/EU_NON_T2
R2601
0

C2623
0.1uF
16V

FE_TS_VAL

D0

20

R2618
470

C2621
100pF
50V

MCLK

19

TU2603-*1
TDSN-C201D

C2604
0.1uF
16V

+3.3V_TU

TU_SDA

C2652
20pF
50V

SYNC

17

TU_CHINA

C2600
0.1uF
16V

+B4[1.23V]

13

SHIELD

C2651
20pF
50V

+1.8V_TU
C2602
100pF
50V

+3.3V_TU

+3.3V_TU
TU_SCL

+B3[3.3V]

12

12

R2871
1K

NC_2

DIF[P]

TU_I2C_NON_FILTER
R2610 33
C2612
20pF
50V

CVBS

IF_AGC

TU_I2C_NON_FILTER
R2609 33

SDA

+B2[1.8V]

CVBS

OPT
R2615
0
R2870
1K

SIF

FE_TS_DATA[2]

C2641
0.1uF
16V

Vo=VREF*(1+R2/R1)

AR3702-*1
33
1/16W

VREF=1.25V

C2642
10uF
10V

DVB_S
FULL_NIM

FULL_NIM_NON_S
AR3703

47

FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]

IC2602
TJ4220GDP-ADJ[EP]GND

AR3703-*1
33
1/16W

NC_1

DVB_S

FULL_NIM
R2629
3.3K

EN2

C2635
0.1uF
16V

VIN3

NC4

+B1[3.3V]

SHIELD

SIF

FE_TS_VAL_ERR

R2628
0

GPIO must be added.

TU_I2C_FILTER
R2610-*1
MLG1005SR27JT

C2607
20pF
50V

OPT
R2631
0

+3.3V_TU

SCL

+B1[3.3V]

OPT
C2640
0.1uF
16V

TUNER_RESET
C2622
0.1uF
16V

RESET

SCL

FE_TS_ERR

R2614
100K

R2611
100
TU_I2C_FILTER
R2609-*1
MLG1005SR27JT

+3.3V_TU

TU2603
TDSN-G301D

NC

8
9

Close to TUNER

TU_T2/C

TU2602
TDSS-G101D

+3.3V_TU

THERMAL

12_T/C

FE_TS_VAL

RF_SWITCH_CTL

OPT
IC2601
74LVC1G08GW

OPT
R2627
0

GND

ADJ/SENSE

Vo=0.8*(1+R2/R1)

+1.23V_TU

FULL_NIM
R2633
12K
R2
1%

VOUT

NC_2

+B2[1.8V]

FULL_NIM
R2634
22K
1% R1

FULL_NIM
C2647
10uF
10V

FULL_NIM
C2645
0.1uF
16V

CVBS
NC_1
NC_2
NC_3
+B3[3.3V]

13_bushing_T/C

+B4[1.23V]

TU2602-*1
TDSS-G101D(B)

NC_4
GND
ERROR

SYNC

VALID

MCLK

D0

D1

D2

D3

D4

D5

10

D7
D8

11
B1

B1

A1

NC
RESET
SCL
SDA

+3.3V_TU

+3.3V_TU

L2606-*1
120OHM

+3.3V_Normal

+3.3V
SIF

DVB_T2
L2603
BLM18PG121SN1D

+1.8V

SUNLORD

+3.3V_T2_TU

L2606
CIS21J121

CVBS
IF_AGC
DIF[P]

C2630
0.1uF
16V

DVB_T2
C2631
10uF
10V

DVB_T2
C2633
0.1uF
16V

C2643
22uF
10V

C2644 SS
0.1uF
16V

C2646
22uF
10V

C2648
0.1uF
16V

DIF[N]
A1

12
SHIELD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

2013 S7LR2
TUNER

2012.11.12
26

LGE Internal Use Only

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