csE315.

02-Fall-2013,

MT

books and
GSM phones are notailowed. The lecture notes,
minutes'
110
is
duration
The
exam
given.
credit will be

L.
2.

calculators can be

Date: l4/17/1',3

used. All the answers must be clearly stated; otherwise

no partiol

which are not? Prove or disprove

are correct,
which of the flollowing statements in arbitrary Boolean algebra
+
1
+
KY
= [5 pts) c)Given the equations x+y= 1
your claim. a) if xy=l then x=y--I(5 pts) b) x'y' x'y

and',

y+2=g

find x,y,z. Is the solution unique?(5 pts)

point format. use 2-bit exponential' 2-bit mantissa and
convert the following numbers to the binary floating
multiply these numbers (B pts)'
sign bir [B pts). Use floating point multiplication to
Numberl=(3.75)ro and Numbel2 = [101'01)z'
a) Consider the switching circuit shown in the figure' The
function is logicl if the lamp is ON otherwise the

3.

Exam

output
is
output is logicO. Signal 'A' controls 3 switches' one
'B' and
normally open others are normally closed' Signal

any signal
signal 'C' controls 2 and 3 switches respectively' If
their
is in logicl position, the corresponding switches change
positions (on) off or off)on)'

a'Constructthetruthtablefortheoutputfunction.(1.0
pts

b.Obtain the Simplest eXpress10n for the function

c.Draw the Simplined switching circuit. 5

10

ptS)

pts

level AND OR implementation 10 ptS).

4.a)Minimize the fO110Wing function and draw the circuit using 2

F=BA+A'C +CB'
10 ptS

b)USe Only NOR gates tO implementthe function

C)USe Only NAND gates to implementthe function(10 ptS
d

WhiCh Ofthe fo1loWing CMOS Structures implements the F functioni explain your answer

15 pts

5.a.)Suppose that there is a inction which is deined as f=

.Il

is a 3-bit binary number.Design thc circuit as shown in the block

11[2:0

diagram at the right. Write the VerilogHDl module for the circuit.(1Opt)

b.) Another function is defined as f, = f + 2 .

Design the
circuit shown in the block diagram. Use the adder blocks and the
output of f function. Write the verilog code so that the result (O2)
should be displayed on output LEDs. The code should be divided
into two parts as follows: l. the submodule for adder part and 2.
the main module for fr function part. (15 pts)

01[2:0
02 3:01

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