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Advance computer architecture

Computer Architecture:
It is basically the higher-level or top-level functional view of the computer hardware.
Computer Architecture is study of the structure and behaviour of the various functional
modules of the digital computer as seen by the programmer and also how they interact
to provide the processing needs of the user.
Architecture includes the instruction formats, instruction
sets, and addressing modes.

Computer Organization:
Organization is basically the designer view of the computer hardware, i.e. as a designer,
one must know, how the different hardware elements are designed and implemented,
how they are interconnect, how they operate.
Organization includes- 1) Bus Org.

2) I/O and CPU interfacing

3) Memory Technology.

Von Neumann Architecture:


Von Neumann introduce the key concept of stored programs (i.e. programs and their
data were located in the same memory) in the first generation computer. A computer
could get its instruction by reading them from memory and also a program could be set
or altered depending on the memory values.
*** The limitation of Von Neumann concept, called as Bottlenecks of Von Neumann
concept. Those type of limitation were overcome by introduce and used Cache Memory.

Harvard Architecture:
Harvard Architecture is a computer architecture where the storage and signal pathways
for instruction and data are physically separated. So, CPU can read both instruction and
data simultaneously from the memory.

Difference between Von Neumann and Harvard Architecture:


Unlike Von Neumann architecture, in a Harvard Architecture, separate
memories are used to store instruction and data. Also Harvard Architecture-based
computer are faster than Von Neumann computers. But the circuitries used in the
Harvard Architecture computers are more complicated than their Von Neumann
counterparts.

Instruction Set:
Instruction Set is the set of instruction that a machine is able to execute. Each
particular machine has its own set of instructions i.e. an instruction set, which consists

of all the instruction used in that particular computer, varies from computer to computer
depending on the specific organization and architecture of the computer.
Instruction Format:
Instruction format deals whit the looks of basic instruction
Each instruction has three parts. These are i) op-code ii) addressing mode
iii) address
Op-code- Op-code is the operation code that indicates the specific operation to be
carried out by the instruction.

There are three types of CPU organization1) Single Accumulator Org.


2) General Register Org.
3) Stack Org.
Depended upon the length of instruction, there are four type of address
instruction-

1)
2)
3)
4)

Three address inst.


Two address inst.
One address inst.
Zero address inst.

Three-Address Instruction- In this type of instruction, all operand address are


explicitly defined. Here the instruction format has three different address fields
specifying a memory or a processor register operand.
Example- ADD R1, C, B => R1 <- M[C] + M[B]

Two-Address Instruction- Here the instruction format has two different


address fields, each specifying either a memory or a processor register operand.
Example- ADD X, Y => M[x] <- M[X] + M[Y]

One-Address Instruction- Such Instruction format has a single explicit


address field and used an implied accumulator (AC) register for all data manipulation.
Example- ADD X => AC <- AC + M[X]
Zero-Address Instruction- Such instructions do not contain any explicit
address. The operands are store in a pushdown stack (the operand required must be
there in the top position in the stack), hence no address are required.
Example- ADD => TOS <- X + Y

(here TOS means Top of Stack)

Effective Address: Effective address means the actual address of the operands.

Difference Types of Addressing Modes:


(i)

Implied Mode- In this mode the operands are specified implicitly in the

(ii)

definition of the instruction. Operands need not be specified explicitly.


Immediate Mode- This is the simplest form of addressing mode in which the
operand is itself specified in the instruction operation field. Here the operand

(iii)

value is a constant.
Register Mode or Register Direct Mode- In this mode the operands reside
in the register that reside within the CPU i.e. the operands reside directly in

(iv)

the CPU registers.


Register Indirect Mode- In this mode the instruction specifies a register in
the CPU whose contents give the address of the operand in memory.

(v)

Direct Address Mode- In this mode, the effective address of the operand is
equal to the address part of the instruction i.e. the address part of the
instruction indicate the memory location containing the operand.

(vi)

Indirect Address Mode- In this address field of the instruction gives the
address where the effective address is stored in memory i.e. the address part
of the of the instruction indicates the memory location whose content is the

(vii)

address of the memory location containing the actual operands.


Relative Address Mode- In this mode the content of the CPU register is
added to the address part of the instruction to obtain the actual address of

(viii)

the operand (i.e. the effective address).


Indexed Address Mode- In this mode the content of the index register is
added to the address part of the instruction to obtain the actual address of
the operand (i.e. the effective address).

(ix)

Base Register Address Mode- In this mode the content of the base register
is added to the address part of the instruction to obtain the actual address of
the operand (i.e. the effective address).

(x)

Stack Addressing Mode- Here the address of the operand is specified by the
stack pointer (SP). The length of the instruction is the shortest as it does not
include any address of the memory location or mention any register. After
each stack operation, the contents of the SP are automatically incremented or
decremented. PUSH and POP are two commonly used instruction of this type.

Different Categories of Instruction:


(i)

Arithmetic, Logical and Shift Instruction The instruction of the


category deal with all sorts of computational capability for arithmetic, logical
and shifting operations. Example-MUL B

(ii)

Instructions for moving information (data) to and from memory and


processor registers- As most computer information is stored in memory,
they must be fetched from there and brought to the processor registers, where
all the computations are done. So the above type of instructions move the
information between the memory and the processor registers. Example- ADD

(iii)

B
Program Control and Status Checking Instructions- Program Control
instructions (like branch instruction) change the program execution sequence.
Example- JMP NZ (Jump if not zero). Status checking instructions monitors
the status of the flag for a condition and checks whether the condition is true
or false. If true then some operation is performed and if false then some other
operation performed.

(iv)

Input-output Instructions- Such instructions are needed for


communication between the computer and the user through input-output
devices. Example- IN(input) and OUT (output) instruction transfer
information between the computer and external devices.

Reduced Instruction Set Computer (RISC)- Such computers have very less
number of instructions in the instruction set and hence can be executed much faster
within the CPU, almost without having to use memory as often.
The Characteristics of RISC are:
(a) Very simple and less number of instructions in the instruction set.
(b) Few addressing modes.

(c)
(d)
(e)
(f)
(g)
(h)

Execution of instruction occurs in a single cycle.


Hardware Control Unit.
Memory access limited to load and store instruction.
All operations are performed within the CPU register.
Fixed-length instruction format that can be easily decoded.
CPU contains large number of registers than CISC.

Complex Instruction Set Computer (CISC) - Computer belonging to CISC


category have large number of instructions in the instruction set.
The Characteristics of CISC are:
(a) Large number of instructions in the instruction set (rages from 100 to
almost 250 inst.).
(b) There are instructions that perform certain specific tasks are not
frequently.
(c) Variable length instruction format.
(d) Large variety of addressing modes (range from 5 to 20).
(e) Instructions that manipulates operands in memory.
Arithmetic Logic Unit (ALU) Design
Different types of design of arithmetic unit:
1.
2.
3.
4.
5.
6.

Adder
Adder Subtractor Unit
Arithmetic Unit
Logical Unit
Increment Unit
Decrement Unit

Adder:
There are two types of adder. These are- a) Serial Adder, b)Parallel Adder.
Serial Adder- Serial adder is a binary adder that adds the two numbers bit-pair wise.
Each bit-pair are added in a single clock pulse. The carry of each pair is propagated to
the next pair.

Parallel Adder- Parallel adder is two types, one Carry propagate adder/Ripple carry
adder and another is Carry Look-ahead adder.
Carry propagate adder- Binary adder is the digital circuit that generates the arithmetic
sum of two binary numbers of any lengths. Multiple cascaded full adder circuits
constitute a binary adder. The output carry from one full-adder is connected to the input
carry of the next higher order full-adder and so on.

Carry Look-ahead adder- This is very fast adder circuit which speeds up the generation
of carry signals by using the same (almost) logic as that of parallel adders. The logic
expressions for sum (si) and carry-out (ci) of stage i are:
si = Ai + Bi + ci

and

ci+1 = AiBi + Aici + Bici


=AiBi + (Ai +Bi)ci = Gi + Pici

where Gi = AiBi and Pi = Ai + Bi

The expression Gi and Pi are called generate and propagate function of stage i
respectively.

Adder Subtractor Unit:


The subtraction of binary numbers can be done most conveniently by means of
complements. The subtraction A B can be done by taking the 2s complement of B and
adding to A. The 2s complement can be obtained by taking 1s complement and adding
with one. The 1s complement can be implemented with inverters and a one can be
added to the sum through the input carry. The addition and subtraction operations can
be combined into one common circuit by including an X-OR gate with each full-adder.

Arithmetic Unit:
The basic component of an arithmetic circuit is the parallel adder. By controlling the
data inputs to the adder, it is possible to obtain different types of arithmetic operations.
The output of the binary adder is calculated from the following arithmetic sum:
D = A + Y + Cin

Where A is the 4-bit binary number at the X inputs and Y is the 4-bt binary number at
the Y inputs of the binary adder. Cin is the input carry, which can be equal to 0 or 1.
Here + sign is arithmetic plus.

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