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General and Simplified Computation of Fault


Flow and Contribution of Distributed Sources in
Unbalanced Distribution Networks
Ilhan Kocar, Member, IEEE, Jean-Sbastien Lacroix, Francis Therrien

AbstractIn this paper, the application of a comprehensive


augmented nodal matrix formulation to the multiphase fault
analysis of unbalanced distribution systems is demonstrated. The
solution technique results in a sparse matrix which can be
rapidly solved by employing sparse LU factorization algorithms.
The augmented matrix fully respects the actual circuit
components of distribution systems and eliminates the necessity
of pre- and post-processing in the implementation of the
algorithm. For example, protective devices that exist in the
network are not eliminated but they are represented with benign
switches in the matrix. Network devices including transmission
lines, cables and transformers can all be modeled in phase
domain with their respective physical quantities. The fault
conditions including short circuit and open conductor faults are
represented with switches by adding the switch equations to the
bottom of the augmented matrix which has a dynamic allocation
structure. Although the presented solution is of general nature
and can encompass networks from transmission level to meshed
secondary distribution grids, the examples are rather
concentrated on distribution systems where multiphase analysis
is more common and desirable due to unbalanced network
components.
Index Terms Power system analysis, power distribution
systems, short circuit currents, unbalanced networks, matrix
methods, multiphase analysis, fault flow

I. INTRODUCTION

HE accuracy of distribution engineering simulation tools


has a direct impact on the reliable operation of
distribution systems and optimization of asset utilization.
Increased interest in energy efficiency, integration of
distributed generation and smart grid initiatives introduce
several challenges in distribution system analysis. Distribution
engineering tools are continuously improved in order to
provide more accurate simulation platforms, handle more
devices and minimize the assumptions on the circuit
configuration. Therefore it is of interest to introduce general
approaches and generic modeling capabilities based directly
on the actual circuit of the network.
The computation of short circuit currents based on classical
sequence networks may bring completely wrong results in
I. Kocar is with cole Polytechnique de Montral, QC, Canada; e-mail:
ilhan.kocar@ polymtl.ca.
J.S. Lacroix, is with CYME International T&D, Saint-Bruno, QC, Canada.
Francis Therrien is with University of British Columbia, BC, Canada.

978-1-4673-2729-9/12/$31.00 2012 IEEE

distribution systems. Although there is no established standard


urging the computation of short circuit currents in phase
domain, there has been a surge of interest in three-phase
(multiphase) analysis recently because of the interest in
connecting distributed generation to the unbalanced
distribution system [1]. It is important to consider the
contribution of distributed sources to fault currents in order to
assure reliable operation of distribution systems and provide
adequate protection strategies.
The compensation method allows using the bus admittance
matrix in order to compute short circuit currents in sequence
domain [2]-[5]. A post processing is necessary though to
compute source contributions and protective device currents.
In [6], the bus admittance matrix formulation is applied to
short circuit analysis of multiphase distribution systems. The
backward forward sweep technique is also applied to compute
short circuit currents and post fault conditions of multiphase
distribution systems [7]-[8]. In addition, the topological
particularities of primary distribution networks can be
exploited and an equivalent three phase impedance matrix can
be computed by propagating the impedance quantities in order
to compute short circuit currents [9]-[10]. In [11] some
relationship matrices are developed in order to account for
weakly meshed distribution systems.
In this paper, a general multiphase short circuit analysis
technique capable of returning short circuit currents along
with the currents through protective devices and transformer
windings, the contribution of all sources including distributed
generation (DG) and the post fault voltage conditions in the
network, by just solving a single system of equations, is
presented. Such an output is also useful for protection
coordination studies. Although the resulting system of
equations yields a larger matrix than the classical nodal
admittance matrix, it does not require pre- and postprocessing. In addition, the LU factorization and solution of
the resulting matrix does not bring significant overhead when
compared against the classical nodal admittance matrix.
The system of equations is built by addressing modified
augmented nodal analysis (MANA) approach in [12] and
results in a sparse matrix that can be rapidly solved by using
sparse LU factorization algorithms. It is demonstrated that
short circuit conditions can be represented with switches in
the system matrix, and, this representation holds for any type

2
and number of simultaneous shunt faults. The approach is also
valid for handling series faults which may be of special
interest in distribution systems when network conditions are to
be studied in case of unbalanced failure of protective devices.
II. BACKGROUND
It is helpful first to review the essential elements of the
augmented matrix.
The classical nodal analysis formulation which can be
found in many textbooks is of the form
YV =I
(1)
where Y is the nodal admittance matrix (Y bus), V is the
vector of node voltages and I is a vector containing
independent current sources.
As indicated in [13], voltage sources, transformers,
switches and dependent sources do not enter into nodal
analysis in a natural way and have to be transformed using a
variety of algorithms such as Nortons theorem, to get the
equations into suitable form (note that ideal voltage sources
and
transformers
cannot
be
transformed).
Such
transformations result invariably in loss of information
because physically connected nodes are reduced in number.
The modified nodal analysis (MNA) formulated in the mid1970s extended the classical nodal analysis formulation by
adding constraint equations for voltage sources which
eliminated the transformation of sources and provided source
currents without post-processing [14]. It has been
subsequently developed since for the analysis of analog filters
and the simulation of electronic circuits. It is used in modern
simulation packages such as PSPICE.
The modified augmented nodal analysis (MANA) expands
the classical admittance matrix formulation by augmenting the
admittance matrix equations with additional and arbitrary
device equations [15]. As opposed to the classical nodal
analysis, MANA allows ideal branch dependency relations for
transformers, and voltage sources and ideal switches are
handled in a straightforward manner. It is used in EMTP-RV
software [16]. MANA has several advantages over classical
nodal analysis such as ease of diakoptics (network
partitioning), juxtaposition of arbitrary device objects in the
matrix equation and elimination of pre- post- processing for
the computation of branch currents for key elements such as
voltage sources and ideal switches. These attractive features
are very useful in professional software applications.
The classical nodal analysis does not allow to model
lossless protective devices or switches, therefore a given
actual network is mapped to another network by eliminating
switches or by replacing them with small sections which may
result in numerical problems in post-processing. Following the
solution of the system, the currents of protective devices are
computed via post processing. In this paper protective devices
in the network are represented with ideal switches by
addressing augmented matrix techniques. The augmented
matrix approach is further improved to account for ideal
parallel switches which may be encountered in distribution

systems.
In this study, the application of augmented matrix to short
circuit analysis of distribution systems will be demonstrated
with examples. It is proposed to represent short circuit
conditions with switches by adding extra equations to the
bottom of the augmented matrix. The augmented matrix will
be further developed in order to account for certain
topological particularities in distribution systems. The idea is
to represent the system without eliminating any node or
equipment.
A. Augmented Matrix Formulation
Within the context of short circuit analysis the following
augmented matrix formulation is used [12]:
t
t
Yn
Vadj
Dbdepc Sadj
Vn I n

0
0
0 I Vs Vs
Vadj

(2)

=0
I
D
0
0
0
V
bdepr
d
S
0
0
S z I SW 0
adj
or
Ax = b
Yn is the linear network admittance,

(3)

Vadj is the voltage source adjacency matrix, for all voltage

source types,
Dbdepr and Dbdepc (row and column contribution matrices)
are used for holding branch dependent relations (for
transformers),
Sadj is the adjacency matrix of closed switch type devices,
S z is a diagonal and unitary matrix for open switch type

devices. In this paper, it will also be used to accommodate


switch impedances in short circuit computations and parallel
switches.
Vn is the vector of unknown node voltages,
I Vs is the vector of unknown voltage source currents,

I Vd is the vector of unknown currents in dependent voltage

source branches (such as transformer winding currents),


I SW is the vector of unknown switch currents
I n is the vector of known nodal current injections,
Vs is the vector of known voltages

The ground node is numbered as 0 and not used in the


system.
This is an augmented formulation which is keeping only the
Y part from (1). Equation (2) can be viewed as a generic
Ax=b system.
The equations for voltage sources and branch dependent
relations are as given in [12] but will be briefly reviewed here
for the sake of integrity of the paper. For a complete example
on a three phase transformer readers are referred to [17]. The
switch equations, however, are further improved in order to
account for parallel switches. This is especially useful for
representing parallel fuses connected in between the same

3
nodes. Distribution engineering tools usually come with
integrated protection coordination tools and it is practical to
identify the current passing through a fuse without postprocessing and transfer the output to coordination module as
is. The switch equations are also reviewed here including the
contribution.
1) Independent Voltage Sources
If a voltage source is connected between any nodes k and
m, then
v k v m = vs
(4)

interlaced center-tapped transformer when the nodes m2 and


k3 are interlaced. This transformer is very common in North
American distributions systems and it will be used later in the
modeling of IEEE 8500-node test feeder. It is obvious that
the augmented matrix formulation can easily handle arbitrary
transformer connections. The leakage and magnetization
branches can be simply connected to the ports.
k2

k1

where vs Vs . This places a 1 in column k and a 1 in


column m of the voltage source equation line in Vadj . If the
k3

voltage source is numbered as q in the list of voltage sources,


then
(5)
Vadj (q, k) = 1
Vadj (q, m) = 1

(6)

t
Vadj
(k, q) = 1

(7)

t
Vadj
(m, q) = 1

(8)

Vs (q) = vs

(9)

Equations (5) and (6) are used to account for the voltage
source relation (4). Equations (7) and (8) stand for the sum of
currents exiting nodes k and m.
2) Ideal Transformer Model
A three winding ideal transformer as shown in Fig. 1 can be
represented with the circuit given in Fig. 2. It consists of two
dependent voltage sources (secondary) and a dependent
current source (primary). It could be also modeled the other
way around; here the idea is to relate voltage and current
quantities between primary and secondary windings. Its
equations are
v k2 v m2 g 2 v k1 + g 2 v m1 = 0
(10)
v k3 v m3 g 3 v k1 + g3 v m1 = 0
where g is the transformation ratio.
If ideal transformer windings are numbered as q and p in
the list of dependent branch functions, then the contribution
for device q is
D bdepr (q, k 2 ) = 1
D bdepr (q, m 2 ) = 1

(11)

D bdepr (q, k1 ) = g2

-g2 ik2m2 g3 ik3m3

m1

k2

g2(vk1 - vm1)

ik3m3

m2
k3

g3(vk1 - vm1)
m3
Fig. 2 Three winding transformer model

3) Switches
If a switch is connected between two arbitrary nodes k and
m, then if the switch is closed vk vm = 0 and it is needed to
use a 1 in column k and a 1 in column m of the switch
equation line in Sadj . For the switch numbered q in the list of

switches:
Sadj (q, k ) = 1 Sadj (q, m) = 1
t
t
Sadj
(k , q ) = 1 Sadj
(m, q) = 1

(13)

When the switch is open, its current is zero:


Sadj (q, k ) = 0 Sadj (q, m) = 0

and
D bdepc (k 2 , q) = 1
D bdepc (k1 , q) = g2

ik2m2
k1

S z ( q, q ) = 0

D bdepr (q, m1 ) = g2

D bdepc (m 2 , q) = 1

Fig. 1 Three winding transformer (or center-tapped)

t
t
Sadj
(k , q ) = 0 Sadj
(m, q) = 0

(12)

D bdepc (m1 , q) = g2

The contribution of device p is written in a similar manner.


Such a representation automatically accounts for any multiwinding case. This example is given since it becomes an ideal

(14)

S z ( q, q ) = 1

If there are n ideal parallel closed switches as shown in Fig.


3 connected between arbitrary nodes k and m, numbered from
q to q+n-1, then for the switch numbered q in the list of
switches

4
Sadj (q, k ) = 1
Sadj (q, m) = 1
t
Sadj
(k , q) = 1

(15)

t
Sadj
(m, q) = 1

S z ( q, q ) = 1
S z (q, x) = 1/ (n 1) : x {q + 1,K , q + n 1}

Here it is assumed that the current is evenly split between each


parallel switch. The equations will be similar for other
switches in the group. Note that the diagonal elements in S z
are equal to 1 where off diagonal elements are equal to
1/ (n 1) for the n ideal switches connected in parallel.

SW2
+

SW3
+
SW4
+

Fig. 3 Parallel Switches

All voltage sources carry an ordering number in the list of


voltage sources. The same reasoning applies to all ideal switch
models.
Switches are entered at the bottom of A to allow easy
reformulation for topological changes.
III. IMPLEMENTATION PROCEDURE
A. How to use Augmented Matrix for Fault Studies
The above formulation (2) allows solving the power system
in steady-state using the actual multi-phase circuit. There are
no sequence networks or assumptions on the network
topology. Line couplings and shunt magnetizing currents are
fully accounted. Steady state short circuit currents can be
directly evaluated by using (2) after converting the circuit into
its linear equivalent based on load flow results or nominal
quantities. The procedure is as follows:
Substations are replaced by ideal sources behind short
circuit impedance.
Balanced or unbalanced loads are modeled using
constant impedance calculated at operating voltage.
All control equipments (voltage regulators, LTCs,
switched capacitors) are set to their pre-fault values.
Protective devices are represented with switches.
The procedure for equivalent linear circuit derivation is
very similar to that of conventional short circuit methodology,
however the formulation is multiphase. The use of
conventional methodology is very common among North
American distribution utilities since it allows taking into
account the operating voltages and pre-fault load currents
which may become comparable to the fault currents at distant

laterals. IEC and AINSI/IEEE standards do not consider prefault load currents [18]-[20].
If the circuit is converted to its linear equivalent using load
flow results, the solution of (2) should still produce load-flow
results. The fault condition can then be represented by
additional switches with or without impedances depending on
the fault condition. Since the switches are entered at the
bottom of the augmented matrix A, this modification is simple
to manage. By solving the MANA formulation actual postfault voltages are computed in addition to switch currents and
source currents.
B. Solution of a Simple System
Fig. 4 shows a 6-node single phase system where a short
circuit is applied to node 6 by using a switch. The transformer
is an ideal interlaced center tapped transformer with a ratio of
120V/7.2kV modeled using the configuration in Fig. 2 (note
that nodes m1, m2 and k3 are grounded and not used in the
system). It is straightforward to add core losses and
magnetization branch. The A matrix can be obtained by
juxtaposition of the following sub-matrices:
Yn (1,1) = 5 j 5
Yn (1, 2) = 5 + j 5
Yn (2,1) = 5 + j 5

Yn (2, 2) = 5 j 5

Yn (3,3) = 5 j 5

Yn (3, 6) = 5 + j 5

Yn (4, 4) = 10 j10 Yn (4,5) = 10 + j10

(16)

Yn (5, 4) = 10 + j10 Yn (5,5) = 11 j10


Yn (6,3) = 5 + j 5

Yn (6, 6) = 5.5 j 5

Vadj (1,1) = 1
Dbdepr (1, 2) = 0.0166
Dbdepr (1,3) = 1
Dbdepr (2, 2) = 0.0166

(17)

Dbdepr (2, 4) = 1
Sadj (1, 6) = 1
S z (1,1) = 0

The unity of Yn elements is in Ohms. The other sub-matrices


have no units. The 10 by 1 b vector is given as follows
b(7,1) = 7200
(18)
Note that the solution of Ax=b brings the voltage phasors,
voltage source current, transformer currents (represented with
dependent voltage source and current source as in Fig. 2) and
switch current (i.e. short circuit current).
It is considered that the proposed algorithm will bring
efficiency in studies where the impact of distributed sources
are analyzed, since it directly provides the source currents
and generates the necessary quantities for protection
coordination by just solving one system of equations.
Note that In Section III. D. below, the accommodation of
distributed resource technologies in the augmented matrix will
also be discussed.

5
Single phase short circuit
7.21kV
Tr0_1
7.21
p+

p-

s1
120 s2+

7.2kVRMS /_0
AC1

+
0.1,0.1Ohm

Ideal
s2
transf ormer

0.1,0.1Ohm

RL2

120 s1+

RL1

SW1

R2

+
0.05,0.05Ohm
RL3

+
1

R1

Fig. 4 Single phase example demonstrating short circuit representation

C. Representation of Fault Condition with Switches


Let us consider a LLL to ground fault applied to arbitrary
nodes numbered as {a,b,c} as shown in Fig. 5. The fault is
represented with three closed switches and fault impedance is
explicitly represented which becomes important if the network
is not balanced. If the switches are numbered as p, q and r; the
following three equations can be added to the bottom of A.
Va Z p iswp Z f (iswp + iswq + iswr ) = 0
Vb Z q iswq Z f (iswp + iswq + iswr ) = 0

(19)

Vc Z r iswr Z f (iswp + iswq + iswr ) = 0

For the switch q, the corresponding sub-matrices take the


following form
(20)
S adj (q, b) = 1
S z ( q, q ) = Z f Z q

(21)

S z ( q, p ) = Z f

(22)

S z ( q, r ) = Z f

(23)

It is straightforward to extend the idea to conventional


categories of faults, i.e., single-phase-to-ground, phase-tophase, double-phase-to-ground, bolted-three-phase, and opencircuit.
Open faults due to protective device failures are not
demanding either. It is sufficient to change the status of the
corresponding switch from closed to open. In fact, it is
possible to combine any number of any kinds of fault by
adding any number of switches.

Zr

+
Zf

Fig. 5 Representation of LLLG fault

RLC +

Zq

r
RLC +

Zp

q
RLC +

a
b
c

D. Electronically Coupled Generators


There are several distributed resource technologies
available; however the behavior of the DG is related to the
electrical converter it uses. Three types of electrical converters
can be considered when short circuit currents are evaluated:
synchronous generators, asynchronous generators (including
doubly-fed) and electrical inverters or electronically coupled
generators (ECG). Unlike the case for synchronous and
asynchronous machines, the modeling of ECG in fault studies
has not been fully identified. Short circuit standards do not
treat ECG [18]-[20].
If an inverter is designed as self-commuted, it can usually
supply fault current for an extended time. ECG units can limit
the fault current to about 100% to 200% of normal load
current. ECG unit can also instantaneously trip once it detects
a short circuit current above a certain predefined limit [21].
The power electronics and control topology involved have an
effect on fault contribution; consequently two PV arrays of
similar power ratings may have completely different grid
interface. But still, a few generalizations can be made. First, it
can be assumed that the DC link voltage stays constant before
and after the fault [22]. In addition, since the transient
response of ECG is very quick, for conventional short-circuit
analysis it can be assumed that the subtransient, transient and
steady state ECG fault contributions will stay the same.
The modeling of ECG in (2) as a constant voltage source
behind internal impedance or as a constant current source is
straightforward. However, if the ECG is considered to provide
constant P and Q during fault conditions due to its quick
transient response, then iterative solution of (2) may be
required for remote enough faults. In [23], two models are
suggested: a current source for the maximum permitted value
for near faults and a constant PQ source for remote faults.

IV. EXAMPLES
Fig. 6 illustrates the IEEE 13 node distribution test feeder
as published in [24]. This system is small but it provides a
good test system since it includes transmission lines and
underground cables with variety of phasing and unbalanced
loading. These features are sufficient to demonstrate the
importance of multiphase solutions. It is noted here that, the
published load flow solution does not take into account the
substation impedance.
Fig. 7 illustrates the electrical network of the same system.
Multiphase short circuit currents are computed with the
proposed procedure described in Section III. A. The
substation impedance is ignored in multiphase load flow and
short circuit analysis. If it is assumed that the positive
sequence voltage or the voltage of a given phase at the
terminals of the substation is maintained at a fixed value then
substation impedance can be modeled as internal impedance
in a similar way that internal impedances of synchronous
machines are modeled. In this case load flow results will be
slightly different; however short circuit currents will be
reduced considerably and will be more realistic.

6
the impedance of a branch is close to machine accuracy it is
also possible to represent this branch with a switch.

650
646

645

632

633

634

TABLE I
LG SHORT CIRCUIT CURRENTS*, IEEE 13 NODE
Node/Phase

611

684

652

671

692

675

680

Fig. 6 IEEE 13 Node Feeder

Conventional
(Sequence Approximation)
2328

680 a
2478
680 b
2485
652 a
2221
2321
611 c
2348
2411
684 c
2602
2693
671 a
2910
3141
646 b
3521
3716
645 b
4148
4401
632 a
5820
6328
632 b
6218
633 a
4419
4754
634 a
15639
16403
* Substation impedance ignored.
TABLE II
LL SHORT CIRCUIT CURRENTS*, IEEE 13 NODE
Node

Conventional
(Sequence Approximation)
3510
3828
4387
4791
5818
8774

680 ab
684 ac
671 ab
646 bc
645 bc
632 ab
632 bc
632 ca
633 ab
6417
634 ab
16197
* Substation impedance ignored.

Fig. 7 IEEE 13 Bus Electrical Schema

Table I and Table II tabulate the short circuit currents with


respect to location calculated by using conventional technique
and multiphase analysis. As expected, significant mismatch is
observed due to the unbalanced nature of the system. Ignoring
the unbalance is misleading. The small letters next to the node
numbers indicate the phases upon which short circuit is
applied in multiphase analysis. In conventional analysis such a
distinction does not exist. For line-to-line faults, as it can be
seen at node 632, short circuit currents can be quite different
from one another for a particular phase pair. The substation
impedance is not considered in the calculations.
The utility distribution system engineers are interested in
the currents passing through protective devices within the
context of protection coordination studies. After calculating
the short circuit current by classical compensation techniques
or impedance matrix based methods, it is possible to obtain
first the new voltage quantities in the network and then branch
currents by dividing the voltage differences in between nodes
with simple branch impedances. However, since some branch
impedances may be too small in distribution systems it is
possible to encounter numerical problems and mislead the
user. The solution method proposed in this paper can handle
ideal branches once they are equipped with a switch. When

Multiphase

Multiphase
4053
3957
5107
4820
5815
10302
8596
9231
7221
17103

A. Performance Examples
The IEEE 8500-node shown in Fig. 8 is available through
web [25] since 2010. It is relatively a large network that can
be used to evaluate the overhead of the proposed solution as
compared to the multiphase nodal admittance matrix.
When built in OpenDSS this system results in an 8558 by
8558 nodal admittance matrix. The number of nonzero
elements is 46298. In order to find the steady state fault
conditions by using the classical nodal admittance
formulation, the following solution steps are necessary:
1. LU factorization of the nodal admittance matrix.
2. Three-phase Thevenin impedance evaluation at fault
location by current injection method (Consecutive solution of
LU system depending on the number of phases).
3. Computation of short circuit currents using Thevenin
equivalent.
4. Network voltage solution by injecting short circuit
currents.
5. Further post processing for evaluating source
contribution and protective device branch currents.
The augmented matrix implementation yields a 14443 by
14443 matrix. The number of nonzero elements is 64313. The
difference in size with respect to the classical nodal
admittance matrix is significant since several additional nodes
and equations are introduced due to large number of service
transformers. On the other hand, the steady state fault

7
conditions along with source contributions and physical
transformer winding currents are evaluated directly. When
classical nodal analysis is used, the computation of
transformer winding currents is not straightforward and it is
usually a source of error and irritation.
Both matrices are factorized in MATLAB and solved for a
specific fault condition. The LU factorization of classical
matrix takes around 0.03 sec where it takes around 0.04 sec
for the augmented matrix on a ThinkPad T510 laptop by using
the built-in sparse matrix package in MATLAB. After the
execution of factorization, the full solution of the Ax=b
system takes slightly longer for the augmented matrix (0.7 ms
against 0.6 ms); however these overheads are compensated by
avoiding pre- and post-processing. If direct Gaussian
elimination is used without applying an ordering scheme then
the factorization of the augmented matrix is faster. However
the LU factorization will take a lot longer for both cases.
Fig. 9 and Fig. 10 help visualize the sparsity patterns for the
augmented and classical nodal admittance matrices
respectively. The augmented matrix is sparser but has more
elements. The secondary transformers leakage and shunt
impedances are represented with RLC devices, and, since
RLC devices are stacked first in the matrix, the upper left
region of the matrix is very sparse. Then the elements
corresponding to the primary and secondary lines can be
visualized which are modeled with multiphase PI devices.
Afterwards, voltage source equations, dependent branch
equations and switch equations are consecutively placed.
Table III presents a summary on network devices.
TABLE III
SUMMARY ON NETWORK DEVICES
Name
Independent Voltage Source
Ideal Transformer Unit
RLC Unit
PI Unit
Load

Number
3
2369
5906
3698
2354

Number of Phases

6156

0
2000
4000

6000
8000

10000
12000
14000
0

2000

4000

6000
8000
nz = 61875

10000 12000 14000

Fig. 9 Sparsity pattern of the augmented matrix of the IEEE 8500 Node Test
System

V. CONCLUSIONS
The following conclusions can be drawn:
1. The modified augmented nodal analysis technique can be
easily applied to the multiphase short circuit analysis of
unbalanced distribution systems.
2. When steady state network conditions are to be studied
following a fault condition, the MANA formulation provides
the desired output in one step and eliminates the need for preand post-processing.
3. The overhead in the solution time of the matrix generated
by using MANA formulation compared to the one generated
by using classical nodal analysis formulation is not significant
and it is over compensated by several other advantages.
4. The treatment of multi-winding transformers, sources, ideal
switches/lossless elements and dependent sources is
straightforward in MANA.
0
1000
2000
3000
4000
5000
6000
7000
8000
0

Fig. 8 IEEE 8500 Node Distribution Test System

1000 2000 3000 4000 5000 6000 7000 8000


nz = 46298

Fig. 10 Sparsity pattern of the classical nodal admittance matrix of the IEEE
8500 Node Test System

8
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[4]

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[25] [Online]. Available: http://sourceforge.net/projects/electricdss/
Ilhan Kocar (M2004) received the B.Sc. and M.Sc. degrees in electrical
and electronics engineering from Orta Dogu Teknik Universitesi, Ankara,
Turkey in 1998 and 2003 respectively and the Ph.D. degree in electrical
engineering from cole Polytechnique de Montral (affiliated with Universit
de Montral), QC, Canada in 2009.
He worked as a Project Engineer for Aselsan Electronics Inc. in between
1998 and 2004. He worked as an R&D Engineer for CYME International
T&D part of Cooper Power Systems in between 2009 and 2011. He joined the
faculty at cole Polytechnique de Montral in 2011. His research interests are
power system analysis, modeling and simulation.
Jean-Sbastien Lacroix received the B.Sc. degree from the department of
Electrical Engineering at cole Polytechnique de Montral. He is currently
working towards the M.Sc. degree developing a multi-phase fault analysis
engine.
He is currently working as an R&D Project Manager at CYME
International T&D. His research interests are power system analysis, modeling
and simulation.
Francis Therrien received the B.Eng. degree in electrical engineering
from Universit de Sherbrooke, Canada, in 2010. He worked as an R&D
engineer for CYME International T&D in 2011. He is currently pursuing a
M.A.Sc. degree in electrical engineering at University of British Columbia,
Vancouver, Canada. His research interests are modeling and simulation of
power systems and electrical machines.

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