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STUDY MATERIAL

ELECTRIC CIRCUIT AND ELECTRON


DEVICES
DEPARTMENT OF ECE, CSE, IT & Bio-Medical

Feb – 2010

R S

Vel Tech
Vel Tech Multi Tech Dr.Rangarajan Dr.Sakunthala Engineering College
Vel Tech High Tech Dr. Rangarajan Dr.Sakunthala Engineering College

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SEM - II

INDEX

UNITS PAGE NO.

I. CIRCUIT ANALYSIS TECHNIQUES 06

II. TRANSIENT RESONANCE IN RLC CIRCUITS 55

III. SEMICONDUCTOR DIODES 129

IV. TRANSISTORS 180

V. SPECIAL SEMICONDUCTOR DEVICES 204

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# 42 & 60, Avadi – Veltech Road, Avadi, Chennai – 62.

Phone : 044 26840603 email : veltech@vsnl.com


26841601 website : www.vel-tech.org
26840766 www.veltechuniv.edu.in
R S

 Student Strength of Vel Tech increased from 413 to 10579, between 1997 and 2010.
 Our heartfelt gratitude to AICTE for sanctioning highest number of seats and highest number of courses for the
academic year 2009 – 2010 in Tamil Nadu, India.
 Consistent success on academic performance by achieving 97% - 100% in University examination results during
the past 4 academic years.
 Tie-up with Oracle Corporation for conducting training programmes & qualifying our students for International
Certifications.
 Permission obtained to start Cisco Networking Academy Programmes in our College campus.
 Satyam Ventures R&D Centre located in Vel Tech Engineering College premises.
 Signed MOU with FL Smidth for placements, Project and Training.
 Signed MOU with British Council for Promotion of High Proficiency in Business English, of the University of
Cambridge, UK (BEC).
 Signed MOU with NASSCOM.
 MOU’s currently in process is with Vijay Electrical and One London University.
 Signed MOU with INVICTUS TECHNOLOGY for projects & Placements.
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VELTECH, VEL TECH MULTI TECH engineering colleges Accredited by TCS


VEL TECH, VEL TECH MULTI TECH, VEL TECH HIGH TECH, engineering colleges & VEL SRI RANGA SANKU
(ARTS & SCIENCE) Accredited by CTS.

Companies Such as TCS, INFOSYS TECHNOLOGIES, IBM, WIPRO TECHNOLOGIES, KEANE SOFTWARE & T
INFOTECH, ACCENTURE, HCL TECHNOLOGIES, TCE Consulting Engineers, SIEMENS, BIRLASOFT,
MPHASIS(EDS), APOLLO HOSPITALS, CLAYTON, ASHOK LEYLAND, IDEA AE & E, SATYAM VENTURES,
UNITED ENGINEERS, ETA-ASCON, CARBORANDUM UNIVERSAL, CIPLA, FUTURE GROUP, DELPHI-TVS
DIESEL SYSTEMS, ICICI PRULIFE, ICICI LOMBARD, HWASHIN, HYUNDAI, TATA CHEMICAL LTD, RECKITT
BENKIZER, MURUGAPPA GROUP, POLARIS, FOXCONN, LIONBRIDGE, USHA FIRE SAFETY, MALCO,
YOUTELECOM, HONEYWELL, MANDOBRAKES, DEXTERITY, HEXAWARE, TEMENOS, RBS, NAVIA MARKETS,
EUREKHA FORBES, RELIANCE INFOCOMM, NUMERIC POWER SYSTEMS, ORCHID CHEMICALS, JEEVAN
DIESEL, AMALGAMATION CLUTCH VALEO, SAINT GOBAIN, SONA GROUP, NOKIA, NICHOLAS PHARIMAL,
SKH METALS, ASIA MOTOR WORKS, PEROT, BRITANNIA, YOKAGAWA FED BY, JEEVAN DIESEL visit our
campus annually to recruit our final year Engineering, Diploma, Medical and Management Students.

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Preface to the First Edition

This edition is a sincere and co-ordinated effort which we hope has made a

great difference in the quality of the material. “Giving the best to the students,

making optimum use of available technical facilities & intellectual strength” has

always been the motto of our institutions. In this edition the best staff across the

group of colleges has been chosen to develop specific units. Hence the material, as a

whole is the merge of the intellectual capacities of our faculties across the group of

Institutions. 45 to 60, two mark questions and 15 to 20, sixteen mark questions for

each unit are available in this material.

Prepared By : Ms. S. Santhana Lakshmi.

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EC2151 ELECTRIC CIRCUITS AND ELECTRON DEVICES


(For ECE, CSE, IT and Biomedical Engg. Branches)

UNIT I CIRCUIT ANALYSIS TECHNIQUES 12

Kirchoff’s current and voltage laws – series and parallel connection of independent sources – R, L and C –
Network Theorems – Thevenin, Superposition, Norton, Maximum power transfer and duality – Star-delta
conversion.

UNIT II TRANSIENT RESONANCE IN RLC CIRCUITS 12

Basic RL, RC and RLC circuits and their responses to pulse and sinusoidal inputs – frequency response –
Parallel and series resonances – Q factor – single tuned and double tuned circuits.

UNIT III SEMICONDUCTOR DIODES 12

Review of intrinsic & extrinsic semiconductors – Theory of PN junction diode – Energy band structure –
current equation – space charge and diffusion capacitances – effect of temperature and breakdown
mechanism – Zener diode and its characteristics.

UNIT IV TRANSISTORS 12

Principle of operation of PNP and NPN transistors – study of CE, CB and CC configurations and
comparison of their characteristics – Breakdown in transistors – operation and comparison of N-Channel
and P-Channel JFET – drain current equation – MOSFET – Enhancement and depletion types – structure
and operation – comparison of BJT with MOSFET – thermal effect on MOSFET.

UNIT V SPECIAL SEMICONDUCTOR DEVICES


(Qualitative Treatment only) 12

Tunnel diodes – PIN diode, varactor diode – SCR characteristics and two transistor equivalent model – UJT
– Diac and Triac – Laser, CCD, Photodiode, Phototransistor, Photoconductive and Photovoltaic cells –
LED, LCD.

TEXT BOOKS:

1. Joseph A. Edminister, Mahmood, Nahri, “Electric Circuits” – Shaum series,Tata McGraw Hill,
(2001)
2. S. Salivahanan, N. Suresh kumar and A. Vallavanraj, “Electronic Devices and Circuits”,Tata
McGraw Hill, 2nd Edition, (2008).
3. David A. Bell, “Electronic Devices and Circuits”, Oxford University Press, 5th Edition, (2008).

REFERENCES:
1. Robert T. Paynter, “Introducing Electronics Devices and Circuits”, Pearson Education, 7 th Education,
(2006).
2. William H. Hayt, J.V. Jack, E. Kemmebly and steven M. Durbin, “Engineering Circuit Analysis”,Tata
McGraw Hill, 6th Edition, 2002.
3. J. Millman & Halkins, Satyebranta Jit, “Electronic Devices & Circuits”,Tata McGraw Hill, 2 nd Edition,

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2008.

UNIT – I
PART – A

1. State superposition theorem.

The superposition theorem states that the response in a linear circuit with multiple sources
is given by algebraic sum of responses due to individual sources acting alone.

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2. What is property of additivity and homogeneity?

The property of additivity says that the response in a circuit due to a number of sources is
given by sum of the response due to individual sources acting alone.

The property of homogeneity says that if all the sources are multiplied by a constant, then
the response is also multiplied by the same constant.

3. Find the current through the ammeter shown in figure (a), by using superposition
theorem.

Figure (a)

Since the resistance of ammeter is not specified it can be represented by short circuit. The
condition of the given circuit when each source is acting separately are shown in figure (b) & figure
(c).

Figure: (b)

Figure: (c)

With reference to figure (b) & figure (c), we can write,

10
Response due to 10 V source, I'   2.5A
4
5
Response due to 5 V source, I"    2A
2.5

Total response, I = I’ + I” = 2.5 + (-2) = 0.5 A

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4. Find the voltage VL in the circuit shown in figure (a) by principle of superposition.

Figure (a)

The condition of the circuit when each source is acting separately are shown in figure (b) & figure
(c).

With reference to figure (b) & figure (c), we can write,

VL'  12V ; VL"  8V ;  VL  VL'  VL"  12  8  20V.

5. In the circuit shown in figure (a), the power in resistance R is 9 W when V 1 is acting alone
and 4 W when V2 is acting alone. What is the power in R when V1 & V2 are acting together?

9
Current through R when V1 is acting, =  3A
1

4 P
Current through R when V2 is acting, =  2A P = I2 R;  I =
1 R

Total current when V1 & V2 are acting = 3 + 2 = 5A

Power in R when V1 & V2 are acting = 5 2  1  25W

6. State Thevenin’s theorem.

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The Thevenin’s theorem states that a circuit with two terminals can be replaced by an
equivalent circuit consisting of a voltage source in series with a resistance (or impedance).

7. State Norton’s theorem.

The Norton’s theorem states that a circuit with two terminals can be replaced by an
equivalent circuit consisting of a current source in parallel with a resistance (or impedance).

8. Find Thevenin’s voltage across terminals A & B in the circuit shown in figure (a).

Figure (a)

Thevenin’s voltage, Vth = 5 + 10 = 15 V

(Note : Voltage across 5  is 5 V).

9. The VI characteristics of a network is shown in figure (a). Determine the maximum power
that can be supplied by the network to a resistance connected across A-B.

Figure (a)
When V = 0, I = - 5A

The condition V = 0 is equivalent to short circuiting terminals A – B and the current flowing
through the short circuit is the Norton’s current.

 Norton’s current, In = - I = - (-5) = 5A

When I = 0, V = 20 V

The condition I = 0 is equivalent to open terminals A-B and the voltage across the open
terminals is the Thevenin’s voltage.

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Thevenin’s voltage, Vth = 20 V

Vth 20
Thevenin’s resistance, R th    4
In 5
The resistance, R to be connected for maximum power transfer across terminals A – B is R th.

Maximum power  Vth2 Vth2 202


P
 max     25W.
transferred to R  4R 4R th 4  4

10. Determine the value of R in the circuit shown in figure (a) for maximum power transfer.

Figure (a)

The value of R for maximum power transfer is given by the looking back resistance (or
Thevenin’s resistance) from the terminals for R which is determined as shown below.

36 4
R  R th    4k
36 2

11. Determine the Thevenin’s equivalent of the circuit shown in figure (a).

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The Thevenin’s voltage is the voltage across 20 resistance. By voltage division rule,

20
Thevenin’s voltage, Vth  200   160V
20  5

To find Thevenin’s resistance the 200 V source is replaced by short circuit as shown in
figure (b). With reference to figure (c), we can write,

5  20
Thevenin’s resistance, R th   10  14. .
5  20

12. In the circuit shown in figure (a) using Thevenin’s theorem determine the voltage across
70 resistance after the switch is closed.

Figure (a)

Since the load is balanced when the switch is open, the voltage across 90  is 100V. This
is also Thevenin’s voltage at terminals A – B.

To find Thevenin’s resistance the voltage sources are replaced by short circuit. When the
voltage sources are shorted the three 90  resistances will be in parallel.

90
 Thevenin’s resistance, R th   30
3

The Thevenin’s equivalent at A-B is shown in figure (b). With reference to figure (b) by
voltage division rule,

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Figure (b)

70
Voltage across 70 resistance, VL  100   70V.
70  30

13. Find Thevenin’s equivalent of the circuit shown in figure (a).

To find Thevenin’s voltage the current source is converted to voltage source as shown in figure
(b).

4
By voltage division rule, V1  8   4V
44

By KVL, Vth = V1 + 6 = 4 + 6 = 10 V.

To find Thevenin’s resistance the voltage source is replaced by short circuit and current
source is opened as shown in figure (c).

4
R th   3  5
2

The Thevenin’s equivalent is shown in figure (d).

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Figure (c) Figure (d)

Thevenin’s equivalent

14. Find V th at terminals A-B in the circuit shown in figure (a).

Figure (a)

In the given circuit the voltage across series combination of 4 & j3  elements is 60 0 V.
hence by voltage division rule,

j3
V th  60 0   21.6  j28.8 V  36 53.13 V
4  j3

15. State maximum power transfer theorem.

In purely resistive circuits maximum power transfer theorem states that “Maximum power is
transferred from source to load when the load resistance is equal to source resistance”.

In general the maximum power transfer theorem states that “Maximum power is transferred
to a load impedance if the absolute value of the load impedance is equal to the absolute value of
the looking back impedance of the circuit from the terminals of the load”.

16. Determine the value of R in the circuit shown in figure (a) for maximum power transfer.

Figure (a)

The value of R for maximum power transfer is given by the looking back resistance (or
Thevenin’s resistance) from the terminals of R which is determined as shown below.

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Figure (b) Figure (c)

5  20
R  R th   4  8.
5  20

17. Find the value of R for maximum power transfer in the circuit shown in figure (a).

Figure (a)

For maximum power transfer the value of R should be equal to absolute value of the
looking back impedance from the terminals of R.

 R = 8 2    0.06   8 2   100  0.06   10


2 2

Here, Em sin t  Em sin100t ;   = 100 rad/s

18. Find the equivalent Y circuit for the  circuit shown in figure (a).

Figure (a)
Solution:-

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From the circuit of figure (a), we see that we have the following resistor values:

RA = 90 
RB = 60 
RC = 30 

We have the following equivalent “Y” resistor values:

R1 
 30   60 
30  60  90

1800
  10
180

R2 
 30   90 
30  60  90

2700
  15
180

R3 
 60   90 
30  60  90

5400
  30
180

The resulting circuit is shown in figure (b)

Figure (b)

19. Find the  network equivalent of the Y network shown in figure (a).

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Figure (a)

Solution:- The equivalent  network is shown in figure (b).

Figure (b)

The values of the resistors are determined as follows:-

RA 
 4.8k   2.4k    4.8k   3.6k    2.4k   3.6k 
4.8k
 7.8k

RB 
 4.8k   2.4k    4.8k   3.6k    2.4k   3.6k 
3.6k
 10.4k

RC 
 4.8k   2.4k    4.8k   3.6k    2.4k   3.6k 
2.4k
 15.6k

20. Given the circuit of Figure (a), find the total resistance, R T, and the total current, I.

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Figure (a)

Solution:-

As is often the case, the given circuit may be solved in one of two ways. We may convert
the “” into its equivalent “Y”, and solve the circuit by placing the resultant branches in parallel, or
we may convert the “Y” into its equivalent “”. We choose to use the latter conversion since the
resistors in the “Y” have the same value. The equivalent “” will have all resistors given as

R   3  10   30

The resulting circuit is shown in figure (b).

Figure (b) Figure (c)


We see that the sides of the resulting “” are in parallel, which allows us to simplify the
circuit even further as shown in figure (c). The total resistance of the circuit is now easily
determined as

RT  15 ||  20  22.5 

 11.09

This results in a circuit current of

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30V
I  2.706A
11.09

21. State Kirchoff’s Current Law.

For any lumped electric circuit, at any time the (algebraic) sum of the branch currents
leaving any of its nodes is zero.

22. State Kirchoff’s Voltage Law.

For any lumped electric circuit, for any of its loops the (algebraic) sum of the branch voltage
around the loop is zero at any instant.

PART – B
CIRCUIT ANALYSIS TECHNIQUES

1. The following three impedances are connected in series across a 40 V, 20 kHz supply: (i)
a resistance of 8 , (ii) a coil of inductance 130 H and 5  resistance, and (iii) a 10 
resistor in series with a 0.25 F capacitor. Calculate (a) the circuit current, (b) the circuit
phase angle and (c) the voltage drop across each impedance.

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The circuit diagram is shown in figure (a). Since the total circuit resistance is 8 + 5 + 10, i.e.
23 , an equivalent circuit diagram may be drawn as shown in figure (b).

Figure (a)

Figure (b)

Inductive reactance, XL  2fL  2  20  10   130  10 


3 6

= 16.34 

1 1
Capacitive reactance, XC  2fC  2 20  103 0.25  10 6
  
 31.83 

Since XC > XL, the circuit is capacitive XC  XL  31.83  16.34  15.49

(a) Circuit impedance, Z = [R2 + (XC – XL)2] = [232 + 15.492]

= 27.73 

V 40
Circuit current, I =   1.442A
Z 27.73
 XC  XL 
Circuit phase angle  = arctan  
 R 
 15.49 
i.e.  = arctan    33.96  3358 ' leading .
 23 

(b) V1 = 1R1 = (1.442) (8) = 11.54 V


V2 = IZ2 = I (52 + 16.342) = (1.442) (17.09) = 24.64 V
V3 = IZ3 = I (102 + 31.832) = (1.442) (33.36) = 48.11 V

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The 40 V supply voltage is the phasor sum of V 1, V2 and V3.

2. A 20 resistor is connected in parallel with an inductance of 2.387 mH across a 60 V, 1


kHz supply. Calculate (a) the current in each branch, (b) the supply current, (c) the circuit
phase angle, (d) the circuit impedance and (e) the power consumed.

V 60
(a) Current flowing in the resistor IR    3A
R 20

V V
Current flowing in the inductance IL  
XL 2fL

60

2  1000  (2.387  10 3 )

 4A

(b) From the phase, diagram supply current, I =  (IR2 + IL2)


=  (32 + 42)
=5A

IL  4
(c) Circuit phase angle,  = arctan  arctan    53.13
IR 3
= 538’ lagging

V 60
(d) Circuit impedance, Z    12
I 5

(e) Power consumed P = VI cos  = (60) (5) (cos 538’) = 180 W

(Alternatively, power consumed P = IR2R = (3)2(20) = 180 W)

3. A 30 F capacitor is connected in parallel with an 80  resistor across a 240 V, 50 Hz


supply. Calculate (a) the current in each branch, (b) the supply current (c) the circuit phase
angle, (d) the circuit impedance, (e) the power dissipated and (f) the apparent power.

V 240
(a) Current in resistor, IR =   3A 9
R 80
V V
IC  
Current in capacitor, XC  1 
 2fC 
 
= 2fCV

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 
 2  50  30  106  240 

 2.262A

(b) Supply current, I =  (IR2+IC2) =  (32 + 2.2622)


= 3.757 A
IC  2.262 
(c) Circuit phase angle,  = arctan  arctan  
IR  3 
= 371’ leading

V 240
(d) Circuit impedance, Z    63.88
I 3.757

(e) True or active power dissipated, P = VI cos 


= 240(3.757)cos 371’
= 720 W
(Alternatively, true power P = IR R = (3)2(80) = 720 W)
2

(f) Apparent power, S = VI = (240) (3.757) = 901.7 VA.

4. A capacitor C is connected in parallel with a resistor R across a 120 V, 200 Hz supply.


The supply current is 2 A at a power factor of 0.6 leading. Determine the values of C and R.

The circuit diagram is shown in figure (a)

Figure (a)
Power factor = cos  = 0.6 leading, hence  = arcos 0.6 = 53.13 leading.

From the phasor diagram shown in figure (b),

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Figure (b)

IR = I cos 53.13 = (2) (0.6)


= 1.2 A

and IC = I sin 53.13 = (2) (0.8)


= 1.6 A

(Alternatively, IR and IC can be measured from the scaled phasor diagram).

From the circuit diagram,

V V 120
IR  from which R =   100
R IR 1.2

V I
and IC   2fCV, from which, C = C
XC 2fV

1.6

2  200   120 

 10.61 F

5. Determine the values of the resistance and the series-connected inductance or


capacitance for each of the following impedances: (a) (12 + j5) (b) – j40 (c) 30 60  (d)
2.20  106  - 30 . Assume for each a frequency of 50 Hz.

(a) For an R – L series circuit, impedance Z = R + jX L.


Thus Z = (12 + j5) represents a resistance of 12 and an inductive reactance of 5 in series.
Since inductive reactance XL = 2fL,
XL 5
Inductance L    0.0159 H
2f 2  50 
i.e., the inductance is 15.9 mH.
Thus an impedance (12 + j5) represents a resistance of 12 in series with an inductance of
15.9 mH.

(b) For a purely capacitive circuit, impedance Z = -jX c.

Thus Z = - j40  represents zero resistance and a capacitive reactance of 40 .


Since capacitive reactance XC = 1/(2fC).

1 1 106
Capacitance C =  F F
2fXC 2  50   40  2  50   40 

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= 79.6 F

Thus an impedance –j40 represents a pure capacitor of capacitance 79.6 F.

(c) 3060 = 30(cos 60 + j sin 60) = 15 + j25.98

Thus Z = 3060  = (15 + j25.98) represents a resistance of 15 and an inductive


reactance of 25.98  in series.

Since XL = 2fL.
XL 25.98
Inductance L    0.0827H or 82.7 mH.
2f 2  50 

Thus an impedance 3060  represents a resistance of 15 in series with an inductance of


82.7 mH.

(d) 2.20  106  -30 = 2.20  106 [cos(-30) + j sin (-30)]

= 1.905  106 – j1.10  106

Thus Z = 2.20  106  - 30  = (1.905  106 – j1.10  106) represents a resistance of
1.905  106  (i.e. 1.905 M) and a capacitive reactance of 1.10  106  in series.
Since capacitive reactance XC = 1/(2fC).
1 1
Capacitance C = 2fX  2 50 1.10  106 F
C   
= 2.894  10-9 F or 2.894 nF

Thus an impedance 2.2  106  - 30 represents a resistance of 1.905 M in series with a
2.894 nF capacitor.

6. Determine the current through the 8-V battery for the circuit shown in figure (a).

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Solution:- Convert the current source into an equivalent voltage source. The equivalent circuit
may now be analyzed by using the loop currents shown in figure (b).

Figure (b)

Loop 1: 10V  (2)I1   3  I1   3  I2  8V  0


Loop 2: 8V   3  I2   3  I1   1  I2  6V  0

Rewriting the linear equations, you get the following:

Loop 1:  5  I1   3  I2  18V
Loop 2:   3  I1   4  I2  2V

Solving the equations using determinants, we have the following:

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18 3
2 4 66
I1    6.00A
5 3 11
3 4

5 18
3 2 44
I2    4.00A
5 3 11
3 4

If the assumed direction of current in the 8-V battery is taken to be I 2, then

I = I2 – I1 = -4.00 A – (-6.00 A) = 2.00 A

The direction of the resultant current is the same as I 2 (Upward).

7. Solve for the currents through R2 and R3 in the circuit of figure (a)

Figure (a)

Solution:-

Step 1: Although we see that the circuit has a current source, it may not be immediately evident
how the source can be converted into an equivalent voltage source. Redrawing the circuit into a
more recognizable form, as shown in figure (a), we see that the 2-mA current source is in parallel
with a 6-k resistor. The source conversion is also illustrated in figure (b).

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Figure (b)

Step 2: Redrawing the circuit is further simplified by labeling some of the nodes, in this case a and
b. After performing a source conversion, we have the two-loop circuit shown in figure (c). The
current directions for I1 and I2 are also illustrated.

Step 3: The loop equations are

Loop 1: (6k  10k  5k)I1  (5k)I2  12V  10V


Loop 2: (5k)I1  (5k  12k  4k)I2  10V  8V

In loop 1, both voltages are negative since they appear as voltage drops when following the
direction of the loop current.

These equations are rewritten as

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 21k  I1   5k  I2  22V


  5k  I1  (21k )  18V

Step 4: In order to simplify the solution of the previous linear equations, we may eliminate the
units (k and V) from our calculations. By inspection, we see that the units for current must be in
milliamps. Using determinants, we solve for the currents I 1 and I2 as follow:

22 5
18 21 462  90 372
I1     0.894mA
21 5 441  25 416
5 21

21 22
5 18 378  110 268
I2     0.644mA
21 5 441  25 416
5 21

The current through resistor R2 is easily determined to be

I2 –I1 = 0.644 mA – (-0.894 mA) = 1.54 mA

The current through R3 is not found as easily. A common mistake is to say that the current
in R3 is the same as the current through the 6-k resistor of the circuit in figure. This is not the
case. Since this resistor was part of the source conversion it is no longer in the same location as in
the original circuit.

Although there are several ways of finding the required current, the method used here is the
application of Ohm’s law. If we examine figure, we see that the voltage across R 3 is equal to Vab.
From figure, we see that we determine Vab by using the calculated value of I1.

Vab    6k  I1  12V    6k   0.894mA   12V  6.64V

The above calculation indicates that the current through R 3 is upward (since point a is negative
with respect to point b). The current has a value of

6.64V
IR3   1.11mA
6k

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8. Differentiate between Loop Analysis and Nodal Analysis.

Mesh (Loop) Analysis

A better approach and one which is used extensively in analyzing linear bilateral networks
is called mesh (or loop) analysis. While the technique is similar to branch-current analysis, the
number of simultaneous linear equations tends to be less. The principal difference between mesh
analysis and branch-current analysis is that we simply need to apply Kirchoff’s voltage law around
closed loops without the need for applying Kirchoff’s current law.

The steps used in solving a circuit using mesh analysis are as follows:-

1. Arbitrarily assign a clockwise current to each interior closed loop in the network. Although
the assigned current may be in any direction, a clockwise direction is used to make later
work simpler.
2. Using the assigned loop currents, indicate the voltage polarities across all resistors in the
circuit. For a resistor which is common to two loops, the polarities of the voltage drop due to
each loop current should be indicated on the appropriate side of the component.
3. Applying Kirchoff’s voltage law, write the loop equations for each loop in the network. Do
not forget that resistors which are common to two loops will have two voltage drops, one
due to each loop.
4. Solve the resultant simultaneous linear equations.
5. Branch currents are determined by algebraically combining the loop currents which are
common to the branch.

Nodal Analysis

In this section we will apply Kirchoff’s current law to determine the potential difference
(voltage) at any node with respect to some arbitrary reference point in a network. Once the
potentials of all nodes are known, it is a simple matter to determine other quantities such as
current and power within the network.

The steps used in solving a circuit using nodal analysis are as follows:-

1. Arbitrarily assign a reference node within the circuit and indicate this node as ground. The
reference node is usually located at the bottom of the circuit, although it may be located
anywhere.
2. Convert each voltage source in the network to its equivalent current source. This step,
although not absolutely necessary, makes further calculations easier to understand.
3. Arbitrarily assign voltages (V 1, V2, ….Vn) to the remaining nodes in the circuit. (Remember
that you have already assigned a reference node, so these voltages will all be with respect
to the chosen reference).
4. Arbitrarily assign a current direction to each branch in which there is no current source.
Using the assigned current directions, indicate the corresponding polarities of the voltage
drops on all resistors.

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5. With the exception of the reference node (ground), apply Kirchoff’s current law at each of
the nodes. If a circuit has a total of n + 1 nodes (including the reference node), there will be
n simultaneous linear equations.
6. Rewrite each of the arbitrarily assigned currents in terms of the potential difference across a
known resistance.
7. Solve the resulting simultaneous linear equations for the voltages (V 1, V2, ….Vn).

9. Given the circuit of figure (a), use nodal analysis to solve for the voltage V ab.

Solution:-

Step 1: Select a convenient reference node.

Step 2: Convert the voltage sources into equivalent current sources. The equivalent circuit is
shown in figure (b).

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Step 3 and 4 : Arbitrarily assign node voltages and branch currents. Indicate the voltage polarities
across all resistors according to the assumed current directions.

Step 5: We now apply Kirchhoff’s current law at the nodes labeled as V 1 and V2:

I entering   Ileaving
Node V1 :
200mA  50mA  I1  I2

I entering   Ileaving
Node V2 :
200mA  I2  50mA  I3

Step 6: The currents are rewritten in terms of the voltages across the resistors as follows:-

V1
I1 
20
V1  V2
I2 
40
V2
I3 
30

The nodal equations become

V1 V  V2
200 mA  50mA   1
20 40
V1  V2 V
200 mA +  50 mA  2
40 30

Substituting the voltage expressions into the original nodal equations, we have the following
simultaneous linear equations:

 1 1   1 
 20  40  V1   40  V2  250 mA
   
 1   1 1 
-  V1     V2  150 mA
 40   30 40 

These may be further simplified as

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 0.075 S  V1   0.025 S  V2  250 mA


 
  0.025 S  V1  0.0583 V2  150mA

Step 7: Use determinants to solve for the nodal voltages as

0.250 0.025
0.150 0.0583
V1 
0.075 0.025
0.025 0.0583

 0.250   0.0583    0.150   0.025 



 0.075   0.0583    0.025   0.025 
0.0183
  4.89V
0.00375
and

0.075 0.250
0.025 0.150
V2 
0.075 0.025
0.025 0.0583


 0.075   0.150    0.025   0.250 
0.00375

0.0175
  4.67V
0.00375

If we go back to the original circuit of figure (a), we see that the voltage V 2 is the same as the
voltage Va, namely

Va = 4.67 V = 6.0 V + Vab

Therefore, the voltage Vab is simply found as

Vab  4.67V  6.0V  1.33V

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10. Determine the nodal voltages for the circuit shown in figure (a).

Figure (a)

Solution:- By following the steps outlined, the circuit may be redrawn as shown in figure (b)

Figure (b)

Applying Kirchhoff’s current law to the nodes corresponding to V 1 and V2 the following nodal
equations are obtained:

I
leaving   Ientering
Node V1 : I1 + I2 = 2A
Node V2 : I3 + I4 = I2 + 3A

The currents may once again be written in terms of the voltages across the resistors:

V1
I1 
5
V1  V2
I2 
3
V
I3  2
4
V2
I4 
6

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The nodal equations become

V1  V1  V2 
Node V1 :   2A
5 3
Node V2 :
V2 V
 2  1
 V  V2   3A
4 6 3

These equations may now be simplified as

 1 1   1 
Node V1 :  5  3  V1   3  V2  2A
   
 1   1 1 1 
Node V2 :   V1      V2  3A
 3   4 6 3 

The solutions for V1 and V2 are found using determinants:

2 0.333
3 0.750 2.500
V1    8.65V
0.533 0.333 0.289
0.333 0.750

0.533 2
0.333 3 2.267
V2    7.85V
0.533 0.333 0.289
0.333 0.750

11. Determine the nodal voltages for the circuit shown in figure (a).

Figure (a)

Solution:- The circuit has a total of three nodes; the reference node (at a potential of zero volts)
and two other nodes, V1 and V2.

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By applying the format approach for writing the nodal equations, we get two equations:

 1 1   1 
Node V1 :  3  5  V1   5  V2  6A  1A
   
 1   1 1 
Node V2 :   V1     V2  1A  2A
 5   5 4 

On the right-hand sides of the above, those currents that are leaving the nodes are given a
negative sign.

These equations may be rewritten as

Node V1 : (0.533 S)V1 – (0.200 S) V2 = - 5 A


Node V2 : (0.200 S)V1 + (0.450 S) V2 = - 3A

Using determinants to solve these equations, we have


5 0.200
3 0.450 2.85
V1    14.3V
0.533 0.200 0.200
0.200 0.450

0.533 5
0.200 3 2.60
V2    13.0V
0.533 0.200 0.200
0.200 0.450

12. Use nodal analysis to find the nodal voltages for the circuit of Figure (a). Use the
answers to solve for the current through R1.

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Solution:- In order to apply nodal analysis, we must first convert the voltage source into its
equivalent current source. The resulting circuit is shown in figure (b).

Labelling the nodes and writing the nodal equations, we obtain the following:

 1 1 1   1 
Node V1 :  5k  3k  4k  V1   4k  V2  2 mA - 3 mA
   

 1   1 1 
Node V2 :   V1     V2  2 mA
 4k   4k 2k 

Because it is inconvenient to use kilo ohms and milliamps throughout our calculations, we
may eliminate these units in our calculations. You have already seen that any voltage obtained by
using these quantities will result in the units being “volts”. Therefore the nodal equations may be
simplified as

Node V1 : (0.7833)V1 – (0.2500)V2 = -1


Node V2 : -(0.2500)V1 + (0.750)V2 = 2

1 0.250
2 0.750 0.250
V1    0.476V
0.7833 0.250 0.525
0.250 0.750

0.7833 1
0.250 2 1.3167
V2    2.51 V
0.7833 0.250 0.525
0.250 0.750

Using the values derived for the nodal voltages, it is now possible to solve for any other quantities
in the circuit. To determine the current through resistor R L = 5k, we first reassemble the circuit as

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it appeared originally. Since the node voltage V 1 is the same in both circuits, we use it in
determining the desired current. The resistor may be isolated as shown in figure (c).

Figure (c)

The current is easily found as

I = 10 V -
 0.476 V   2.10 mA (upward)
5k

13. Solve for the currents through R1 and R4 in the circuit of figure (a)

Figure (a)

Solution:- We see that the bridge of the above circuit is balanced (since R 1/R3 = R2/R4). Because
the circuit is balanced, we may remove R 5 and replace it with either a short circuit (since the
voltage across a short circuit is zero) or an open circuit (since the current through an open circuit
is zero). The remaining circuit is then solved by one of the methods developed in previous
chapters. Both methods will be illustrated to show that the results are exactly the same.

Method 1: If R5 is replaced by an open, the result is the circuit shown in figure (b).

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Figure (b)

The total circuit resistance is found as

RT  10   3  12  || (6  24)

 10  15 || 30


 20

The circuit current is

60V
IT   3.0A
20

The current in each branch is then found by using the current divider rule:

 30 
IR1     3.0A   2.0 A
 30  15 
10
IR4   3.0A   1.0 A
24  6

The determinant for the denominator will is

15 6 3
D  6 36 18  6264
3 18 24

Notice that, as expected, the elements in the principal diagonal are positive and that the
determinant is symmetrical around the principal diagonal.

The loop currents are now evaluated as

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30  6  3
0 36 18
0 18 24 16200
I1    2.586 A
D 6264
15 30  3
6 0 18
3 0 24 5940
I2    0.948 A
D 6264
15  6 30
6 36 0
3 -18 0 6480
I3    1.034 A
D 6264

The current through R1 is found as

IR1 = I1 – I2 = 2.586 A – 0.948 A = 1.638 A

The current through R5 is found as

IR5 = I3 – I2 = 1.034 A – 0.948 A


= 0.086 A to the right.

The previous example illustrates that if the bridge is not balanced, there will always be
some current through resistor R5. The unbalanced circuit may also be easily analyzed using nodal
analysis, as in the following example.

14. Determine the node voltages and the voltage V R5 for the circuit of figure (a).

Figure (a)

Method: If R5 is replaced with a short circuit, the result is the circuit shown in figure (b).

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Figure (b)

The total circuit resistance is found as

RT  10   3 || 6    12 || 24 

 10  2  8
 20

The above result is precisely the same as that found using Method 1. Therefore the circuit current
will remain as IT = 3.0 A.

The currents through R1 and R4 may be found by the current divider rule as

 6 
IR1     3.0A   2.0A
 6   3 
and
 12 
IR4     3.0A   1.0A
 12  24 

Clearly, these results are precisely those obtained in Method 1, illustrating that the methods
are equivalent. Remember, though, R 5 can be replaced with a short circuit or an open circuit only
when the bridge is balanced.

14. Find the current through R5 for the circuit shown in Figure (a)

Figure (a)

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Solution By inspection we see that this circuit is not balanced, since

R1 R 2

R3 R 4

Therefore, the current through R5 cannot be zero. Notice, also, that the circuit contains two
possible  configurations. If we choose to convert the top  to its equivalent Y, we get the circuit
shown in figure (b).

By combining resistors, it is possible to reduce the complicated circuit to the simple series circuit
shown in figure (c).

2 + (3 + 3) || (6 + 3) = 5.6 

Figure (c)

The circuit of figure (c) is easily analyzed to give a total circuit current of

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30V
I  2.59 A
6  2  3.6

Using the calculated current, it is possible to work back to the original circuit. The currents
in the resistors R3 and R4 are found by using the current divider rule for the corresponding resistor
branches, as shown in figure.

 6   3 
IR3   2.59A   1.55A
 6  3    3  3 
 3  3 
IR4   2.59A   1.03A
 6   3    3  3 
These results are exactly the same as those found. Using these currents, it is now possible
to determine the voltage Vbc as

Vbc    3  IR4   3  IR3

  3   1.034A    3   3.103A 

 1.55V.

The current through R5 is determined to be

1.55V
IR5   0.086A to the right.
18

15. Consider the circuit of figure (a)

Figure (a)

a. Determine the current in the load resistor, RL.


b. Verify that the superposition theorem does not apply to power.

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Solution:

a. We first determine the current through R L due to the voltage source by removing the current
source and replacing in with an open circuit (zero amps) as shown in figure (b).
The resulting current through RL is determined from Ohm’s law as

20V
IL 1   0.500A
16  24

Next, we determine the current through R L due to the current source by removing the voltage
source and replacing it with a short circuit (zero volts) as shown in figure.

Figure (b)

The resulting current through RL is determined from Ohm’s law as

20V
IL(1)   0.500 A
16  24

Next, we determine the current through R L due to the current source by removing the voltage
source and replacing it with a short circuit (zero volts) as shown in figure (c).

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Figure(c)

The resulting current through RL is found with the current divider rule as
 24 
IL 2      2A   1.20 A
 24  16 

The resultant current through RL is found by applying the superposition theorem:

IL  0.5A  1.2A  0.700A

The negative sign indicates that the current through R L is opposite to the assumed
reference direction. Consequently, the current through R L will, in fact, be upward with a magnitude
of 0.7 A.

b. If we assume (incorrectly) that the superposition theorem applies for power, we would have the
power due the first source given as
P1  IL2 1 RL   0.5A   16   4.0W
2

and the power due the second source as


P2  IL2 2 RL   1.2A   16   23.04 W
2

The total power, if superposition applies, would be

PT  P1  P2  4.0W  23.04 W  27.04 W

Clearly, this result is wrong, since the actual power dissipated by the load resistor is correctly
given as
PL  IL2RL   0.7A  (16)  7.84 W
2

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16. Determine the voltage drop across the resistor R 2 of the circuit shown in figure (a).

Figure (a)
Solution:-

Since this circuit has three separate sources, it is necessary to determine the voltage across R 2
due to each individual source.

First, we consider the voltage across R2 due to the 16-V source as shown in figure (b).

Figure (b)

The voltage across R2 will be the same as the voltage across the parallel combination of
R2||R3 = 0.8 k. Therefore,

 0.8k 
VR2 (1)      16V   4.00V
 0.8k  2.4k 

The negative sign in the above calculation simply indicates that the voltage across the
resistor due to the first source is opposite to the assumed reference polarity.

Next, we consider the current source. The resulting circuit is shown in figure (c).

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Figure (c)

From this circuit, you can observe that the total resistance “seen” by the current source is

RT  R1 || R2 || R3  0.6k

The resulting voltage across R2 is

VR2  2   0.6k   5 mA   3.00V

Finally, the voltage due to the 32-V source is found by analyzing the circuit of figure (d).

The voltage across R2 is

 0.96 k 
VR2  2     32V   12.0V
 0.96 k  1.6 k 

By superposition, the resulting voltage is

VR2  4.0V  3.0V  12.0V  11.0V

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17. State and Explain Thevenin’s Theorem.

Thevenin’s Theorem

Thevenin’s theorem allows even the most complicated circuit to be reduced to a single
voltage source and a single resistance. The importance of such a theorem becomes evident when
we try to analyze a circuit as shown in figure (a).

If we wanted to find the current through the variable load resistor when R L = 0, RL = 2 k
and RL = 5 k using existing methods, we would need to analyze the entire circuit three separate
times. However, if we could reduce the entire circuit external to the load resistor to a single voltage
source in series with a resistor, the solution becomes very easy.

Thevenin’s theorem is a circuit analysis technique which reduces any linear bilateral
network to an equivalent circuit having only one voltage source and one series resistor. The
resulting two-terminal circuit is equivalent to the original circuit when connected to any external
branch or component. In summary, Thevenin’s theorem is simplified as follows:-

Any linear bilateral network may be reduced to a simplified two terminal circuit consisting of
a single voltage source in series with a single resistor as shown in figure (b).

The following steps provide a technique which converts any circuit into its Thevenin
equivalent:

1. Remove the load from the circuit.


2. Label the resulting two terminals. We will label them as a and b, although any notation may
be used.
3. Set all sources in the circuit to zero.
Voltage sources are set to zero by replacing them with short circuits (zero volts).
Current sources are set to zero by replacing them with open circuits (zero amps).
4. Determine the Thevenin equivalent resistance, R Th, by calculating the resistance “seen”
between terminals a and b. It may be necessary to redraw the circuit to simplify this step.

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5. Replace the sources removed in Step 3, and determine the open-circuit voltage between
the terminals. If the circuit has more than one source, it may be necessary to use the
superposition theorem. In that case, it will be necessary to determine the combined effect.
The resulting open-circuit voltage will be the value of the Thevenin voltage, E Th.
6. Draw the Thevenin equivalent circuit using the resistance determined in Step 4 and the
voltage calculated in Step 5. As part of the resulting circuit, include that portion of the
network removed in Step 1.

18. Determine the Thevenin equivalent circuit external to the resistor R L for the circuit of
figure (a). Use the Thevenin equivalent circuit to calculate the current through R L

Figure (a)

Solution:-

Step 1 and 2:- Removing the load resistor from the circuit and labeling the remaining terminals,
we obtain the circuit shown in figure (b).

Figure (b)

Step 3: Setting the sources to zero, we have the circuit shown in figure (c).

Step 4: The Thevenin resistance between the terminals is R Th = 24 .

Step 5: From figure (b), the open-circuit voltage between terminals a and b is found as

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Vab  20V   24   2A   28.0 V

Step 6: The resulting Thevenin equivalent circuit is shown in figure (d).

Figure (c)

Figure (d)

Using this Thevenin equivalent circuit, we easily find the current through R L as

 28V 
IL     0.700 A (upward)
 24  16 

19. State and Explain Norton’s Theorem.

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Norton’s Theorem

Norton’s theorem is a circuit analysis technique which is similar to Thevenin’s theorem. By


using this theorem the circuit is reduced to a single current source and one parallel resistor. As
with the Thevenin equivalent circuit, the resulting two-terminal circuit is equivalent to the original
circuit when connected to any external branch or component. In summary, Norton’s theorem may
be simplified as follows:-

Any linear bilateral network may be reduced to a simplified two-terminal circuit consisting of
a single current source and a single shunt resistor as shown in figure (a).

Figure (a) Norton equivalent circuit

The following steps provide a technique which allows the conversion of any circuit into its
Norton equivalent:

1. Remove the load from the circuit.


2. Label the resulting two terminals. We will label them as a and b, although any notation may
be used.
3. Set all sources to zero. As before, voltage sources are set to zero by replacing them with
short circuits and current sources are set to zero by replacing them with open circuits.
4. Determine the Norton equivalent resistance, R N, by calculating the resistance seen between
terminals a and b. It may be necessary to redraw the circuit to simplify this step.
5. Replace the sources removed in Step 3, and determine the current which would occur in a
short if the short were connected between terminals a and b. If the original circuit has more
than one source, it may be necessary to use the superposition theorem. In this case, it will
be necessary to determine the short-circuit current due to each source separately and then
determine the combined effect. The resulting short-circuit current will be the value of the
Norton current IN.
6. Sketch the Norton equivalent circuit using the resistance determined in Step 4 and the
current calculated in Step 5. As part of the resulting circuit, include that portion of the
network removed in Step 1.

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The Norton equivalent circuit may also be determined directly from the Thevenin equivalent
circuit by using the source conversion technique developed in Chapter. As a result, the Thevenin
and Norton circuits shown in figure (b) are equivalent.

Thevenin equivalent circuit Norton equivalent circuit


Figure (b)

From figure (b) we see that the relationship between the circuits is as follows:-

ETh= INRN

ETh
IN =
RTh

20. Find the Norton equivalent of the circuit external to resistor R L in the circuit in figure (a).
Use the equivalent circuit to determine the load current I L when RL = 0.2 k, and 5 k.

Figure (a)

Solution:-

Step 1, 2 and 3:- After removing the load resistor, labeling the remaining two terminals a and b,
and setting the sources to zero, we have the circuit of figure (b).

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Figure (b)

Step 4: The Norton resistance of the circuit is found as

RN  6k 2 k = 1.5 k

Step 5: The value of the Norton constant-current source is found by determining the current
effects due to each independent source acting on a short circuit between terminals a and b.

Voltage Source, E: Referring to Figure (c), a short circuit between terminals a and b eliminates
resistor R2 from the circuit. The short-circuit current due to the voltage source is

15V
Iab(1)   2.50mA
6k

Figure (c) Figure (d)

Current Source, I: Referring to Figure (d), the short circuit between terminals a and b eliminates
both resistors R1 and R2. The short-circuit current due to the current source is therefore

Iab(2)  5.00mA
The resultant Norton current is found from superposition as

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IN  Iab(1)  Iab(2)  2.50mA  5.00mA  7.50mA

Step 6: The Norton equivalent circuit is shown in figure (e)

Figure (e)

Let RL =0: the current IL must equal the source current, and so
IL =7.50 mA

Let RL =2 k: The current IL is found from the current divider rule as
 1.5k 
IL     7.50mA   3.21mA
 1.5k  2k 

Let RL =5 k: using the current divider rule again, the current I L is found as
 1.5k 
IL     7.50mA   1.73mA
 1.5k  5k 

2. Consider the circuit of figure (a)

Figure (a)

a. Find the Norton equivalent circuit external to terminals a and b


b. Determine the current through RL.

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Solution:

a. Step 1 and 2: After removing the load which consists of a current source in parallel with a
resistor), we have the circuit to Figure (b)

Step 3: After zeroing the sources, we have the network shown in Figure (c)

Step 4: The Norton equivalent resistance is found as

RN  120 280  84

Step 5: In order to determine the Norton current we must again determine the short-circuit current
due to each source separately and then combine the results using the superposition theorem.

Voltage Source, E: Referring to Figure (d), notice that the resistor R 2 is shorted by the short
circuit between terminals a and b and so the current in the short circuit is

24V
Iab(1)   0.2A  200mA
120

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Current Source, I: Referring to figure (e) , the short circuit between terminals a and b will now
eliminate both resistors. The current through the short will simply be the source current. However,
since the current will not be from a to b but rather in the opposite direction, we write

Iab(2)  560mA

Now the Norton current is found as the summation of the short-circuit currents due to each source:

IN  Iab(1)  Iab(2)  200mA  ( 560mA)  360mA

The negative sign in the above calculation for current indicates that if a short circuit were
placed between terminals a and b, current would actually be in the direction from b to a. the
Norton equivalent circuit is shown in Figure (F)

Figure (e) figure (f)

b. The current through the load resistor is found by applying the current divider rule:

 84 
IL     360 mA-180 mA   60mA(upward)
 84  168 

22. State and Prove maximum power transfer theorem.

MAXIMUM POWER TRANSFER THEOREM

In amplifiers and in most communication circuits such as radio receivers and transmitters, it is
often desired that the load receive the maximum amount of power from a source.

The maximum power transfer theorem states the following:

The load resistance will receive maximum power from a circuit when the resistance of the
load is exactly the same as the Thevenin (Norton) resistance looking back at the circuit.

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The proof for the maximum power transfer theorem is determined from the Thevenin
equivalent circuit and involves the use of calculus.

(a) (b)
Figure 1

From figure (1) we see that once the network has been simplified using either Thevenin’s or
Norton’s theorem, maximum power will occur when

RL  RTh  RN

Examining the equivalent circuits of Figure 9-45, shows that the following equations
determine the power delivered to the load:
2
 RL 
  ETh 
R  RTh
PL   L 
RL
which gives
E2ThRL
PL 
 RL  RTh 
2

Similarly,
2
 IR 
PL   N N   RL
 RL  R N 

Under maximum power conditions (RL =RTh =RN), the above equations may be used to
determine the maximum power delivered to the load and may therefore be written as
E2
Pmax Th
4RTh
IN2 RN
Pmax 
4

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UNIT – II
PART – A

1. When a sinusoidal voltage v = 200 sin (377t + 30 o) V is applied to a load, it draw a current
of 10 sin (377t + 60o) A. Determine the active and reactive power of the load.

The rms current and voltage phasors in the polar form are,

200 10
V  300 V ; I  600 A
2 2

200  10  200 10
Complex power, S  V I *  300   600  *  300  -600
2  2  2 2

2000
= 300  600  1000 -300  866  j500 VA
2

Since, S  P  jQ,
Active power, P = 866 W

Reactive power, Q = - 500 VAR (Capacitive)

2. A load consisting of 3  resistance and 4  inductive reactance draw a current of 10 A


when connected to a sinusoidal source. Determine the voltage and power in the load.

Magnitude of Impedance, Z  R2  XL2  32  4 2  5

Voltage, V  IZ  10  5  50V

Power, P  I2R  102  3  300W

3. When a sinusoidal voltage of 120 V is applied across a load, it draw a current of 8 A with
a phase lead of 30o. Determine the resistance, reactance and impedance of the load.

Let, V be reference phasor.

 V  120 00 V & I  8 +30 0 A

V 120 00
Impedance, Z   0
 15 -300  12.99  j7.5
I 8 30

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Since, Z  R  jX, Resistance, R = 12.99 

Reactance, X = 7.5 ’- Capacitive

4. When a sinusoidal voltage of 100 V is applied across a load, it draw a current of 10 A with
60o phase lag. Determine the conductance, susceptance and admittance of the load.

Let, V be reference phasor.

 V  100 00 V & I  10 - 30 0 A

I 10  30o
Admittance, Y    0.1  30o  0.0866  j0.05
V 100 00

Since, Y  G  jB, Conductance, G = 0.0866

Susceptance, B = 0.05  - Inductive

5. An inductive load consumes 1000 W power and draw 10 A current when connected to a
250 V, 25 Hz supply. Determine the resistance and inductance of the load.

We know that, P = I2R ;

P 1000
 Resistance, R    10
I2 102

V 250
 Impedance, Z    25
I 10

We know that, Z  R2  XL2

 Inductive reactance, XL  Z 2  R2  252  102  22.9129

XL 22.9129
Inductance, L    0.1459H
2f 2  25

6. In a RC series circuit excited by sinusoidal source the voltage across resistance and
capacitance are 60 V and 80 V respectively. What will be the supply voltage?

Let current, I through RC series circuit be the reference phasor. With reference to phasor
diagram shown in fig. 1 we can write,

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Figure:1

Supply voltage, V  VR  VC  60  90o

 60  j80  100  53.1o V

7. In a RL series circuit with R = 20  and XL = 30 , for what value of R, the impedance of


RL series combination will be doubled?

When R = 20  & XL  30, Z= R2  XL2  202  302  36.0555

Let R2 be the value of resistance when impedance is doubled.

 2Z   2  36.0555 
2 2
Now, R2   XL2   30 2  65.5744

8. ARC series circuit with R = 1.2 k and C = 0.1 F is excited by a sinusoidal source of 45
V and frequency 1 kHz. Find the apparent power.

 1 
 1.2  10 
2
Magnitude of impedance, Z  R 2  XC2  3
 6 
 2  10  0.1 10 
3

V
Magnitude of current, I  ]
Z

V V2 452
Apparent power, S  VI  V     1.0159VA
Z Z 1993.2462

9. Determine the impedance of the RLC parallel circuit shown in fig 1.

100 100 100


R  25 ; XL   100 ; X C   25
4 1 4

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1 1
Z   16  j12
1 1 1 1 1 1
   
R jXL  jXC 2 j100  j25
Z  Z  16 2  122  20

Figure:

Another method

Let total current be I .

I  4  j1  j4  4  jA ; I = I  4 2  3 2  5A
V 100
Now, Z=   20
I 5

10. Determine the power factor of a RLC series circuit with R = 5 , XL = 8  and XC= 12 .

Impedance, Z  R  jXL  jXC  5  j8  j12  5  j4  R  jX


1 X 4
Power factor angle,   tan  tan1  38.7o
R 5
 
Power factor = cos   cos 38.7  0.7084 lead.
o

11. What is resonance?

The resonance is a circuit condition at which a RLC circuit behave as purely resistive circuit.

12. Write the expressions for resonant frequency and current at resonance of a RLC series
circuit.
1
Angular resonant frequency, r 
LC
1
Resonant frequency, fr 
2 LC
V
Current at resonance, ir 
R

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13. Draw the frequency response of RLC series circuit.

The variation of current with frequency is called frequency response, which is shown in fig

Figure:

14. Define Quality factor.

The Quality factor is defined as the ratio of maximum energy stored to the energy
dissipated in one period.

Maximum energy stored


Quality factor, Q  2 
Energy dissipated in one period

15. Write the expressions for quality factor of series RLC circuit.

rL 1 1 L r
Quality factor at resonance, Qr  or or or
R r CR R C 

1
When   r , Q
CR

L
When   r , Q
R

16. Define Bandwidth of RLC series circuit.

The Bandwidth,  of RLC series circuit is defined as the range of frequencies over which
1
the current is greater than or equal to times the maximum current.
2

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Figure:

17. What are half power frequencies?

In RLC circuits, the frequencies at which the power is half the maximum/minimum power
are called half power frequencies.

18. Write the expression for half power frequencies of RLC series circuit.

1  R 1   1 1 
2
  R
 or fr  
f
Lower cut-off frequency, l        1 
2  2L  2L  LC   2Qr 4Qr2 

1 R 1   1 1 
2
 R
      or fr 
High cut-off frequency, fh   1 
2  2L  2L  LC   2Qr 4Qr2 

19. Write the expression for impedance of RLC series circuit at half power frequencies.

At half power frequencies in RLC series circuit the total reactance is equal to resistance.

1
i.e., at =h or l , L- R
C
2
 1 
 At =h or l , Z= R 2   L    R 2  R 2  2R
 C 
2 2
 1   1   1 
orZ  R 2   L    2  L    2  L 
 C   C   C 

20. Write the expressions for bandwidth of RLC series circuit.

R 
Bandwidth in rad/s  or r
L Qr

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R f
Bandwidth in Hz  or r
2L Qr

21. How the resonant frequency is related to half power frequencies in RLC series/parallel
circuit?

The resonant frequency is given by the geometric mean of the two half power frequencies.

i.e., r  h l or fr  fh fl

22. Define selectivity.

The selectivity is defined as the ratio of bandwidth and resonant frequency.

 1
Selectivity  or
r Qr

23. Write the characteristics of series resonance.

 At resonance, impedance is minimum and equal to resistance, therefore current is


maximum.
 Below resonant frequency the circuit behave as capacitive circuit and above resonant
frequency the circuit behave as inductive circuit.
 At resonance the magnitude of voltage across inductance & capacitance will be Q times the
supply voltage, but they are in phase opposition.

24. A RLC series circuit has R = 10  & XC = 62.833 . Find the value of L for resonance at
50 Hz.

At resonance, XL  XC ,  XL  62.833

XL 62.833
Since XL = 2fL, Inductance, L    0.2H
2f 2  50

25. Determine the quality factor of a RLC series with R = 10 , L = 0.01 h and C = 100 F.

1 L 1 0.01
Quality factor at resonance, Qr   1
R C 10 100  10 6

26. The impedance and quality factor of a RLC series circuit at  = 107 rad/s are 100 + j0 
and 100 respectively. Find the value of R, L and C.

Since the impedance is resistive the circuit will be in resonance. Therefore, r  10 rad / s.
7

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At  = r, Z = R,  Resistance, R = 100 

rL
Qr 
We know that, R

QrR 100  100


 Inductance, L=   1mH
r 107

1 1
We know that, r   r2 
LC LC

1 1
C   1 10 11F
r2L  
2
3
 Capacitance, 107  1 10
=10  10 -12F  10pF.

27. A RLC series circuit with R = 10 , Xl = 20  & XC = 20  is excited by a sinusoidal


source of voltage 200 V. What will be the voltage across inductance.

Since XL = XC, the circuit will be in resonance. At resonance voltage across


inductance is Qr times supply voltage.

rL XL 20
Quality factor at resonance, Qr    2
R R 10

 Voltage across inductance = Qr V  2  200  400V

28. A RLC series circuit excited by a 10 V sinusoidal source resonate at a frequency of 50


Hz. If the bandwidth is 5 Hz, what will be the voltage across capacitor?

r fr 50
Quality factor at resonance, Qr     10
  5

Voltage across capacitor = Qr V  10  10  100V

29. What is anti-resonance?

In RLC parallel circuit, the current is minimum at resonance whereas in series resonance
the current is maximum. Therefore the parallel resonance is called anti-resonance.

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30. Write the expression for resonant frequency for the RLC network shown in fig 1. What
happens when R1 = R2 = R & L = CR2?

Figure:

1 L  CR12
Resonant frequency, fr 
2 LC L  CR2
2

When L = CR2 the circuit will resonate at all the frequencies.

31. Draw the frequency response of RLC parallel circuit.

The variation of current with frequency is called frequency response, which is shown in fig.

Fig:

32. Write the expressions for quality factor of parallel RLC circuit.

R C 
Quality factor at resonance, Qr  or r CR or R or r
rL L 

R
When   r , Q=
L
When   r , Q=CR

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33. Write the expressions for bandwidth of RLC parallel circuit.

1 r
Bandwidth rad/s = or
RC Qr
1 f
Bandwidth in Hz = or r
2RC Qr

34. Write the expression for half power frequencies of RLC parallel circuit.

1  1 1   1 1 
2
  1  
Lower cut-off frequency, fl      or f    1  
2RC  LC 
r
2  RC   2Qr 4Qe2 
   

1  1 1   1 1 
2
  1  
Higher cut-off frequency, fh     or f   1  
2RC  LC 
r
2  RC   2Qr 4Qr2 
 

35. Write the expression for admittance of RLC parallel circuit at half power frequencies.

At half power frequencies in RLC parallel circuit the total susceptance is equal to
conductance.

1
i.e., at  h or l , C  G
L

2
 1 
At   h or l, Y= G   C 
2
  G  G  2G
2 2

  L 

2 2
 1   1   1 
or Y  G2   C    2  C    2  C 
 L   L   L 

36. Write the characteristics of parallel resonance.

 At resonance, admittance is minimum and equal to conductance, therefore current is


minimum.
 Below resonant frequency the circuit behave as inductive circuit and above resonant
frequency the circuit behave as capacitive circuit.
 At resonance the magnitude of current through inductance and capacitance will be Q times
the current supplied by the source, but they are in phase opposition.

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37. What is dynamic resistance? Write the expression for dynamic resistance of RL circuit
parallel with C.

The resistance of the RLC parallel circuit at resonance is called dynamic resistance. For
RL circuit parallel with C, the dynamic resistance is given by,

L
Rdynamic 
RC

38. In fig (a), V & I are in phase. Find the value of C.

Since V & I are in-phase, the circuit will be in resonance.

Given that, e  t   Em sin t  sin2t ;  r  2rad / s

fig.

1 CR2
For RLC circuit shown in fig, r  1
LC L

1  CR2  1 R 2 R2 1
  2
r 1   2  r  2 
2

LC  L  LC L L LC
1 1 1
 C=    0.0625F  62.5mF
 R 
2
 2 
2
16
L  r2  2  1  22  2 
 L   1 

39. For the RLC circuit shown in fig (b). Find the resonant frequency.

 1  1 
 j4  j  j 
  
Impedance, Z  10 
 1 1
 j4  j   j
 

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Figure:

At resonance the imaginary part of impedance should be zero. Therefore the numerator of the
imaginary part should be zero.

 1  1 1 1
 j4r    0  j4r   0  j4r  
 jr  jr jr jr

1 1 1
 j2 r2    r2    r   0.5rad / s
4 4 2

40. A RLC parallel circuit with G=10 ,BL  20 draw a current of 5 A when excited by a
sinusoidal source. Determine the current through inductance.

Since BL = BC the circuit will be in resonance. At resonance the current through inductance
will be Qr times the current draw from the source.

R B 20
 Quality factor at resonance, Qr   L  2
rL G 10

Current through inductance = QrI  2  5  10A.

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PART – B

1. A series combination of 10  resistance and 50 m H inductance is connected to a 220 V,


50 Hz supply. Estimate the current, active power, reactive power and apparent power. Also
estimate the voltage across R & L and draw the phasor diagram.

Solution:

Figure: 1

Given that, V = 220 V, f = 50 Hz


R = 10  , L = 50 mH

The RL series circuit excited by a sinusoidal source is shown in figure.

Inductive reactance = j XL = j  L = j 2  f L = j 2   50  50  10-3 = j 15. 708 

Impedance, Z = R + j XL = 10 + j 15.708  = 18.621 57.50 

Let the supply voltage be reference phasor.

 V = V 00 = 200 00 V

Let, I be the current through RL circuit. Now by Ohm’s law,

V 220 00
Current, I   0
 11.8146 - 57.50 A
Z 18.621 57.5
 I  I  11.8146 A

0
 0

Power factor angle,   V  I  0  57.5  57.5
0

 Power factor = cos  = cos 57.5 = 0.5373 lag


0

The power factor is lag, because the current lags the voltage.

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Apparent power, S = VI = 220  11.8146 = 2599.2 VA

2599.2
 kVA  2.5992kVA
1000

Active power, P = VI cos  = 220  11.8146  0.5373

(or power)
1396.6
 1396.6W  kW  1.3966kW
1000

Reactive power, Q = VI sin  = 220  11.8146  sin 57.50

2192.2
 2192.2VAR  VAR  2.1922kVAR
1000

Voltage across resistance,


V R  I  R  11.8146  57.50  10  118.146 - 57.5 0 V

Voltage across inductance,


V L  I  jXL  11.8146 -57.5 0  j15.708
 11.8146 -57.50  15.708 90 0
= 185.5837 32.50 V

The phasor diagram of RL circuit with V as reference phasor is shown in figure.

Figure:

2. A current of 50 - 30 0 A if flowing through a circuit consist of series connected elements,


when excited by a source of 230 45 0 V, 50 Hz. Determine the elements of the circuit and
power. Also draw the phasor diagram.

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Solution:

Given that, V  230 -450 V & I  50 -30 0 A


V 230 450
 Impedance, Z   0
 4.6 750   1.1906  j4.4433
I 50 - 30

Since the reactance is positive, the circuit is RL series circuit. (Also the current is lagging
and so the circuit is inductive).

We know that, Z = R + jXL

 R = 1.1906 
XL = 4.4433 

We know that, XL = 2  f L.

XL 4.4433
 L=   0.0141 H= 14.1 mH
2f 2  50

The complex power, S  VI  230 450   50 -300 


* *

 230 45o  50 300  11500 75 0  2976.4  J11108.1VA


Also, S= P + j Q

2976.4
 Active power, P  2976.4 W= kW  2.9764kW
1000
11108.1
Reactive power, Q  11108.1 VAR = kVAR  11.1081kVAR
1000
11500
Apparent power, S  S  11500 VA= kVA  11.5kVA
1000

The RL series circuit is shown in figure. Let VR & VL be the voltage across R & L. Now by
Ohm’s law,

V R  I  R  50 - 300  1.1906  59.53 - 30 0 V


V L  I  jXL  50 - 300  j4.4433  50 - 300  4.4433 900
= 222.165 600 V

The phasor diagram of the RL series circuit is shown in figure.

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3. Consider a RL series circuit with an impedance angle of 50 0 at a frequency of 60 Hz. At


What frequency the magnitude of the impedance at 60 Hz.

Solution:

Let f1 = 60 Hz &1 = 2  f1 = 2   60 = 376.9911 rad / s

Let Z1, be the impedance of RL series circuit at 1 and R & L be the resistance & inductance of
the circuit.

1L
Now, Z1  R  j1L  R 2  12L2 tan1  Z1 1
R
Where, Z1 = Magnitude of Z1 = R2  12L2
1L
1 = Impedance angle of Z1 = tan-1
R
Given that, 1 = 500

1L
 tan-1  500
R

1L
or  tan500  1.1918
R

Let f2 be the frequency at which the magnitude of the impedance is doubled and 2 be the
corresponding angular frequency. Let Z2 be the impedance corresponding to 2.

2L
Now, Z 2  R  j2L  R 2  22L2 tan1  Z 2 2
R
Where, Z2 = Magnitude of Z2 = R2  22L2

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2L
1 = Impedance angle of Z2 = tan-1
R
Given that, Z2 = 2 Z1

 R2  22L2  2  R 2  12L2

On squaring we get,


R2  22L2  4 R 2  12L2 
On dividing by R2 we get,

22L2  12L2 
1  2  4 1  2 
R  R 

 2L 
2
  1L 2 
   4 1   R    1
 R     

2L   1L 2 
or  4 1     1
R   R  
L
Put 1  1.1918 in the above equation,
R
L
 2 = 4 1+  1.1918    1=2.9464
2

R  
2L
2.9464
Now, R   2.4722
1L 1.1918
R

 2 =2.4722
1
or 2  2.4722 1  2.4722  376.9911  931.9974 rad/s

2 931.9974
Now, f2    148.332 Hz.
2 2

Result

The frequency at which the magnitude of the impedance doubles = 148.332 Hz.

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4. A RLC series circuit consists of R = 75 , L = 125 mH & C = 200 F. The circuit is excited
by a sinusoidal source of value 115 V, 60 Hz. Determine the voltage across various
elements. Calculate the current and power. Draw the phasor diagram.

Solution:

Given that, V = 115 V, f = 60 Hz, R = 75 , L = 125 mH & C = 200 F

Inductive reactance = j XL = j L = j 2 fL = j 2   60  125  10-3 = j 47.1239 

1 1 1
Capacitive reactance =  jXc   j  j  j
C 2fC 2  60  200  10 6
= - j 13.2629 

Total reactance = j X = j XL – j XC = j 47.1239 – j 13.2629 = j 33.861 

 Impedance, Z  R  jX  75  j33.861  82.2895 24.3 0 

The RLC series circuit is shown in figure. Let I be the current through the circuit and VR , VL &
vC be the voltage across R, L & C respectively. Let V be the reference phasor.

 V  V 00 V

Now by Ohm’s law,

V 115 00
I   0
 1.3975 - 24.30 A
Z 82.2895 24.3
 I = I  = 1.3975 A

V R  I  R  1.3975 -24.30  75  104.8125 -24.3 0 V

Figure:

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V L  I  jXL  1.3975 -24.30  j47.1239


= 1.3975 -24.30  47.1239 90 0  65.8557 65.70 V
V C  I    jXC   1.3975 -24.30    j13.2629 
 1.3975 -24.30  13.2629 - 90 0  18.5349 -114.30 V

Apparent power, S = VI = 115  1.3975 = 160.7125 VA

Power factor angle,  =  V -  I = 00 – (-24.30)= 24.30

Active power, P = VI cos  = 115  1.3975  cos 24.30


Reactive power, Q = VI sin  = 115  1.3975  sin 24.30 = 66.1355 VAR (inductive)
The phasor diagram of RLC series circuit is shown in figure.

Here, V x = VL + VC

= I jXL + I(-jXC)

= I  j (XL – XC)

= I  j X = 1.3975  24.30  j33.861

= 1.3975  24.30  33.861 900

= 47.3207 65.70 V

Figure: Phasor diagram of RLC series circuit

5. A RLC parallel circuit consists of R=50, L=150m H&C=100F. The circuit is excited by a
current source of 5 0o A, 100 Hz. Calculate the voltage & current in the various elements.

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Determine the apparent, active and reactive power delivered by the source. Draw the
phasor diagram.

Solution:

I  5 0o A, f=100Hz
Given that,
R=50, L=150mH & C=100F.

Let us analyze the parallel circuit in terms of admittance.


1 1
Conductance, G    0.02
R 50

1 1
Inductive susceptance =-jBL=-  j   j0.0106
2 fL 2  100  150  10 3
Capacitive susceptance = jBC=j2fC=j210010010-6 =j0.0628 
Total susceptance = jB=JBC-jBL=j0.0628-j0.0106=j0.0522 
Admittance, Y =G+jB=0.02+j0.0522  =0.0559 69o 

The RLC parallel circuit excited by a current source is shown in fig. Let V be the voltage
across the source and parallel connected elements. Let I R, I L & I C be the current through R,L&C
respectively.

Fig.

Now by ohm’s law,

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I 5 0o
V  IZ   o
 89.4454 -69o V
Y 0.0559 69
IR  V  G  89.4454 -69o  0.02  1.7889 -69 o A

IL  V    jBL   89.4454 -69o    j0.0106 

=89.4454 -69o  0.0106 -90 o  0.9481 -159 o A

IC  V  jBC  89.4454 -69O  J0.0628

=89.4454 -69O  0.0628 90O  5.6172 21O A

Let, IL  IC  V    jBL   V  jBC  V  j  BC  BL   V  jB

=89.4454 -69o j0.0522=89.4454 -69o  0.0522 90o


=4.669 21o A

Complex power S  V I *  89.4454 -69 o  (5 0 o ) *


=89.4454 -69o  5 0o
=447.227 -69o VA
=160.2718-j417.5224 VA

Apparent power, S=| S | =447.227 VA


Also, S =P+jQ
Active power, P=160.2718W
Reactive power, Q=-417.5224 VAR
Or Q=417.5224 VAR – capacitive

Fig. Phasor diagram

The phasor diagram of RLC parallel circuit with I as reference phasor is shown in fig.

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6. A load absorbs 2.5 kW at a power factor of 0.707 lagging from a 230 V, 50 Hz source. A
capacitor is connected in parallel to the load in order to improve the power factor to 0.9 lag.
Determine the value of the capacitor.

Solution:

Method – 1

Case I:

Given that V=230V, P1 = 2.5 kW, cos 1=0.707 lag, f= 50 Hz


P 2.5
Apparent power, S1    3.5361 KVA
cos 1 0.707

Power factor angle, 1=cos-1 0.707=-45o


Reactive power, Q1=S1 sin 1=3.5361  sin 45o=2.5 kVAR
=2.5 kVAR-inductive

Case II:

Given that V=230 V, f=50 Hz, cos 2=0.9 lag

The addition of capacitor to the load does not alter the active power but decrease the reactive
power supplied by the source. Hence the active power remains same as that of 2.5 kW.

 P2=2.5 kW

P2 2.5
Apparent power, S2    2.7778kVA
cos 2 0.9
Power factor angle, 2=cos-1 0.9=25.8o
Reactive power, Q2=S2 sin 2 =2.7778sin25.8o=1.209kVAR
=1.209 kVAR – inductive

Hero, Q2 is inductive because the power factor is still lagging.


Now, the reactive power supplied by the capacitor Q C is given by,

QC=Q2-Q1=1.209-2.5=-1.291 kVAR
=-1291 VAR

We know that, | QC | V IC  VIC  1291

Where, IC is the magnitude of current through capacitor.

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1291 1291
 IC    5.613A
V 230

V 230
The capacitive reactance, XC    40.9763
IC 5.613

1
Also, XC=
2 fC

1 1
 Capacitance, C=   77.6815  10 6 F  77.6815 F
2 fXC 2  50  40.9763

Method II:

Case I:

Given that V= 230V, f=50Hz, P1=2.5 kW, cos 1=0.707 lag


Let IL be the current through inductive load as shown in fig.

Now,

P1 2.5  103
Magnitude of load current, IL  
V cos 1 230  0.707

Let the supply voltage V be reference phasor.

Fig.

 V  V 0o  230 0 o V

Since the power factor is lagging the current IL will tag the supply voltage V by an angle 1,
where 1 = cos-1 0.707.

 IL  IL -cos-10.707  15.3742 -45 o A

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Case II: When capacitor is added to inductive load

Given that, cos 2=0.9 lag

 2  cos1 0.9  25.8o

The active power remains same after addition of capacitor.

 P2=2.5kW
P2 2.5
Now the apparent power, S 2    2.7778kVA
cos 2 0.9
The complex power, S 2  S 2 2  2.7778 25.8 okVA
=2.7778  10 3 25.8 o VA

The inductive load with capacitance in parallel is shown in fig. here the current through the load
remains same as that of IL . Let I be the current supplied by the source and IC be the current
through the capacitor.

Now IL =15.3742 -45o A

Also,Complex power S  V I *
S2 2.7778  103  25.8o
 I*   o
 12.0774 25.8o A
V 230 0
 
I= 12.0774 25.8o *  12.0774  25.8o A
By KCL we can write,

I  IC  IL
 IC  I  IL  12.0774 -25.8o  15.3742 -45 o

=10.8735-j5.2565-(10.8712-j10.8712)=0.0023+j5.6147j5.6147

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Note: The small value of real part 0.0023 is due to approximation in calculations.
Magnitude of capacitor current, Ic=5.6147A
V 230
Capacitive reactance, XC    40.9639
IC 5.6147
1
Also, XC  Ca
2 fC
1 1
 Capaci tance,C    77.705  10 6 F  77.705 F
2 fXC 2  50  40.9639

Note: The slight difference in the capacitance value is due to approximation in calculations.

7. An inductive coil of power factor 0.8 lagging is connected in series with a 120F
capacitor. When the series circuit is connected to a source of frequency 50Hz, it was
observed that the magnitude of voltage across the coil and capacitor are equal. Determined
parameters of the coil.

Fig.

Solution:

The given circuit is RLC series circuit as shown in fig.

Let, Z1 = Impedance of the coil

XL
Here, Z1  R  jXL  R 2  XL2 tan-1  Z1
R
XL
where, Z1  R2  XL2 ;  tan-1 & XL  L
R

Let, I be the current through RLC series circuit.

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Now,

Magnitude of voltage across coil=IZ 1


Magnitude of voltage across capacitor = IX C
1 1
where, I=| I| & XC  
 C 2 fC

Given that, IZ1=IXC


Z1=Xc

1 1
 Magnitude of impedance, Z1=Xc= 
2 fC 2  50  120  10 6
=26.5258

Given that, power factor of the coil = 0.8 lag


 Power factor angle of the coil, =cos-1 0.8=36.9o

Let us construct an impedance triangle for Z 1by using R & XL as two sides as shown in fig. here
the impedance angle is same as power factor angle.

Impedance triangle
With reference to fig. we can write,

R X
cos   & sin   L
Z Z
 Resistance, R=Z cos =26.5258  cos 36.9o=21.2123 

Inductive reactance, XL=Z sin  = 26.5258  sin 36.9o=15.9266

We know that, XL=L

XL X 15.9266
 Inductance, L   L   0.0507H  50.7mH
 2 f 2  50

Result:

The parameters of the coil are R&L.

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Resistance of the coil, R=21.2123


Inductance of the coil, L=50.7 mH

8. Three impedances 12-j0, 5+j8 & 0-j7 are connected in parallel. This parallel
combination is connected in series with an impedance of 4+j6  across a 230 V source.
Determine the current through each impedance and the power.

Fig (a)

Solution

The series-parallel connections of the impedances are shown in fig. Let us name the impedances
as Z1,Z 2 ,Z3 & Z 4 as shown in fig. Let the current through the impedances be I1, I2 , I3 & I4 as shown
in fig. let supply voltage be reference phasor.

 Supply voltage = 230 0o V

Let, Z eq be the equivalent impedance of the parallel combination of Z1,Z2 ,&Z3 and the circuit can
be modified as shown in fig.(b)

Fig. (b)

1 1
Now, Zeq  
1 1 1 1 1 1
   
Z1 Z2 Z3 12 5  j8  j7
1
= 12-1   5  j8     j7    6.2647  j2.3785
1 1

 

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Let Va & Vb be the voltage across Z 4 & Zeq as shown in fig (b) now by voltage division rule we can
write,

4  j6
Va  230   121.8879  j91.4379V
4  k6  .2647  j2.3785
=152.3731 36.9 o V
By KVL we can write,

Vb  230  Va  230   121.8879  j91.4379   108.1121  j91.4379V


=141.5949 -40.2o V

Here the voltage across Z 4 is Va and the voltage across Z1,Z2 ,&Z3 are Vb (because Z1,Z2 ,&Z3 are
in parallel). Now the current through the impedances can be evaluated by using ohm’s law as
shown below.

Va 152.3731 36.9o 152.3731 36.9 o


I4     21.1304 -19.4o A
Z4 4  j6 7.2111 56.3 o

Vb 141.5949 -40.2o
I1    11.7996 -40.2o A
Z1 12

Vb 141.5949 -40.2o 141.5949 -40.2o


I2     15.009 -98.2o A
Z2 5  j8 9.434 58 o

Vb 141.5949 -40.2o 141.5949 -40.2o


I3     20.2278 49.8o A
Z2  j7 7  90o

We know that the complex power is given by the product of voltage and conjugate of
current. Hence the complex power in each impedance can be obtained from the product of voltage
and conjugate of current in the impedance.

Let S1,S2 ,S3 & S 4 be the complex power of the impedances Z1,Z 2 ,Z3 & Z 4 respectively. Let P1, P2,
P3 & P4 be active power and Q1, Q2, Q3 & Q4 be the reactive power of the impedances.

For impedance Z 4 ,
 
S4  Va I4 *  152.33731 36.9 o  21.1304 -19.4 o *
 152.33731 36.9o  21.1304 -19.4 o  3219.7 56.3o VA
=1786.4+j2678.6=P4  jQ 4

S4=3219.7VA=3.2197kVA

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P4=17863.4W=1.7864kW
Q4=2678.6VAR=2.6786kVAR

For impedance Z1


S4  Vb I1 *  141.5949 -40.2o  11.7996 -40.2o * 
=141.5949 -40.2o  11.7996 40.2o=1670.8 0o VA

=1670.8+j0=P1+jQ1

S1=1670.8VA=1.6708kVA
P1=1670.8W=1.6708kW
Q1=0

For impedance Z 2

 
S4  Va I4 *  141.5949 -40.2o  15.009 -98.2o *

 141.5949 -40.2o  15.009 98.2o

 2125.2 58o VA

=1126.2+j1802.3VA=P2  jQ 2

S2=2125.2VA=2.1252kVA
P2=1126.2W=1.1262kW
Q2=1802.3VAR=1.8023kVAR

For impedance Z3


S3  Vb I3 *  141.5949 -40.2o  20.2278 49.8o * 
 141.5949 -40.2o  20.2278 -49.8 o
=2864 -90o =0-j2864=P3  jQ3
S3=2864VA=2.864kVA
P3=0
Q3=-2864VAR=-2.864kVAR

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9. Two reactive circuits have an impedance of 20  each. One of them has a power factor of
0.75 lagging and the other 0.65 leading. Find the voltage necessary to send a current of 12A
through the two circuits in series. Also determine the current drawn from 200V supply if
they are connected in parallel to the supply.

Solution:

Case I: Impedances in series

Let Z1 & Z 2 be the impedances of the two circuits. The series combination of two circuits excited
by a voltage source can be represented by the circuit shown in fig.

Fig.

When the current is lagging the impedance will be inductive. Hence the impedance angle is
positive and it is given by the power factor angle. Now the impedance Z1 can be expressed as
shown below.

Z1  20  cos1 0.75  20 41.4 o   15.0022  j13.2262

When the current is leading the impedance will be capacitive. Hence the impedance angle is
negative and it is given by the negative of power factor angle. Now the impedance Z 2

Z2  20  cos1 0.65  20 -49.5 o   12.989  j15.2081

Let, Z be the total impedance of series combination.

Now, Z = Z1 + Z 2 =15.0022+j13.2262+12.989-j15.2081
=27.9912-j1.9819=28.0613 -4.1o

Magnitude of impedance, Z=| Z |=28.0613


Given that the magnitude of current, I=| I | =12A

Magnitude of supply voltage, V= IZ

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=1228.0613=336.7356V

If V is the reference phasor then,

V =336.7356 0oV & I =12 4.1oA

If I is the reference phasor then,

V =336.7356 -4.1oV & I =12 0oA

Case ii: When the impedances are in parallel

The two circuits in parallel and excited by a 200 V source can be represented by the circuit shown
in fig. Let I1 & I2 be the current through the impedances Z1 & Z 2 respectively. Let I be the total
current supplied by the source.

Fig.

Let the supply voltage V be the reference phasor.

 V =V 0o=200 0o V

V 200 0o
Now, I1    10 -41.4o A
Z1 20 41.4o
V 200 0o
I2    10 49.4o A
Z 2 20  49.4 o

By KCL we can write,

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I  I1  I2  10  41.4o  10 49.4o
 7.5011  j6.6131  6.5077  j7.5927
 14.0088  j0.9796  14.043 4 o A

10. In the RLC circuit shown in fig 1, determine the values of R & L if V2  2 V1 and the
voltage V1 & V 2 are in phase quadrature.

Figure:

Solution:

Let series combination of R1 & L be impedance Z1 and the series combination of R2 & C be
impedance Z 2 .

Now, Z1  R1  jXL
and Z 2  R 2  jXc
1 1
where, XL  L  2fL and Xc  
C 2fC

Given that, R2 = 3 , C = 200  & f = 50 Hz

1 1
 XC    15.9155
2fC 2  50  200  10 6

Let the supply voltage V be the reference phasor.

 V  V 0o V  220 0o V

By voltage division rule we can write,

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VEL TECH VEL MULTI TECH VEL HIGH TECH

Z1 R1  jXL R1  jXL
V1  V  V  V
Z1  Z2 R1  jXL  R2  jXC R1  R2  j  XL  XC 

XL
R12  XL2 tan1
R
 V 0o 
XL  XC
 R1  R2    XL  XC 
2 2
tan1
R1  R2

V R12  XL2 XL  XL  XC 
 0o  tan1    V1 1
 R1  R2 
2
  XL  XC 
2 R1  R1  R 2 

V R12  XL2
where, V1  V1 
 R1  R2    XL  XC 
2 2

XL  X  XC 
and, 1  V1  tan1  tan 1  L 
R1  R1  R2 

Again by voltage division rule we can write,

Z2 R2  jXC R2  jXC
V2  V   V 0o   V 0o 
Z1  Z2 R1  jXL  R2  jXC  R1  R2   j  XL  XC 
 XC
R22  XC2 tan1
R2
 V 0o 
XL  XC
 R1  R2    XL  XC 
2 2
tan1
R1  R2

V R22  XC2 XC  X  XC 
 0o  tan1  tan1  L   V2 2
 R1  R2    XL  XC  R2  R1  R2 
2 2

V R22  XC2
where, V2  V 2 
 R1  R2    XL  XC 
2 2

XC  X  XC 
and, 2  V 2   tan1  tan1  L 
R2  R1  R2 

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Given that,

2 V1  V 2
 2V1  V2

2V R12  XL2 V R22  XC2



 R1  R2    XL  XC   R1  R2    XL  XC 
2 2 2 2

 2 R12  XL2  R 22  XC2

On squaring we get,

  
4  R12  XL2  R22  XC2 
R22  XC2 32  15.91552
 R12  XL2    65.5758
4 4
 R12  XL2  65.5758   4.13.1

Also it is given that,

 V1   V 2  90o
 1  2  90o

XL  X  XC   1 XC  X  XC  
 tan1  tan1  L     tan  tan1  L    90
o

R1  R1  R2   R2  R1  R2  
XL X
tan1  tan1 C  90o
R1 R2

XL X
tan1  90o  tan1 C
R1 R2

15.9155
=90o  tan1
3
=10.7o

XL
  tan10.7o  0.189
R1
XL  0.189R1   4.13.2 

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On substituting XL = 0.189 R1 in equation (4.13.1) we get,

R12   0.189R1   65.5758


2

 
 1  0.1892 R12  65.5758

65.5758
 R1   7.957
1  0.1892
XL  0.189R1  0.189  7.957  1.5039

We know that, XL  L  2fL

XL 1.5039
L    4.7871 10 3 H
2f 2  50
 4.7871mH

Result

R1  7.957 & L=4.7871mH.

11. The parameters of a RLC parallel circuit excited by a current source are R=40 , L=2mH
& C=3 F. Determine the resonant frequency, quality factor, bandwidth and cut-off
frequencies.

Solution:

Given that, R=40, L=2mH & C=3F


1
Angular resonant frequency, r 
LC
1
  12909.9445  12910 rad/s
2  10  3  106
3

r 12910 2054.7
Resonant frequency, fr    2054.7 Hz= kHz  2.0547kHz
2 2 1000
R 40
Quality factor at resonance, Qr    1.5492
rL 12910  2  10 3
1 1
Bandwidth,    8333.3333 rad/s  8333 rad / s
RC 40  3  106
 8333.3333 1326.3
Bandwidth in Hz   1326.3Hz  kHz = 1.3263kHz
2 2 1000

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 1 1 
Higher cut-off frequency, fh  fr   1 
 2Qr 4Qr2 
 1 1 
=2.0547    1 
 2  1.5492 4  1.54922 
=2.8222kHz

 1 1 
Lower cut-off frequency, fh  fr   1 
 2Qr 4Qr2 
 1 1 
=2.0547    1 2 
 2  1.5492 4  1.5492 
=1.4959kHz

12. A coil of inductance 31.8mH and resistance 10 is connected in parallel with a
capacitor across a 250V, 50Hz supply. Determine the value of capacitance if no reactive
current is taken from the supply.

Solution:

The parallel combines of the coil and capacitor excited by the voltage source is shown in fig.

Fig.

The circuit of fig. has two parallel branches. Let Y1 be the admittance of the coil and B C be the
capacitive substance. Here Y1 =1/ Z1, where Z1 is the impedance of the coil.

Let Y be the total admittance of the two parallel branches.

Given that the current supplied by the source does not have any reactive components. This
happens only at resonance. At resonance the circuit behave as purely resistive, which means that
the imaginary part of admittance Y is zero. Therefore the value of C can be determined by
equating the imaginary part of admittance to zero.

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1 1 1
Y  Y1  jBC   jBC   jBC   jBC
Z1 R1  jL R  j2 fL

1 1
=  jBC   jBC
10+j2  50  31.8  10 -3
10  j9.9903

1 10  j9.9903 1
=   jBC  2  jBC
10+j9.9903 10  j9.9903 10  9.9903 2

10  j9.9903 10 9.9903
=  jBC  j 2  j BC
199.8061 199.8061 10  9.9903 2
=0.05-j0.05+jBC  0.05  j  BC  0.05 

On letting imaginary part of admittance to zero we get,

BC-0.05=0

BC=0.05

BC B C 0.05
Since, BC   C, C=    1.5915  10 4 F
 2 f 2  50
=159.15  10-6F  159.15 F

13. In the RLC network shown in fig. determine the value of R C for resonance. Also
calculate the dynamic resistance.

Fig.

Solution:

The given network has two parallel branches. Let Y1 & Y2 be the admittances of the parallel
branches as shown in fig.

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Fig.
1 1
Here, Y1  & Y2 
Z1 Z2

Where Z1 & Z 2 are the impedances of the parallel branches.


Let, Y = Total admittance of the RLC parallel network.

1 1 1 1
Now, Y  Y1  Y2    
Z1 Z 2 3  j12 RC  j12.5

Let us separate the real and imaginary part by multiplying the numerator and denominator of each
term by the complex conjugate of denominator.

1 3  j12 1 R  j12.5
Y    C
3  j12 3  j12 RC  j12.5 RC  j12.5

3-j12 R  j12.5 3.j12 RC  j12.5


=  2C  
3  12 RC  12.52 153 RC2  156.25
2 2

3 12 RC 12.5
= j  2 j 2
153 153 RC  156.25 R C  156.25

RC 12.5
=0.0196-j0.0784+ j 2
R  156.25 RC  156.25
2
C

 RC   12.5 
=  0.0196+ 2   j 2  0.0784 
 RC  156.25   RC  156.25 

For resonance the imaginary part of Y should be zero.

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12.5
  0.0784  0
R  156.25
2
C

12.5
 0.0784
R  156.25
2
C

12.5
 R C2  156.25
0.0784
12.5
RC   156.25  1.7857
0.0784

The dynamic resistance is given by the inverse of the real part of the admittance at resonance.

1 1
 Rdynamic    32.4676
RC 1.7857
0.0196  2 0.0196 
RC  156.25 1.78572  156.25
Result:

For resonance, RC=1.7857


The dynamic resistance, Rdynamic=32.4676.

14. Determine the value of RL for resonance in the network shown in fig.

Fig.

Solution:

The given network has two parallel branches. Let Y1 & Y2 be the admittances of the parallel
branches as shown in fig.

Fig.

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1 1
Here, Y1  & Y2 
Z1 Z2

Where Z1 & Z 2 are the impedances of the parallel branches.

Let, Y = Total admittance of the RLC Parallel network.

1 1 1 1
Now,Y  Y1  Y2    
Z1 Z2 RL  j20 20  j10

Let us separate the real and imaginary part by multiplying the numerator and denominator of each
term by the complex conjugate of denominator.

1 R  j20 1 20  j10
Y  L  
RL  j20 RL  j20 20  j10 20  j10

RL -j20 20  j10 RL  j20 20  j10


=   
RL  20
2 2
20  102 RL2  400 500

RL 20 20 10
= j 2  j
R  400 RL  400 500 500
2
L

RL  20 
=  0.04  j  0.02  2 
R  400
2
L  RL  400 

At resonance the imaginary part of admittance will be zero.

20
 0.02  0
R  400
2
L

20
0.02=
R  400
2
L

20
RL2  400 
0.02
20
 RL   400  24.4949 
0.02

Result:

For resonance, RL=24.4949

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15. In the RLC network shown in fig. determined the two possible values of C for the
network to resonance at 2000 rad/s. Also determined the value of C for resonance at all
frequencies.

Fig.

Solution:

Let Y1 & Y2 be the admittances of the parallel branches.


1 1
Here, Y1  & Y2 
Z1 Z2
Where, Z1 & Z 2 are the impedances of the parallel branches.

Let, Y = Total admittance of the RLC parallel network.

1 1 1 1
Now,Y  Y1  Y2    
Z1 Z 2 R  jXL R  jXC
1 1 1 1
=   
R+jL R  jXC 4  j2000  5  10 3
4  jXC
1 1
= 
4+j10 4  jXC

Let us separate the real and imaginary part by multiplying the numerator and denominator of each
term by the complex conjugate of denominator.
1 4  j10 1 4  jXC
Y   
4  j10 4  j10 4  jXC 4  jX C

4-j10 4  jXC 4  j10 4  jXC


=  2  
4  10
2 2
4  XC2 116 16  XC2

4 10 4 XC
= j  j
116 116 16  XC
2
16  XC2

 4   XC 
=  0.0345  2 
 j  0.0862 
 16  XC   16  XC
2

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At resonance the imaginary part of admittance will be zero.

XC
  0.0862  0
16  XC2
XC
  0.0862  0
16  XC2
XC
or  16  X C2
0.0862

11.6009XC=16+XC2
 XC2  11.6009XC  16  0

The roots of the quadratic are,


  11.6009    11.6009 
2
 4  16
XC 
2
11.6009  8.4012
=  10.0011 or 1.5999 
2
1 1
We know that, XC  ,  C=
C  XC
1 1
When, XC =10.0011, C=   4.9995  10 5 F
 XC 2000  10.0011

=49.995  10-6F  49.995 F


1 1
When, XC =1.5999, C=   3.1252  10 5 F
 XC 2000  1.5999

=312.52  10-6F  312.52 F


L
The condition for resonance at all frequencies is R=
C

L L
 R2  or C= 2
C R
The value of C for resonance  L 5  103
C  2  2
 3.125  10 4 F
at all frequencies  R 4
=312.5  10 -6F=312.5 F

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Result:

Two possible values of C for 


  49.995 F & 312.52 F
resonance at 2000 rad/s 
The value of C for resonance 
  312.5 F
at all frequencies 

16. In the RLC network shown in fig. determined the two possible values of L for the
network to resonate at 4000 rad/s.

Fig.
Solution:

Let Y1 & Y2 be the admittances of the parallel branches.

1 1
Here, Y1  & Y2 
Z1 Z2

Where, Z1 & Z 2 are the impedances of the parallel branches.

Let, Y = Total admittance of the RLC parallel network.

1 1 1 1
Now,Y  Y1  Y2    
Z1 Z2 R  jXL R  jXC

1 1 1 1
=   
R+jXL R  j 1 2  jXL 4  j 1
2
C 4000  20  10 6
1 1
= 
2+jXL 4  j12.5

Let us separate the real and imaginary part by multiplying the numerator and denominator of each
term by the complex conjugate of denominator.

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1 2  jXL 1 4  j12.5
Y   
2  jXL 2  jXL 4  j12.5 4  j12.5

2-jXL 4  j12.5 2  jXL 4  j12.5


=  2  
2  XL 4  12.5
2 2 2
4  XL2 172.25

2 XL 4 12.5
= j  j
4  XL
2
4  XL 172.25 172.25
2

2 XL
= j  0.0232  j0.0726
4  XL
2
4  XL2

 2   XL 
=  0.0232  2 
 j  0.0726  
 4  XL   4  XL2 
At resonance the imaginary part of the admittance will be zero.
XL
 0.0862  0
4  XL2

XL
0.0726 
4  XL2

XL
4+XL2 =
0.0726
4+XL2  13.7741XL

 XL2 -13.7741XL +4=0


The roots of the quadratic are,
  13.7741   13.7741
2
 44
XC 
2
13.7741  13.1805
=  13.4773 or 0.2968
2
XL
We know that, XC  L,  L=

XL 13.4773
When, XL =13.4773, L=   3.3693  10 3 H
 4000
=3.3693m H

XL 0.2968
When, XL =0.2968, L=   7.42  10 5 H
 4000
=74.2  10-6H  74.2H

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Result:

Two possible values of L for 


  3.3693mH & 74.2H.
resonance at 4000 rad/s 

17. Write short Notes on Tuned circuits.

At radio frequencies, iron core transformers are note used as eddy current losses and
hysteresis losses increase with frequency. Thus at radio frequency air core transformers are
frequently used. As there is air path between windings, the leakage flux increase and coefficient
of coupling decreases.

In RF circuit design, tuned circuits are generally employed either for obtaining maximum
power transfer to the load connected to secondary or for obtaining maximum possible value of
secondary voltage.

There are two types of tuned circuits namely

i. Singly tuned circuit and


ii. Doubly tuned circuit

1. Singly Tuned Transformer

Consider a singly tuned transformer as shown in the Fig. a

Figure:

Basically above type of circuit is used for coupling a amplifier and radio receiver circuits. In
such applications maximum power transfer is not expected. Instead of that maximum possible
secondary voltage V2 is desired. In this application, R 1 may be considered as the output
resistance of amplifier stage. As this resistance is very high, the resistance of coil L 1 is added to
R1 or many times neglected even. R2 is the resistance of secondary winding.

The secondary voltage is given by,


j
V2    jXC  I2  I2
C2

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The equivalent circuit of the circuit considered is as shown in the Fig.(b)

Figure:
Applying KVD to loop 1, we get,

  R1  I1  j  L1  M I1   jM I1   jM I2  V1  0

   R1  jL1  jM  jM I1   jM I2   V1

  R1  jL1  I1   jM I2  V1

Applying KVL to loop 2, we get,

 j 
 j  L 2  M I2   R 2  I2    I2   jM I2   jM I1  0
 C2 

 j 
  jM I1   jL 2  jM  R 2  jM   I2  0
 C 2 

  1 
   jM I1  R 2  j  L 2    I2  0
  C 2 

For equation (3.81),

 1 
R2  j  L 2  
 C2 
I1  I2
jM

Substituting value of I1 in equation (3.80), we get,

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  1 
 R2  j  L 2  
  C2  
 R1  jL1   2
I   jM I2  V1
jM
 
 

   1  
  R1  jL1  R2  j  L 2     M 
2 2

   C2   
 I2    V1
 jM 
 
 

  1   1  
 I2 R1R2  jL1R 2  jR1  L 2    L1  L 2     M   jMV1
2 2

  C2   C2  
jMV1
 I2    1
L   1 
2M2  R1R 2  2L1L 2  1  j L1R 2  R1  L 2  
C2   C2  

To have maximum secondary voltage, I 2 should be large. From equation (1) it is clear that
we can get maximum I2 if the reactive term in denominator is zero. So by using variable capacitor
we can make the reactive term zero as follows.

 1 
L1R2  R1  L 2  0
 C2 
R
 L1R 2  R1L 2  1
C 2

1  R 
or    L 2  L1 2    2
C2  R1 

 R 
Since R1>>R2, we can neglect term  L1 2  . Thus we can assume the condition for
 R1 
maximum current I2 as,

1
 L 2   3
C2

Under the condition given in equation (2), we can rewrite the expression for maximum I 2 as,
jMV1
I2    4
L1
 M  R1R2   L1L 2 
2 2 2

C2

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But from equation (3), we can write,

1
 2L 2
C2

Substituting this value in equation (4)


jMV1
I2  2 2
 M  R1R2  2L1L 2  2L1L 2

jMV1
 I2 
 M2  R1R 2
2

Now the maximum secondary voltage is given by,

 j  jMV1 
V2   
C2  2M2  R1R 2 

MV1
 V2 

C2  M2  R1R2
2

2ML 2 V1 1
 V2  as  2L2
 M  R1R2
2 2
C2

Differentiating above expression with respect to M, we can get condition for maximum
voltage as

M  R1R2

This is called condition for critical coupling. In general, coefficient of coupling is given by,

M M
k 
L1L 2  L1L 2

Thus, putting value of  M for critical coupling, we can write,

R1R 2
Critical coupling k C 
 L1L 2

For critical coupling, the secondary voltage is given by,

V2 
  M L 2 V1

  R1R 2  
 
R1R 2 L 2 V1
 M
2
 R1R 2  
R1R2  R1R2 2R1R2

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L 2 V1
 V2 
2 R1R2

L 2 V1
V2  .....from equation


2  L1L 2 k C 

 V2 
V1  L 2 / L1 
  5
2k C
From equation (5) it is clear that the maximum value of secondary voltage can be achieved
L 
by selecting either M or the ratio  2  .
 L1 

The variation of secondary voltage with the coefficient of coupling is as shown in the Fig.C

Figure: Variation of output voltage with coefficient of coupling

2. Doubly Tuned Transformer

In doubly tuned transformer circuits, both primary and secondary circuits contain adjustable
capacitance. With the help of adjustable capacitive reactance, impedance matching is possible if
the coupling is critical, sufficient or above. It is also possible to adjust phase angle such that
impedance at generator side becomes resistive. The magnitude matching can be achieved by
adjusting mutual inductance to the critical value, which effectively fulfills maximum power transfer
condition. Consider doubly tuned transfer circuit as shown in the Fig. R 1 is the resistance of
primary winding L1 while R2 is that of secondary winding L 2. R2 may include the resistance
connected as a load.

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Figure (a):
Finding Thevenin’s equivalent circuit across terminals (A) and (B).

Figure: (1)

Open circuit voltage V1 is given by,

 1 
 V
 jC1  g Vg
V1  
1 jC1Rg  1
Rg 
jC1

1
Assume that Rg  i.e. C1Rg  1.
C1
Vg
 V1 
jC1Rg
Consider Fig 1 (b),

 
 1 
 R   j1C
g  Rg
Zoc  Rg    1
 1

 j  C1 Rg  jC1R g  1
jC1

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1
Again according to standard assumption, Rg  ,
C1

1
Zoc 
jC1
From above equation it is clear that a capacitor C 1 appears in series with no change in
effective capacitance. Replacing the original circuit across terminals (A) and (B) by its

Fig 2:

Thevenin’s equivalent circuit as shown in the Fig. 2

Figure 3:

Applying KVL to loop 1, we get

 j 
  R1  I1    I1  j  L1  M I1  jMI1  jMI2  V1  0
 C1 
 j 
  R1  jL1  jM  jM   I1   jM I2   V1
 C1 
  1 
 R1  j  L1    I1   jM I2  V1   1
  C1  

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Applying KVL to loop 2, we get,

 j 
 j  L 2  M I2   R 2  I2    I2   jM I2   jM I1  0
 C2 
 j 
   jL 2  jM  R 2   jM I2   jM I1  0
 C2 
  1 
   jM I1  R 2  j  L 2    I2  0   2
  C2  

If primary and secondary circuits are adjusted by using variable capacitor to resonate, then
current I2 will be maximum. The condition of resonance is given by

1 1
rL1  and rL 2 
r C1 r C2

At resonance reactive term becomes zero, hence rewriting equations (1) and (2) as,

 R1  I1   jM I2  V1   3
  jM I1   R 2  I2  0   4

From equation (4) we can write,

I2R2   jM I1   5

Substituting value of I2 in terms of I1 in equation (3),

 jM I
 R1  I1   jM 1  V1
R2

 R R  2M2 
 I1  1 2   V1
 R 2 

V1R2
 I1    6
R1R 2  2  M2

Similarly substituting from equation (5) value of I 1 in equation (3) again, we get,

 R2 
 R1    I2   jM I2  V1
 j M 

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 R R
1 2 
 2M2 I2  jMV1

jMV1
 I2 
R1R2  2M2

In doubly tuned transformer circuit also the condition for critical coupling is obtained as,

M  R1R2

Then under critical coupling the current I 1 and I2 are given as,

V1R2 VR2 V
I1    1
R1R2  R1R2 2R1R 2 2R1

I2 
j  R1R2  
j R1R 2

jV1
  7
R1R2   R1R 2  2R1R 2 2 R1R2

Equation (7) represents the value of I 2 giving maximum power transfer. But in such
applications maximum output voltage is important. The maximum voltage V 2 under condition of
resonance is given by,

 j    j  jMV1 
V2    I2    2 2 
 C2   C2  R1R2   M 

MV1 / C2
 V2 
R1R2  2M2

1
As r L 2  , we can rewrite V2 as
r C2

r2L 2 V1M
 V2 
R1R2  2M2

r2ML 2 V1
R1R2
 V2 
r2M2
R1R2

Let Q1 be the quality factor of primary circuit. This is also same as quality factor of primary
coil neglecting very high value resistance R g.

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rL1
 Q1    8
R1

Similarly let Q2 be the quality factor of secondary circuit which is same as quality factor of
secondary coil if R2 is the coil resistance,

rL 2
 Q2    9
R2

The coefficient of coupling is given by,

M
k
L1L 2

 k 2L1L2  M2

Substituting values of L1 and L2 from equation (8) and (9),

 Q R  Q R 
k 2  1 1  2 2   M2
 r  r 
 M2
 k 2  Q1Q2   r
R1R2

Hence expression for maximum voltage is given by,

kQ1Q2 L 2 / L1V1
V2 
k 2Q1Q2  1

If above expression is maximized with respect to k, we get the condition for critical coupling.

1
kC 
Q1Q2

Thus the maximum voltage under critical coupling is given by

Q1Q2 L 2
V2  V1
2 L1

Hence to get maximum secondary voltage with critical coupling high values Q 1, Q2 and L2
are selected.

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Under critical coupling secondary current is maximum, hence secondary voltage is also
maximum. Frequency response of secondary voltage for different coupling coefficients is as
shown in below figure.

Figure:

18.A 20  resistor is connected in series with an inductor, a capacitor and an ammeter


across 25 volts variable frequency supply as shown in Fig. When the frequency is 400 Hz,
the current is at its maximum value of 0.5 A and the potential difference across capacitor is
150 volts. Calculate,

(i) The capacitance of capacitor

(ii) The resistance and inductance of inductor.

Figure: (a)
Solution:

When the current is maximum at resonating frequency f 0 = 400 Hz, the total reactance is
zero. That means,

XC  XL at f0 .
1
 XC 
C
V
But XC  C
I0

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Where VC is voltage across capacitance at resonance and I 0 is maximum current in circuit at


resonance.

150
XC   300
0.5

1
 XC 
0C
1
 300 
 2    400  C
 C  1.325F

At resonance, XL = 300 

 XL  0L

 300  2    400  L

 L = 0.119 H

Also at resonance,

Circuit resistance = circuit impedance

V
i.e. 20  RL 
I0

25
 20  RL   50
0.5

 RL  30

 Resistance of inductor is 30 .

19. A resistor and capacitor are in series with a variable inductor. When the circuit is
connected to 200 V, 50Hz supply, the maximum current obtained by varying the inductance
is 0.314 A. The voltage across capacitor, when current in the circuit is maximum, is 800 V.
Find values of series circuit elements.

Solutions:

V = 200 volts, VC = 800 volts, I0 = 0.314 A

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Consider magnitude of capacitor voltage, it is given by,

VC  Q0 V

 800 = Q0 (200)

 Q0 = 4

The current in series resonant circuit is maximum only at resonance and it is given by,

V
I0 
R

200
 0.314 
R

 R = 636.95 

To calculate L and C, we write,

1 L
Q0   0
0RC R

Now circuit is operating at 50 Hz which is resonant frequency,

 0  2    f0  2    50  314.159rad / sec g

0L
Now, Q0 
R

 4
 314.159  L
636.95

 L = 8.1 H

1
Also Q0 
0RC

1
 4
 314.159   636.95  C

 C  1.25  106 F  1.25F

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20. A series circuit is in resonance at 8x10 6 Hz and has a coil of 35 H and 10  resistor.

(i) Find current at resonance.


(ii) What capacitance will require for resonance?
(iii) Find impedance at frequency of 8.1 MHz.
(iv) Find current at this frequency.

Applied voltage is sinusoidal 100 V.

Solution:

V
At resonance, current in the circuit is maximum and it is given by I0 
R

100
 I0  Imax   10A
100

Resonant frequency f0 is given by,

1
f0 
2 LC

Substituting values of f0 and L,

1
8  106 
2 35  10 6  C

 C  11.30  10 12 F  11.3pF

To find impedance at 8.1 MHz, we have to use formula as,

Z  R 1  jQ0 .  2    

 Q0 
0L

 
2    8106  35  10 6
R 10

= 175.93  176

The deviation of actual frequency from resonant frequency is given by ,

f  f0 8.1 10 6
   0.0125
f0 8  106

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The impedance at 8.1 MHz is,

 Z  10 1  j  176   0.0125   1  0.0125  


 Z=10  1+j2.1725 
 Z=10+j21.725

The current in the circuit at 8.1 MHz is,

V 100 100
I  
Z  10  j21.725  23.9265.28o

 I  4.18  65.28o A

The negative sign of angle shown that the current is lagging voltage which is indication of
inductive load (This fact is also clear from angle of Z at 8.1 mHz which is positive).

21. In a series RLC circuit, if C is variable then show that the value of C for maximum
voltage across it is given by,

L
C
R  XL2
2

Solution: The circuit is shown in the Fig. below

Figure:

The impedance of the circuit is,


j
Z  R  jL 
C
 1 
 R  j  L 
 C 
V
I
2
  1 
R   L 
2

 C 

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The voltage across the capacitor is,

VC  I XC

V 1
VC 
1  C
2
 
R 2   L 
 C 

For maximum VC,

dVC
0 ....as C is variable
dC

  2 1/ 2  

 
 R2   L  1  
    
dVC d   C  
  V  
dC  dC  C 
   
   

differentiating by the rule of u/v,

  2  2 3 / 2
  2  2 1/ 2
 
1
 C.  R   L  1   2L 2  1 
  .  2  2 3   R   L    . 
dV 
 2   C    C  C    C   
 C  V.  
dC  2C2 
 
 

For maximum C, numerator must be zero and splitting the index – 3/2 as – ½ and -1, we
get the equation as,
1/ 2 1
C  2  1    2  1    2L
2 2
2 
 . R   L   . R   L    2  2 3
C   
2     C    C C 
1/ 2
 2  1  
2

 R   L   .  0
  C  

1
C  2  1  
2
L 1 
  . R   L    .2  2  2 3   1  0
2   C   C C 

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C
.
 L C  1  1
2

  1 
2
2C3
R2   L 
 C 

  1  
2

  
 L3C  1  2C2 R 2   L 


C  


 1  L2C  R22C2  4C2L2  22CL  1

 2C2  R2  2L2   2LC  0

 C R2  2L2   L  0

L L
 C  2 ...proved.
R   L R  XL2
22 2

22. Calculate the maximum voltage across the inductor in a series resonant circuit with
constant voltage and variable frequency and R =50 , L = 0.05 H, C = 20 F and V = 100 V.

Solution: R = 50 , L = 0.05 H, C = 20 F, V = 100 V

Maximum voltage across inductor in series resonant circuit occurs at frequency given by,

1 1
fL  
R 2C 2

  50  2 20  10 6  
2
2 LC 
2 2  0.05   20  10 
6




2
 
 225.07Hz

The impedance of series resonant circuit at f L is given by,


Z  R  j  XL  XC 
XL   2f  L   2    225.07   0.05   70.7
1 1
XC    35.35
 2f  C  2  225.07  20  106 
Z  50  j  70.7  35.35 
 50  j35.35

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Total current in series circuit is,

V 100 100
I  
Z 50  j35.35 61.23435.26o
I  1.633  35.26o Amp

 Voltage across inductor = VL = I (j XL)

 1.633  35.26o  70.790o 


 115.45857.74o volts

23. An inductive coil having a resistance of 20  and an inductance of 0.02 H is connected


in series with 0.02 F capacitor. Calculate:

(i) Q factor of coil


(ii) Resonant frequency
(iii) Half power frequencies

Solution:

R = 20 , L = 0.02H, C = 0.02

Resonant frequency is given by;

1
f0 
2 LC

1

2   0.02   0.02  106 
 7.957kHz

Q factor of coil is given by,

0L  2    f0   0.02 
Q0    50
R 20

R
Bandwidth  2f   f2  f1  
2L

R
 2f 
2L

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R
 f   79.57Hz
4L

Lower Half power frequency


fL  f0  f  7.957  103  79.57 
 7.877kHz

Upper Half power frequency


fH  f0  f  7.957  103  79.57 
=8.036kHz

24. A RLC series circuit of 8  resistance should be designed to have bandwidth of 50Hz.
Determine the values of L and C so that the circuit resonates at 250 Hz.

Solution:

R = 8 , B.W = 50 Hz, f0 = 250 Hz

R
Bandwidth  H
2L

8
 50 
2L

 L = 25.46 mH

To find value of C,

1
f0 
2 LC

1
 250 
2    25.46  10 3  C

1
 500   
2
 
C  25.46  10 3

1
 C  15.9F
25.46  10 3   500   
2

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25. A parallel circuit has a fixed capacitor and variable inductor having constant quality
factor of 4. Find value of inductance and capacitance for circuit impedance of (1000) at
resonating frequency 2.4 MHz. What is bandwidth of circuit?

Solution: Q0 = 4, Z0 = 1000 , far = 2.4 MHz

The impedance of the parallel circuit at resonance is given as,

L
zar 
CRL

But 
Zar  RL 1  Q02 
1000=RL 1   4  
2

 
 RL  58.82
L
 Zar   1000
C.RL
L
   1000   RL 
C
L
   1000   58.82 
C
L
  58.82  103   1
C

The resonating frequency is given by,

1 1 RL2 1 1 1
far   2  . 1 2
2 LC L 2 LC Q0

  2.4  10   2 1LC
6
1
1
16
1 15 
  2.4  10  
6

42  LC   16 
 
15
 LC=
 
2
4  2  16  2.4  10 6
 LC=4.1227  10 -15   2

From equation (1) and (2), we get values of L as,

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 L 
L 3 
 4.1227  10 15
 58.82  10 
 L2  2.425  10 10
 L=15.57H

Similarly, C  0.264nF

far 2.4  106


Bandwidth =  f2  f1   
Q0 4
= 0.6 x 106

 Bandwidth = 0.6 MHz

26. A parallel circuit resonates at 1 MHz having inductance of 150 H with Q0 of 60. Find
value of capacitance and resistance of inductor.

Solution: far 1MHz, L=150H, Q0  60

1 1
far  . 1
2 LC 3600

0.9997
 LC  L
4  2  106

2.5326  10-14
 C=
150  10 6
 C=168.8pF

arL
Also, Q0 
RL

 RL 
 2    far  L
Q0

 RL 
 2    1 10   150  10 
6 6

60
 RL  15.7

27. A coil resonates at 2 MHz when a 18 pF capacitor is shunted across it. When shunting
capacitor is 81 pF, the resonating frequency becomes 1 MHz. Find the distributed
capacitor of coil and what is self resonating frequency.

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Solution:

Let distributed capacitance of coil be C d. Assume that quality factor of coil is very much
large than 10.

1
Then, far   Note that Cd is in pico farads 
2 LC

Now, when C  18pF, far  2  106 Hz

1
  2  10  
6
  1
2 L  Cd  18 

also, when C  81pF, far  1 10 6 Hz

1
  1 10  
6
  2
2 L  Cd  81

Dividing equation (1) by (2),

Cd  81
 2=
Cd  18
 4  Cd  18   Cd  81
 3Cd  9
 Cd  3

 Distributed capacitance of coil is 3 x 10 -12 F ie. 3 pF. Now, to find self resonating frequency we
must know value of L. So substituting value of Cd in equation (1) we get,

1
2  106 
2    L  3  18   10 12
1
 L=
 
2
12
4    10
2
 2  106
 L = 0.3 mH

Self resonating frequency with L = 0.3 mH and Cd = 3 x 10-12 F is given by,


1 1
far  
2 LC 2    0.3  10 3  3  10 12
far  5.31MHz

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28. In the circuit shown in Fig. below the inductance of 0.1H having Q factor of 5 is in
parallel with capacitor. Determine the value of capacitance and coil resistance at resonant
frequency of 500 rad/sec.

Figure:

Solution: The quality factor is given by,

arL
Q
RL

 5=
 500   0.1
RL
 RL  10

For above circuit frequency of resonance is given by,

1 RL2
ar  
LC L2

1  10 
  500   
 0.1  C   0.1 2

1
 500 
2
   10000
 0.1 C
1
  250000  10000  260000
 0.1 C
1
 C=
 0.1  260000 
 C=38.46  10-6F
i.e. C=38.46F

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29. If R is positive, show that resonance is impossible in the circuit show in Fig. below

Figure:

Total admittance is,

1 1 R  j10 4  j5
Y   2 
R  j10 4  j5 R  100 16  25
R  j10 4  j5
 2 
R  100 41
 R 4 5 10 
 2    j  2 
 R  100 41  41 R  100 

For resonance, the susceptance part is zero.

5 10
  2 0
41 R  100

5 10
  2
41 R  100
  
5 R2  100  410
 R 2  100  82
 R 2  18
 R= -18

Thus, for resonance, value of R is negative i.e. R is imaginary. This clearly shows that in
the circuit, resonance is impossible for positive values of R.

30. Two impedance Z1 = 20 + j 10 and Z 2 = 10 – j 30 are connected in parallel and this


combination is connected in series with Z 3 = 30 + j X. Find the value of X which will
produce resonance.

Solution: From given information, given circuit is as shown in Fig. (1)

Total impedance is given by,

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Figure:

Z  Z3   Z1  Z 2 

  30  jX  
 20  j10   10  j30 
 20  j10    10  j30 
  30  jX  
 200  j100  j600  300 
 30  j20 
  30  jX  
 500  j500 
 30  j20 
  30  jX  
 500   1  j1  30  j20 
 30    20 
2 2

500
  30  jX  
1300
 30  j30  j20  20
500
 30  jX   30  j30  j20  20
1300
5
 30  jX   50  j10 
13
 250   50 
 30    j X  
 13   13 

The circuit shown in Fig. will resonate, if imaginary part is zero,


50
 X- 0
13
50
 X=
13
 X=3.846

31. A parallel resonant circuit has a coil of 150 H with Q factor of 100 and is resonated at 1
MHz.
(i) Specify the required value of capacitance,
(ii) What is resistance of coil?
(iii) What is resistance of circuit at parallel resonance?

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(iv) What is absolute bandwidth of resonant circuit?


(v) What is bandwidth of the circuit when it is matched with the generator impedance?

Solution:

L = 150 H, Q0 = 100, far = 1 x 106 Hz

(i) Value of C required for resonance,

1 1
 far  . 1
2 LC Q02

1 1
  1 10   6
6
. 1
1002
2  150  10  C
1  1 
  
150  10-6  C   1  10000 
 
2
4  2  1 106  
 C=168.8pF

(ii) Resistance of coil RL is given by

arL
Q0 
RL
 L
 RL  ar
Q0

 RL 
 2    1 10   150  10 
6 6

100
 RL  9.43

(iii) The resistance of circuit at resonance Zar or Z0 is given by


Zar  Z0  RL 1  Q02 
 
Zar  9.43 1  100 2 
 Zar  94.31 103   94.31k

(iv) The absolute bandwidth is given by,

far
B.W.   f2  f1  
Q0

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1 106
 B.W 
100

 B.W.  10kHz

For the circuit, with generator resistance equal to the circuit resistance at resonance,
bandwidth is given by,

far  Zar 
B.W.  1   where R g  generator resistance
Q0  Rg 
But Zar = Rg

far
 B.W.=2
Q0
 B.W.=2  10kHz   20kHz

32. A coil of 10H and resistance of 10  is in shunt with 100 pF capacitor. The combination
is connected across a generator of 100 V, having internal resistance of 100 k. Determine,

(i) Voltage across parallel circuit at resonance and


(ii) Bandwidth.

Solution:

L = 10 H, RL = 10 , C = 100 pF, Vin = 100 V, Rg = 100 k

The resonating frequency is given by,

1 1 1 1 RL2
far  1 2  
2 LC Q0 2 LC L2

 10 
2
1 1
 far  
 10 
12
2   10  100  10 2

 far  5.032 kHz

At resonance, parallel circuit offers resistance,

L 10
Zar   10
 10  109 
CRL 100  10  10

The circuit can be shown as below,

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Figure:

By voltage divider formula voltage across parallel resonant circuit is given by,

 Zar   10  109 
V  Vin    100  3
 Zar  Rg  10  10  100  10 
9

 V=99.999V  100V

Bandwidth of circuit with generator resistance is given by,

far  Zar  ar / 2  Z0 


B.W.  1   1  
Q0  R g  arL / RL  Rg 

RL  Z0  10  10  109 
 1    1  
2L  Rg  2    10  100  103 

 B.W.=  f2  f1 

 15.91kHz

33. Find value of L at which circuit shown in the Fig. resonates at a frequency of  = 500
rad/sec.

Figure:

Solution: The total admittance is given by,

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1 1 2  jXL 5  j10
Y   
2  jXL 5  j10  2    XL 
2 2
 5    10 
2 2

2  jXL 5  j10  2 5   10 XL 
      j  
4  XL 25  100  4  XL 125  125 4  XL2 
2 2

At resonance, susceptance becomes zero. Hence at resonance,

10 XL
  0
125 4  XL2
10 XL
 
125 4  XL2
 40+10XL2  125XL
 10XL2  125XL  40  0

Solving above quadratic equation for XL we have

 125   4  10   40 
2
125  125  14025
XL  
2  10  20
125   118.427 
 X 
L
20

 XL  12.17 or XL  0.3286

But XL  L

XL
 L=

12.17 0.3286
 L= or L=
500 500
 L=24.34mH
or L=0.6572mH

34. For the series R-L-C combination shown in the Fig, find impedance Z (j) as a function
of ‘’. At what frequency  is the magnitude of the impedance at a minimum?

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Figure:

Solution:

Referring above, the impedance of the series RLC combination is given by

j

Z  100  j   5  10 3   
 300  10 6 
From above expression it is clear that impedance Z depends on frequency , hence we can write,

 1 

Z  j  100  j  5  10 3    
 300  10 6    
By the property of resonance, at a frequency of series resonance, impedance is minimum
canceling out reactive part. Hence we can write at resonating frequency =0,

 1 

 5  103 .0  0
 
300  0 6   
1
 
5  10-3 .0  

300  10 6 0 
1
 02 
 300  10   5  10 
6 3

 0  816.496 rad/sec.

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UNIT – III
SEMICONDUCTOR DIODE
PART – B

1. Define Intrinsic Semiconductor.

A semiconductor in an extremely pure form is defined as intrinsic semiconductor or pure


semiconductor.

2. Define Extrinsic Semiconductor.

The electrical conductivity of pure semiconductor can be increased by adding some impurity
into it. The resulting semiconductor is called extrinsic semiconductor or impure semiconductor.

3. What are the types of semiconductor?

There are two types of semiconductor. They are:

Intrinsicsemiconductor
Extrinsic semiconductor
a. N-type semiconductor
b. P-type semiconductor

4. Define doping.

The process of adding impurities to an intrinsic semiconductor is known as doping.

5. What are N-type semiconductors.

When a small amount of penta valent impurity(e. g. Antimony, Arsenic) is added to a pure
semiconductor, it is known as N-type semiconductor.

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6. What are P-type semiconductors.

When a small amount of tri-valent impurity(e. g. Indium, Galluim) is added to a pure


semiconductor, it is known as P-type semiconductor.

7. Define the term drift current.

When a potential difference is applied across the semiconductor, an electric field is developed
in the material. It causes free electron to move in one direction and holes to drift in other
direction. Because the electrons move in opposite direction, from the holes these two
components of current add rather than cancel. The total current due to the electric field is known
as the drift current.
8. Define the term diffusion current.

Whenever there is a concentration of carriers in one region of a semiconductor and shortage in


other region, then the carrier in the high density will move to the low density region until their
distribution becomes uniform. During this time that carriers are moving from the higher
concentration to lower concentration, there is a transfer of charge is taking place. This current is
called diffusion current.

9. What is called P-N junction diode biasing?

When a PN junction is connected to an external voltage source, it is called PN junction diode


biasing. The two types of bias are : a. Forward Bias and b. Reverse Bias.

10. What are the differences between drift current and diffusion current?

Sl
Drift current Diffusion current
No
1 Developed due to the potential gradient Developed due to the change in concentration gradient.

Phenomenon found both in semiconductor & Only in semiconductors.


2
metals

11. What is forward Bias?

If P type terminal is connected to anode(positive electrode), and N type terminal is connected to


cathode(negative electrode), it is known as forward bias. At forward bias, large current will flow in
the range of mille amperes. Forward bias is equivalent to short circuit.

12. What is reverse Bias?

If P type terminal is connected to cathode(negative electrode), and N type terminal is connected


to anode(positive electrode), it is known as reverse bias. At reverse bias, small current will flow in
the range of mille amperes. Reverse bias is equivalent to open circuit.

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13. What is depletion region or transition region or space charge region in a PN junction
diode?

The region around the junction from which the charge carriers are depleted is called as
depletion region. Since this region has immobile ions, which are electrically charges, the
depletion region is also known as space charge region.

14. What is junction or potential barrier?

Barrier potential is the voltage developed by the junction due to the movement of carriers from
original to the opposite side. That is electrons are moving to P side and holes are moving to N
side. So the resultant field is weakened and the barrier height is reduced at the junction.
15. What is the potential barrier for silicon & Germanium?

Potential barrier for Silicon - 0. 7 V.


Potential barrier for Germanium - 0. 3 V.

16. Define knee voltage or threshold voltage.

The forward voltage at which the current through the PN junction starts increasing rapidly is
known as knee voltage. It is also called as cut-in voltage or threshold voltage.

17. Define Break down voltage.

The reverse voltage at which the PN junction breaks down, with sudden rise in reverse current
is called as breakdown voltage.

18. What is mobility?

Mobility of a charge carrier is defined as the average drift velocity PG unit electric field. Its unit
square meters per volt-seconds.

µ=V/E
where µ - Mobility
V - Drift velocity
E - Applied electric field.

19. What is conductivity?

Conductivity is defined as the current density per unit applied electric field. It s unit is mho per
meters.

 J
E
where Ó – Conductivity
J – Current Density

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E – Applied Electric field.

20. In an unbiased junction, what is the thickness of the depletion region?

In the order of 0. 5µ.

21. What is dynamic resistance of a diode and static resistance of a diode?

The dynamic of a. c. Forward resistance of a diode is the resistance offered by the diode to an
ac signal. It is defined as the ration of change in voltage across the diode to the resulting change
in current through it.

Dynamic Resistance , ac=Δvf/ΔIf


22. What is the static resistance of a diode?

Static or do forward resistance of a diode is the resistance offered by the diode to the direct
current. It is defined as the ratio of the dc voltage across the diode to the dc current following
through it.
Static Resistance, Rf= V I

23. What is reverse resistance of a diode?

Reverse resistance is defined as the opposition offered by the diode to the reverse current,
under reverse biased condition. Its value is very large as compared to forward resistance.
Rn=VR/IN=Reverse voltage/Reverse current.

24. Write down and explain the junction diode equation.


 v VT 
I  O0  e   1
 
where I = forward( or reverse )diode current

I0 = Reverse saturation current


V = Diode voltage.
 = a const. 1 for Ge diodes
2 for Si diodes
V = volt equivalent of temperature
T
Its value is T/11,600
T = absolute temperature

25. What is maximum power rating of a diode?

The maximum power that a diode can dissipate without damaging it, it is called its maximum
power rating.

26. What is peak inverse voltage.

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Peak inverse voltage(Piv) is the maximum voltage across the diode when it is not conducting.

27. What causes the diffusion of holes and electrons across PN junction ?

Concentration gradient causes the diffusion of holes & electrons across a PN junction.

28. Define the term diffusion capacitance or Storage capacitance.

The capacitance, which exists in a forward-biased junction, is called a diffusion or storage


capacitance. It is different from the depletion layer capacitance, which exists in a reverse-biased
junction. The diffusion capacitance arises due to the arrangement of minority carrier density.
And its value is much larger than the depletion layer capacitance. Its value for an abrupt junction
is given by the relation :

I
CD 
VT

Where is = mean life time of the carriers


I = value of forward current
 = A const. (1 for Ge and 2 for Si)
T
V = Volt equivalent of temperature

29. Give the expression for depletion capacitance of a diode.

GT= єA/W
where A = cross sectional area of the junction
W = Width of the depleted region.

30. State the different types of semiconductor diode

i. PN junction diode
ii. Zener diode
iii. Varactor diode
iv. Tuned diode
v. PIN diode
vi. LED

31. List the applications of PN junction diode.

i. Used as the rectifier diodes in DC power supplier.


ii. Used as the signal diodes in communication circuits for modulation and demodulation.
Iii. They are used in clipper and clamper circuits.
iv. They are used as a switch in logic circuits used in computers.

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32. What is Bulk resistance.

The resistance of the P and N semiconductor materials of which the diode is made of is known
as bulk resistance or body resistance. It also includes the resistance introduced by the
connection between the semiconductor material and the external metallic conductor also called
contact resistance. It is generally designated by r . Mathematically, the bulk resistance,
B

r =r +r
B p n
Where r = ohmic resistance of P type semiconductor
p
r = ohmic resistance of N type semiconductor
n

33. What is junction resistance?

Its value for a forward biased Pn junction depends upon the value of forward dc current. It is
given by the relation,
r = 26/If
j
where If= forward current, in milli amperes.

34. The PN junction contact potential cannot be measured by placing a voltmeter across
the diode terminals(True/False).

True.

35. The potential barrier at a PN junction is due to the charges on either side of the
junction. These charges are immobile positive ions and immobile negative ions.

36. i. Across an open circuited PN junction diode there exists a barrier potential.

i. When a PN junction is forward biased, the depletion region width decreases.


ii. In an unbiased junction the thickness of the depletion region is of the order of 0. 5µ .

37. The potential barrier is heavily doped and breakdown voltage will be small.

38. What is the effect of temperature on diode characteristics?

As temperature increases, the exponent will reduce hence the diode current also decreases. It
is found that the variation of saturation current I 0 is much greater than the exponential term.

For Ge or Si diode the following equation will express all mathematical relations.
(T -T )/10
I =I 2 2 1
02 01
where I - Saturation current at temperature T
02 2
I - Saturation current at temperature T
01 1

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39. Give the expression for Power dissipation in diode.

The value of the power dissipated is given by the product of voltage and the current through it.
For a forward biased diode, it is given by,

P V *I
D = F F
where V – Voltage drop up forward bias
F
I – Forward bias current
F
Similarly, for a reverse biased diode the power dissipation is given by,
P =V *I
D R R
where V – Voltage drop at reverse bias
R
I – Reverse bias current
R

40. State the relationship between diode capacitance and the reverse bias voltage.

The value of the depletion capacitance of a PN junction diode is given by

K
CT 
(VB  V )n

where K–Constant, depends on the nature of the semiconductor material

- Barrier voltage, 0. 7 V for Si and 0. 3 for Ge.


VB
V– Reverse bias voltage.
n-Constant depends on the nature of the junction.

41. Define recovery time of the diode.

The recovery time is the time difference between the 10% point of the diode voltage and the
time when this voltage reaches and remains within 10 % of its final value.

42. Define peak inverse voltage.

It is the maximum safe rating voltage of a rectified diode when it is reverse biased.

43. The potential barrier at a PN junction is due to the charges on either side of the
junction. These charges are electrons and holes.

44. A pure Ge crystal is an intrinsic semiconductor and a doped crystal is an extrinsic


semiconductor

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PART – B

1. What is intrinsic semiconductor? Explain how the electrons and holes constitute current
in an intrinsic semiconductor.

Intrinsic Semiconductors

A sample of semiconductor in its purest form is called an intrinsic semiconductor. The


impurity content in intrinsic semiconductor is very very small, of the order of one part in 100 million
parts of semiconductor.

Crystal Structure of Intrinsic Semiconductor

Consider an atomic structure of an intrinsic semiconductor material like silicon. An


outermost shell of an atom is capable of holding eight electrons. It is said to be completely filled
and stable, if it contains eight electrons. But the outermost shell of an intrinsic semiconductor like
silicon has only four electrons. Each of these four electrons form a bond with another valence
electron of the neighbouring atoms. This is nothing but sharing of electrons. Such bonds are called
covalent bonds. The atoms align themselves to form a three dimensional uniform pattern called a
crystal.

The crystal structure of germanium and silicon materials consists of repetitive occurrence in
three dimensions of a unit cell. This unit cell is in the form of a tetrahedron with an atom at each
vertex. But such a three dimensional structure is very difficult to represent pictorially. Hence a
symbolic two dimensional structure is used to represent a three dimensional crystal form, as
shown in the figure.

The figure (a) shows two dimensional representation of a germanium crystal structure.
Germanium has a total of 32 electrons. So its first orbit consists of 2 electrons, second consists of
8, third consists of 18 and the valence shell consists of 4 electrons. As there are 4 valence
electrons, it is called tetravalent atom.

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Fig. Two dimensional representation of silicon crystal


The covalent bonds are represented by a pair of dotted lines encircling the two electrons
forming the covalent bond. The more clear understanding of the covalent bonds can be obtained
from the figure (b) which shows the sharing of valence electrons. Both the electrons are shared by
the two atoms. Hence the outermost shell of all the atoms is completely filled, and the valence
electrons are tightly bound to the parent atoms. No free electrons are available at absolute zero
temperature.

Such an intrinsic semiconductor behaves as a perfect insulator at absolute zero


temperature

Electrons and Holes in Intrinsic Semiconductors

Let us see what happens at room temperature. At room temperature, the number of valence
electrons absorb the thermal energy, due to which they break the covalent bond and drift to the
conduction band. Such electrons become free to move in the crystal as shown in the figure (a).

(a) Breaking of covalent bond (b) Electron-hole pair in a (c) Energy band diagram
silicon crystal

Fig. (a)

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Once the electrons are dislodged from the covalent bonds, then they become free. Such
free electrons wander in a random fashion in a crystal. The energy required to break a covalent
bond is 0.72 eV for germanium and 1.1 eV for silicon, at room temperature.

When a valence electron drift from valence to conduction band breaking a covalent bond, a
vacancy is created in the broken covalent bond. Such a vacancy is called a hole. Whenever an
electron becomes free, the corresponding hole gets generated. So free electrons and holes get
generated in pairs. The formation of electron-hole pair is shown in the figure (b) while the
corresponding energy band diagram is shown in the figure (c). Such a generation of electron hole
pairs due to thermal energy is called thermal generation.

The concentration of free electrons and holes is always equal in an intrinsic semiconductor.
The hole also serves as a carrier of electricity similar to that of free electron.
An electron is negatively charged particle. Thus a hole getting created due to
Thus in electron driftsemiconductors
an intrinsic is said to be positively charged.
both holes as well as free electrons are the charge carriers.

Conductivity of Intrinsic Semiconductor

The property called conductivity indicates the ease with which a material can carry the
current. Thus more conductivity means that material can carry high current, very easily. The
conductivity of a good conductor is high while that of an insulator is low.

In intrinsic semiconductor, very few electron-hole pairs get generated at room temperature.
Hence very small current can be constituted, due to the application of voltage to an intrinsic
semiconductor. Thus the conductivity of an intrinsic semiconductor at room temperature is very
low. Such a low conductivity has very little practical significance.

Due to low conductivity, the intrinsic semiconductors are not used in practice for manufacturing of
electronic devices.

2. What is extrinsic semiconductor? Explain the formation of P-type semiconductor & n-


type semiconductor.

Extrinsic Semiconductors

In order to change the properties of intrinsic semiconductors a small amount of some other
material is added to it. The process of adding other material to the crystal of intrinsic
semiconductors to improve its conductivity is called doping. The impurity added is called dopant.
Doped semiconductor material is called extrinsic semiconductor. The doping increases the
conductivity of the basic intrinsic semiconductors hence the extrinsic semiconductors are used in
practice for manufacturing of various electronic devices such as diodes, transistors etc.

Depending upon the type of impurities, the two types of extrinsic semiconductors are,
1. n-type and 2. p-type

Types of Impurities

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The impurity material having five valence electrons is called pentavalent atom. When this
is added to an intrinsic semiconductor, it is called donor doping as each impurity atom donates
one free electron to an intrinsic material. Such an impurity is called donor impurity. The examples
of such impurity are arsenic, bismuth, phosphorous etc. This creates an extrinsic semiconductor
with large number of free electrons, called n-type semiconductor.

Another type of impurity used is trivalent atom which has only three valence electrons.
Such an impurity is called acceptor impurity. When this is added to an intrinsic semiconductor, it
creates more holes and ready to accept an electron hence the doping is called acceptor doping.
The examples of such impurity are gallium, indium and boron. The resulting extrinsic
semiconductor with large number of holes is called p-type semiconductor.

The resulting extrinsic semiconductor with large number of holes is called p-type
semiconductor.
Types Semiconductor

When a small amount of pentavaent impurity is added to a pure semiconductor, it is called


n-type semiconductor. The pentavalent impurity has five valence electrons. These elements are
such as arsenic, bismuth, phosphorous and antimony. Such an impurity is called donor impurity.

Consider the formation of n-type material by adding arsenic (As) into silicon (Si). The
arsenic atom has five valence electrons. An arsenic atom fits in the silicon crystal in such a way
that its four valence electrons form covalent bonds with four adjacent silicon atoms. The fifth
electron has no chance of forming a covalent bond. This spare electron enters the conduction
band as a free electron. Such n-type material formation is represented in the figure (a). This
means that each arsenic atom added into silicon atom gives one free electron. The number
of such free electrons can be controlled by the amount of impurity added to the silicon. Since the
free electrons have negative charges, the material is known as n-type material and an impurity
donates a free electron hence called donor impurity.

Fig. (a) n-type material formation

p-type Semiconductor

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When a small amount of trivalent impurity is added to a pure semiconductor, it is called p-


type semiconductor. The trivalent impurity has three valence electrons. These elements are
such as gallium, boron or indium. Such an impurity is called acceptor impurity.

Fig. (a)
Consider the formation of p-type material by adding gallium (Ga) into silicon (Si). The
gallium atom has three valence electrons. So gallium atom fits in the silicon crystal in such a way
that its three valence electrons form covalent bonds with the three adjacent silicon atoms. Being
short of one electron, the fourth covalent bond in the valence shell is incomplete. The resulting
vacancy is called a hole. Such p-type material formation is represented in the figure (a). This
means that each gallium atom added into silicon atom gives one hole. The number of such holes
can be controlled by the amount of impurity added to the silicon. As the holes are treated as
positively charged, the material is known as p-type material.

At room temperature, the thermal energy is sufficient to extract an electron from the
neighbouring atom which fills the vacancy in the incomplete bond around impurity atom. But this
creates a vacancy in the adjacent bond from where the electron had jumped, which is nothing but
a hole. This indicates that a hole created due to added impurity is ready to accept an electron and
hence is called acceptor impurity. Thus even for a small amount of impurity added, large number
of holes get created in the p-type material.

3. What is meant by Barrier potential and derive the expression for the potential barrier in a
step graded p-n junction?

Barrier Potential

Near the junction, on one side there are many positive charges and on other side there are
many negative charges. According to Coulomb’s law, there exists a force between these opposite
charges. And this force produces an electric field between the charges. The direction of an
electric field is from positive charge towards negative charge.

The opposite charges existing near the junction creates a potential difference (voltage)
across the junction. The electric field between the charges is responsible to produce potential
difference across the junction. This potential difference has a fixed polarity and it acts as a barrier
to the flow of electrons and holes, across the junction. Hence this potential is called barrier
potential, junction potential or built-in potential barrier of a p-n junction.

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The barrier potential is expressed in volts. Its value is called height of the barrier. It is
denoted as V1 or Vbi.

Barrier potential also indicates the amount of voltage with proper polarity, to be applied
across the p-n junction, to restart the flow of electrons and holes across the junction.

The barrier potential is approximately 0.7 V for silicon and 0.3 V for germanium, at 25C.

The barrier potential of p-n junction mainly depends on the following factors:
1. The type of semiconductor used.
2. The concentration of donor impurity on n side.
3. The concentration of acceptor impurity on p side.
4. The intrinsic concentration of basic semiconductor.
5. The temperature.
The entire behaviour of unbiased p-n junction i.e. open circuited p-n junction is shown in the
figure (a).

Fig. (a) Open circuited p-n junction

Important observation about depletion region:

The width of the depletion region depends on the amount of doping on n side and p side. If
the two sides are equally doped, the width of the depletion region is equal on both sides as shown
in figure (a). But if n-side is heavily doped as compared to p-side, then depletion region is
observed more on p-side as shown in the figure (b). If p-side is heavily doped as compared to n-
side, then depletion region is observed more on n-side as shown in the figure (c).

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(a) Both sides equally doped (b) n-side heavily doped (c) p-side heavily doped

Figure

The depletion region penetrates more on the lightly doped side.

Expression for the Barrier Potential

Let us derive the expression for the potential barrier.

It is known that the change in concentration, induces the voltage and is given by,

p 
V21  VT In  1 
 p2 

At the junction, there is a abrupt change in the concentration of holes from p p to pn.

So p1 = pp  NA and p2 = pn

Substituting above we get,

N 
VJ  VT In  A  ……(1)
 pn 

where VJ is called potential barrier, junction potential or contact potential.

But according to law of mass action,

nn  pn  ni2
ni2
 pn  ……(2)
nn

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 
 
 NA 
 VJ  VT In
  n2  
  i  
  nn  
But nn  ND

N N 
VJ  VT In  A 2 D  ….(3)
 ni 

This equation gives the value of junction potential. It can be seen from this equation that
the junction potential depends on voltage equivalent of temperature i.e. V T and the amount of
doping of n-side and p-side i.e. ND and NA.

4. Explain the energy band structure of open circuited P-N junction.

Energy Band Structure of Open Circuited P-N Junction

It is known that the Fermi level in n type material lies just below the conduction band while
in p type material, it lies just above the valence band. When p-n junction is formed, the diffusion
starts. The charges get adjusted so as to equalize the Fermi level in the two parts of p-n junction.
This is similar to the adjustment of water levels in two tanks of unequal level, when connected to
each other. The charges flow from p to n and n to p side till, the Fermi level on the two sides get
lined up.

The transfer of charges does not disturb the relative positions of conduction band, valence
band and Fermi level in any region either p or n.

The transfer of charges and energy band structure showing equalization of Fermi levels in p
and n regions is shown in the figure (a).

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Fig. (a) Energy band structure of p-n junction

In p region, the Fermi level E Fp is near EVp just above edge of valence band. In n region, the
Fermi level EFn is near ECn just below edge of conduction band. And there is difference between
levels of EFn and EFp. The transport of charges, the edge of conduction band E Cp in the p type
material becomes higher than E Cn in the n type material. Similarly the edge of valence band E Vp in
p type is higher than EVn in n type material. Thus there is a shift of E 1 in the Fermi level on p side
while there is a shift of E 2 in the Fermi level on n side from their intrinsic levels. (i.e. centre of E C
and EV). This adjusts the Fermi level on n and p side to get equivalent Fermi level E F for the p-n
junction.

The total shift in energy E 0 is E1 + E2 which is responsible to produce contact difference of


potential across the junction. This is nothing but barrier potential or junction potential or
contact potential given by,
N N 
VJ  VT ln  A 2 D  where VT  kT
 n1 

It is known, that NA =PP and ND  nn

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n12 n12
While from law of mass action, Pn = and nP=
ND NA
Using in the equation of VJ,

 ni2 
P
 p  
Pn
VJ  VT ln  
 ni 2

 
 
 Pp   nn 
 VJ  VT ln  o   VT ln  o 
 Pn   nP 
 o   o 

This is alternative expression for VJ where ‘o’ indicates the thermal equilibrium condition.

Contact difference potential is also denoted by V o.

5. Explain the operation of forward biased diode.

Forward Biasing of p-n Junction Diode

If an external d.c. voltage is connected in such a way that the p-region terminal is
connected to the positive of the d.c. voltage and the n-region is connected to the negative of the
d.c. voltage, the biasing condition is called forward biasing. The p-n junction is said to be forward
biased.

Forward biasing means connecting p-region to positive and n region to negative of the
battery.

The figure (a) shows the connection of forward biasing of p-n junction. To limit the current,
practically a current limiting resistor is connected in series with the p-n junction diode. The figure
(b) shows the symbolic representation of a forward biased diode.

(a) Forward biasing (b) Symbolic representation


Operation of Forward Biased Diode

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When the p-n junction is forward biased as long as the applied voltage is less than the
barrier potential, there cannot be any conduction.

When the applied voltage becomes more than the barrier potential, the negative terminal of
battery pushes the free electrons against barrier potential from n to p region. Similarly positive
terminal pushes the holes from p to n region. Thus holes get repelled by positive terminal and
cross the junction against barrier potential. Thus the applied voltage overcomes the barrier
potential. This reduces the width of depletion region.

As forward voltage is increased, at a particular value the depletion region becomes very
much narrow such that large number of majority charge carriers can cross the junction.

The large number of majority carriers constitute a current called forward current. Once the
conduction electrons enter the p-region, they become valence electrons. Then they move from
hole to hole towards the positive terminal of the battery. The movement of valence electrons is
nothing but movement of holes in opposite direction to that of electrons, in the p-region. So current
in the p-region is the movement of holes which are majority carriers. This is the hole current.
While the current in the n-region is the movement of free electrons which are majority carriers.
This is the electron current. Hence the overall forward current is due to the majority charge
carriers. The action is shown in the figure (c). These majority carriers can then travel around the
closed circuit and a relatively large current flows. The direction of flow of electrons is from negative
to positive of the battery. While direction of the conventional current is from positive to negative of
the battery as shown in the figure (c).

Fig. (c) Forward current in a diode

The direction of flow of electrons and conventional current is opposite to each other.

Effect on the Depletion Region

Due to the forward bias voltage, more electrons flow into the depletion region, which
reduces the number of positive ions. Similarly flow of holes reduces the number of negative ions.
This reduces the width of the depletion region. This is shown in the figure (d).

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(i) Unbiased diode (ii) Forward biased diode

Depletion region narrows due to forward bias voltage.

Effect of the Barrier Potential

Under the influence of applied forward bias voltage, the free electrons get the energy
equivalent to the barrier potential so that they can easily overcome the barrier, which is a sort of a
hill, and cross the junction. While crossing the junction, the electrons give up the amount of energy
equivalent to the barrier potential. This loss of energy produces a voltage drop across the p-n
junction which is almost equal to the barrier potential.

The polarities of voltage drop across the p-n junction in forward biased condition are
opposite to that of barrier potential but the value is almost equal to the barrier potential.

Due to the internal resistance, there is additional small voltage drop across the diode.

Thus the total voltage drop across a p-n junction diode in a forward biased condition is V f
and it is made up of

1. Drop due to barrier potential


2. Drop due to internal resistance.

The total Vf is of the order of 0.7 V for silicon and 0.3 V for the germanium.

6. Explain the Operation of reverse biased diode.

Reverse Biasing of p-n Junction Diode

If an external d.c. voltage is connected in such a way that the p-region terminal of a p-n
junction is connected to the negative of the battery and the n-region terminal of a p-n junction is
connected to the positive terminal of the battery, the biasing condition is called reverse biasing of
a p-n junction.

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Reverse biasing means connecting p-region to negative and n-region to positive of the
battery.

The figure (a) shows the connection of a reverse biasing of a p-n junction while the figure
(b) shows the symbolic representation of a reverse biased diode.

(a) Reverse biasing (b) Symbolic representation

Operation of Reverse Biased Diode

When the p-n junction is reverse biased the negative terminal attracts the holes in the p-
region, away from the junction. The positive terminal attracts the free electrons in the n-region
away from the junction. No charge carrier is able to cross the junction. As electrons and holes both
move away from the junction, the depletion region widens. This creates more positive ions and
hence more negative charge in the n-region. This is because the applied voltage helps the barrier
potential. This is shown in the figure.

Fig. Depletion region widens in reverse bias

Reverse biasing increases the width of the depletion region.

As depletion region widens, barrier potential across the junction also increases. However,
this process cannot continue for long time. In the steady state, majority current ceases as holes
and electrons stop moving away from the junction.

The polarities of barrier potential are same as that of the applied voltage. Due to increased
barrier potential, the positive side drags the electrons from p-region towards the positive of battery.

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Similarly negative side of barrier potential drags the holes from n-region towards the negative of
battery. The electrons on p-side and holes on n-side are minority charge carriers, which constitute
the current in reverse biased condition. Thus reverse conduction takes place.

The reverse current flows due to minority charge carriers which are small in number.
Hence reverse current is always very small.

The generation of minority charge carriers depends on the temperature and not on
the applied reverse bias voltage. Thus the reverse current depends on the temperature i.e.
thermal generation and not on the reverse voltage applied.

For a constant temperature, the reverse current is almost constant though reverse voltage
is increased upto a certain limit. Hence it is called reverse saturation current and denoted as Io.

Reverse saturation current is very small of the order of few microamperes for germanium
and few nanoamperes for silicon p-n junction diodes.

The reverse current and its direction is shown in the figure (a).

(i) Flow of minority charge carriers (ii) Direction of reverse current

Fig. Reverse biased diode

The reverse biasing produces a voltage drop across the diode denoted as V R which is
almost equal to applied reverse voltage.

7. Explain the Current components in a p-n junction diode.

The Current Components in a p-n Junction Diode

It is indicated earlier that when a p-n junction diode is forward biased a large forward
current flows, which is mainly due to majority carriers. The depletion region near the junction is
very very small, under forward biased condition. In forward biased condition holes get diffused into
n side from p-side while electrons get diffused into p-side from n side. So on p-side, the current
carried by electrons which is diffusion current due to minority carriers, decreases exponentially
with respect to distance measured from the junction. This current due to electrons, on p-side which

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are minority carriers is denoted as I np. Similarly holes from p side diffuse into n-side carry current
which decreases exponentially with respect to distance measured from the junction. This current
due to holes on n side, which are minority carriers is denoted as I pn. If distance is denoted by x
then,

Inp (x) = Current due to electrons in p side as a function of x

Ipn (x) = Current due to holes in n side as a function of x

At the junction i.e. at x – 0, electrons crossing from n side to p side constitute a current, I np
(0) in the same direction as holes crossing the junction from p side to n side constitute a current,
Ipn (0).

Hence the current at the junction is the total conventional current I flowing through the
circuit.

 I = Ipn  0   Inp  0 

Now Ipn (x) decreases on n side as we move away from junction on n side. Similarly I np(x)
decreases on p side as we move away from junction on p side.

But as the entire circuit is a series circuit, the total current must be maintained at I,
independent of x. This indicates that on p side there exists one more current component which is
due to holes on p side which are the majority carriers. It is denoted by I pp (x) and the addition of the
two currents on p side is total current I.

Ipp(x) = Current due to holes in p side.

Similarly on n side, there exists one more current component which is due to electrons on n
side, which are the majority carriers. It is denoted as I nn(x) and the addition of the two currents on n
side is total current I.

Inn(x) = Current due to electrons in n side.

On p side, I = Ipp  x   Inp  x 

On n side, I = Inn  x   Ipn  x 

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Fig. (a) Current components

These current components are plotted as a function of distance in the figure (a).

The current Ipp decreases towards the junction, at the junction enters the n side and
becomes Ipn which further decreases exponentially. Similarly the current I nn decreases towards the
junction, at the junction enters the p side and becomes I np which also further decreases
exponentially.

In forward bias condition, the current enters the p side as a hole current and leaves the n
side as an electron current, of the same magnitude.

So sum of the currents carried by electrons and holes at any point inside the diode is
always constant equal to total forward current I. But the proportion due to holes and electrons in
constituting the current varies with the distance, from the junction.

8. Explain the V-I characteristics of a diode.

The Volt-Ampere (V-I) Characteristics of a Diode

The response of a diode when connected in an electrical circuit, can be judged from its
characteristics known as Volt-Ampere commonly called V-I characteristics. The V-I
characteristics in the forward biased and reverse biased condition is the graph of voltage across
the diode against the diode current.

Forward Characteristics of p-n Junction Diode

The response of p-n junction can be easily indicated with the help of characteristics called
V-I characteristics of p-n junction. It is the graph of voltage applied across the p-n junction and
the current flowing through the p-n junction.

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Fig. (a) Forward biased diode

The figure (a) shows the forward biased diode. The applied voltage is V while the voltage
across the diode is Vf. The current flowing in the circuit is the forward current I f. The graph of
forward current If against the forward voltage Vf across the diode is called forward
characteristics of a diode.

The forward characteristics of a diode is shown in the figure (b).

Fig. (b) Forward characteristics of a diode


Basically forward characteristics can be divided into two regions:

1. Region O to P: As long as Vf is less than cut-in voltage (Vf), the current flowing is very
small. Practically this current is assumed to be zero.
2. Region P to Q and onwards: As Vf increases towards V the width of depletion region
goes on reducing. When Vf exceeds V i.e., cut-in voltage, the depletion region becomes
very thin and current If increases suddenly. This increase in the current is exponential as
shown in the figure by the region P to Q.

The point P, after which the forward current starts increasing exponentially is called knee of
the curve.

The normal forward biased operation of the diode is above the knee point of the curve, i.e.
in the region P-Q.

The forward current is the conventional current, hence it is treated as positive and the
forward voltage Vf is also treated positive. Hence the forward characteristics is plotted in the first
quadrant.

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Forward Resistance of a Diode

The resistance offered by the p-n junction diode in forward biased condition is called
forward resistance. The forward resistance is defined in two ways:

1. Static Forward Resistance:

This is the forward resistance of p-n junction diode when p-n junction is used in d.c. circuit
and the applied forward voltage is d.c. This resistance is denoted as R F and is calculated at a
particular point on the forward characteristics.

Thus at a point E shown in the forward characteristics, the static resistance R F is defined as
the ratio of the d.c. voltage applied across the p-n junction to the d.c. current flowing through the p-
n junction.
Forward d.c. voltage OA
RF  = at point E
Forward d.c. current OC

2. Dynamic forward resistance:

The resistance offered by the p-n junction under a.c. conditions is called dynamic
resistance denoted as rf.

The dynamic resistance is reciprocal of the slope of the forward characteristics.

Consider the change in applied voltage from point A to B shown in the figure. This is
denoted as V. The corresponding change in the forward current is from point C to D. It is denoted
as L. Thus the slope of the characteristics is I/ V . The reciprocal of the slope is dynamic
resistance rf.
V 1
rf  
I Slope of forward characteristics
Generally the value of rf is very small of the order of few ohms, in the operating region i.e.
above the knee.

Reverse Characteristics of p-n Junction Diode

The figure (c) shows the reverse biased diode. The reverse voltage across the diode is ZV R
while the current flowing is reverse current I R flowing due to minority charge carriers. The graph of
IR against VR is called reverse characteristics of a diode.

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Fig. (c) Reverse biased diode

The polarity of reverse voltage applied is opposite to that of forward voltage. Hence in
practice reverse voltage is taken as negative. Similarly the reverse saturation current is due to
minority carriers and is opposite to the forward current. Hence in practice reverse saturation
current is also taken as negative. Hence the reverse characteristics is plotted in the third
quadrant as shown in the figure (d).

Figure (d)

Typically the reverse breakdown voltage is greater than 50 V for normal p-n junctions.

As reverse voltage is increased, reverse current increases initially but after a certain
voltage, the current remains constant equal to reverse saturation current I 0 though reverse voltage
is increased. The point A where breakdown occurs and reverse current increases rapidly is called
knee of the reverse characteristics.
Reverse Resistance of a Diode

The p-n junction offers large resistance in the reverse biased condition called reverse
resistance. This is also defined in two ways.

1. Reverse static resistance: This is reverse resistance under d.c. conditions, denoted as R f.
It is the ratio of applied reverse voltage to the reverse saturation current I 0.

OQ Applied reverse voltage


 Rf  
I0 Reverse saturation current

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2. Reverse dynamic resistance: This is the reverse resistance under the a.c. conditions,
denoted as rr. It is the ratio of incremental change in the reverse voltage applied to the
corresponding change in the reverse current.

 VR Change in reverse voltage


 rr  
IR Change in reverse current

The dynamic resistance is most important in practice whether the junction is forward or
reverse biased.

Complete V-I Characteristics of a Diode

The complete V-I characteristics of a diode is the combination of its forward as well as
reverse characteristics. This is shown in the figure (e).

Fig. (e) Complete V-I characteristics of a diode


In forward characteristics, it is seen that initially forward current is small as long as the bias
voltage is less than the barrier potential. At a certain voltage close to barrier potential, current
increases rapidly. The voltage at which diode current starts increasing rapidly is called as cut in
voltage. It is denoted by V . Below this voltage, current is less than 1% of maximum rated value of
diode current. The cut-in voltage for germanium is about 0.2V while for silicon it is 0.6 V.

It is important to note that the breakdown voltage is much higher and practically diodes are
not operated in the breakdown condition. The voltage at which breakdown occurs is called
reverse breakdown voltage denoted as VBR.

Reverse current before the breakdown is very very small and can be practically neglected.

V-I Characteristics of Typical Ge and Si Diodes

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The combined forward and reverse characteristics is called V-I characteristics of a diode.
As mentioned earlier, the barrier potential for germanium (Ge) diode is about 0.3 V while for
Silicon (Si) diode is as about 0.7 V. The potential at which current starts increasing exponentially is
also called offset potential, threshold potential or firing potential of a diode. The figure shows
the V-I characteristics of typical Ge and Si diodes.

Fig. V-I characteristics of typical Ge and Si diodes

The reverse saturation current in a germanium diode is about 1000 times more than the
reverse saturation current in a silicon diode of a comparable rating. The reverse saturation current
I0 is of the order of nA for silicon diode while it is of the order of A for germanium diode. Reverse
breakdown voltage for Si diode is higher than that of the Ge diode of a comparable rating.

9. Write in detail about the two types of capacitances associated with a diode.

Transition Capacitance (CT)

Consider a reverse biased p-n junction diode as shown in the figure (a)

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Fig. (a) Transition capacitance in reverse biased condition

As seen earlier, when a diode is reverse biased, reverse current flows due to minority
carriers. Majority charged particles i.e. electrons in n-region and holes in p-region move away from
the junction. This increases the width of the depletion region. The width of the depletion region
increases as reverse bias voltage increases. As the charged particles move away from the
junction there exists a change in charge with respect to the applied reverse voltage. So change in
charge dQ with respect to the change in voltage dV is nothing but a capacitive effect. Such a
capacitance which comes into the picture under reverse biased condition is called transition
capacitance, space-charge capacitance, barrier capacitance or depletion layer capacitance
and denoted as CT. The magnitude of CT is given by the equation,

dQ
CT 
dV

This capacitance is very important as it is not constant but depends on the magnitude of the
reverse voltage.

Diffusion Capacitance

During forward biased condition, an another capacitance comes into existence called
diffusion capacitance or storage capacitance, denoted as CD.

In forward biased condition, the width of the depletion region decreases and holes from p
side get diffused in n side while electrons from n side move into the p-side. As the applied voltage
increases, concentration of injected charged particles increases. This rate of change of the
injected charge with applied voltage is defined as a capacitance called diffusion capacitance.
dQ
 CD 
dV

The diffusion capacitance can be determined by the expression

I
CD 
 VT

where  = mean life time for holes.

So diffusion capacitance is proportional to the current. For forward biased condition, the
value of diffusion capacitance is of the order of nano farads to micro farads while transition
capacitance is of the order of pico farads. So CD is much larger than CT.

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However in forward biased condition, C D appears in parallel with the forward resistance
which is very very small. Hence the time constant which is function of product of the forward
resistance and CD is also very small for ordinary signals.

Hence for normal signals CD has no practical significance but for fast signals C D must be
considered.

The graph of CD against the applied forward voltage is shown in the figure (a).

Fig. (a) Diffusion capacitance versus applied forward biased voltage

10. What is transition capacitance and derive its necessary expressions?

Transition Capacitance (CT)

Consider a reverse biased p-n junction diode as shown in the figure (a)

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Fig. (a) Transition capacitance in reverse biased condition

As seen earlier, when a diode is reverse biased, reverse current flows due to minority
carriers. Majority charged particles i.e. electrons in n-region and holes in p-region move away from
the junction. This increases the width of the depletion region. The width of the depletion region
increases as reverse bias voltage increases. As the charged particles move away from the
junction there exists a change in charge with respect to the applied reverse voltage. So change in
charge dQ with respect to the change in voltage dV is nothing but a capacitive effect. Such a
capacitance which comes into the picture under reverse biased condition is called transition
capacitance, space-charge capacitance, barrier capacitance or depletion layer capacitance
and denoted as CT. The magnitude of CT is given by the equation,

dQ
CT 
dV

This capacitance is very important as it is not constant but depends on the magnitude of the
reverse voltage.

Derivation of Expression for Transition Capacitance

Consider a p-n junction diode, the two sides of which are not equally doped. Impurity added
on one side is more than the other. Assume that p-side is lightly doped and n-side is heavily
doped. As depletion region penetrates lightly doped side, the most of depletion region is on p-side
as it is lightly doped as shown in the figure (b).

Fig. (b) Unequally doped p-n junction diode

It can be further assumed that concentration of acceptor impurity on p-side (N A) is much


less than the concentration of donor impurity on n-side (N D). Hence the width of depletion region

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on n-side is negligibly small compared to width of depletion region on p-side. Hence the entire
depletion region can be assumed to be on the p-side only.

The relationship between potential and charge density is given by Poisson’s equation as,

d2 V q NA
 …(1)
d x2 

where x = the distance measured from the junction

and  = the permittivity of the semiconductor

 = 0 r …(2)

where 0 = permittivity of free space

1
=  8.849  10 12 F / m
36   10 9

and r = relative permittivity of the semiconductor

= 16 for germanium

= 12 for silicon

Note: In Poisson’s equation, the concentration of lightly doped side is used. If we assume that n-
type is lightly doped compared to p-type then as N D less than NA, Poisson’s equation modifies to,
d2 V q ND

d x2 

Integrating equation (1) w.r.t. x we get,


d2 V qN
 d x2 dx    A dx
dV q NA x
  ….(3)
dx 

Assume constant of integration as zero.

dV
Now is the electric field intensity over the region 0 to W over which depletion region is
dx
spreaded.

q NA x
 E= …. (4)

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where E is electric field intensity.

To get the potential, integrating equation (3) we get,

W
dV q NA
 dx
dx = 
0

 dx

q NA W2
 V ….(5)
 2

At x = W, V = VB which is barrier potential

Now barrier potential is the difference between internally developed junction potential and
externally applied bias voltage.

 VB  V1  V ….(6)

where VB is barrier potential and V must be taken as negative for reverse bias.

Substituting in equation (5) we get,

q NA W2
VB  ….(7)
 2

From the above equation it can be observed that,

W  VB …(8)

The width of barrier i.e. depletion layer increases with applied reverse bias.

If A is the area of cross-section of the junction, then net charge Q in the distance W is

Q = Number of charged particle


 charge on each particle

 Q = [NA  Volume]  q

 Q = NA A Wq …(9)

Now differentiating equation (7) with respect to V,

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1 NA q  d W 
1 .2W …(10)
2   dV 

dW 
  ….(11)
dV q NA W

Now differentiating equation (9),

dQ dW
 NA A q
dV dV

= NA A q .
q NA W
dQ  A
  ....(12)
dV W
dQ
But is the transition capacitance CT hence
dV

A
CT  ….(13)
W

Now from equation (6) we know that V B = VJ – V and for reverse bias V is negative. Hence
for reverse biased condition we get V B = VJ + V where V is applied reverse biased voltage. So as
reverse biased voltage increases, VB increases. From equation (8), we can conclude that the width
of depletion layer increases as reverse bias increases. Increasing width W, deceases the
transition capacitance CT. Hence transition capacitance C T decreases as the reverse bias voltage
increases.

1
CT  ……(14)
W
As the reverse biased applied to the diode increase, the width of the depletion region (W)
increases. Thus the transition capacitance C T decreases. In short, the capacitance can be
controlled by the applied voltage. The variation of C T with respect to the applied reverse bias
voltage is shown in the figure (c).

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Fig. (c) CT against reverse voltage

As reverse voltage is negative, graph is shown in the second quadrant. For a particular
diode shown, CT varies from 80 pF to less than 5 pF as VR changes from 2 V to 15 V.

It can be observed that VB = VJ – V where,

VJ = Internally developed junction potential


V = Applied reverse bias voltage

For reverse bias, V is negative hence V B = VJ + V for reverse bias. Thus barrier potential
increases and hence width of depletion layer increases as reverse bias increases.

11. What is Diffusion capacitance and derive the expression for diffusion capacitance?

Diffusion Capacitance

During forward biased condition, an another capacitance comes into existence called
diffusion capacitance or storage capacitance, denoted as CD.

In forward biased condition, the width of the depletion region decreases and holes from p
side get diffused in n side while electrons from n side move into the p-side. As the applied voltage
increases, concentration of injected charged particles increases. This rate of change of the
injected charge with applied voltage is defined as a capacitance called diffusion capacitance.
dQ
 CD 
dV

The diffusion capacitance can be determined by the expression

I
CD 
 VT

where  = mean life time for holes.

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So diffusion capacitance is proportional to the current. For forward biased condition, the
value of diffusion capacitance is of the order of nano farads to micro farads while transition
capacitance is of the order of pico farads. So CD is much larger than CT.

However in forward biased condition, C D appears in parallel with the forward resistance
which is very very small. Hence the time constant which is function of product of the forward
resistance and CD is also very small for ordinary signals.

Hence for normal signals CD has no practical significance but for fast signals C D must be
considered.

The graph of CD against the applied forward voltage is shown in the figure (a).

Fig. (a) Diffusion capacitance versus applied forward biased voltage

Derivation of Expression for Diffusion Capacitance

In a p-n junction, the total current at the junction (x = 0) is given by,

I = Ipn(0) + Inp (0) A ….(1)

where Ipn(0) = Current due to holes diffusing from p to n side


Inp(0) = Current due to holes diffusing from n to p side

For simplicity assume that the one side say p side is heavily doped with respect to other.
Hence Inp(0) is negligible compared to Ipn(0).

 I = Ipn (0) …(2)


For the diffusion current, the current density is given by,

dpn
JP  x   qDP ….(3)
dx
where Dp = Diffusion constant

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dpn
= Concentration gradient (Change in concentration with respect to x)
dx

Current 1
Now J = Current density = 
area A

dpn
 IP  x   q A DP …(4)
dx

where A = Area of cross-section

Now for a p-n junction,

x
Pn  x   Pn  0  e ….(5)
Lp

where LP = Diffusion length for holes

1
This LP is related to the diffusion constant D P such that LP =  DP   2 where  = mean life
time of charge carrier.

Differentiating (5)

dpn  x  x  1
 pn  0  e
Lp
  ….(6)
dx  LP 
Using in (4),

x  1
IP  x   q A DPPn  0  e
Lp
  
 Lp 
DP x
 IP  x   q A Pn  0  e LP ….(7)
LP
At x = 0, IP(x) = Ipn(0) = I hence using x = 0 in equation (7),

q A DPPn  0 
I ….(8)
LP
1 Lp
 Pn  0   ….(9)
q A DP

Now the excess minority charge Q exists only on n side and given by,

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 x
Q   A q pn  0  e LP
dx
0


 x

 e LP 
  A q pn  0 
 1 
 
   A q LPpn  0   e   e0 
 

 LP  0
 Q   A q LPpn  0   1  A q LPpn  0  …(10)

Using (9) in (10),


2
A q LPILP Lp
Q  I
q A DP Dp
L2p
But   = mean life time
Dp
 Q=I …(11)

dQ dQ dI
Now CD   . ….(12)
dV dI dV

dQ
From (11),  ….(13)
dI
From diode current equation,

I  I0  e   1  I0 e VT  neglecting 1


V V V
T

 
dI V 1 1
  I0 e VT .  …(14)
dV VT VT
Using (13) and (14) in (12),

I
CD 
VT

This is the required expression for diffusion capacitance.

12. Write a short note on temperature dependence of diode characteristics.

Effect of Temperature on p-n Junction Diode

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It has been mentioned earlier that the reverse saturation current I 0 depends on temperature
while VT is voltage equivalent of temperature is also temperature dependent. The diode current
involving I0 and VT is hence temperature dependent.

The overall diode characteristics depends on the temperature.

The dependence of I0 on temperature T is given by,

 VG0
I0  KTm e VT …..(1)

where K = constant independent of temperature (Not the Boltzmann’s constant)

m = 2 for Ge and 1.5 for Si

and VG0 = Forbidden energy gap = 0.785 V for Ge and 1.21 V for Si

Now as temperature increases, the value of I 0 increases and hence the diode current
increases. To keep diode current constant it is necessary to reduce the applied voltage V of
the diode.

Let us calculate, with what rate the applied voltage must be changed in order to keep the
dI
diode current constant. For a constant diode current,  0. So we have to calculate such a
dT
dI
change in voltage for which  0.
dT
A diode current is given by the equation,

 V V 
I = I0  e T  1
 
For a forward current, neglecting 1 we get,

V
I  I0 e VT ….(2)
Substituting equation (1) in (2) we get,

 VG0 V
1 = K Tm e VT
.e VT

 V  VG0 
1 = K Tm e VT ….(3)

as VT = kT where k is Boltzmann’s constant,

 V  VG0 
1 = K Tm e  kT ….(4)

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dI
Now for constant diode current,  0 hence differentiating equation (4) with respect to T,
dT

  V-VG0   V-VG0  
dI kT  k T d  V  VG0 
  K m T m-1 e  Tm e .   
dT  dT   k T  
  dV 
 V-VG0   m T   V  VG0   1 
dI kT T dT
 K e m T 
m-1
 
dT   k  T2 
   
 V-VG0 
 k T m T 
m
dI Tm  dV
 K e   2 
T   V  VG0   
dT  T  k T  dT 

Note that, VG0 is forbidden energy gap at 0K and hence constant from differentiation point
of view.

Taking Tm outside and ( k T2) as L.C.M. we get,

  dV 
dI  V-VG0   m k T +  T dT   V  VG0   
 K e kT
T 
m  
dT  kT 2

 
 V-VG0 
dI Tm   dV 
 K e  m k T +  T dT   V  VG0   
kT

dT  k T2   

Replacing kT = VT we get,

 V-VG0 
dI Tm1   dV 
 K e VT
 mVT   T   V  VG0    …..(5)
dT VT   dT 

dI
Now  0 for constant diode current hence equating the equation (5) to zero we get,
dT
dV
m VT  T   V  VG0   0 …(6)
dT
dV
 T  V  VG0  m  VT …(7)
dT

dV V -  VG0 + mη VT 
 = ….(8)
dT T
This is the required change in voltage necessary to keep diode current constant.

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Hence for germanium, at cut-in voltage V = V  = 0.2 V and with m = 2,  = 1, T = 300K and
VG0 = 0.785 V in equation (8) we get,


dV 0.2  0.785  2  1 26  10

3

 2.12 mV / C for Ge …(9)
dT 300

The negative sign indicates that the voltage must be reduced at a rate of 2.12 mV per
degree change in temperature to keep diode current constant.

Similarly for Si we get,

dV
 2.3 mV/ C for Si ….(10)
dT

dV
Practically the value of is assumed to be – 2.5 mV/C for either Ge or Si at room
dT
temperature.

dV
Thus,  2.5 mV/ C
dT

dV
The negative sign indicates that decreases with increase in temperature.
dT

The equation (8) represents dependence of forward voltage on temperature. It contains two
V
terms. The term is due to dependence of VT on temperature while the other negative term is due
T
to temperature dependence of I 0 and does not depend on voltage V across the diode. The
dV
equation states that for increasing V, becomes less negative and reaches zero at V = V G0 + m
dT
 VT. The practical diodes show such behaviour in the operating region.
Effect of Temperature on Reverse Saturation Current

Let us now study by what rate I 0 changes with respect to temperature. Consider equation
(1) again,

 VG0
I0  KT me VT I
Taking logarithm of both sides we get,
  VG0

In  I0   In  KTme VT 
 

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VG0
 In  I0   In K + In T m 
VT
V
 In  I0   In K + m In T- G0
VT
Using VT = kT,

VG0
 In  I0   In K + m In T- ….(11)
kT
Differentiating this equation with respect to T we get,

d In  I0  m VG0  1  m VG0
 0    2 
dT T  k  T  T  k T2

Replacing kT = VT,

d  In I0  m V
= + G0 …(12)
dT T ηT VT

For germanium, substituting the values of various terms at room temperature we get,

d  In I0  2 0.785
   0.11 per C
dT 300 1 300  26  10 3

This indicates that I0 increases by 11% per degree rise in temperature.

For silicon, we get,

d  In I0 
 0.08 per C
dT

This indicates that I0 increases by 8% per degree rise in temperature.

But experimentally it is found that the reverse saturation current I 0 increases by 7% per C
change in temperature for both silicon and germanium diodes. If at TC I0 is 1 A then at (T + 1)
C it becomes 1.07 A and so on. From this it can be concluded that reverse saturation current
approximately doubles i.e. 1.0710 for every 10C rise in temperature.

The equations (8) and (12) explain the overall temperature dependence of diode
characteristics.

Mathematical Interpretation: The above result can be mathematically represented as,

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 T210-T1   ΔT 
I02 =  2  I01 =  2 10  I01 …(13)
   

where I02 = Reverse saturation current at T2

I01 = Reverse saturation current at T1

Thus the equation (13) is easy to use, than using equation (1), to obtain the effect of
temperature on I0.

The temperature dependence of I0 for Si and Ge diodes is shown in the figure (a) and (b).

The temperature dependence is approximately same for both the types of diodes. It can be
seen that at high temperatures, Ge diode produces excessively large reverse current while for Si
diode the I0 is much smaller. So for rise in temperature from 25C to 90C the I0 increases to 100
A for Ge diode while it increases to only some tenths of A for Si diode.

The various other parameters like cut in voltage, reverse breakdown voltage and forward
current are also temperature dependent. The effect of temperature on these parameters is shown
in the figure (c).

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Fig. (c) Effect of temperature on diode

13. Explain the Breakdown mechanisms in a diode.

Breakdown Mechanisms in Diode

Fig. (a) Diode characteristics

Consider the diode characteristics as shown in the figure (a). In reverse biased condition as
long as the reverse voltage is less than breakdown voltage, the diode current is small and almost
constant at I0. But when reverse voltage increases beyond certain value, large diode current flows.
This is called breakdown of diode and corresponding voltage is called reverse breakdown
voltage VBR of diode.

There are two distinct mechanisms due to which the breakdown may occur in the diode.
These are, 1. Avalanche breakdown 2. Zener breakdown

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Avalanche Breakdown

As seen earlier, the applied reverse bias causes a small reverse current I 0 to flow in the
device. This is due to movement of minority charge particles, viz., electrons from the p-material
and holes from the n-material. The polarity of reverse bias voltage is such that only the minority
charge particles are able to cross the p-n junction, while the majority charge particles move away
from the junction. As the applied reverse bias voltage becomes larger, the minority charge carriers
increasingly accelerate. There are collisions between these particles and electrons involved in the
covalent bonds of the crystal structure.

If the applied voltage is such that the traveling electrons do not have high velocity, then the
collisions take some energy away from them, altering their velocity. If the applied voltage is
 1 2
increased, the velocity and hence the kinetic energy  K.E.  mV  of electron increases. If such
 2 
an electron dashes against an electron involved in covalent bond, then the collision gives bond-
valence electron enough energy to enable it to break its covalent bond. Thus, one electron by
collision creates an electron-hole pair. These secondary particles are also accelerated and
participate in collisions that generate new electron-hole pairs. This phenomenon is known as
carrier multiplication. Electron-hole pairs are generated so quickly and in such large number that
there is an apparent avalanche or self-sustained multiplication process. At this stage junction is
said to be in breakdown and current starts increasing rapidly.

The figure (b) shows the process of carrier multiplication which is a geometric progression
1,2, 4, ……..

Fig. (b) Carrier multiplication in avalanche breakdown

The series resistance must be used to limit the large reverse current flowing during
breakdown.

The diodes having reverse breakdown voltage greater than 6V, show the avalanche
mechanism of breakdown. The avalanche breakdown occurs for lightly doped diodes.

Zener Breakdown

The breakdown of a p-n junction may occur because of one more effect called zener effect.
When a p-n junction is heavily doped the depletion region is very narrow. So under reverse bias
conditions, the electric field across the depletion layer is very intense. Electric field is voltage per

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distance and due to narrow depletion region and high reverse voltage, it is intense. Such an
intense field is enough to pull the electrons out of the valence bands of the stable atoms. So this is
not due to the collision of carriers with atoms. Such a creation of free electrons is called zener
effect which is different than the avalanche effect. These minority carriers constitute very large
current and mechanism is called zener breakdown.

The zener effect is dominant for heavily doped diodes. For heavily doped diodes, the
depletion region width is small. The field intensity for voltages less than 5 V becomes intense, of
the order of 0.3 MV/cm. Such an intense field causes zener effect to pull the charge carriers from
parent atoms and make them available as free carriers.

The diodes having reverse breakdown voltage less than 5 V show the zener mechanism of
breakdown. This occurs for heavily doped diodes.

For the diodes having reverse breakdown rating between 5 V to 6 V, both zener and
avalanche mechanisms occur simultaneously. The breakdown is due to combination of the two.
The breakdown voltage rating of a diode can be adjusted by changing the doping levels in the
junction, at the time of manufacturing. This decides the practical safe operating voltage rating of a
diode caused Peak Inverse Voltage (PIV) rating of a diode. Practically in reverse biased
condition, to avoid reverse breakdown the voltage appearing across the diode must be less than
its PIV rating.

14. Compare Zener breakdown and Avalanche breakdown.

Comparison of Breakdown Mechanisms

Zener Breakdown Avalanche Breakdown


Breaking of covalent bonds is due to collision of
Breaking of covalent bonds is due to intense
accelerated charge carriers having large
electric field across the narrow depletion
1. velocities and kinetic energy with adjacent
region. This generates large number of free
atoms. The process is called carrier
electrons to cause breakdown.
multiplication.
This occurs for zener diodes with V BR less than This occurs for zener diodes with VBR greater
2.
6 V. than 6 V.
3. The temperature coefficient is negative. The temperature coefficient is positive.
The breakdown voltage decreases as junction The breakdown voltage increases as the junction
4.
temperature increases. temperature increases.
The V-I characteristics is very sharp in The V-I characteristics is not as sharp as zener
5.
breakdown region. breakdown in breakdown region.
6. Occurs for heavily doped diodes. Occurs for lightly doped diodes.

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7.

15. Compare Zener diode and p-n junction diode.

Comparison of Zener Diode and p-n Junction Diode

No. Zener diode P-N junction diode


Operated in forward biased condition and
1. Operated in reverse breakdown condition. never operated in reverse breakdown
condition.
The characteristics likes in third quadrant. The characteristics lies in first quadrant.

2.

Dynamic zener resistance is very small in The diode resistance in reverse biased
3.
reverse breakdown condition. condition is very high.
Zener diode symbol is, The p-n junction diode symbol is,

4.

The conduction in zener is opposite to that The conduction when forward biased is in
5. of arrow in the symbol, as operated in same direction as that of arrow in the
breakdown region. symbol, when forward biased.
The power dissipation capability is very The power dissipation capability is very low
6.
high. compared to zener diodes.

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Applications of zener diode are voltage Applications of p-n junction diode are
7. regulator, protection circuits, voltage rectifiers, voltage multipliers, clippers,
limiters etc. clampers and many electronic devices.

16. Explain the Characteristics and equivalent circuit of a Zener diode.

The zener diode is a silicon p-n junction semiconductor device, which is generally operated
in its reverse breakdown region. The zener diodes are fabricated with precise breakdown
voltages, by controlling the doping level during manufacturing. The zener diodes have breakdown
voltage range from 3V to 200V. In 1934, a physicist Carl Zener investigated the breakdown
phenomenon in the p-n junction diode.

The figure (a) shows the symbol of zener diode. The d.c. voltage can be applied to the
zener diode so as to make it forward biased or reverse biased. This is shown in the figure (b) and
(c). Practically zener diodes are operated in reverse biased mode.

(a) Symbol (b) Forward biasing (c) Reverse biasing

Fig. Zener diode

Characteristics of Zener Diode

In the forward biased condition, the normal rectifier diode and the zener diode operate in
similar fashion. But the zener diode is designed to be operated in the reverse biased condition. In
reverse biased condition, the diode carries reverse saturation current till the reverse voltage
applied is less than the reverse breakdown voltage. When the reverse voltage exceeds reverse
breakdown voltage, the current through it changes drastically but the voltage across it remains
almost constant. Such a breakdown region is a normal operating region for a zener diode. The
normal operating regions for a rectifier diode and a zener diode are shown in the figure (a) and (b).

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Fig. (a) Operating regions shown Fig. (b) Operating regions shown
shaded for normal diode shaded for zener diode

The breakdown characteristic for a zener diode is significantly important, as it is an


operating region for the diode. When the reverse voltage applied to a zener diode is increased,
initially the current through it is very small, of the order of few A or less. This is the reverse
leakage current of the diode, denoted by I o. At a certain reverse voltage current through zener
diode increases rapidly. The change from a low value to large value of current is very sharp and
well defined. Such a sharp change in the reverse characteristics is called knee or zener knee of
the curve. At this knee, a breakdown is said to occur in the device. The reverse bias voltage at
which the breakdown occurs is called zener breakdown voltage, denoted as VZ.

The voltage VZ is set by carefully controlling the doping level during manufacturing process.

The current corresponding to a knee point is called zener knee current and it is a minimum
current zener must carry to operate in reverse breakdown region. It is denoted as I ZK or IZmin.

From the bottom of the knee, the zener breakdown voltage remains almost constant,
though it increases slightly as the zener current I Z, increases. The current at which the nominal
zener breakdown voltage is specified is called zener test current, denoted as IZT. This value and
corresponding zener voltage V Z are specified on a datasheet of a zener diode. Every zener diode
has a capacity to carry current. As current increases, the power dissipation P Z = VZ IZ increases. If
this dissipation increases beyond certain value, the diode may get damaged.

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Fig. (c) V-I characteristics of zener diode

The maximum current a zener diode can carry safely is called zener maximum current
and is denoted as IZM or IZmax.

In practical circuits to limit the zener current between I Zmin and IZmax, a current limiting resistor
is used in series with the zener diode.

The complete V-I characteristics of the zener diode is shown in the figure (c).

Equivalent Circuit of Zener Diode

When the breakdown occurs then I Z may increase from IZmin to IZmax but voltage across zener
remains constant. Hence actually the internal zener impedance decreases as current increases in
the zener region. But this impedance is very small. Hence ideally the zener diode is indicated by a
battery of voltage VZ, which remains fairly constant in the zener region. This is shown in the figure
(d).

Practically though very small, zener has its internal resistance. In the zener region, this
resistance is called dynamic resistance of the zener denoted as rZ. Practically zener region is not
exactly vertical. The small change in zener current IZ produces a small change in zener voltage
VZ. The ratio of VZ to  IZ is called zener resistance rZ. This is shown in the figure (e). Hence

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practically zener equivalent circuit is shown with a battery of V Z alongwith a series resistance r Z as
indicated in the figure (f).

(e) Dynamic resistance (f) Practical equivalent circuit

From the graph the dynamic resistance is defined as,

VZ 1 1
rZ   
IZ  IZ   slope of the reverse 
 V  characteristics in 
 Z  
 zener region 

This value is specified generally at zener test current I ZT. In most of the cases this value is
almost constant over the full range of zener region i.e. from I Zmin to IZmax. It is of the order of few tens
of ohms.

17. With the help of a neat diagram explain use of Zener diode as a voltage regulator.

The various applications of zener diode are,


1. As a voltage regulating element in voltage regulators.
2. In various protection circuits.
3. In zener limiters i.e. clipping circuits which are used to clip off the unwanted portion of the
voltage waveform.

Let us see how zener diode can be used as a voltage regulator. The figure (a) shows use of
a zener diode to regulate a varying d.c. input voltage. This is called input regulation or line
regulation, using zener diode.

Fig. (a) Line regulation using zener

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As the input voltage varies, the zener current I Z changes. But the zener diode maintains
constant voltage across the output terminals, over the certain range. The limitations on the input
variations are set by the minimum (I ZK) and maximum (IZM) zener current values, with which zener
can operate in its breakdown region. The resistance R is used as a current limiting resistor.

For example for a particular zener if IZK = 5 mA and IZM = 50 mA, VZ = 6.8 V and R = 1k
then for the minimum current the voltage across R is,

VR = IZK R = 5  10-3  1  103 = 5V


Now VR = Vin - VZ
 Vin = VR + VZ = 5 + 6.8 = 11.8 V

For the maximum current the voltage across R is,


VR = IZM R = 50  10-3  1  103 = 50V
 Vin = VR + VZ = 53 + 6.8 = 56.8 V

This shows that the zener diode can regulate an input voltage approximately from 11.8 V to
56.8 V and maintains it at 6.8 V at the output. The output voltage varies slightly due to the
changes in the zener impedance due to the changes in the zener current. But as these changes
are very small, can be neglected.

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UNIT – IV
PART - A

1. What is bipolar junction transistor?

A bipolar junction transistor is a three terminal semiconductor device in which the operation
depends on the interaction of both majority and minority carriers and hence the name bipolar. It is
used in amplifiers and oscillator circuits and as a switch in digital circuits.

2. What is a PNP and NPN transistors?

A transistor in which two blocks of P-type semiconductor separated by a thin layer of n – type
semiconductor is know as PNP transistor.

A transistor in which two blocks of n-type semiconductor’s are separated by a thin layer of p-type
semiconductor is known as NPN transistor.

3. Mention the different configurations of a transistor.

The transistor can be connected in three different ways

(i) Common Base configuration (CB)


(ii) Common Emitter configuration (CE)
(iii) Common Collector configuration (CC)

4. Give the relationship between ,.

IC IC
We know = , 
IE IB
1 1 1 
 1
  


 1
(or)

    1  

 
 (or) 
1  1 

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5. Draw the Ebers – Moll model for a PNP transistor and give the equations for emitter
current and collector current.

Fig.
 VC

IC  NIE  ICO  e VT
 1
 

N  Current gain in normal operation


ICO Collector junction reverse saturation current
 VE 
IE  lIC  IEO  e VT  1
 
I inverted current gain
IEOEmitter junction reverse saturated current.

6. What a reverse gate voltage of 12V is applied to a JFET, the gate current is 1 MA?
Determine the resistance between gate and source.

Solution:

VGS=12V
VGs I
IG  109 A  29  12,000M
IG 10

VGS
 gate to source resistance=  12,000M
IG

7. Draw the transfer characteristics of both enhancement and depletion type MOSFET on
the same graph.

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8. Calculate the values of I C and IE for a transistor dc=0.97 and ICBO=10A and IB is measured
as 50A.

Solution:

dc I
IC  IB  CBO
1  dc 1  dc
0.97  50A 10A
=   1.95  10 3 A
1  0.97 1  0.97

IC=1.95mA
IE=IC+IB
IE=1.95  10-3+5010-6
IE=210-3A
IE=2mA

9. Depletion MOSFET is commonly known as “Normally – ON – MOSFET” why?

The depletion MOSFET can conduct even if the gate to source voltage (V gs) is zero. Because of
the reason depletion MOSFET is commonly known as “Normally – ON – MOSFET”

10. What are all internal capacitance in MOSFET?

The internal capacitance in MOSFET are

(a) Gate capacitance


(b) Source – drain depletion capacitance

11. When a transistor is used as a switch, in which regions of output characteristic it is


operated?

The transistors is used as a switch in cut off region and saturation region, transistor carry
heavy current hence considered as ON State. In cut off it carry no current and it is equivalent to
open switch.

12. Draw the low frequency hybrid model of BJT in CB configuration.

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13. Mention the three regions that are present in the drain – source characteristic of JFET.

The three regions that are present in the drain – source characteristic of JFET are atomic region,
constant current region (or) pinch off region and breakdown region.

14. Mention the characteristics of CC configuration.

 The voltage gain is less than unity


 The current gain is high for low values of R L
 The input resistance is the highest of all the configurations
 The output resistance is the lowest of all the configurations.

15. What is zener break down?

Zener break down takes place when both sides of the junction are very heavily doped and
consequently the depletion layer is thin. When a smaller reverse bias voltage is applied a very
strong electric field is set up across the tin depletion layer. This electric field is enough to break the
covalent bonds. Now extremely large number of the charge carriers are produced which constitute
the zener current. This process is known as zener break down.

16. Name the special features of a FET.

(i) High input resistance


(ii) Low noise
(iii) Better thermal stability
(iv) High power gain
(v) High frequency response.

17. How is a FET used as VVR?

At low voltages, the depletion regions are thin and the drain current increases with voltages.
So, in the region where voltage is less than pinch – off voltage (V P), FET is behaving as a voltage
Resistor (VVR). That is the drain to source resistance is controlled by V GS.

18. What is early effect?

As the collector voltage VCC is made to increase the reverse bias, the space change width
between collector and base lends to increase, with the result that the effective width of the base
decreases. This dependency of base-width on collector – to – emitter voltage is known as the
early effect.

19. Define the current amplification factor of transistor in CB, CE and CC configuration.

For CB configuration the current amplification factor is given by “”

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IC

IE

For common emitter the current amplification factor

IC

IB

For common –collector the current amplification factor

IC

IB

20. “CC” configuration is called an emitter follower circuit?

In a common collector circuit, the o/p voltage is in phase with the input voltage and also the
same in magnitude. Thus emitter voltage follows the input voltage in step and hence the name
emitter – follower.

21. Why hybrid equivalent circuit is widely used for small signal low frequency
applications?

The hybrid parameters are widely used because  They can be measured easily

  They are more independent of each other


  They h- parameters are real numbers at audio frequencies
  They are practically suitable for circuit analysis and design and are specified by the
transistor manufactures.

22. Give the shockly’s equation for FET?

The shockly’s equation give the relation between drain current [I O] in the pinch off region and the
gate to source voltage VGS.

 V S
ID  IDSS 1  G 
 VP 

where,

IDSS Maximum value of drain current when VGS=0


VP pinch – of voltage.

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23. What is the difference between a FET and conventional transistor?

FET BJT
(i) It is a chipolar device It is a bipolar device
(ii) It is a voltage controlled devices It is a current controlled device
(iii) It’s input resistance is very high It’ s input resistance is very low
(iv) It is less noisy It is comparatively move noisy
(v) No thermal run away There is thermal run away
(vi) High switching speed Lower switching speed

24. Define pinch off voltages in FET.

Pinch off voltage is the minimum drain to source voltage where the drain current approach.

Constant value. Beyond the pinch off voltage the channel width can not be reduced.

25. List out some typical applications of FET.

(i) FET can be used in phase shift oscillation to minimize the loading effect.
(ii) FET can be employed as a buffer amplifier for isolation between input and output.

26. State the two types of MOSFET. State also the modes in which they can operate.

The two types of MOSFET are

(i) N-Channel MOSFET


(ii) P-Channel MOSFET

The modes in which they can operate are

(i) Depletion mode:- In this mode the gate is maintained at negative potential with respect
to source
(ii) Enhancement mode:- In this mode both the gate and drain are maintained at positive
potential with respect to source.

27. Mention the points of superiority of FET’s over BJT’s.

The FET has the following advantage’s over BJT

1. The noise level is very low in FET since there are no junctions
2. FET has very high power gain
3. Offers perfect isolation between input and output since it has very high input impedance.
4. FET is a negative temperature co-efficient device hence avoids thermal run away.

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28. Name the hybrid parameters of a bipolar junction transistor.

The hybrid parameters of a bipolar junction translators are

(i) hi  Input impedance


(ii) hoOutput admittance
(iii) hfForward current gain
(iv) hr Reverse voltage gain

29. Define drain resistance.

Drain resistance (rd) is defined as the ratio of small change in drain to source voltage ( VDs) to
the corresponding change in drain current ID at constant gate to source voltage VGS

VDS
rd  at constant VGS
ID

30. Define “Transconductance” of JFET.

Transconductance (gm) is defined as the ratio of small change in drain current (Io) to the
corresponding change in gate to source voltage ( VGS) at constant drain to source voltage (VDS)
ID
gm  (at constant VDS)
VGS

31. When the reverse gate voltage of JFET changes from 4.0 to 3.9V, the drain current
changes from 1.3 to 1.6 M.A. Find the value of transconductance?

Solution:

VGS=4.0-3.9=0.1V
ID=1.6-1.3=0.3MA

ID 0.3  103


 Transconductance, gm    3m mhos
VGS 0.1

gm  3mmhos

32. Define “Amplification Factor” of FET.

Amplification factor () is defined as the ratio of small change in drain to source voltage
(VdS) to the corresponding change in gate to source voltage (VGS) at a constant drain current
VDS
(ID)   (at constant ID )
VGS
33. What ratings limit the operation of a transistor?

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The ratings limit the operation of a transistors

(i) Maximum voltage


(ii) Maximum current
(iii) Power handling capacity
(iv) Minimum saturation voltage

34. Why is a coupling capacitor is used to connect a signal source to an amplifier?

A capacitor blocks d.c. signals and passes a.c. signals The primary function of the coupling
capacitor connected between a signal source and an amplifier is to block unwanted d.c. signals
and allow a.c. signals which are to be amplified.

35. Draw the output characteristics for a CE configuration and mark the cut off and
saturation region.

36. Differentiate enhancement and Depletion MOSFET.

Enhancement Depletion MOSFET


(i) positive voltage at the gate Negative voltage at the gate
(ii) Inversion layer is mode Depletion of majority carriers happens
(iii) Negative charges are formed Positive charges are formed

37. Why is the input impedance of a MOSFET higher than that of a FET?

A thin layer of metal oxide (normally silicon dioxide) is deposited over the left side of the
channel. A metallic gate is mounted on the oxide layer. As the oxide layer is an insulator,
therefore, gate is insulated from the channel. The layer acts as a capacitor and increase the input
impedence of a MOSFET. This arrangement is not present in the FET.

38. Define Threshold voltage.

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The gate voltage at which the channel is formed to let through, the flow of current I D of predefined
small value is called the gate source threshold voltage V GST(or) VT.

39. Compare JFET and MOSFET.

JFET and MOSFET differs in two aspects

1. JFET can be operated only in the depletion mode where as MOSFET can be
operated in both modes i.e. enhancement and depletion.
2. The gate current of JFET is larger even if it is operated with a reserve bias on the
junction
3. The MOSFET’s are easier to manufacture than JFET’s are easier to manufacture
than JFET’s and hence MOSFET’s are more widely used than JFET’s

40. Draw the diagram for small signal low frequency FET model.

41. Define delay time and rise time in the switching characteristics of transistor.

The time that elapses during this delay added with the time required for the current to rise to 10%
of its maximum value is called the delay time (t r).

42. Define the hie and hfe for a common emitter transistor configuration.

Input impedance [hie]:-

It is defined as the ratio of the change in (input) base voltage to the change in (input) base current
with the (output) collector voltage VCE kept constant.

VBE
hie  ,VCEcons tan t
IB

Forward Current gain [hfe]:-

It is defined as a ratio of the change in collector current to the corresponding change in the base
current keeping the collector voltage VCE constant hence,

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IC
hfe  ,VCEcons tan t
IB

43. Define the hoe and hrc for a CE transistor configuration.

Output admittance [hoe]:-

It is defined as the ratio of change in the collector current to the corresponding change in
the collector voltage with the base current I D kept constant.

IC
hoe  IB constant
VCE

44. Define fall time and storage time.

The fall time is specified as the time required for I C to go from 90% to 10% of its maximum level.

The storage time is the result of charge carriers being trapped in the depletion region when
a junction polarity is reversed.

45. What is knee point?

When VDS = 0, there is no attracting potential at the drain and hence I B = 0, although the
channel between the gate is fully open as V GS = 0 as VOD is increased, the drain current I D
increases linearly up to a knee point, this shows that FET behaves like an ordinary resistor till the
point is reached.

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PART - B

1. Draw the circuit diagram of an NPN junctions transistor in CE configuration and justify
for the shape of the static input and output characteristics. Mark the active, saturation and
cut off regions.

CE Configuration:- This is also called grounded emitter configuration. In this configuration base is
the i/P terminal, collector is the o/p terminal and emitter is the common terminal.

Input characteristics:-

To determine the input characteristics, the collector to emitter voltage is kept constant at zero volt
and base current is increased from zero in equal steps by increasing V BE in the circuit shown in fig.
(a)

When VCE =0, the emitter – base junction is forward biased and the junction behaves as a
forward biased diode. Hence the input characteristic for V CE=0 is similar to that of a forward –
biased diode. When vCE is increased, the width of the depletion region at the reverse biased
collector – base junction will increase. Hence the effective width of the base will decrease. This
effect causes a decrease in the base current I B. Hence to get the same value of I B as that for
VCE=0, VBE should be increased therefore the curve shifts to the right as V CE increases.

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Output characteristics:-

To determine the output characteristics, the base current I B is kept constant at a suitable
value by adjusting base – emitter voltage, V Be the magnitude of collector emitter voltage V CE is
increased in suitable equal steps from zero and the collector current I C is noted.

Fig.

For each setting VCE. Now the circles of I C VS VCE are plotted for different constant values of I B. The
outpur characteristics thus obtained are shown in fig. © from equation

 and IC   1    ICBO   IB for longer values of VCE, due to early effect, a very small
1 
0.98
change in is reflected in a very large change in . For e.g. =0.98,    49 If 
1  0.98
increases to 0.985, then =66. Here is a slight increase in  by about 0.5% results in increases in
 by about 34% Hence the o/p characteristics of CE configuration shows a larger slope taken
compared with CB configuration.

The o/p characteristics have three regions namely. Saturation region, cut off region and cut of
region.

2. Explain the operation of NPN transistor.

As shown in fig. the forward bias applied to the emitter base junction of an NPN transistor
causes a lot of electrons from the emitter region to cross over to the base region. As the base is
lightly doped with P-type impurity, the number of holes in the base region is very small and hence
the number of electrons that combine with holes in the P – type base region is also very small.
Hence a few electrons combine with holes to constitute a base current I B. The remaining electrons
(more than 95%) crossover into the collector region to constitute a collector current I C. Thus the
base and collector current summed up give the emitter current i.e. I E=-(IC+IB).

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Fig. Current in NPN transistor

In the external circuit of the NPN bipolar junction transistor, the magnitudes of the emitter current
IE, the base current IB and the collector current IC are related by IE=IC+IB.

3. Explain the operation of PNP transistor.

As shown in fig. the forward bias applied to the emitter – base junction of a PNP transistor
causes a lot of hoses from the emitter regions to cross over to the base region as the base is
lightly doped with N-type impurity. The number of electrons in the base regions is very small and
hence the number of holes combined with electrons in the N – type base region is also very small.
Hence a few holes combined with electrons to constitute a base current I B.

Fig. Current in PNP transistor

The remaining holes ( more than 95%) cross over in to the collector region to constitute a
collector current IC. Thus the collector and base current when summed up gives the emitter
current. i.e. IE=- (IC+IB).
In the external circuit of the PNP bipolar junction transistor, the magnitudes of the emitter
current IE, the base current IB and the collector current IC are related by

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IE=IC+IB
The equation gives the fundamental relationship between the currents in a bipolar transistor
circuit. Also, this fundamental equation shows that there are current amplification factors  and 
in common base transistor configuration and common emitter transistor configuration respectively
for the static (d.c) currents, and for small changes in the currents.

Large – signal current gain (). The large signal current gain of a common base transistor is
defined as the ratio of the negative of the collector – current increment to the emitter – current
change from cut off (IE=0) to IE,i.e.

 
 Ic  ICBO 
IE  0

where ICBO (or ICO) is the reverse saturation current flowing through the reverse biased
collector – base junction. i.e. the collector to base leakage current with emitter open. As the
magnitude of ICBO is negligible when compared to IE, the above expression can be written as

IC

IE

Since IC and IE are flowing in opposite directions,  is always positive. Typical value of 
ranges from 0.90 to 0.995. Also,  is not a constant but varies with emitter current I E, collector
voltage VCB and the temperature.

4. Compare the three types of transistor configuration.

Table A comparison of CB CE and CC configurations

Property CB CE CC
Input resistance Low (about 100) Moderate (about 750 ) High (about 750 k)
Output resistance High (about 450 ) Moderate (about 45 ) Low (about 25)
Current gain 1 High High
Voltage gain About 150 About 500 Less than 1
Phase shift 0 or 360o 180o 0 or 360o
Between input & output For high frequency For audio frequency For impedance matching
voltages Applications circuits circuits

5. Describe the two types of breakdown in transistors.

There is a possibility of voltage breakdown in the transistor at high voltages even through
the rated dissipation of the transistor is not exceeded. Therefore, These is an upper limit to the
maximum allowable collector function voltage. There are two type of breakdown, namely.

(1) Avalanche multiplication (or) avalanche breakdown


(2) reach- through (or) punch – through

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Avalanche breakdown and multiplication:

When a diode is reverse biased, there is a limit on the voltage that can be applied which is
the avalanche voltage. Similarly, in the transistor, the maximum reverse biasing voltage which may
be applied before breakdown between the collector and base terminals with the emitter open is
called breakdown voltage BVCBO. Therefore, an upper limit is set on the collector voltage V CB by
avalanche breakdown in the reverse biased collector – base junction.

Breakdown may occur because of avalanche multiplication of the current I Co that crosses
the collector junction. As a result of this multiplication, the current becomes MI CO where M is the
avalanche multiplication, factor. At the breakdown voltage BV CBO, multiplication factor M becomes
infinite and the current rises abruptly in the breakdown region as shown in fig. (a), there will be
large changes in current with small changes in applied voltage.

Fig.

The avalanche multiplication factor depends on the voltage V CB between collector and base, which
has been found to be given empirically by

1
M n
 (1)
 V 
1   CB 
 BVCBO 

As a result, in the presence of avalanche multiplication the current gain of CB transistor has
become M. For the CE configuration, the collector to emitter breakdown voltage BV CEO with base
open is

1
BVCEO  BVCBO 0 n  (2)
hFE

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In general, BVCEO is 40% to 50% of BVCBO. This is the upper limit of VCE that can be placed across
the transistor without damaging it.

Reach – Through (or) punch – Through:

According to Early effect, the width of the collector junction transistor region increases with
increased collector – junction voltage as the voltage applied across the junction increases the
transition region penetrates deeper into the base and will have spread. Completely across the
base to reach the emitter junction as the base is very thin. Thus the collector voltage has reached
through the base region this effect. Known as reach through.

It is possible to raise the punch- through voltage by increasing the doping concentration in
the base, but this automatically reduces the emitter efficiency punch through taken place at a fixed
voltage between collector and base and is not dependent on circuit configuration, where as
avalanche multiplication takes place at different voltages depending upon the circuit configuration
therefore the voltage limit of a particular transistor is determined by either of the two types of
breakdown which ever occurs at lower voltage. .

6. Derive the drain current equation.

EXPRESSION FOR SATURATION DRAIN CURRENT

For the transfer characteristics, VDS is maintained constant at a suitable value greater than
the pinch – off voltage VP. The gate voltage VGS is decreased from zero till IP is reduced to zero.
The transfer characteristics ID versus VGs is shown in fig. The shape of the transfer characteristic is
very nearly a parabola. It is found that the characteristic is approximately represented by the
parabola.

2
 V 
IDS  IDSS  1  GS 
 VP 
where IDS is the saturation drain current, I DSS is the value of IDS when VGS when VGS=0, and VP is the
pinch – off voltage.

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Differentiating Eq. with respect to VGs we can obtain an expression for gm.

IDs  V  1 
 IDSS  2  1  GS   
VGS  VP  VP 

 IDS
We know that gm  , VDS is constant
 VGS
2IDSS  VGS 
Therefore, gm  1 
VP  VP 

Now from Eqn. we have

 VGS  IDS
1 
 VP  IDSS

Substituting this value in Eqn. we get,

2 IDSIDSS
gm 
VP

Suppose gm=gmo, when VGS=0, then from Eqn.

 V 
gm  gmo  1  GS 
 VP 

Equation shows that gm varies as the square root of the saturation drain current I DS, and Eqn.
shows the gm decreases linearly with increase of VGS.

7. With the help of suitable diagram explain the working of an n- channel enhancement
MOSFET?

MOSFET is the common term for the insulated Gate field effect Transistor (IGFET) there are two
basic forms of MOSFET.

(I) Enhancement MOSFET


(II) Depletion MOSFET

Principle:

By applying transverse electric field across an insulator, deposited on the semi conducting
material the thickness and hence the resistance of a conducting channel of a semi conducting
material can be controlled.

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Enhancement MOSFET Construction:

The construction of N- channel enhancement MOSFET is shown in fig (a) and the circuit
symbols for an N-channel and a p-channel enhancement MOSFET are shown in fig. (b) & (c)
respectively. As there is no continuous channel in an enhancement MOSFET, this condition is
represented by the broken line in the symbols.

Two highly doped N* regions are diffused in a lightly doped substrate P-type silicon
substrate. One N* region is called the source S and the other one is called the drain D. They are
separated by 1 mil (10-3 inch). A thin insulating layer of Sio 2 is grown over the surface of the
structure and hole are get into the oxide layer allowing contact with source and drain.

Fig.

A thin layer of metal aluminum is formed over the layer of Sio 2. This metal layer covers the entire
channel region and it forms the gate G.

The metal area of the gate, in conjunction with the insulating oxide layer of Sio2 and the
semiconductor channel forms a parallel plate capacitor. This device is called the insulated gate
FET because of the insulating layer of Sio 2. This layer give extremely high input impedance for the
MOSFE.

Operation:-

If the substrate is grounded and a positive voltage is applied at the gate, the positive charge
on G induces an equal negative charge on the substrate side between the sources and drain
regions thus an electric field is produced between the source and drain regions.

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Fig.
Drain Characteristic:

The direction of the electric field is perpendicular to the plates of the capacitor through the
oxide. The negative charge of electrons which are minority carriers in the p-type substrate forms a
inversion layer. As the positive voltage on the gate increases, the induced negative charge in the
semiconductor increases. Hence the conductivity increases and current flows from source to drain
through the induced channel. Thus the drain current in enhanced by the positive gate voltage as
shown in fig. (d).

Fig.

8. Explain the construction, working principle and characteristics of n-channel depletion


MOSFET.

Principle: By applying a transverse electric field across an insulator, deposited on the semi
conducting material the thickness and hence the resistance of a conducting channel of a semi
conducting material can be controlled.

In a depletion MOSFET, the controlling electric field reduces the number of majority carriers
available for conduction. Whereas in the enhancement MOSFET. Application of electric field
causes an increase in the majority carrier density in the conducting regions of the transistor.

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Construction and Working:

The construction of an N-channel depletion MOSFET is shown in fig.(a) where an N channel is


diffused between the source and drain to the basic structure of MOSFET.

With VGS =0 and the drain D at a positive potential with respect to the source, the electrons
(majority carriers) flow through the N – channel from S to D.

Fig. N-channel depletion MOSFET

Fig. Drain characteristics

Therefore the conventional current I D flows through the channel D to S. If the gate voltage is
made negative positive charge consisting of holes is induced in the channel through Sio 2 of the
gate channel capacitor. The introduction of the positive charge causes depletion of mobile
electrons in the channel. Thus a depletion region is produced in the channel. The shape of the
depletion region depends on VGS. Hence the channel will be wedge shaped as shown in fig. (a)
when VDS is increased ID increases and it becomes practically constant at a certain value of V DS
called the pinch off voltage. The drain current I D almost gets saturated beyond the pinch off

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voltage. Since the current in a FET is due to majority carriers, the induced positive charges make
the channel less conductive, and IDdrops as VGS is made negative.

The depletion MOSFET may also be operated in an enhancement mode. It is only necessary to
apply a positive gate voltage so that negative.

The depletion MOSFET may also be operated in an enhancement mode. It is only


necessary to apply a positive gate voltage so that negative charges are induced in to the N- type
channel. Hence the conductivity of the channel increases and I D increases. As the depletion
MOSFET can be operated with bipolar input signals irrespective of doping of the channel. It is
also called as duel mode MOSFET. The volt – ampere characteristics are indicated in fig. (b) and,
The curve of ID versus VGS for constant VDS is call Transfer characteristics of MOSFET and id
shown in fig. (c).

9. Compare JFET & MOSFET.

1. In enhancement and depletion types of MOSFET, the transverse electric field induced
across an insulating layer deposited on the semiconductor material control the conductivity
of the channel. In the JFET the transverse electric field across the reverse biased PN
junction controls the conductivity of the channel.
2. The gate leakage current in a MOSFET is of the order of 10 -12A. Hence the input resistance
of a MOSFET is very high in order of 10 10 to 1015. The gate leakage current of a JFET is of
the order of 10-9A and its input resistance is of the order of 10 8.
3. The output characteristics of the JFET are flatter than those of the MOSFET and hence, the
drain resistance of a JFET (0.1 to 1M) is much higher than that of a MOSFET (1 to 50
k).
4. JFETs are operated only in the depletion mode. The depletion type mode. The depletion
type MOSFET may be operated in both depletion and enhancement mode.
5. Comparing to JFET, MOSFETs are easier to fabricate.
6. MOSFET is very susceptible to over load voltage and needs special handling during
installation. It gets damaged easily if it is not properly handled.
7. MOSFET has zero offset voltage. As it is a symmetrical deice, the source and drain can be
interchanged. These two properties are very useful in analog signal switching.
8. Special digital CMOS circuits are available which involve near – zero power dissipation and
very low voltage and current requirements. This makes them most suitable for portable
systems.

MOSFETs are widely used in digital VLSI circuits then JFETs because of their advantages

10. Compare JFET and BJT.

1. FET operation depends only on the flow of majority carriers – holes for P – channel FETs
and electrons for N-channel FETs. Therefore, they are called Unipolar devices. Bipolar
transistor (BJT) operation depends on both minority and majority current carriers.
2. As FET has no junctions and the conduction is through an N-type or P-type semiconductor
materials, FET is less noisy than BJT.

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3. As the input circuit of FET is received biased, FET exhibits a much higher input impedance
(in the order of 100M) and lower output impedance and there will be a high degree of
isolation between input and output. So, FET can act as an excellent buffer amplifier but the
BJT has low input impedance because its input circuit is forward biased.

4. FET is a voltage controlled device, i.e voltage at the input terminal controls current,
whereas BJT is a current controlled device, i.e. the input current controls the output current.

5. FETs are much easier to fabricate and are particularly suitable for ICS because they
occupy less space than BJTs.

6. The performance of BJT is degraded by neutron radiation because of the reduction in


minority – carrier lifetime, whereas FET can tolerate a much higher level of radiation since
they do not rely on minority carriers for their operation.

7. The performance of FET is relatively unaffected by ambient temperature changes. As it has


a negative temperature coefficient at high current levels, it prevents the FET from thermal
breakdown. The BJT has a positive temperature coefficient at high current levels which
leads to thermal breakdown. The BJT has a positive temperature coefficient at high current
levels which leads to thermal breakdown.

8. Since FET does not suffer from minority carrier storage effects, it has higher switching
speeds and cut-off frequencies. BJT suffers from minority carrier storage effects and
therefore has lower switching speed and cut – off frequencies.

9. FET amplifiers have low gain bandwidth product due to the junction capacitive effects and
produce more signal distortion except for small signal operation.

10. BJTs are cheaper to product than FETs.

11. Explain the construction and operation of n-channel JFET.

A junction field effect consist of a p-type or n-type silicon bar. The bar is the conducting
channel for the charge carriers. If the bar is made up of N-type material it is known as N-channel
FET and if the bar is made up of p-type material it is known as p-channel FET. To form a JFET,
two junction diodes are connected internally. The three terminals are namely source, gate and
drain.

Operation of N-channel JFET:

When VGS=0 and VDS=0 when no voltage is applied between drain and source, and gate
source, and gate source, the thickness of the depletion regions round the PN junction is uniform
as shown in fig. (a)

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Fig.

When VDS=0 and VGS is decreased from zero.

In this case the PN junctions are reverse biased and hence he thickness of the depletion
region increases. As VGS is decreased from zero, the reverse bias voltage across the PN junction
is increased and hence, the thickness of the depletion region in the channel until the two depletion
regions make contact with each other. In this condition, the channel is said to be cut-off. The value
of VGS which is required to cut – off the channel is called the cut-off voltage V C.

When VGS =0 and VDS is increased from zero.

Drain is positive with respect to the source with V GS=0. Now the majority carriers flow through
the N-channel from source to drain. Therefore the conventional current I D flows from drain to
source As VDS is increased the cross sectional area of the channel will be reduced. At a certain
value of VP of VDS, the cross sectional area becomes minimum. At this voltage, the channel is said
to be pinched off and the drain voltage V P is called the pinch – off voltage.

(i) As VDS is increased from zero. ID increases along VP, and the rate of increases of ID with
VDS decrease as shown in fig. (c) The region from V DS=0 to VDS=VP is called the holmic
region.

(ii) When VDS=VP ID becomes maximum when VDS is increased beyond VP, the length of the
pinch – off or saturation region increases. Hence, there is no further increase of I D.

(iii) At a certain voltage corresponding to the point B, I D suddenly increases

When VGS is negative and VDS is increased

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Fig.

When the gate is maintained at a negative voltage less than the negative cut off voltage.
The reverse voltage cross the junction is further increased. Hence for a negative value of V GS, the
curve of ID versus VDS is similar to that for V GS=0 but the values of VP and BVDGO are lower as
shown in fig. (c).

Drain characteristics

From the curves, it is seen that above the pinch off voltage, at a constant value of V DS, ID
increases with an increases of V GS. Hence a JFET is suitable for use as a voltage amplifier, similar
to a transistor amplifier.

UNIT - V
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Tunnel Diode, Pin Diode, SCR characteristic and two transistor equivalent model –UJT , DIAC &
Triac Laser, CCD, Photodiode, Phototransistor, Photo conductive Cell & Photo voltaic cell –LED &
LCD

PART – A

1. What is Tunnel Diode or Esaki Diode?

A tunnel diode is a two terminal negative resistance device that can be employed as an
amplifier, an oscillator or switch. Some times called as Esaki diode after its inventor.

2. What is tunneling effect?

A tunnel diode is a heavily doped semiconductor material so the depletion region is very
narrow. It does not constitute a large barrier; even a small forward or reverse bias the charge
carrier sufficient energy to cross the depletion region. This effect is known as tunnelloy effect.

3. What is negative resistance ?

In normal resistance, the relation between voltage and current are linear. In negative
resistance devices a rise in current while there is decrease in device voltage or vice versa. This
kind of devices is employed in oscillator(eg) tunnel diode , UJT

4. State some application of tunnel diode.

1. Ultra high speed switch


2. Logic memory device.
3. Microwave oscillator
4. Relaxation oscillator circuit
5. Amplifier

5. What is Pin Diode?

The pindiode has heavily doped p-type and n-type region separated by Intrinsic region.
When it is reverse biased acts like an capacitor, and when forward biased it behaves as a variable
resistor.

6. Draw PIN diode diagram.


P I N

N type
P type
Semiconduct Intrinsic
ort Pure
7. State some application of PIN DIODE. semicondor

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It is used as a modoizhing device for AC signal. It is used in microwave switching


applications.

8. What is Unijunction Transistor?

Lightly doped N-type siliconbar with a heavily doped p type material alloyed to its one side.
Three terminal semiconductor switching device has only one PN Junction, hence it is commonly
called as unijunction transistor, (UJT),It is used as a control switch and Relaxation oscillator.

9. Define Intrinsic standoff ration .

RB1

RB1  RB2 one typical value of n ranges from 0.56 to 0.75

10. Explain the difference between UJT and Bipolar Transistor.

BIOPOLAR JUNCTION UJT

Two junction Base emitter and Collector Base Only one junction emitter and base
Conduction due to both majority and minority Conduction due to only majority carrier
carrier
Bipolar device Unipolar device
Used as an amplifier and switch Used as an oscillator and switch
No negative resistance region Exhibit negative resistance

11. Name some application of UJT.

UJT can be employed in variety of application U 1z saw tooth wave generator, pulse
generator, switching , timing and phase control circuits

12. Find Intrinsic stand of ration of a UJT when RBB = 10 K


RB2 =3.5 K

RBB =RB1 +RB2

RB1 = 10-35 =6.5 k

RB1 R 6.5
  B1   0.65
RB1  RB2 RBB 10

13. What do you mean by Thyristor family?

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Thyristor is a semiconductor device having three or more junction. It uses internal feedback
for switching action. This device has high voltage and current restrings. Thyristor family consist of
PNPN Diode, SCR, TRIAC DIAC, UJT.

14. Draw two transistor model of a SCR.

15. Explain Breakover Voltage, Latching current, holding current.

Breakover Voltage VB0 is the voltage at which the junction J 2 breakdown and the lathc (switch) is
ON from OFF state latching current. It is the current at which the device is hermed on I L holding
current In is the minimum current so that the device is on. Otherwise when the current falls below
holding current, the device switch to OFF condition.

16. Draw the diagram of SCR characteristic

17. Why SCR termed as controlled rectifier? How it is different from ordinary diode rectifier
circuit?

In normal rectifier the output of the circuit is either single half or both. No way to control the
power.

In SCR we can control the output by controlling the gate trigger circuit and Power output
controlled over a wide range, hence it is known as controlled rectifier.

18. Explain the operation of SLR in shortnotes.

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The output voltage can be controlled by triggering the Gen voltage at suitable hence
 -Firing angle at which the SCR conducts. By controlling  - we can control the power output to
the load.

19. Draw a SCR Halfwave rectifier and its output.

20. Name few Application of SCR.

 SCR Rectifier
 SCR Crowbar
 SCS – act as a switch

21. What is DIAC?

DIAC is a three layer two terminal device. It acts as bidirectional evalanche diode. Short
form of Diode AC (DIAC)

22. What is bidirectional Thysistor?

Thysistor in which conduction takes place in both direction.

23. Draw DIAC Symbol a Basic Structure

24. What is Triac?

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Triac Inode AC Switch. A three terminal semiconductor switching device which can control
alternating current in a load. Two SCRs are connected back to back.

25. Draw Basic Structure and Circuit symbol of Triac.

26. Write the application of Triac.

Triac is used for illumination control, temperature control motor speed control, and as static
switch to turn as power ON and OFF.

27. Write DIAC application.

DIAC is used as a Triggerly device in Triac phase control circuits used for light, temp, Motor
control. DIAC is not a control device.

28. Draw Two SCR version of a Triac.

29. Draw the triac characteristic.

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30. What is Luminescence?

Light emitted from a solid when it is stimulated by the source of incident energy. This
phenomenon is called lumincate. If the incident energy in the form of photons(Light) it is called
Photo Luminenec.

31. Name two categories of Optoelectronic devices.

(i) Photoconductive device: When radiation is incident on a semiconductor, some


absorption of light by the material take place and conductivity increases photoconductive effects.

Eg. Photoresistor – Photodiode, photor

(ii)Photovoltaic cell generates and voltage due to light incident (eg) solar cell
Photo voltaic cell generates a voltage while photo conductive requires an external source.

32. What is Photo conductive Cell (PC) –LDR?

The photo conductive cell (PC) or detector is two terminal device which is used as light
dependent resistor. It is made of thin layer of cadmium sulphide (Cds), lead sulphide (Pbs). It’s
resistance decreases with the presence of light and increase in the absent of light.

33. Name few application of photoconductive cell.

 Used as light detector for automatic street lighting


 Switching circuit, Introdor detector
 Camera shutter opening during the flash.

34. What about Photodiode?

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Silicon photodiode is a light sensitive device also called photodetector which converts light
signal into electrical signal.

35. Explain about photodiode operation.

When light falls on a window lens fixed on the junction more no of electron hole pair
generated due to light incident. The movement of electron-hole pair in a properly connected circuit
(Reverse biased condition) increases the magnitude of the circuit current. This current wholly
dependent on the light incident. Thus light signal is converted into electrical signal.

36. What is dark current?

There is minimum Reverse leakage current flow in the circuit even when there is no light.
This current is called dark current.

37. Write the application of Photodetector photodiode, phototransistor.

Light detector, demodulator, encoder high speed country light operand switches, punched
cord reader, sound track films.

38. What is the advantage of phototransistor over photodiode?

The current produced by a photodiode is very low needs amplification for control
application. Photo transistor is a sensitive semiconductor. Light detector which combines a photo
diodes amplifier. It permits a greater flow of current. The current increased by a factor of 

39. What is Photovoltaic effect?

If the PN junction is open circuited, the light energy is used to create a potential difference
proportional to the frequency and intensity of the incident light. This phenomenon is called
photovoltaic effect.

40. Explain photovoltaic cell/solar cell.

Photo voltaic cell is a light sensitive semiconductor devices producer and voltage when
illuminated which may be used directly to supply small amount of power. When sunlight is incident
one photovoltaic cell, it is converted into electrical energy. Such an energy converter is called solar
cell or solar battery.

41. Name application of Photo voltaic cell.

Photovoltaic cells are used in low power devices such as light meter. Solar cell are used to
generate power in satellites.

42. Details of LED in brief?

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LED – light emitting diode is a PN Junction device which emit light when forward biased by
a phenomenon of electro luminescence. The excited electron in the higher state move back to its
original level. This energy will be radiated as best in most of the diode. In some material Gelium
phosphide (GSP), gallium arcnide phosphide (G 2ASP), the radiation is mostly of the form light
energy. in visible region.

43. What are different LED type and its material?

Gellium arsenide (G2AS) – Infrared radiation (Invisible)


Gellium phosphide – Green or Red
Gellium arsenide phosphide – red or yellow

44. Write the application of LED.

 Burglar alarm
 Picture phone
 Multimeters
 Digital meters
 Calculator
 Microprocessor
 Optical Communication devices
 Electronic telephone exchanges

45. What is ILD Injection Laser Diode?

When the emitted light is coherent (monochromatic then this LED are known as ILD. ILD is
used as optical source – more suitable for high data rate application.

46. Describe Liquid crystal display?(LCD)

The liquid is normally transparent but if subjected to strong electric field, disruption of well
ordered crystal structure takes place causing the liquid to polarize and opaque. The removal of
applied electric field allows the crystal structure to resign its original form and the maturings
become transparent.

47. State the advantage – disadvantage of LCD

Advantages:- The voltage required are very small low power consumption –economics
Disadvantages:- Slow devices turn on – OFF time are quite large

(ii) Used on dc the life span reduced. Therefore they used with ac supplies with frequency less
than 50 Hz
(iii) Occupy large area

47. Comparison between LED and LCD.

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LED LCD
Consumes more power requires 10-250 Essentially acts as a capacitor and consumer
mw per digit very less power 10-200 W per digit
It requires external driver circuit due to Can be driver by IC chips
high power requirement
Good brightness level Moderate
Operable within temperature range – 40 -20 to 60C
to 85C
Life time is around 100,000 hours Limited to 50,000 hours due to chemical
degradation.
Emit light in red, orange, yellow, green Invisible in darkness- requires external
and white illumination
Operating voltage range is 1.5 to 5 V d.c. 3-20V ac
Response time is 50 to 500 ns Slow decay time – 50 to 200 ms
Viewing angle 150 Viewing angle 100

49. What is a alphanumeric display?

Display devices provide a visual display of numbers letters and various sign in response to
electrical input served as constituent of an electronic display.

(i) Passive Display: Light controllers – they are modulator of light in which the light path
pattern gate modified on application of electric field –LCD

(ii) Active Display – Light emitter –they are generator of light –LED

50. Seven segment Display – Explain

The seven segment display which can display all numerals and nine letters. Each segment
can be turned ON/OFF to form the desired digit.

51. What is Charge Coupled device? CCD

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A CCD is an analog shift register that enables the transportation of analog signal (electric
charges) through successive stages (capacitors)controlled by a clock signal. CCD devices can be
used as a form of memory to store optical images. Eg: Image sensor in Digital camera.

52. What is Varactor Diode?

Varactor or variable capacitor diode is also a junction diode with a small impurity at its
junction which has the useful property that its junction or transition capacitor and varied
electronically.

53. Write various areas where Varactor diode used.

Varactor diode are used in FM radio, TV receiver AFC circuits self adjusting Bridges
Circuits, bandpass filter.

54. What is LASER DIODE?

Light Amplification using stimulated emission of Reduction, Similar to LED, laser are used
to convert the electrical signal to direct band gap material where high recombination velocity exist,
optical gain can be achieved by population inversion of carrier by thro high level current injection
by formly a resonant cavity.

55. What are the condition to achieve laser action?

(i) There must be an inverted population (I.P) move atom in the excited state then the
ground state.

(ii) Excited state must be metastable state.

(iii) The emitted photons must is stimulate further emission, This is achieved by the use of
reflectry mirror citrine end.

56. Application of Laser Diode.

 Telecommunication
 Fiber optic communication source
 Barcode Reader
 Infrared and red laser are common in CDROM, DVD
 Industrial application such as heat treating cladding, seam welding
 Image scanning
 Laser printing

PART – B

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1. Explain in detail about Tunnel Diode.

TUNNEL DIODE

The Tunnel or Esaki diode is a thin –junction diode which exhibits negative resistance
under low forward bias conditions.

An ordinary PN junction diode has an impurity concentration of about 1 part in 10 8. With this
amount of doping the width of the depletion layer is of the order of 5 microns. This potential
barrier restrains the flow of carriers from the majority carrier side to the minority carrier side. If the
concentration of impurity atoms is greatly increased to the level of 1 part in 10 3, the device
characteristics are completely changed. The width of the junction barrier varies inversely as the
square root of the impurity concentration and therefore, is reduced from 5 microns to less than 100
 -8 th
A (10 m). This thickness is only about 1/50 of the wavelength of visible light. For such thin
potential energy barriers, the electrons will penetrate through the junction rather than surmounting
them. This quantum mechanical barrier is referred to as tunneling and hence, these high-impurity-
density PN junction device are called tunnel diodes.

The V-I characteristic for a typical germanium tunnel diode is shown in fig. It is seen that at
first forward current rises sharply as applied voltage is increased, where it would have risen slowly
for an ordinary PN junction diode (Which is shown as dashed line for comparison). Also, reverse
current is much larger for comparable back bias than in other diodes due to the thinness of the
junction. The interesting portion of the characteristic starts at the point A on the curve, i.e. the
peak voltage. As the forward bias is increased beyond this point, the forward current drops and
continues to drop until point B is reached. This is the valley voltage. At B, the current starts to
increase once again and does so very rapidly as bias is increased further. Beyond this point,
characteristic resembles that of an ordinary diode. Apart from the peak voltage and valley voltage,
the other two parameters normally used to specify the diode behaviour are the peak current and
the peak-to-valley current ratio, which are 2 mA and 10 respectively, as shown.

Fig: V-I characteristic of tunnel diode

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The V-I characteristic of the tunnel diode illustrates that it exhibits dynamic resistance
between A and B. figure shows energy level diagrams of the tunnel diode for three interesting
bias levels. The shaded areas show the energy states occupied by electrons in the valence band,
whereas the cross hatched regions represent energy states in the conduction band occupied by
the electrons. The levels to which the energy states are occupied by electrons on either side of
the junctions are shown by dotted lines. When the bias is zero, these lines are at the same height.
Unless energy is imparted to the electrons from some external source, the energy possessed by
the electrons on the N-side of the junction is insufficient to permit them to climb over the junction
barrier to reach the P-side. However, quantum mechanics show that there is a finite probably for
the electrons to tunnel through the junction to reach the other side, provided there are allowed
empty energy states in the P-side of the junction at the same energy level. Hence, the forward
current is zero.

Fig: Energy Level Diagram of tunnel diode

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When a small forward bias is applied to the junction, the energy level of the P-side is lower
as compared with the N-side. As shown in fig (b), electrons in the conduction band of the N-side
see empty energy level on the P-side. Hence, tunneling from N-side to P-side takes place.
Tunneling in other direction is not possible because the valence band electrons on the P-side are
now opposite to the forbidden energy gap on the N-side. The energy band diagram shown in
figure (b) is for the peak of the diode characteristic.

When the forward bias is raised beyond this point, tunneling will decrease as shown in fig.
(C). The energy of the P-side is now depressed further, with the result that fewer conduction band
electrons on the N-side are opposite tot the unoccupied P-side energy levels. As the bias is
raised, forward current drops. The corresponds to the negative resistance region of the diode
characteristic. As forward bias is raised still further, tunneling stops altogether and it behaves as a
normal PN junction diode.

Equivalent circuit:

The equivalent circuit of the tunnel diode when biased in the negative resistance region is
as shown in fig. In the circuit, R s is the series resistance and L s is the series inductance which
maybe ignored except at highest frequencies. The resulting diode equivalent circuit is thus
reduced to parallel combination of the junction capacitance C j and the negative resistance – Rn.
Typical values of the circuit components are R s =6, Ls =0.1 nH, Cj =0.6 pF and Rn =75.

Fig: Equivalent circuit of tunnel diode

Applications

1. Tunnel diode is used as an ultra-high speed switch with switching speed of the order of ns or ps
2. As logic memory storage device
3. As microwave oscillator
4. In relaxation oscillator circuit
5. As an amplifier

Advantages

1. Low noise
2. Ease of operation
3. High speed
4. Low power

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Disadvantages

1. Voltage range over which it can be operated is 1 V or less.


2. Being a two terminal device, there is no isolation between the input and output circuit.

2. Write in detail about PINDIODE.

PIN diode structure

The PIN diode receives its name from the fact that is has three main layers. Rather than just
having a P type and an N type layer, the PIN diode has three layers:

1. P-type layer

2. Intrinsic layer
3. N-type layer

The instrinic layer of the PIN diode is the one that provides the change in properties when
compared to a normal PN junction diode. The intrinsic region comprises of the undoped, or
virtually undoped semiconductor, and in most PIN diodes it is very thin - of the order of between
10 and 200 microns.

There are a two main structures that can be used, but the one which is referred to as a planar
structure is shown in the diagram. In the diagram, the intrinsic layer is shown much larger than if it
were drawn to scale. This has been done to better show the overall structure of the PIN diode.

PIN diode with a planar construction

PIN diodes are widely made of silicon, and this was the semiconductor material that was used
exclusively until the 1980s when gallium arsenide started to be used.

PIN diode characteristics

It is found that at low levels of reverse bias the depletion layer become fully depleted. Once fully
depleted the PIN diode capacitance is independent of the level of bias because there is little net
charge in the intrinsic layer. However the level of capacitance is typically lower than other forms of
diode and this means that any leakage of RF signals across the diode is lower.

When the PIN diode is forward biased both types of current carrier are injected into the intrinsic
layer where they combine. It is this process that enables the current to flow across the layer.

The particularly useful aspect of the PIN diode occurs when it is used with high frequency

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signals, the diode appears as a resistor rather than a non linear device, and it produces no
rectification or distortion. Its resistance is governed by the DC bias applied. In this way it is
possible to use the device as an effective RF switch or variable resistor producing far less
distortion than ordinary PN junction diodes.

PIN diode applications

The PIN diode is used in a variety of different applications from low frequencies up to high
radio frequencies. The properties introduced by the intrinsic layer make it suitable for a number of
applications where ordinary PN junction diodes are less suitable.

In the first instance the diode can be used as a power rectifier. Here the intrinsic layer gives it
a high reverse breakdown voltage, and this can be used to good effect in many applications.

Although the PIN diode finds many applications in the high voltage arena, it is probably for
radio frequency applications where it is best known. The fact that when it is forward biased, the
diode is linear, behaving like a resistor, can be put to good use in a variety of applications. It can
be used as a variable resistor in a variable attenuator, a function that few other components can
achieve as effectively. The PIN diode can also be used as an RF switch. In the forward direction it
can be biased sufficiently to ensure it has a low resistance to the RF that needs to be passed, and
when a reverse bias is applied it acts as an open circuit The fact that the PIN diode has a low level
of capacitance because of the additional intrinsic layer in the diode, means that it can switch more
effectively than other forms of diode.

Another useful application of the PIN diode is for use in RF protection circuits. When used with
RF, the diode normally behaves like a resistor when a small bias is applied. However this is only
true for RF levels below a certain level. Above this the resistance drops considerably. Thus it can
be used to protect a sensitive receiver from the effects of a large transmitter if it is placed across
the receiver input.

PIN diode attenuator and switch circuit

The circuit above can be used as either a switch or an attenuator. This particular circuit is
current driven, although by placing a resistor in series wit the inductor to the switched "+" line, the

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circuit becomes voltage driven with the resistor limiting the maximum current.

PIN diodes are particularly used in RF applications where there low levels of capacitance and
also their switching and variable resistance properties make them very good in switching and
variable attenuator applications.

3. Write briefly about Varactor diode.

VARACTOR DIODE

The varactor or variable capacitor diode, is also a junction diode with a small impurity dose
at its junction, which has the useful property that its junction or transition capacitance is easily
varied electronically.

When any diode is reverse biased, a depletion region is formed, as seen in figure. The
larger the reverse bias applied across the diode, the width of the depletion layer “W” becomes
wider. Conversely, by decreasing the reverse bias voltage, the depletion region width “W”
becomes narrower. This depletion region is devoid of majority carrier and acts like an insulator
preventing conduction between the N and P regions of the diode, just like a dielectric, which
separates the two plates of a capacitor. The varactor diode with its symbol is shown in figure.

Fig: Depletion region in a reverse biased PN junction

Fig: Circuit symbol of varactor diode

As the capacitance is inversely proportional to the distance between the plates (C T  I/W),
the transition capacitance CT varies inversely with the reverse voltage. Consequently, an increase
in reverse bias voltage will result in an increase in the depletion region width and a subsequent
decrease in transition capacitance CT . At zero volt, the varactor depletion region W is small and

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the capacitance is large at approximately 600 pF. When the reverse bias voltage across the
varactor is 15 V, the capacitance is 30 pF.
The varactor diodes are used in FM radio and TV receivers, AFC circuits, self adjusting
bridge circuits and adjustable bandpass filters. With improvement in the type of materials used
and construction, varactor diode find application in tuning of LC resonant circuit in microwave
frequency multipliers and in very low noise microwave parametric amplifiers.

4. Write in detail Silicon controlled Rectifier SCR and its characteristic.

SCR (SILICON CONTROLLED RECTIFIER)

The basic structure and circuit symbol of SCR is shown in fig. It is a four layer three
terminal device in which the end P-layer acts as anode, the end N-layer acts as cathode and P-
layer nearer to cathode acts as gate. As leakage current in silicon is very small compared to
germanium, SCRs are made of silicon and not germanium.

Fig: Basic structure and circuit symbol of SCR

Characteristics of SCR The characteristic of SCR are shown in fig. SCR acts as a switch when it
is forward biased. When the gate is kept open, i.e. gate current I G =0, operation of SCR is similar
to PNPN diode. When I G < 0, the amount of reverse bias applied to J 2 is increased. So the
breakover voltage VB0 is increased. When I G > 0, the amount of reverse bias applied to J 2 is
decreased thereby decreasing the breakover voltage. With very large positive gate current
breakdown may occur at a very low voltage such that the characteristics of SCR is similar to that
of ordinary PN diode. As the voltage at which SCR is switched “ON’ can be controlled by varying
the gate current IG, it is commonly called as controlled switch. Once SCR is turned ON, the gate
loses control, i.e., the gate cannot be used to switch the device OFF. One way to turn the device

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OFF is by lowering the anode current below the holding current I H by reducing the supply voltage
below holding voltage VH, keeping the gate open.

Fig: characteristic of SCR

SCR is used in relay control, motor control, phase control, heater control, battery chargers,
inverters, regulated power supplies and as static switches.

Two Transistor version of SCR. The operation of SCR can be explained in a very simple way by
considering it in terms of two transistors, called as the two transistor version of SCR. As shown in
fig, an SCR can be split into two parts and displaced mechanically from one another but
connected electrically. Thus the device may be considered to be constituted by two transistors T 1
(PNP) and T2 (NPN) connected back to back.

Fig. Two Transistor version of SCR

Assuming the leakage current of T1 to be negligibly small, we obtain

Ib1  IA  Ie1  IA  1IA   1  1  IA ...(1)


also, from the figure , it is clear that

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Ib1  IC2 ...(2)


and Ic2   2Ik ...(3)

Substituting the values given in Eqs(2) and (3) in Eq. (1) , we get

 1-1  IA   2Ik ....(4)


We know that Ik  IA  Ig ... (5)

Substituting Eq. (5) in Eq(4) , we obtain

 1  1  IA   2  IA  Ig 
i.e.  1-1  2  IA  2Ig
  2Ig 
i.e IA    ....(6)
1   1   2  

Equation (6) indicates that if  1   2   1,thenIA   i.e. the anode current IA suddenly
reaches a very high value approaching infinity. Therefore, the device suddenly triggers into ON
state from the original OFF state. This characteristic of the device is known as its regenerative
action.

The value of  1   2  can be made almost equal to unity by giving a proper value of
positive current Ig for a short duration. This signal I g applied at the gate which is the base of T 2 will
cause a flow of collector current I C2 by transferring T2 to its ON state. As I C2 =Ib1, the transistor T1
will also be switched ON. Now, the action is regenerative since each of the transistors would
supply base current to the other. At the point even if the gate signal is removed, the device keeps
on conducting, till the current level is maintained to a minimum value of holding current.

5. Explain in detail SCR Halfwave Rectifier.

SCR Half-Wave Rectifier:

Though the SCR is basically a switch, it can be used in linear applications like rectification.
Figure shows the circuit of an SCR half wave rectifier.

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Fig: SCR half wave rectifier

During the negative halfcycle, the SCR does not conduct irrespective of the gate current, as
the anode is negative with respect to cathode and also PIV is less than the reverse breakdown
voltage.

During the positive half cycle of a.c. voltage appearing across secondary, the SCR will
conduct provided proper gate current is made to flow current, the lesser the supply voltage at
which the SCR is triggered ON. Referring to fig. the gate current is adjusted to such a value that
SCR is turned ON at a positive voltage V 1 of a.c. secondary voltage which is less than the peak
voltage Vm, Beyond this, the SCR will be conducting till the applied voltage becomes zero. The
angle at which the SCR starts conducting during the positive half cycle is called firing angle .
Therefore, the conduction angle is (180-).

The SCR will block not only the negative part of the applied sinusoidal voltage, but will also
block the part of positive waveform up to a point SCR is triggered ON. If the angle  is zero, this
will be an ordinary halfwave rectification. Therefore by proper adjustment of gate current, the SCR
can be made of conduct full or part of a positive half cycle, thereby controlling the power fed to the
load.

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Analysis Let V=Vm sin t be alternating voltage that appear across the secondary of the
transformer. In SCR halfwave rectifier.  is the firing angle and the rectifier conducts from  to
180 ( radians) during the positive half cycle.


1
2 
Therefore, average or d.c. output ,Vav  Vm sin tdt

1
 Vm cos t  

=
2
V
= m  1  cos  
2

Vm
For   0, Vav  . Here the full positive half cycle will appear across the load. This is the

value of average voltage for ordinary halfwave rectifier.

Vm
When   90,Vav  This shows that greater the firing angle , the smaller is the
2
average voltage and vice-versa.


1
 Vm sin t  dt
2
Similary, Vrms  
2 0

Vm2 
 1  cos 2t d t
4 0
=


Vm2  sin 2t 
=  t 
4  2  0
1
V 1 2
= m       sin2   
2  

Vm
If  =0, then Vrms 
2

6. What is TRIAC and Sketch it characteristic and describe its operation?

TRIAC (TRIODE A.C SWITCH)

Triac is a three terminal semiconductor switching device which can control alternating
current in a load. Its three terminals are MT 1, MT2 and the gate (G). The basic structure and circuit
symbol of a Triac are shown in fig. Triac is equivalent to two SCRs connected in parallel but in the

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reverse direction as shown in fig. So, a Triac will act as a switch for both directions. The
characteristics of a Triac are shown in figure.

Like an SCR, a Triac also starts conducting only when the breakover voltage is reached.
Earlier to that the leakage current which is very small in magnitude flows through the device and
therefore remains in the OFF state. The device, when starts conducting, allows very heavy
amount of current to flow through it. The high inrush of current must be limited using external
resistance, or it may otherwise damage the device.

Fig: Triac (a) Basic Structure and (b) Circuit symbol

Fig: Two SCR version of Triac: (a) Basic structure and (b) Equivalent circuit

During the positive half cycle, MT 1 is positive with respect to MT2, whereas MT2 is positive
with respect to MT1 during negative half cycle. A Triac is a bidirectional device and can be

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triggered either by a positive or by a negative gate signal. By applying proper signal at the gate,
the breakover voltage, i.e. firing angle of the device can be changed; thus phase control process
can be achieved.

Fig: characteristics of Triac

Triac is used for illumination control, temperature control, liquid level control motor speed
control and as static switch to turn a.c. power ON and OFF. Nowadays the diac-triac pairs are
increasingly being replaced by a single component unit known as quadric. Its main limitation in
comparison to SCR is its low power handling capacity.

7. Explain DIAC is a bidirectional switch.

DIAC (DIODE A.C. SWITCH)


The construction and symbol of diac are shown in figure. Diac is a three layer, two terminal
semiconductor device. MT1 and MT2 are the two main terminals which are interchangeable. It acts
as a bidirectional Avalanche diode. It does not have any control terminal. It has two junctions J 1
and J2. Though the Diac resembles a bipolar transistor, the central layer is free from any
connection with the terminals.

From the characteristic of a Diac shown in fig. it acts as a switch in both directions. As the
doping level at the two ends of the device is the same, the Diac has identical characteristics for
both positive and negative half of an a.c. cycle. During the positive half cycle, MT 1 is positive with
respect to MT2 whereas MT2 is positive with respect to MT 1 in the negative half cycle. At voltage
less than the breakover voltage, a very small amount of current called the leakage current flows
through the device and device remains in OFF state. When the voltage level reaches the
breakover voltage, the device starts conducting and it exhibits negative resistance characteristics,
i.e. the current flowing in the device starts increasing and the voltage across it starts decreasing.

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Fig: Diac: (a) Basic structure and (b) Circuit symbol

Fig: Characteristic of Diac

The Diac is not a control device. It is used as triggering device in Triac phase control
circuits used for light dimming, motor sped control and heater control.

8. Draw the equivalent circuit of UJT & Explain its operations.

UJT (UNIJUNCTION TRANSISTOR)

UJT is a three terminal semiconductor switching device. As it has only one PN junction
and three leads, it is commonly called as Unijunction transistor.

The basic structure of UJT is shown in fig(a). It consists of a lightly doped N-type Silicon
bar with a heavily doped P-type material alloyed to its one side closer to B 2 for producing single
PN junction. The circuit symbol of UJT is shown in fig. Here the emitter leg is drawn at an angle
to the vertical and the arrow indicates the direction of the conventional current.

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Fig: UJT (a) Basic structure (b) Circuit symbol and (c) Equivalent circuit

Characteristics of UJT Referring to Fig.(c), the interbase resistance between B 2 and B1 of the
silicon bar is RBB = RB1 + RB2. With emitter terminal open, if voltage V BB is applied between the two
bases, a voltage gradient is established along the N –type bar. The voltage drop across R B1 is
given by V1 =VBB, where the intrinsic stand-ff ration  =RB1 /(RB1 + RB2). The typical value of
ranges from 0.56 to 0.75. This voltage V 1 reverse biases the PN junction and emitter current is
cut-off. But a small leakage current flows from B 2 to emitter due to minority carriers. If a positive
voltage VE is less than V1. If VE exceeds V1 by the cutin voltage V, the diode becomes forward
biased. Under this condition, holes are injected into N-type bar. These holes are repelled by the
terminal B2 and are attracted by the terminal B 1. Accumulation of holes in E to B 1 region reduces
the resistance in this section and hence emitter current I E is increased and is limited by V E. The
device is now in the “ON” state.

If a negative voltage is applied to the emitter, PN junction remains reverse biased, and the
emitter current is cut off. The device is now in the “OFF’ state.
Figure shows a fairly of input characteristics of UJT. Here, up to the peak point P, the diode
is reverse biased and hence, the region to the left of the peak point is called cut-off region. The
UJT has a stable firing voltage V P which depends linearly on V BB and a small firing current I P (
25A). At P, the peak voltage VP = VBB +V, the diode starts conducting and holes are injected
into N-layer. Hence, resistance decreases thereby decreasing V E for the increase in I E. So, there
is a negative resistance region from peak point P to valley point V. After the valley point, the
device is driven into saturation and behaves like a conventional forward biased PN junction diode.
/the region to the right of the valley point is called saturation region. In the valley point, the
resistance changes from negative to positive. The resistance remains positive in the saturation
region. For very large IE, the characteristic asymptotically approaches the curve for I B2=0.

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Fig: Input characteristics of UJT

A unique characteristic of UJT is, when it is triggered, the emitter current increases
regenerative until it is limited by emitter power supply. Due to this negative resistance property, a
UJT can be employed in a variety of applications, viz, sawtooth wave generator, pulse generator,
switching, timing and phase control circuits.

9. Describe in detail about UJT relaxation Oscillator.

UJT relaxation oscillator The relaxation oscillator using UJT which is meant for generating
sawtooth waveform is shown in fig. It consists of a UJT and a capacitor C E which is charged
through RE as the supply voltage VBB is switched ON.

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Fig: UJT relaxation oscillator

The voltage across the capacitor increases exponentially and when the capacitor voltage
reaches the peak point voltage V P, the UJT starts conducting and capacitor voltage is discharged
rapidaly through EB1 and R1. After the peak point voltage of UJT is reached, it provides negative
resistance to the discharge path which is useful in the working of the relaxation oscillator. As the
capacitor voltage reaches zero, the device then cuts off and capacitor C E starts to charge again.
This cycle is repeated continuously generating a sawtooth waveform across C E.

The inclusion of external resistors R 2 and R1 in series with B2 and B1 provides spike
waveforms. When the UJT fires, the sudden surge of current through B 1 causes drop across R1,
which provides positive going spikes. Also, at the time of firing, fall of V EBI causes I2 to increase
rapidly which generates negative going spikes across R 2.

By changing the values of capacitance C E or resistance RE, frequency of the output


waveform can be changed as desired, since these values control the time constant R E CE of the
capacitor changing circuit.

Frequency of Oscillation. The time period and hence the frequency of the sawtooth wave can
be calculated as follows. Assuming that the capacitor is initially uncharged, the voltage V C across
the capacitor prior to breakdown is given by


VC  VBB 1  e  t / RECE 

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Where RE CE = charging time constant of resistor-capacitor circuit, and t = time from the
commencement of the waveform.

The discharge of the capacitor occur when VC is equal to the peak-point voltage VP , i.e

VP  VBB  VBB 1  e  t / RECE 
=1-e-t/RECE
-t/RECE  1
e
1
Therefore, t=RECE loge
 1  
1
=2.303 RECE log10
 1  
If the discharge time of the capacitor is neglected, then t =T, the period of the wave.

Therefore, frequency of oscillation of sawtooth wave,

1 1
f 
T 2.3R C log 1
E E 10
 1  
10. Explain about Laser Principle in detail.

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emission. This stimulated emission is the laser transition. Finally, a pulse of red light of
wave length 6943 Å emerges through the partially silvered end of the crystal.

11. What is charge coupled device CCD and explain its operation?

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Charge-coupled devices (CCDs) are silicon-based integrated circuits consisting of a dense matrix
of photodiodes that operate by converting light energy in the form of photons into an electronic
charge. Electrons generated by the interaction of photons with silicon atoms are stored in a
potential well and can subsequently be transferred across the chip through registers and output to
an amplifier.

CCDs were invented in the late 1960's by research scientists at Bell Laboratories, who
initially conceived the idea as a new type of memory circuit for computers. Later studies indicated
that the device, because of its ability to transfer charge and the photoelectric interaction with light,
would also be useful for other applications such as signal processing and imaging. Early hopes of
a new memory device have all but disappeared, but the CCD is emerging as one of the leading
candidates for an all-purpose electronic imaging detector, capable of replacing film in the
emerging field of digital photomicrography.

Fabricated on silicon wafers much like integrated circuits, CCDs are processed in a series
of complex photolithographic steps that involve etching, ion implantation, thin film deposition,
metallization, and passivation to define various functions within the device. The silicon substrate is
electrically doped to form p-type silicon, a material in which the main carriers are positively
charged electron holes. Multiple dies, each capable of yielding a working device, are fabricated on
each wafer before being cut with a diamond saw, tested, and packaged into a ceramic or polymer
casing with a glass or quartz window through which light can pass to illuminate the photodiode
array on the CCD surface.

When a ultraviolet, visible, or infrared photon strikes a silicon atom resting in or near a CCD
photodiode, it will usually produce a free electron and a "hole" created by the temporary absence
of the electron in the silicon crystalline lattice. The free electron is then collected in a potential well
(located deep within the silicon in an area known as the depletion layer), while the hole is forced
away from the well and eventually is displaced into the silicon substrate. Individual photodiodes
are isolated electrically from their neighbors by a channel stop, which is formed by diffusing boron
ions through a mask into the p-type silicon substrate.

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The principal architectural feature of a CCD is a vast array of serial shift registers
constructed with a vertically stacked conductive layer of doped polysilicon separated from a silicon
semiconductor substrate by an insulating thin film of silicon dioxide (see Figure 2). After electrons
have been collected within each photodiode of the array, a voltage potential is applied to the
polysilicon electrode layers (termed gates) to change the electrostatic potential of the underlying
silicon. The silicon substrate positioned directly beneath the gate electrode then becomes a
potential well capable of collecting locally-generated electrons created by the incident light.
Neighboring gates help to confine electrons within the potential well by forming zones of higher
potentials, termed barriers, surrounding the well. By modulating the voltage applied to polysilicon
gates, they can be biased to either form a potential well or a barrier to the integrated charge
collected by the photodiode.

The most common CCD designs have a series of gate elements that subdivide each pixel
into thirds by three potential wells oriented in a horizontal row. Each photodiode potential well is
capable of holding a number of electrons that determines the upper limit of the dynamic range of
the CCD. After being illuminated by incoming photons during a period termed integration,
potential wells in the CCD photodiode array become filled with electrons produced in the depletion
layer of the silicon substrate. Measurement of this stored charge is accomplished by a
combination of serial and parallel transfers of the accumulated charge to a single output node at
the edge of the chip. The speed of parallel charge transfer is usually sufficient to be accomplished
during the period of charge integration for the next image.

After being collected in the potential wells, electrons are shifted in parallel, one row at a
time, by a signal generated from the vertical shift register clock. The electrons are transferred
across each photodiode in a multi-step process (ranging from two to four steps). This shift is
accomplished by changing the potential of the holding well negative, while simultaneously
increasing the bias of the next electrode to a positive value. The vertical shift register clock
operates in cycles to change the voltages on alternate electrodes of the vertical gates in order to
move the accumulated charge across the CCD. Figure 1 illustrates a photodiode potential well
adjacent to a transfer gate positioned within a row of CCD gates.

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After traversing the array of parallel shift register gates, the charge eventually reaches a
specialized row of gates known as the serial shift register. Here, the packets of electrons
representing each pixel are shifted horizontally in sequence, under the control of a horizontal shift
register clock, toward an output amplifier and off the chip. The entire contents of the horizontal
shift register are transferred to the output node prior to being loaded with the next row of charge
packets from the parallel register. In the output amplifier, electron packets register the amount of
charge produced by successive photodiodes from left to right in a single row starting with the first
row and proceeding to the last. This produces an analog raster scan of the photo-generated
charge from the entire two-dimensional array of photodiode sensor elements.

12. Explain about photoconductive cell (LDR).

Bulk type Photoresistor or Photoconductive Cell:

The photconductive cell (PC) or detector is a two terminal device which is used as a Light
Dependent Resistor (LDR). It is made of a thin layer of semi-conductor material such as cadmium
sulphide (CdS); lead sulphide (PbS), or cadmium selenide (CdSe) whose spectral responses are
shown in fig. The photoconducting device with the widest applications is the Cds cell, because it
has high dissipation capability, with excellent sensitivity in the visible spectrum and low resistance
when stimulated by light. The main drawback of Cds cell is its slower speed of response. Pbs has
the fastest speed of response.

The illumination characteristics of photoconductive detectors are shown in figure. (a). It


exhibits the peculiar property that its resistance decreases in the presence of light and increase in
the absence of light. The cell simply act as a conductor whose resistance changes when
illuminated. In absolute darkness the resistance is as high as 2 M and in strong light, the
resistance is less than 10 .

Fig. Spectral responses of Cds and CdSe


A simple circuit for a photoconductive detector is shown in fig. (b). The semiconductor layer
is enclosed in a sealed housing. A glass window in the housing permits light to fall on the active
material of the cell. Here, the resistance of the photoconductive detector, in series with R, limits
the amount of current I in the circuit. The ammeter A is used to measure the current I. when no

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light falls on the cells, its resistance is very high and the current I is low. Hence the voltage drop
V0 across R is relatively low. When the cell is illuminated, its resistance becomes very low.
Hence, current I increases and voltage V 0 increases. Thus, this simple circuit arrangement with
slight modification can be used in control circuits to control the current.

Fig (a) Illumination characteristics of the photoconductive detector , and (b)


photoconductive detector connected in a simple circuit.

Applications The detector is used either as an ON/OFF device to detect the presence or absence
of a light source which is used for automatic street lighting or some intermediate resistance value
can be used as a trigger level to control relays and motor. Further, it is used to measure a fixed
amount of illumination and to record a modulating light intensity.

It is used in counting system where the objects on a conveyor belt interrupt a light beam to
produce a series of pulses which operates a counter.

It is used in twilight switching circuits. When the day light has faded to a given level, the
corresponding resistance of the detector causes another circuit to switch ON the required lights.

It is widely used in cameras to control shutter opening during the flash. Twin
photoconductive cells mounted in the same package have been used in optical bridge circuits for
position control mechanisms and dual-channel remote volume control circuits.

13. Explain the Principle and working of photodiode.

Junction Type Photoconductive cell:

Photodiode Silicon photodiode is a light sensitive device, also called photodetector, which
converts light signals into electrical signals. The construction and symbol of a photodiode are
shown in fig. The diode is made of a semiconductor PN junction kept in a sealed plastic or glass
casing. The cover is so designed that the light rays are allowed to fall on one surface across the
junction. The remaining sides of the casing are painted to restrict the penetration of light rays.

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Photodiode (a) Construction, and (b) Symbol

A lens permits light to fall on the junction. When light falls on the reverse biased PN photodiode
junction, hole-electron pairs are created. The movement of these hole-electron pairs in a properly
connected circuit results in current flow. The magnitude of the photocurrent depends on the
number of charge carriers generated and hence, on the illumination on the diode element. This
current is also affected by the frequency of the light falling on the junction of the photodiode. The
magnitude of the current under large reverse bias is given by


I  IS  I0 1  e V / Vr 
where I0 = reverse saturation current
IS = short-circuit current which is proportional to the light intensity
V = voltage across the diode
VT = volt equivalent of temperature
 =parameter , 1 for Ge and 2 for Si.

The characteristics of a photodiode are shown in fig. The reverse current increases in
direct proportion to the level of illumination. Even when no light is applied, there is a minimum
reverse leakage current called dark current, flowing through the device. Germanium has a higher
dark current then silicon, but it also has a higher level of reverse current.

Fig: characteristics of photodiode

Photodiodes are used as light detectors, demodulators and encoders. They are also used
in optical communication system, high speed counting and switching circuits. Further, they are

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used in computer card punching and tapes, light operated switches, sound track films and
electronic control circuits.

14. Write briefly about Phototransistor.

Phototransistor Phototransistor or photoduodiode is a much more sensitive semiconductor


photodevice than the PN photodiode. The current produced by a photodiode is very low which
cannot be directly used in control applications. Therefore, this current should be amplified before
applying to control circuits. The phototransistor is a light detector which combines a photodiode
and a transistor amplifier. When the phototransistor is illuminated, it permits a greater flow of
current.

Figure show the circuit of an NPN phototransistor. It is usually connected in a CE


configuration with the base open. A lens focuses the light on the base collector junction. Although
the phototransistor has three sections, only two leads, the emitter and collector leads, are
generally used. In this device, base current is supplied by the current created by the light falling
on the base-collector photodiode junction.

When there is no radiant excitation, the minority carriers are generated thermally, and the
electrons crossing from the base to the collector and the holes crossing from the collector to the
base constitute the reverse saturation collector current I CO. With IB =0, the collector current is given
by

IC = (+1) ICO

Fig: NPN Phototransistor (a) Symbol, and (b) Biasing arrangement

When the light is turned On, additional minority carriers are photogenerated and the total
collector current is

IC = (+1) (ICO +IL)

Where IL is the reverse saturation current due to the light.

Current in a phototransistor is dependent mainly on the intensity of light entering the lens
and is less affected by the voltage applied to the external circuit. Figure shows a graph of
collector current IC as a function of collector-emitter voltage VCE and as a function of illumination H.

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Fig: Characteristics of Phototransistor

The phototransistors find extensive applications in high-speed reading of computer


punched cards and tapes, light detection systems, light operated switches, reading of film sound
track, production line counting of objects which interrupt a light beam , etc.

15. Explain the operation of Photovoltaic cell and solar cell.

Photovoltaic Cell

Photovoltaic cell, a light-sensitive semiconductor device, produces a voltage when


illuminated which may be used directly to supply small amounts of electric power. In the
photovoltaic device without any applied voltage, the junction generates a voltage depending upon
the illumination and the load. The voltage generated is due to the accumulation of carriers
produced by photon excitation.

The photovoltaic potential is the voltage at which zero resultant current is obtained under
open circuited conditions. The photovoltaic emf is 0.5 V for either silicon or selenium and 0.1 V for
germanium cell. The short circuit cell currents is of the order of 1 mA.

The magnitude of the current under large reverse bias is given by


I  IS  I0 1  e
v / V

The photovoltaic voltage Vmax which corresponds to an open circuited diode can be
obtained by substituting I = 0 in the above equation. Hence,

 I 
Vmax  VIn  1  s 
 I0 

As IS >> I0, Vmax increases logarithmically with short circuit current IS, and hence with illumination.

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Fig: Photovoltaic cell (a) Construction and (b) Circuit symbol

The voltage increases as the intensity of light. Falling on the semiconductor junction of this
cell increases. A photovoltaic cell consists of a piece of semiconductor material such as silicon,
germanium or selenium which is bonded to a metal plate, as shown in fig. (a). the circuit symbol
for photovoltaic cell is shown in fig. (b).

The spectral response of silicon, germanium and selenium are shown in fig, indicating that
photoconductor is a frequency-selective device. As the spectral response of silicon and
germanium extends well into infrared region, its efficiency is quite high. Selenium cell has two
advantages over silicon, viz, (i) its spectral response is almost similar to that of the human eye,
and (ii) it has the ability to withstand damaging radiation environments, lasting up to 10,000 times
longer than silicon.

Fig: Spectral response of Si. Ge and Se

The characteristic curves of output voltage versus light intensity and output current versus
light intensity are shown in fig. (a) and (b), respectively.

Photovoltaic cells are used in low-power devices such as light meters. Nowadays, with an
improvement in the efficiency of these cells, more power is produced, as in solar cells which are

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photovoltaic devices. When operated in the short-circuit mode, the current is proportional to the
illumination and photovoltaic cell is used to construct a direct-reading foot-candle meter.

Light intensity, foot-candies Light intensity, foot candies


(a) (b)

Fig: characteristic of Photovoltaic cell (a) Output voltage vs. Light intensity and (b) Output
current vs. light intensity.

Solar Cell:

When sunlight is incident on a photovoltaic cell, it is converted into electric energy. Such as
energy converter is called Solar cell or Solar battery and is used in satellites to provide the
electrical power. This cell consists of a single semiconductor crystal which has been doped with
both P-and N-type impurities, thereby forming a PN junction. The basic construction of a PN
junction solar cell is shown in fig. Sunlight incident on the gas plate G passes through it and
reaches the junction. An incident light photon at the junction may collide with a valence electron
and impart sufficient energy to make a transition to the conduction band. As a result, an electron-
hole pair is formed. The newly formed electrons are minority carriers in the P-region. They move
freely across the junction. Similarly, holes formed in the N-region cross the junction in the
opposite direction. The flow of these electrons and holes across the junction is in a direction
opposite to the conventional forward current in a PN junction. Further, it leads to the accumulation
of a majority carriers on both sides of the junction. This gives rise to a photovoltaic voltage across
the junction in the open circuit condition. This voltage is a logarithmic function of illumination.

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In bright sunlight, about 0.6 V is developed by a single solar cell. The amount of power the
cell can deliver depends on the extent of its active surface. An average cell will produce about 30
m W per square inch of surface, operating in a load of 4. To increase the power output, large
banks of cells are used in series and parallel combinations. The efficiency of the solar cell is
measure by the ratio of electric energy output to the light energy light expressed as a percentage.
At present, anefficiency in a range of 10 to 40% is obtained. Silicon and selenium are the
materials used widely in solar cells because of their excellent temperature characteristics.

16. Describe with diagram the construction LED and explain its working.

Light Emitting Diode (LED)

The Light Emitting Diode (LED) is a PN junction device which emits light when forward
biased, by a phenomenon called electroluminescence. In all semiconductor PN junctions, some of
the energy will be radiated as heat and some in the form of photons. In silicon and germanium,
greater percentage of energy is given out in the form of heat and the emitted light is insignificant.
In other materials such as gallium phosphide (GaP0 or gallium arsenide phosphide (GaAsP), the
number of photons of light energy emitted is sufficient to create a visible light source. Here, the
charge carrier recombination takes place when electrons from the N-side cross the junction and
recombine with the holes on the P-side.

LED under forward bias and its symbol are shown in figure (a) and (b) , respectively. When
a LED is forward biased, the electrons and holes move towards the junction and recombination
takes place. As a result of recombination, the electrons lying in the conduction bands of N-region
fall into the holes lying in the valence band of a P-region. The difference of energy between the
conduction band and the valance band is radiated in the form of light energy. Each recombination
causes radiation of light energy. Light is generated by recombination of electrons and holes
whereby their excess energy is transferred to an emitted photons. The brightness of the emitted
light is directly proportional to the forward bias current.

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Fig: LED (a) LED Under forward bias, (b) symbol and (c) Recombinations and emission of
light.

Figure© shows the basic structure of an LED showing recombinations and emission of light.
Here, an N-type layer is grown on a substrate and a P-type is deposited on its by diffusion. Since
carrier recombination takes place in the P-layer , it is kept uppermost. The metal anode
connections are made at the outer edges of the P-layer so as to allow more central surface area
for the light to escape. LEDs are manufactured with domed lenses in order to reduce the
reabsorption problem. A metal (gold) film is applied to the bottom of the substrate for reflecting as
much light as possible to the surface of the device and also to provide cathode connection. LEDs
are always encased to protect their delicate wires.

The efficiency of generation of light increases the injected current and with a decrease in
temperature. The light is concentrated near the junction as the carriers are available within a
diffusion length of the junction.

LEDs radiate different colours such as red, green, yellow , orange and white. Some of the
LEDs emit infrared (invisible) light also. The wavelength of emitted light depends on the energy
gap of the material. Hence, the colour of the emitted light depends on the type of material used is
given as follows.

Gallium arsenide (GaAs) – infrared radiation (invisible)


Gallium phosphide (GaP) –red or green
Gallium arsendide phosphide (GaAsP) – red or yellow

In order to protect LEDs, resistance of 1k or 1.5 k must be connected in series with the
LED. LEDs emit no light when reverse biased. LEDs operate at voltage level from 1.5 to 3.3V,
with the current of some tens of milliamperes. The power requirement is typically from 10 to 150
mW with a life time of 1,00,000+ hours. LEDs can be switched ON and OFF at a very speed of 1
ns.

They are use din burglar alarm systems, pictures phones, multimeters, calculators, digital
meters, microprocessors, digital computers, electronic telephone exchange intercoms, electronic
panesl, digital watches, solid state video displays and optical communication systems. Also, there
are two-lead LED lamps which contain two LEDs, so that a reversal in biasing will change the
colour from green to red, or vice versa.

When the emitted light is coherent, i.e. essentially monocramatic, then such a diode is
referred to as an Injection Laser Diode (ILD). The LED and ILD are the two main types used as
optical sources. ILD has a shorter rise time than LED, which makes the ILD more suitable for
wide-bandwidth and high-data- rate applications. In addition, more optical power can be coupled
into a fiber with an ILD, which is important for long distance transmission. A disadvantages of the
ILD is the strong temperature dependence of the output characteristics curve.

17. Describe the principle and Operation of LED.

Liquid Crystal Display (LCD)

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Liquid Crystal Displays (LCDs) are used for display of numeric and alphanumeric character
in dot matrix and segmental displays. The two liquid crystal materials which are commonly used in
display technology are pnematic and cholesteric whose schematic arrangement of molecules is
shown in fig. (a). The most popular liquid crystal structure is Nematic Liquid Crystal (NLC). In this
type, all the molecules align themselves approximately parallel to a unique axis (director), while
retaining the complete translational freedom. The liquid is normally transparent, but if subjected to
a strong electric field, disruption of the well ordered crystal structure takes place causing the liquid
to polarize and turn opaque. The removal of the applied electric field allows the crystal structure to
regain its original form and material becomes transparent.

Based on the construction, LCDs are classified into two types. They are

(i) Dynamic Scattering type: The construction of a dynamic scattering liquid crystal cell is shown
in figure(b). The display consists of two glass plates, each coated with tin oxide (SnO 2) on the
inside with transparent electrodes separated by a liquid crystal layer, 5 to 50m thick. The oxide
coating on the front sheet is etched to produce a single or multi-segment pattern of characters,
with each segment properly insulated from each other. A weak electric field applied to a a liquid
crystal tends to a align molecules in the direction of the field. As soon as the voltage exceeds a
certain threshold value, the domain structure collapses and the appearance is changed. As the
voltage grows further, the flow becomes turbulent and the substance turns optically
inhomogenous. In this disordered state , the liquid crystal scatters light.

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Fig: (a) Schematic arrangement of molecules in liquid crystal, (i) Nematic (ii) Cholestic and
(b) Construction of a dynamic scattering LCD

Thus, when the liquid is not activated, it is transparent. When the liquid is activated the
molecular turbulence causes light to be scattered in all directions and the cell appears to be bright.
This phenomenon is called dynamic scattering.

(ii) Field Effect Type: The construction of field effect LCD display is similar to that of the dynamic
scattering type, with the exception that two thin polarizing optical filters are placed at the inside of
each glass sheet. The LCD materials is of twisted nematic type which twists the light(change in
direction of polarisation) passing through the cell when the latter is not energized. This allows light
top as through the optical filters and the cell appears bright. When the cell is energized, no
twisting of light takes place and the cell appears dull.
Liquid crystal cells are of two types: (i) Transmittive type, and (ii) Reflective type. In the
transmittive type cell, both glass sheets are transparent so that light from a rear source is
scattered in the forward direction when the cell is activated.

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The reflective type cell has a reflecting surface on one side of the glass sheet. The incident
light on the front surface of the cell is dynamically scattered by activated cell. Both types of cells
appear quite bright when activated even under ambient light conditions.

Liquid crystals consume small amount of energy. In a seven segment display the current
drawn in about 25A for dynamic scattering cells and 300A for filed effect cells. LCDs require
a.c. voltage supply, A typical voltage supply to dynamic scattering LCDs is 30 V peak-to-peak with
50 Hz. LCDs are normally used for seven segmental displays.

Advantages of LCD

(i) the voltage required are small


(ii) they have a low power consumption. A seven segment display requires about 140
W (20W per segment), where as LEDs require about 40 mW per numeral
(iii) They are economical.

Disadvantages of LCD

(i) LCDs are very slow devices. The turn ON and OFF times are quite large. The turn
ON time is typically of the order of a few ms, while the turn OFF is 10 ms.
(ii) When used on d.c their life span is quite small. Therefore, they are used with a.c.
supplies having a frequency less than 50 Hz.
(iii) They occupy a large area.

Comparison between LED and LCD

LED LCD
Consumes more power-requires 10-250 mW power Essentially acts as a capacitor and consumes very
per digit less power- requires 10-200 W power per digit
Because of high power requirement, it requires Can be driven directly from IC chips
external interface circuitry , When driven from ICs
Good brightness level Moderate brightness level
Operable within the temperature range -40 to 85C Temperature range limited to -20 to 60C
Life time is around 100,000 hours Life time is limited to 50,000 hours due to chemical
degradation.
Emits light in red, orange, yellow, green and white Invisible in darkness –requires external illumination.
Operating voltage range is 1.5 to 5V d.c Operating voltage range is 3 to 20 V a.c
Response time is 50 to 500 ns Has a slow decay time –response time is 50 to 200
ms
Viewing angle 150 Viewing angle 100

18. Draw and Explain about Seven segment Display.

ALPHANUMERIC DISPLAYS
Display devices provide a visual display of numbers, letters, and various signs in response
to electrical input, and serve as constituents of an electronic display system. Display devices can
be classified as passive displays and active displays.

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(i) Passive displays: Light controllers – they are modulators of light in which the light
pattern gets modified on application of electric field, e.g. LCD
(ii) Active displays: Light emitters – they are generators of light, e.g. LED.

The optical devices described so far were capable of operating in an OFF/ON mode. LEDs are
used as low consumption indicator lamps. Also, both LEDs and LCDs are potentially more useful
as elements in alphanumeric display panels. There are two possible arrangements of optical
displays, viz, seven segment and dot matrix, the choice being based on the display size, definition
and allowed circuit complexity.

One way of producing an alphanumeric display is to make a seven-segment monolithic


device, as shown in figure(a), which can display all numerals and nine letters. Each segment
contains LED/LCD which can be turned ON or OFF to form the desired digit. Each segment of the
array has to be switched in response to a logical signal. For example, fig (a) shows the response
to a logic signal corresponding to 2, in which segment a, b, d, e and g have been switched ON and
c and f remain OFF, Similarly, when all segments are ON, the digit formed is 8. If only the center
segment, g is OFF, the digit will be zero. Common anode and Common cathode seven segment
LED displays are shown in fig (b). Common anode type LED displays require an active LOW
configuration, whereas an active HIGH circuitry is necessary for the common cathode type LED
display.

The seven segment displays are used in digital clocks , calculators, microwave ovens,
digital multimeters, microprocessor trainer kits, stereo tuners etc.

Another method of producing an alphanumeric display is to make a dot matrix of


LEDs/LCDs in a monolithic structure. Commonly used dot matrices for this display are 5 7, 5  8
and 79, which can display 64 different characters including the alphabets, numerals and various
symbols, by driving the appropriate horizontal and vertical inputs. A 5  7 dot matrix assembly
using LEDs and the corresponding wiring pattern is shown in fig.

LED display are available in many different sizes and shapes. The light emitting region is
available in lengths from 0.25 to 2.5 cm.

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Fig: (a) Seven segment monolithic device, (b) Common anode and (c) Common cathode
configurations.

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(a) (b)

Fig (a) 5  7 dot matrix and (b) Wiring pattern for 5  7 dot matrix

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