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Royal Education Societys

COLLEGE OF COMPUTER SCIENCE & INFORMATION


TECHNOLOGY, LATUR

SEMINAR REPORT
On

VLSI
Submitted by

Rode Sharad Pandurang


(Exam Seat No:)
<

in partial fulfillment for the award of the degree


of

Batchlor Of Computer Science


SWAMI RAMANAND TEERTH MARATHAWADA
UNIVERSITY, NANDED.
Winter-2015
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Royal Education Societys


COLLEGE OF COMPUTER SCIENCE AND INFORMATION
TECHNOLOGY, LATUR.

CERTIFICATE

This is to certify that the Seminar entitled VLSI has been carried out by RODE
SHARAD PANDURANG under my guidance in partial fulfillment of the
degree of BSC(CS) TY of SRTMU, Nanded during the academic year 20142015.

Mr.V.V.Bhosle

Mr.I.M.kazi

Seminar Guide

HOD

ACKNOWLEDGEMENT
I avail this opportunity to express my deep sense of gratitude and whole to hearted
thanks to my guide Mr.V.V.Bhosle for giving his valuable guidance inspiration and to
embark this seminar
I acknowledge my overwhelming gratitude and immense respect to
our H.O.D. (computer sicence Department ) prof. I.M. KAZI and sincere thanks to our
Principal Dr. M.R. Patil who inspired me a lot to achive the highest goal.
I would like to thanks my parents and all my friends who helped
me directly to indirectly my seminar report and infused their help for the success of this
seminar

(Rode Sharad Pandurang )


( Bsc(cs)TY )

INDEX
VLSI

1.

2.

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4

Page No.

COVER PAGE
CERTIFICATE
ACKNOWLEDGEMENT

I
II
III

INDEX

IV

INTRODUCTION
1.1
WHAT ISVLSI
1.2
HISTORY OF VLSI

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7

APPLICATION
2.1
MULTIMEDIA
2.2
VLSI IN COMMUNICATION
2.3
TRANSISTER SCALING
VLSI DESIGN
3.1
DESIGN HIERARCHY
3.2
DESIGN STYLE
VLSI USES
4.1
USES &ADVANTAGES
CONCLUSION
BIBLIOGRAPHY

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INTRODUCTION
The VLSI design is considered as one of the major fields of tremendous interest in
industry & academics. It has interdisciplinary relevance. At present VLSI is the
emerging area of interest among the researchers and engineers from Information
Technology, Computer Science, Electrical and Electronics Engineering. It is reported
that around 5000 Engineers per year would be appointed by the VLSI industry in India
in the coming years. In order to cope up with this demand, we require at least 10 times
as many engineers and researchers as India is producing now. The proposed activities of
VLSI education at Bengal Engineering and Science University, Shibpur (BESUS)
targets to cater to the needs of potential researchers and engineers in this field. Bengal
Engineering and Science University, Shibpur is going to present a VLSI education
programme with modern technology, enhanced knowledge, a set of brilliant students
and hi-tech research. The aim of this move is to produce researchers/engineers having
world class expertise and put them to work with the best VLSI technology, innovated
and indigenous, across a wide range. VLSI design industry is a fast growing industry,
our aim is to take part actively in the process to make it even faster. There are two
functional profiles of the proposed move of VLSI education and research at BESUS- (i)
to develop a research team in the field of VLSI design for achieving excellence in this
field,
to train potential VLSI design engineers for Indian VLSI industry as well as to satisfy
the global need. Formal VLSI design methodology took off in USA/Europe in the late
1970's. Department of Electronics (DOE), Govt. of India, recognized its potentiality in
mid 80's and formed a VLSI task force with nodal centers at IITs, IISc, CEERI, etc.
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However, the boost in this direction was received in mid 90's and the focus was directed
towards VLSI design activities in industries and academia. During late 90's, the then
Bengal
Engineering College (DU) was acknowledged as one of the promising centers for VLSI
neducation and research.
Although the progress in VLSI education at BESUS is having a plethora of constraints
since inception, but the determination to build up a centre of excellence in VLSI had
never lacking on the part of expertise in this area. During the last five years more than
70 research papers in VLSI design & test, authored by our faculty members, have been
published in different international journals/conferences. Faculty members of this
Institute are also running a number of research projects in VLSI related fields funded by
different multinational agencies and MHRD, Govt. of India. A number of tools have
been developed to carry on the VLSI research. About 6 PhD theses have been completed
during the last five years in the field of VLSI design and test. To achieve the goal of
VLSI research and education at BESUS, we need to develop laboratories with the latest
VLSI CAD tools, test equipments, and fabrication libraries. The establishment of
Ganapati Sengupta VLSI Laboratory, primarily funded by the Alumni Association, is a
step towards this direction. However, without active/direct support from the industry
and the faculty members/trained staff our goal can not be achievable. We expect active
participation from all corners in this endeavor. The Management Committee's
responsibility is to initiate new activities and provide an open platform to expedite the
VLSI research activities at BESUS. The activities may include imparting VLSI training
for the professional engineers and students, offering part/full time interdisciplinary
degree/diploma programmes for EE/IT/ETC/CSE students, starting venture of
collaboration with the industries, etc. The laboratory in its present form, is the outcome
of co-operation and help of a lot of

What is VLSI?
Very Large Scale Integration (noun) Very Large Scale Integrated (adjective) example:
VLSI Circuit definition - 100s of thousands of transistors on a single integrated circuit
(IC) or chip

Definition:
Very Large Scale Integration is term describing about semiconductor integrated circuits
composed of hundreds of thousands of logic elements or memory cells. VLSI is the
technique of circuit designing and implementation to provide more computational speed
with
less power dissipation and less circuit board area.

Hitory of VLSI:
late 40s Transistor invented at Bell Labs late 50s First IC (JK-FF by Jack Kilby at TI)
early 60s Small Scale Integration (SSI) 10s of transistors on a chip
late 60s Medium Scale Integratoin (MSI) 100s of transistors on a chip early 70s Large
Scale Integration (LSI) 1000s of transistor on a chip early 80s VLSI 10,000s of
transistors on a chip (later 100,000s & now 1,000,000s)
Ultra LSI is sometimes used for 1,000,000s

Historical perspective:
The number of applications of integrated circuits in high-performance computing,
telecommunications, and consumer electronics has been rising steadily, and at a very
fast pace. This trend is expected to continue, with very important implications on VLSI
and systems design .Table 1 shows the evolution of logic complexity in integrated
circuits over the last three decades, and marks the milestones of each era.

VLSI Implementation Media


Media requiring fabrication:
Full Custom - design and physical layout at transistor level Standard Cell (aka SemiCustom) design and physical layout at gate/flip-flop level Gate Array - design and
physical layout at gate level (like standard cell but with some prefabrication of wafer)
Prefabricated media:
Field Programmable Gate Arrays (FPGAs) - design at gate/flip-flop or register transfer
level
Complex Programmable Logic Devices (CPLDs) design at gate/flip-flop or register
transfer level Programmable Logic Devices (PLDs) - design at gate/flip-flop level
System-on-Chip (SoC) may incorporate several of these implementation media on a
single chip

Applications:
VLSI has since 1970s invaded all fields and applications bringing a revolution in
Everything - from small digital watches to complex DSP applications. The fastest of
microprocessor INTEL-Pentium 4, embedded systems, smart devices etc are all possible
and viable today only because of VLSI and ULSI. Some of the

Applications

are

discussed below:
1.Multimedia:
Today there is a race to design interoperable video systems for basic digital computer
functions, involving multimedia applications in areas such as media information,
education, medicine and entertainment, to name but a few are
Digitization of TV Functions:
In todays state-of-the-art solution one can recognize all the basic functions of the
analog TV set with, however, a modularity in the concept, permitting additional features
becomes possible, some special digital possibilities areexploited, e.g. storage and
filtering techniques to improve signal reproduction (adaptive filtering, 100 Hz
technology), to integrate special functions (picture-in-picture, zoom, still picture) or to
receive digital broadcasting standards (MAC, NICAM).

Fig. 10 - The DIGIT2000 TV receiver block diagram


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Towards standardization, namely, the integration of 16 identical high-speed processors


with communication and programmability concepts comprised in the architecture. The
hotograph of which is shown below

Fig. 11 Chip Photograph

2. VLSI in Communication

Fig. 12 - The Nordic VLSI nRF0433


The features of The Nordic VLSI nRF0433 are it is a true single chip FSK transceiver
,on chip UHF synthesiser, 4MHz crystal reference,433MHz ISM band operation,few
external components required, up to 10mW transmit power and no setup/configuration.
The applications of Nordic VLSI nRF0433 are Alarm and Security Systems, Home
Automation, Remote Control, Surveillance, Automotive, Telemetry, Toys and Wireless
Communication.
Future challenges for further integration: As was predicted by Moore in 1965, the
number of devices on a chip doubled every 12 months till in1970s. This slowed down
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in 1980s and number of devices on a chip doubled every 24 months. This trend is
expected to
Continue for another couple of decades without any major problems. But after that
further integration may pose several problems. Some of these further challenges are as
follows:
1)Transistor scaling:
1. Device physics poses several challenges to further scaling of the bulk MOSFET
structure. One major problem is the controlling of short channel effects manifested
as VT roll-off and Drain Induced Barrier Lowering effects. To minimize these short
channel effects, the transistor lateral-to-vertical aspect ratio must be preserved from
one technology generation to the next. For this, gate oxide thickness, the junction
depth, and the depletion depth all need to scale down by 30% per generation.
Leakage through the gate oxide by direct band-to-band tunneling limits physical
oxide thickness scaling. Reducing the source/ drain junction extensions is limited by
the increase in the parasitic resistances. Reducing junction depths below 30nm
degrades drive current, even though short channel effect is improved.
2)Subthreshold leakage:
Supply voltages will continue to reduce with each technology generation and
continue to contribute to lower the power dissipation. However transistor threshold
voltage (VT) must reduce at the same rate to maintain enough gate overdrive and
enable circuit performance to improve 30 % each generation. Lower VT causes the
transistor subthreshold leakage current to increase exponentially
3). Interconnect scaling:
Chip performance is increasingly limited by the inter connect RC delay as the transistor
delays decrease progressively, while the narrower metal lines and space actually
increase the delay associated with the interconnects. Hence, interconnect scaling

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coupled with higher operating frequencies requires careful capacitive and inductive
noise modeling.
4) Power dissipation:
Power dissipation is increasing due to higher operating frequencies and transistor
counts. Supply voltages will continue, but its contribution to power reduction is
definitely not enough. Hence power efficient micro-architectures are required and the
die size and the frequency growth may need to be contained.
5. Platform integration:
At the platform level, external bus frequencies have not kept pace with processor
frequencies. Also, the gap between I/O voltages of advanced microprocessors and other
motherboard components is increasing. This requires new high-voltage tolerant circuits
or process options. Inspite of these challenges, there is no fundamental barrier for
Moores law to extend for another
couple of decades.

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VLSI Design Flow:


The design process, at various levels, is usually evolutionary in nature. It starts with a
given set of requirements. Initial design is developed and tested against the
requirements. When requirements are not met, the design has to be improved. If such
improvement is either
not possible or too costly, then the revision of requirements and its impact analysis must
be considered. The Y-chart (first introduced by D. Gajski) shown in the following figure
illustrates a design flow for most logic chips, using design activities on three different
axes (domains), which resemble the letter Y. The Y-chart consists of three major
domains, namely:
behavioral domain,
structural domain,
geometrical layout domain.

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Design Hierarchy:
The use of hierarchy, technique involves dividing a module into sub- modules and
then repeating this operation on the sub-modules until the complexity of the smaller
parts becomes manageable.
Concepts of Regularity, Modularity and Locality: Regularity means that the
hierarchical decomposition of a large system should result in not only simple, but also
similar blocks, as much as possible. A good example of regularity is the design of array
structures consisting of identical cells - such as a parallel multiplication array.
Regularity usually reduces the number of different modules that need to be designed and
verified, at all levels of abstraction. Modularity in design means that the various
functional blocks, which make up the larger system must have well-defined functions
and interfaces. Modularity allows that each block or
module can be designed relatively independently from each other All of the blocks can
be combined with ease at the end of the design process, to form the large system. The
concept of modularity enables the parallelisation of the design processBy defining wellcharacterized
interfaces for each module in the system, we effectively ensure that the internals of each
module become unimportant to the exterior modules. Internal details remain at the local
level. The concept of locality also ensures that connections are mostly between
neighboring modules, avoiding long-distance connections as much as possible.

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VLSI Design Styles


Various design styles used for VLSI chip fabrication are as follows:
1.Field Programmable Gate Array (FPGA): Fully fabricated FPGA chips containing
thousands of logic gates or even more, with programmable interconnects, are available
to users for their custom hardware programming to realize desired functionality. A
typical Field Programmable Gate Array (FPGA) chip consists of I/O buffers, an array of
Configurable Logic Blocks (CLBs), and programmable interconnect structures. The
programming of the interconnects is implemented by programming of RAM cells whose
output terminals are connected to the gates of MOS pass transistors.The advantages of
FPGA are very short turn around time and no physical manufacturing required for
customizing it.The disadvantage is
typical price of FPGA chips are usually higher than other realization alternatives.

Fig 4 General architecture of Xilinx FPGAs.

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2.Gate Array Design: In view of the fast prototyping capability, the gate array (GA)
comes after the FPGA. While the design implementation of the FPGA chip is done with
user programming, that of the gate array is done with metal mask design and
processing.Gate array
implementation requires a two-step manufacturing process: The first phase, which
isbased on generic (standard) masks, results in an array of uncommitted transistors on
each GA chip. These uncommitted chips can be stored for later customization, which is
completed by defining the metal interconnects between the transistors of the array.Since
the patterning
of metallic interconnects is done at the end of the chip fabrication, the turn-around time
can be still short, a few days to a few weeks. The advantages of GA are better chip
utilization factor,more chip speed and more customized design.

Fig. 5 - Basic processing steps required for gate array implementation

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3. Standard-Cells Based Design: The standard-cells based design is one of the most
prevalent full custom design styles which require development of a full custom mask
set. The standard cell is also called the polycell. In this design style, all of the commonly
used logic
cells are developed, characterized, and stored in a standard cell library. The
characterization of each cell is done for several different categories like delay time vs.
load capacitance, circuit, timing and fault simulation models, cell data for place-androute, mask data.

Fig. 6 - A standard cell layout example.


To enable automated placement of the cells and routing of inter-cell connections, each
cell layout is designed with a fixed height, so that a number of cells can be abutted sidebyside
to form rows. The power and ground rails typically run parallel to the upper and lower
boundaries of the cell, thus, neighboring cells share a common power and ground bus.
The input and output pins are located on the upper and lower boundaries of the cell. The
figure that follows shows the layout of a typical standard cell. Here the nMOS
transistors are located closer to the ground rail while the pMOS transistors are placed
closer to the power rail.

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4. Full Custom Design: In a full custom design, the entire mask design is done anew
without use of any library. However, the development cost of such a design style is
becoming prohibitively high. Thus, the concept of design reuse is becoming popular in
order to reduce
design cycle time and development cost. In real full-custom layout in which the
geometry, orientation and placement of every transistor is done individually by the
designer, design productivity is usually very low - typically 10 to 20 transistors per day,
per designer. In
digital CMOS VLSI, full-custom design is rarely used due to the high labor cost.
Exceptions to this include the design of high-volume products such as memory chips,
high- performance microprocessors and FPGA masters.

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Limiting factors in VLSI design:


There are a certain physical factors of real VLSI designs, which limit the performance of digital VLSI
circuits. The switching characteristics of digital
integrated circuits essentially dictate the overall operating speed of digital systems. The dynamic
performance requirements of a digital system are usually among the most important design
specifications. Therefore, the switching speed of the circuits must be estimated and optimized very
early in the design. It is observed that (1) The interconnection delay is becoming the dominating factor
which determines the dynamic performance of large-scale systems, and (2) The interconnect parasitics
are difficult to model and to simulate. Various parasitics that affect the design of a chip are MOSFET
and interconnect capacitance and interconnect resistance

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Ways and Methods for Low Power VLSI Design:


The average power consumption in conventional CMOS digital circuits can be expressed as the sum of
three main components, namely, (1) the dynamic (switching) power consumption, (2) the short-circuit
power consumption, and (3) the leakage power consumption. The increasing prominence of portable
systems and the need to limit power consumption (and hence, heat dissipation) in very-high density
ULSI chips have led to rapid and innovative developments in low-power design during the recent
years. the requirements of low power consumption must be met along with equally demanding goals of
high chip density and high throughput. Hence, low-power design of digital integrated circuits has
emerged as a very active and rapidly developing field of CMOS design. Ways to reduce power
dissipation at different levels of designing areas follows:

Fig. 9 Low Power Design

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VLSI and its Uses:


As we have seen that VLSI is a technology by which 10000-1 Million Transistors can be
fabricated on a single chip. Now, what is the necessity for fabricating that
manyofTransistorsonasinglechip?
In olden days during the vacuum tube era, the size of Electronic Devices were huge,
required more power, dissipated more amount of heat and were not so reliable. So there
was certainly a need to reduce the size of these devices and their heat dissipation. After
the invention of SSD's, the size and the heat produced by devices was undoubtedly
reduced drastically, but as the days passed the requirement of additional features in
Electronic Devices increased which again made the devices look bulky and complex.
This gave birth to the invention of technology which can fabricate more number of
components

onto

single

chip.

Moore'sLaw:
In 1965, Gordon Moore, an industry pioneer predicted that the number of Transistors on
a chip doubles every 18 to 24 months. He also predicted that Semiconductor Technology
will double its effectiveness every 18 months and many other factors grow
exponentially.

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Advantages of VLSI:
VLSI has many advantages:
1. Reduces the Size of Circuits.
2. Reduces the effective cost of the devices.
3. Increases the Operating speed of circuits
4. Requires less power than Discrete components.
5. Higher Reliability
6. Occupies a relatively smaller area.

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USES OF VLSI
In today's world VLSI chips are widely used in various branches of Engineering like:
Voice and Data Communication networks
Digital Signal Processing
Computers
Commercial Electronics
Automobiles
Medicine and many more.

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Conclusion:
VLSI provides circuit designs with more computational speed with less power dissipation and less
circuit board area along with higher speeds and higher reliability at lower costs.
There are very strong links between the fabrication process, the circuit design process and the
performance of the resulting chip. Hence, circuit designers must have a working knowledge of chip
fabrication to create effective designs and in order to optimize the circuits with respect to various
manufacturing parameters.
VLSI has revolutionized the electronic industry and has a wide range of applications like
microprocessors, memory devices, DSP chips, in communication, multimedia, sensors, embedded
systems etc.
There are certain factors that pose as future challenges for further integration. Though the trend in
integration may continue for another couple of decades, but maybe after that there may be a need to
invent new materials for further integration; as of today no such other material is known.

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References:
1. Principles of CMOS VLSI design Kamran Eshraghian
2 Digital design principles & practices John F. Wakerly.
3.http://www.nationmaster.com/encyclopedia

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