Circuit Theory

Prof. S. C. Dutta Roy

Department of Electrical Engineering
Indian Institute of Technology, Delhi
Lecture - 44
Problem Session 10: LC Driving Point Synthesis
This is the forty fourth lecture and problem session 10, we are going to work out
problems on LC driving point synthesis. Problems on LC driving point synthesis and in
the problems that I have circulated to you, we start with problem 11.2.
(Refer Slide Time: 00:40)

The first-one you skip. 11.2 says indicate the general form of 2 foster and 2 cover
networks F1 F2, C1 C2 only general forms are needed. That could be used to synthesize
the following; LC impedance Z of s equals to s squared plus 1, s squared plus 9 s squared
plus 25 and the denominator s times s squared plus 4 s squared plus 16 .There is no need
to calculate the element values of the phone networks. Just the general form we have to
draw. And one proceeds like this foster 1 ask yourself whether there is as a pole at
infinity yes there is.
So, you shall have an inductance is there a pole at the origin; yes there is there is pole at
the origins. So, there is a capacitance. And there are 2 pairs of internal poles
corresponding to 4 elements. And so 2 LC networks in parallel 2 LC parallel networks in
series and that is it; this is the general form. As a verification you check whether the

number of elements is equal to the number of the specs. Specs are 1 2 3 4 5 and the
multiplying constant which happens to be1.
(Refer Slide Time: 02:35)

So, 6 specs that exactly 6 elements for F2 you take the admittance function. Y of s is
equal to s times s square plus 4 s square plus 16 s square plus 1 s square plus 9 s square
plus 25. No pole at the origin, no pole at infinity, it cannot have because the impedance
had impedance had this poles therefore, admittance must have 0s and therefore, all we
have is three series resonance circuits in parallel that is it; exactly 6 elements. Can you
tell me what this products of LC would be this L and C.
(( )) .
This will be 1 and next one-ninth and 1 twenty-fifth. So, this is the general form for F2
now, F C1 C1 starts with can you start with the impedance, shall we start with
impedance or admittance C1 that is the point to be decided. The function has to have a
pole at infinity and therefore, it is the Z of s and there are exactly 6 elements. And
therefore, you start with an inductance pole at infinity then a capacitance and you go on
doing this. Till you get 6 elements that is it, you can do it blindly. As a check, does it
satisfy the condition that there is a pole at the origin; that is we are checking the last
element. A capacitor yes there is a pole at the origin therefore; this is the correct
network.

(Refer Slide Time: 04:37)

In order to get C 2 will start with the function that is a pole at the origin which means the
impedance function.
Excuse me sir.
Yeah
(( )) .
If we had 6 elements we did not have a pole at infinity. Well, then the position at
(( ))
Pole at the origin, but no pole at infinity. Then you start with a capacitance we cannot
have 6 elements, there it has to be odd number of elements (()). There are various checks,
this is 1 of the checks there are other checks also. As per as C2 is concern you have to
start with impedance we have to start continued fraction expansion with the lowest
powers starting from impedance. Therefore, you have a capacitor in series and then you
go on doing the ladder till you get 6 elements and finally, at infinity does it have a pole
yes it does .
So, there is a check that is a 11.2. Let us go to 11.3, which is very interesting and that
why i did not skip 1. I wanted to do 11.3, 11 point 3 say synthesize the LC driving point
impedance is given. Z of s equals to 6 s to the fourth plus forty-two s squared plus 48
divided by s to the 5 plus 18 s cubed plus 48 s. It says synthesize this LC driving point
impedance in the form shown in the figure, the architecture is given. Architecture is you

have a capacitor, then an inductor then a parallel LC and finally, a capacitor C1 L1 C2

L2 C3 the architecture is given.
Now, you can see that it is neither foster 1 nor foster 2 nor cover 1 nor cover 2. It is a
combination, you can mechanize this you can start with cover 2 go up, to 2 stages and
then the rest of the function goes to foster.
(( ))
1 you can do that or you can do it by, successive pole removal that is no, but before that
this valid architecture, is it a valid architecture, well how many specification are there? 1
2 3 4 5 6 there are exactly 6 elements no.
(( ))
5 specs.
This is not a spec.
(( ))
We can take 6 common constant, then we have s to the 4 and the denominator s to the5.
So, there a 4 other 4 other constants you have exactly 5. It is a valid architecture. No not.
So easily, is there a pole at the origin yes there is pole at the origin. So, it is infinity is it a
0 at infinity.
(( ))
Yes it is this is short this is short this is short and therefore, (( )). So, this is a valid
architecture the number of elements satisfy pole at infinity pole at the origin.
(( ))
Yes by looking at the function what is not clear the number of elements.
(( ))
Number of elements, you can write this as 6 times s to the 4 plus 7 s squared plus 8
divided by s to the 5 plus 18 s cube plus 48 s. So, the number of specs is 1 2 3 4 5 and
there are exactly 5 elements. Then we check whether, there is pole at the origin yes this
structure has a pole at the origin. We check whether there is 0 at the infinity. Yes it has a
0 at infinity. Now, as someone said we can develop this, by having cover 2 up to 2
stages, then changing over 2 foster 1 well we can do that this is a mechanization , but the

full no the 1 the procedure that is full proof. You cannot make a mistake, suppose instead
of foster 1, suppose instead of cover 2 you use cover 1 where you cannot you use it, but
suppose you make a mistake in the continued fraction or finally, it is inversion isnt it.
The reminder impedance that you take it must be of this, of the proper dimension. So, on
what I am saying is there may be a possibility of a confusion and mistake, but the full
proof method is if you go term by term that is first.
(Refer Slide Time: 10:31)

You look at this Z of s equal to 6 s to the forth plus forty-two and the effort involved is
nothing much, higher effort involved is almost the same. And thinks come out almost by
inspection. Look at this s to the 5 plus 18 s cubed plus 48 s what you are trying to do is,
we are writing Z of s as equal to it is pole at the origin which is; obviously, 1 by s pole at
the origin that is if you put s equal to 0 48 by 48 s.
So, the residue is obvious plus some impedance Z1. And you can see that, Z1 is s to the 5
plus 18 s cubed plus 48 s and the numerator you shall have 6 a s 4 plus forty-two s
square plus 48 minus Z1 is Z minus 1 over s. So, you have take s out of here, s to the 4
minus 18 s squared minus 48. And you see, that 48 and 48 cancel they have to there is no
other way, because you are removing the pole at the origin there must be a 0 at the origin
for the reminder function. So, these 2 cancel and I get 5 s to the four plus 24 s squared
divided by s to the 5 plus 18 s cubed plus 48 s. That is more in store, more cancelation
because the pole at the origin has been taken away.

(Refer Slide Time: 12:27)

So, the factor s should cancel and if i do that, then my function that remains is 5 s cube
plus 24 s square divided by s fourth plus 18.
(( ))
Twenty-four s correct, s to the 4 plus 18 s squared plus 48 now.
(( ))
No, 18 s squared s squared because s is canceled.
Now, what I have removed therefore; is a 1 farad capacitor and the rest of the function is
Z1. What we have to remove now, is an inductor i require an inductor an inductor in
shunt represents a pole of the admittance at the origin and therefore, what i should do is
take Y1. In fact, Z1 has 0 at the origin. So, you inverted I get Y1 equal to s 4 plus 18 s
squared plus 18 divided by 5 s cubed plus.
(( ))
Plus 48 do not allow me to make mistake 24 s and I am going to write this as k by s
which is; obviously, 2 by s plus Y2. This means, that the next inductor is half Henry and
the rest of the admittance is Y2. Now, let see what Y2.

(Refer Slide Time: 14:10)

Y2 is Y1 minus 2 by s, so this is equal to s 5 s cubed plus 24 s, then s to the forth plus 18

s squared plus 48 minus. You take out a s from here and multiply by 2. So, you get 10 s
squared minus (( )) 48. Once again you see, that the constant terms cancel. So, it is quite
comfortable, 48 cancels and then you get s to the fourth plus 8 squared divided by 5 s
cubed plus 24 s from which s shall also canceled.
So, you get s cubed plus 8 s divided by 5 s squared plus 24. And after Y2 now, you are
perfectly safe to shift to foster 1, because you look at the function Z2. Foster 1s means,
you take the impedance Z2 which is equal to 5 s squared plus 24 divided by s times s
squared plus 8 there is indeed a pole at the origin, which will take a count of the
capacitor C3 and that pole what is the residue 3 by s plus. What you will have here is, s
squared plus 8 then s and a constant what is this constant. It is 5 s squared plus 24
divided by s squared with s squared equal to minus 8. So, 16 divided by 8 that is 2
therefore, my network is the follow.

(Refer Slide Time: 16:21)

What was this C1 1 half, then I shall have a parallel LC and the capacitor C3 is;
obviously, one-third. And what about this, I always prefer to do it like this; there is
absolutely no scope of a mistake. S by 2 plus 4 by s and this is an admittance. So, the
capacitor must be half and the inductor must be (( )) 1 by 4.
The product should be one- eighth LC products. So, one forth and half is one- eighth and
the problem is solved. There is as I said there is no scope of mistake in this step by step
procedure. And as you can see, the numbers involved there are a cancellations of
constants of s, which have to come naturally cancellations have to come naturally
because if the function does not have a pole it must be 0. So, this is a consequence of the
properties of an LC network. The next problem is 11 point 5 we skip 1.

(Refer Slide Time: 17:58)

11.5 is a slightly tricky problem; it says the input impedance for the network shown the
network is this. You will see that, almost common sense will solve this problem. This
network input impedance of the network shown is Z in equal to 2 s squared plus 2
divided by s cubed plus 2 s squared plus 2 s plus 2. And it is also given that Z0 is an LC
network. You are required to find out an expression for Z0 and a synthesis for Z0 in
foster series form that is foster1. This is the problem given the configuration and given
the input impedance is this input impedance is not purely LC, because it contains a
resistance Z0 is LC, but it is an LC network parallel by a resistance. You are required to
find out and expression for Z0 and a foster series realization. R is not known, but it can
be found out, this is the common sense that 1 has to apply.

(Refer Slide Time: 19:28)

You see Y in the admittance equal to Y0 they admittance Z0 plus G is a some of Y0 and
Z. So, Y in of j omega real part; obviously, is equal to G. And you notice that, the
expression for Y in is s cubed plus 2 s squared plus 2 s plus 2 divided by 2 s squared plus
2. (( )) What is what. How do you know?
(( ))
You have to say, for Y0 is this minus G and you have to find the value of G such that Y0
is LC. It is obvious from here, that if you subtract 1 from here, then you get s into s
squared plus 2 divided by 2 s squared plus 1 is this obvious and this is LC. This is an LC
admittance and therefore, G must be equal to 1or R is equal to 1. (( ))
Yes we can find out from here, yes we can find out the real part, but a common sense
helps because we do observe that, this can be written as 1 plus this otherwise, you would
end up in finding m1 m2 minus n1 n2. (( ))
Denominator is real?
(( ))
Okay.
(( ))

In any case, common sense is the strongest instrument that an engineer has and you must
not hesitate to apply it wherever you apply, it is rewarding anyway. So, you know G
equal to 1 and we incidentally you also know what is Y0.
(Refer Slide Time: 21:53)

Y0 is s times s squared plus 2 divided by 2 s square plus 1. And at this point many of you
forget that, a specific form has been wanted. You can expand this in partial fraction and
get a realization, but that will not be the correct answer, because it specifies that
synthesis is 0 in the foster series form. So, do not realize this take a Z zero. 2 s square
plus 1 divide by s into s squared plus 2. And you expand in partial fraction, because we
want a foster series form and; obviously, the residue at the origin there is a pole at the
origin residue, at the origin is 1 2 into 1 s into 2 plus is there any pole at infinity no.
(( ))
So, s squared plus 2 s and what is the coefficient 1. So, Z0 is oblivious, it is a 1 farad
capacitor and a parallel combination of 1 farad capacitor here and half, Henry. The
product has to be 1 by 2 the problem is solved. The next problem is 11.6.

(Refer Slide Time: 23:42)

We will not do all of them, let us look at a it says indicate which of the following
functions are either RC RL or LC impedence functions. Since, we have not done yet RL
we can answer RC and LC let us see, the first function is Z of s it is an impedence equal
to s cubed plus 2 s divided by s to the fourth plus 4 s squared plus 3. Now, you have to
decide whether it is RC LC or RL. If it is RL we do not know yet, but let us look at it
now; obviously, you see it is an it is an odd rational function isnt that right. It is odd
therefore, it cannot be RC or RL it has to be if it is (( )) it has to be LC.
Let us look at that s times s squared plus 2, if you can factorise do that s squared plus 1 s
squared plus 3. So, it can be realized as an LC because the poles at 0 alternate 0 1 2 3.
Part b: Is Z of s now, this is a polynomial divided by polynomial it is a bi-quadratic. If
you can find the poles at 0s; obviously, the numerator s plus 4 s plus 2 and the
denominator is s plus 1 s plus 3. (( ))
No it is not odd; therefore, it cannot be LC, it cannot be LC it is either RC or RL first
critical frequency is a pole. The last critical frequency is a 0. And the pole set 0s
alternate1 2 3 4 so RC. Part c is simply the reciprocal of this and you shall see later, that
it is RL, RL has exactly the RL impedence is exactly the property of an RC admittance.
Let me put it down here to be shown. Z RL s is we use this symbol triple line with an f
form equivalence is the same as YRC of s. And in the morning we saw that YRC s has
(( )) .

The first critical frequency a 0 and the last critical frequency of pole and therefore, c
qualifies as RL.
(Refer Slide Time: 26:35)

D: now, this is a common sense question s squared plus 5 s plus 6 s squared plus s.
(( ))
It is not an odd polynomial, but
(( ))
Denominator is not Hurwitz why not.
(( ))
s square plus s is not Hurwitz where are it is roots, s times s plus 1 it is Hurwitz. Now, as
I then said the common sense you notice,
(( ))
That there is cancellation, no further efforts are needed. You see this is s plus 1 s plus 5.
(( ))
there is no cancellation, s plus 3 and s plus 2 now.
(( ))
0 1 2 3 now, poles and 0s do not alternate.

So, what is the conclusion, whether it is RC or RL poles and 0s must alternate they do
not alternate. So, it is not LC, it is not RC, it is not RL can you say that it is not
realizable.
(( ))
No, you cannot say, because it could be RLC. How do you determine whether it is RLC
or not, whether it is realizable or not give me 1 test which will determine other things are
obvious? (( )) Positive realness, but positive realness requires several testing, it requires
to check whether the function is real for s real whether it is j omega axis poles all other
things are obvious isnt it. It is real for s real there are no poles on the j omega axis or
there are
(( ))
There is, a pole on the (( )) at s equal to 0. There is the residue real and positive; yes,
residue is 6 therefore, it is real and positive that part is satisfied. What else, all the only
real part
(( ))
So, you have to find out A of x which is m1 m2 minus n1 n2. So, it is 6 minus x then
minus x, m1 m2 minus n1 n2 that is plus 5x. I have skipped those steps, i have not
written6 minus s squared s squared equal to minus x. No 6 plus s squared and s squared
equal to minus x. So, 6 minus x in the denominator s squared that the minus x, then m1
n1 n2 5 s squared minus 5 s squared. So, (( )) plus 5x this is equal to minus 6x plus x
squared plus 5x this is equal to x squared minus x equal to x into x minus 1. This is not
necessarily greater than 0 necessarily and therefore, the function is not pair it is not
realized in that way. If a function is not RC is not RL is not LC it does not necessarily
mean that it is not realizable. You have to apply the pair function testing.

(Refer Slide Time: 30:23)

Then e as you can see is, a simply the reciprocal of the function at d since d was not
realizable e is not realizable either.
(( ))
Then we require a consideration
(( ))
It is LC let us write it down, s squared plus 3 s squared plus 2 s times s squared plus 1.
(( ))
Because poles and 0s do not alternate, can we say that this can still be pair can be still be
pair can this still be pair
(( ))
If it is an odd rational function it can (( )) it should be realizable with LC. It is an odd
rational function not realizable by LC therefore, it is not pair it is a non pair is the
argument clear, logic clear all odd rational functions which are pair can be realized by
LC. If it cannot be realized by LC, it cannot be pair. If I repeat it twice i will create
sufficient confusion. So, we will not.
(( ))
Realize d.

(( ))
D is not even by odd no d is denominator is s squared plus s the next problem is 11,10.
(Refer Slide Time: 32:29)

Eleven- ten because others involve RL functions. So, we will not do that 11 10 for the
network shown, there is a network V0 1 ohm impedance and admittance Y. And a
resistance 1 the output is V2 it is given that V2 by V0 is equal to 1 over 2 plus Y is this
obvious that it is 2 plus Y.
(( ))
They admittance series Y plus1 to the impedance 1 by Y plus 1 you see, 1 by Y plus 1
divided by 1 plus 1 by Y plus 1, which is exactly 2 plus 1. And this is given as s times s
squared plus 3 divided by 2s cubed plus s squared plus 6s plus 1 you are required to
synthesize Y as an LC admittance. So, the first thing would be to find Y2 plus Y equal to
2 s cubed plus s squared plus 6 s plus 1 s times s squared plus 3 find Y from here and
synthesize it I will skip the algebra.

(Refer Slide Time: 34:10)

Y my solution is s squared plus 1 divided by s into s squared plus 3 and the solution in
the Y form any solution. So, I take foster 2 yes foster 2 and the solution is 3 then a series
combination of I hope 2 by 9. I have worked out some other problems, but I want to take
the time to solve a more interesting problem. No now, let us look at 11 first (( ))
Let us take let us solve 11 point 11 11,11 says synthesize by continued fraction. The
function Y of s equals to s cubed plus 2 s squared plus 3s plus 1divided by s cubed plus s
squared plus s 2s plus 1.There is nothing much in this it just turns out, that if you carry
out the continued fraction expansion continued fraction expansion the final result is this.
(Refer Slide Time: 35:57)

It is a likely a pair that is works here, it may not work this is the final result, but as a said
I want to take a more interesting problem and this problem is as (( )) in the rest of the
time that is why I looking at the watch. We have been given a pole 0 plot. This is in fact,
the last question of this chapter 11 last question, but it is not here it is not here i forgot to
do the third page there is there is another page. And anyway let me pose the problem to
you and then try to solve, there is lot of common sense that is involved in this solution of
this problem.
(Refer Slide Time: 37:00)

I have been given a driving point impedance function which has not been specified to be
LC RC or RL, but it is poles and 0s are given. And the poles and 0s are located all often
are located on a line parallel to the j omega axis, at a distance of 1from here, and it is
given that there is a pole here, that there is pair of 0s here, where this distance, this point
is j1 naturally this point to do minus j1.I will not show that, then there is pair of poles
here, where this distance is j2 j root 2 not 2 j root 2 and finally, there is pair of 0s here,
where this distance is minus j root 3. I am writing it below because there is no space
here, that is all that is known about the impedance.
Now, you are required to synthesize this impedance; obviously, do you understand the
problem. The synthesize, the problem formulation is not complete there is something
missing can you tell me what is missing?
(( ))

The constant so what we can do is to synthesize it 2 within a constant multiply. And we

will assume that the multiplier is 1to for this problem. 1 is the simplest number is a very
nice number .So, the first thing is that we can synthesize 2 within a multiply a constant
multiply, second a poles and 0s are neither on the j omega axis nor on the real axis. They
are there are complex poles and 0s. So, let us see what we can do about it, let us write the
impedance function 2 multiplier constant multiplier.
So, let us write the impedance function, the pole there is only 1 pole at minus 1.Which
will contribute to the factor s plus 1.The 2, 0s at plus minus j1 that shall contribute to s
plus 1 whole squared s plus sigma 0 whole squared plus omega squared that is equal to 1.
There is a purpose, why i am writing it in this form instead of s squared plus 2 s plus 2. I
could have done that also, then the poles the next pair is a pole s plus 1 whole squared
plus 2. And the next factor (( )) is a 0 at s plus 1 whole squared plus 3 do all of you
follow this impedance function?
(( ))
How I wrote this, by inspection by just looking at it. That is why I chose this nice
numbers root 2 and root 3. So, that the square could be a whole number, let me write it
down.
(Refer Slide Time: 40:37)

Z of s equal to s plus 1 whole squared plus 1 s plus 1 whole squared plus 3 s plus 1s plus
1whole squared plus 2; obviously, the function if at all realizable if at all pair. It would
be realizable as an RLC neither LC nor RL nor RC whether the poles and 0s are in

general complex. Therefore, RLC network now, we have not learnt RLC network
synthesis in general, but this problem is of a time which can be solved by knowledge of
LC networks because you see.
(( ))
That if you put s plus 1 as a new variable p. And you say Z of s equal to let us, a Z1 of p
then you notice that Z1 of p is equal to p. A new complex variable p times p squared
plus 2 p squared plus 1p squared plus 3 and this an LC network in the p plain. Therefore,
I can synthesize Z1 of p in the p plain finally, I shall replace p by s plus 1.
(Refer Slide Time: 42:15)

Let us see, Z1 of p have you understood the philosophy of this.

(( ))
Why did it occur, because the poles and 0s were on an axis parallel to the j omega axis.
Similarly, had we be given poles and 0s? On a line parallel to the real axis, negative real
axis.
(( ))
We could have done an RC or RL. This is a very popular question Z p, Z1 of p squared
plus 1p squared plus 3 p times p squared plus 2.What would you like chose for it is

form? foster 1, foster 2, cover 1 and cover 2 there is, something interesting there also
minimum amount of calculation i dont want much of calculation.
(( ))
F1 even cover is not bad, look at cover 1 p cubed plus 2 p 4 plus 4p squared plus 3. Let
us see, this is an impedance. So, p4 plus 2p squared 2p squared cover 1 continued
fraction starting with the highest powers. We could do that because the function has a
pole at infinity, otherwise no. So, 2p squared plus 3p cubed plus 2p p by 2, this is an
admittance. So, we get p cubes plus 3 by 2p, 3by2. So, half p remainder 2 times to is 4
minus 3 half p that divides 2p squared plus 3. So, we get 4p is that right, 2p squared and
this is an impedance. Then 3 divide half p. So, we get p by 6p by 6 isnt. It this is an
admittance and half p, the remainder is 0.
(Refer Slide Time: 44:37)

So, my network therefore, shall be and inductance of 1 Henry in the p plain. No we this
is, this will be confusing. So, we write the impedance, and the admittance for the for the
capacitors. This is no we do not do that, to confuse. You do not confuse, we simply write
p shall I do there.
(( ))
There is also is a confusion.
(( ))

I write directly in terms of s; why go to all these. You see, I need an impedance (( )) s
plus 1. So, I get 1 and 1s plus 1, then I need and admittance of p by 2 which is s plus 1,
by 2, so I get.
(( ))
Parallel combination of a capacitor and a resistance, tell me what is the value?
(( ))
Half and 2 not 1 the next one is 4p. So, I get 4 Henry inductor and 4 ohm resistor, 4s plus
1 the next is p by 6. So, I get a parallel combination of 1 by 6 and a resistance of 6 and
the rest is, an admittance 0, which is impedance infinity and therefore, the function is
done and that is all for today.