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VOLTAGE SOURCE INVERTER

FOR VOLTAGE AND FREQUENCY


CONTROL OF
A STAND-ALONE SELF-EXCITED
INDUCTION GENERATOR

Hamid Shokrollah-Timorabadi

A thesis subrnitted in conforrnity with the requirements for


the degree of Master of Applied Science
Graduate Department of Electrical Engineering
University of Toronto

@ Copyright by H. Shokrollah-Timorabadi 1998

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Abstract
This thesis investigates the application of a Voltage Source Inverter based controller for the regulation of voltage and fiequency of a stand-alone selfexcited induction generator. The stedy state
and dynarnic system equations are formulated and the system behavior is snidied. Based on the
model, the design of the VSI-based controller is obtained. The design and rating of the controiier

with different DC side configurations is derived for the system model.


An experimental generator system with the proposed controiler has been built. In order to verify

theoretical results and the technical feasibility of the VSI-based controller, various tests are conducted. The test results demonstrate the excellent performance of the proposed concept.

1 would Like to express my sincere gratitude and appreciation to Professor R. Bonert. my supervi-

sor, for his guidance, and financial support throughout the entire p i o d of this degree program.
1 also th&

the University of Toronto for the University of Toronto Open Fellowship.

1 also sincerely thank Dr.

KY. Namjoshi and P. Lehn for their useful advise, and help during this

thesis.
Finally, my specid appreciations are extended to A.G. Acuna for her help, and support.

To my parents,
Ali and Kobra

Table of Contents
Abstract

Acknowledgment
Table of Contents

List of Symbols

Chapter 1 Introduction
1.1 CooventionaI Control Scheme

1.2 Advanced Voltage and Frequency Control


Includuig Load Governing Regdation

1.3 Improved Voltage and Frequency Control with


a Voltage Source Inverter
1.4 Thesis Objectives

Chapter 2 System Description


2.1 System Mode1
2.2 Ueactive Power

Chapter 3 Voitage Source Inverter Based Controuer


3.1 Operating Properties

3.2 Sinusoidal hilse Width Modulation


3.3 ControUer Analysis

3.3.2 Steady-State Operations

3.3.3 Apparent Power


3.4 Control Range of Roposed VSI-Based Controller

3.4.1 Control Range for VSI witb Constant DC Source and no tosses
3.4.2 Influence o f VSI-Based Controller Losses on Power Chart
3.4.3 VSI-Based Controller with Variable DC Voltage
due to DC Side Resistor
3.4.4 Required Control Range of a VSI-Based Controller

for an Induction Generator System

3.5 Rathg of an VSI-Based Controller Components


3.5.1 Consumer Load, Induction Generator, and Turbine

3.5.2 Inductor
3.5.3 Minimum and Maximum DC Voltage
3.5.4 DC Side Resistor Selection

3.5.5 Switches

3.5.6 DC Capacitor

3.5.7 Rating Example

Chapter 4 Control Strategy


4.1 Fast Disturbances
4.2 Feedforward

Chapter 5 Experimentai Setup

5.1

5.1 Prime Mover

5.2 Induction Generator, Load, and Controller


5.3 GPC Board

5 -4 Software
5.5 perational Considerations
5.5.1 Filter Capacitor
5.5.2 Startup

Chapter 6 R d t s
6.1 Resistive Load (Test 1)
6.2 Resistive Inductive Load with Power Factor 0.8 (Test2)

6.3 Resistive and Inductive Load


with Minimum Power Factor (Test 3)
6.4 induction Motor Load (Test 4)

Chapter 7 ConcIusions
7.1 Contributions

7.2 Suggestions for Further Smdies

References
Bibliography

Appendix A Per Unit Representation

Appendix B Experimental AppataRiS

B.1 The Induction Generator


B.2 The DC Motor

Appendix C Microprocessor Program Flow Chart

Appendix D Microprocessor Programs


D.1 p d c

D.2 hextab1e.h

List of Symbols
- Equivaient capacitance of VSI.

- DC side capacitor of VSI.

- Equivalent pardel capacitor at no load.


- Frequency.

- Triangular carrier fkequency.


- Control signal frequency
- Equivalent capacitance of VSI current space vector.
- Controiler curent space vector.

- Controuer current cornmand value.


- Load current space vector.
- Reference Ioad current space vector.

- Magnetizing current.
- Space vector of rotor current in the r
- Space vector of stator cunent in the

model.

r model.

- Real component of space vector of stator current.

- Imaginary component of space vector of stator current.


- Constants of the approximate equation used for magnetizing characteristic ofthe
induction machine.

- Moment of inertia of the generator turbine system.


- Constant for terminal voltage of VSI.

- Constant for two stage resistor.


- Inductance of VSI-based controlier,

- Load inductance.
- Magnetizing inductance.

- Pardel inductance.

- Leakage inductance of induction machine in the r model.


- Moduiation index of VSI.
- Gradient of the speed-torque characteristic of hydro turbine.

- VSI-based controller real power dissipation.


- Load real power.

- Real power where the second switch is nirned odoff.


- Load reactive power.
- Reactive power required for excitation of induction generator at no load.
- Reactive power required for excitation of induction
generator at fidl resistive load.

- VSI-based controller reactive power.

- Core loss Resistance.


- Inherited resistance of VSI.
- Dc-side resistance of VSI.

- Load resistance.
- Equivalent parailel resistor.
- Rotor resistance referred to stator side in the r model.
- Stator resistance.

- Apparent power for type 1 load.


- Apparent power for type 2 load.
- Sinusoidal Pulse Width Modulation.

- Shah torque.
- Magnetuing Voltage.
- DC side voltage of VSI.
- Space vector of generator voltage.

- Voltage Source Inverter.

- Terminal voltage of VSI.

- Phase delay angle.


- Terminal voltage fkquency vector.
- Rotor speed.

6
O

n
A

- Flux Linkage.

Y
A

V ~ RW,t l
A

VSR,SI

- Real and imaginary components of rotor flux Linkage space vector.

- Real and irnaginary components of stator fiwc Mage space vector.

CHAPTER 1
Introduction
In remote areas of Canada where it is impossible or too expensive to access main power lines, one
solution to obtain electric power is to use a small stand-alone hydro power plant. In such a situation, the turbine is driven by a steady flow of water in a river. It is preferable to use a self-excited
induction generator, due to its low cost and ruggedness. When the induction machine is driven by
a prime mover, the residual magnetism in the rotor produces a small voltage in the stator wind-

ings. If a bank of capacitors is connected to the stator winding, the small voltage causes a capacitive current to flow. This resulting current provides a positive feedback that causes a further
increase in the voltage. This process is called self-excitation which is evennially iimited due to the
magnetic saturation of the machine [ 11.
The voltage and frequency of such an induction generator in stand-alone operation are very sensitive to load changes. Methods to control the voltage and frequency of a self-excited induction

generator have k e n proposed in [2.3]. These methods employ a controlier consisting of a phase
controlled bridge and a DC-chopper to achieve the regulation. The disadvantage of such an
approach is that the control range of this configuration is severely limited and the controiler c m

supply neither real nor reactive power to the system. This results in a large AC side capacitor for
the excitation of the induction generator. Furthemore, the controiier is unable, even for a short
tirne, to compensate for fast Ioad rransients generated by power surges.

To overcome these disadvantages this thesis proposes a power controiler which includes a Voltage Source Inverter for regulation of the voltage and frequency of the stand-alone seif-excited
induction generator. The proposed controller uses IGBTs dong with fast integrated electronic

protection. This approach &es

the system more reiiable.

It is shown, that the proposed controller provides a much wider range of control. In particdar it

can provide reactive power and, during aaosients for a short-tirne,red power depending upon the
DC side configuration of the VSI. As a consequence, the the-phase AC side capacitor c m be
eliminated.

1.1 Conventional Control Scheme


Figure 1.1 shows the conventional scheme for frequency control. As the load power demand
changes, the input power into the induction generator also changes to match the load power
demand. Hence, a speed govemor is employed for the regulation of the prime mover. Generally,
the speed govemor is quite expensive a d due to its large mechanicd tirne constant, is unable to

react fast enough to transients. Therefore, the regulation of voltage and frequency has low performance.
On the other hand, the voltage and frequency regulation requires a smoothly variable reactive

power source. In conventional schernes, switched capacitors are used which provide poor voltage
and frequency regulation.

Worcr

Controlled
Capcitors

Figure 1.1. Conventional scheme to regulate the prime mover.

Lod

1.2 Advanced Voltage and Frequency Control


Including Load Governing Regdation
To avoid a turbine speed govemor the principle of load governing can be used. Furthemore,
enhancement of voltage and frequency control can be achieved using an *dance

controlIer.

Such a scheme as proposed in [2,3,4] consists of a bridge rectifier, chopper. and DC side resistor

(Rd=)as shown in Figure 1.2. The impedance controller will be connected to the induction generator in pardel to the load. The basic idea of an impedance controiler is to keep the total real and
reactive power seen by the induction generator constant. Therefore, the prime mover requires no
regulation and can be always operated at the required fixed power, voltage. and frequency.

hitialiy, a large AC capacitor bank is introduced into the system to meet the capacitance required
for operating the system at the required power demand with a desired power factor. Whenever
there is a reduction in the power demand, the impedance controller will redirect the excess power
to Rdc and adjust for the total reactance of the system. The excess power that is not absorbed by
the load wilI be consumed in the resistor Rdc- Depending upon the nature of the changes of the
load, the impedance conuoller will compensate for any additional real and reactive power not
used by the load. The result of this adjusmient is that the induction generator will always observe
the same impedance and operate at the same fmed apparent power.

The descnbed impedance controller concept provides an excellent regulation of both voltage and
frequency, and elirninates regdation of the prime mover. Unfomnately, the impedance controlier
scheme requires large AC capaciton for the excitation process. Moreover, the impedance controlIer offen a limited control range. It can ody absorb reactive power (inductive) and cannot provide
real power not even for a very short time.

Gare

'
Water

Excitation
capacitors

Figure 1.2. Impedance controller consisting of bridge rectifier, chopper, and Rdc.

1.3 Improved Voltage and Frequency Control with a Voltage Source Inverter
Li order to avoid the problems of the previous control schemes the use of a Voltage Source
Inverter (VSi) for load goveming and impedance control is proposed in this thesis. The system is
similar to the one in Figure 1.2 with the VSI-based controller connected in paraiiel to the load as
the new impedance controlier but without the large AC capaciton. Figure 1.3 depicts the sche-

matic of the VSI used as the proposed connolier unit. The AC side is comected in parailel to the
load. The DC side can be c ~ ~ g u r in
e dvarious ways. It can be connected to a general DC source,

which is an unredistic scenario for the intended purpose, but provides hsight into the principle of

the proposed controUer. The DC side as proposed for the self-excited induction generator consists

of an electrolytic DC capacitor and a resistor as s h o w in Figure 1.3. A M e r possible c ~ ~ g u r a -

tion uses only a large size double layer capacitor, which wodd provide short time energy storage
(hundreds of Joules).
Gate

'?

VSI-based Controller InciudUIg Filrer Capacitor

Figure 13. Schematic of overail generator system including VSI-based controiier.

1.4 Thesis Objectives


The main objective of this thesis is to employ the VSI for the control of real and reactive power
components such that excellent regdation of the voltage and fkequency of the stand-done induc-

tion generator is achieved. More specificaily, to achieve the thesis objectives the following
research is conducted:

1- The control range of the VSI will be snidied. The possibility of bidirectional real and reactive
power flow delivered or received by the controlier unit will be investigated.
2- The reactive power required for self-excitation of the induction generator will be provided by
the VSI. The a h is the total elimination of the AC capacitor bank. Moreover, the VSI will connol

the injection of reactive power into the induction generator, depending upon the load variations,

such as to maintain the induction generator terminal voltage and fiequency ai any desired value.

3-The VSI will control the flow of the real power such that the induction generator is loaded with
a constant reai power. This eliminates an expensive mechanical govemor which conventionally
controlled the speed of the prime mover. The outcome is a constant desired frequency and voltage.

4- The VSI controls the startup process by injecting adequate reactive power (capacitive) into the

induction generator in order to initiate the self-excitation process. The stamip process requires an
initial DC voltage.
5- Several load configurations, including the startup of induction motor load, are considered to

verify the proposed control concept and to demonstrate the system performance.

In chapter two, the modeing of the hydro turbine, induction generator, and load is described. The
required reactive power at no load or full load is detexmined.
Chapter three develops the details for the VSI-based controller dynamic. and steady-state behavior. The control range of the VSI-based controller is determined and verifed experimentally.

Chapter four discwes the type of disturbances and the control strategy.
Chapter five describes the experimental setup including the prime mover, induction generator,

load, microprocessor, and software. The stamip process is ako discussed in this chapter.
Chapter six presents the measured results and demonstrates the achieved excellent performance,
even with a direct switch-on of an induction motor load,
FinaIiy, chapter seven discusses the conclusions and offen suggestions for further s ~ ~ d i e s .

System Description
This chapter presents a general description of the system equations including the induction generator. hydro turbine, and load. It dso provides the necessary formulae for calculation of the reactive power for excitation of the induction generator at no ioad and fidi load.

2.1 System Model


Figure 2.1.1 shows the hydro turbine, induction generator, and load. The dynamic and steadystate modeis and behavior of these components are discussed in the literature in detail [2, 31. For
ali equations a per unit system is used in this thesis. Ail equations, and variables presented are in

per unit unless otherwise specified. Appendix A Lsts the base values for a l l the quantities used.

Figure 2.1.1 The hydro turbine. induction generator, and load.

It is assumed that the hydro turbine delivers a ce&

constant power to the induction generator

according to a given head and volume of water. The turbine characteristic can be modeled as:

Tsh = To - M(R - Ro)

(2.1.1)

where 10,Ro is any point on the saight line of toque-speed characteristic comsponding to the

hydro power and M is the negative gradient of the charactenstic.

The dynamic behavior of the induction generator, which is a squirrel cage induction machine, is
represented by the equivalent circuit [5] shown in Figure 2-12. The differential equations are
expressed in the synchronous frame where the generator voltage (V,)is chosen as the reference
such that the imaginary component of the generator voltage is zero and this voltage is aligned to
the real axis. The differential equation of the stator and rotor flux linkages, and mechanical speed,

as space phasoa, can be expressed in per unit as 121:

Where R and 1 indicate the real and imaginary components respectively.

Figure 2-12.The dynamic equivalent circuit of induction machine [2].

The induction generator feeds power to a load consisting of a senes resistor and an inductor as
shown in Figure 2.1.3. In addition, a source of reactive power to excite the induction generator

and to provide the reactive power for the load is required. This source of reactive power is modeled as an equivalent capacitor Cvsp The differential equations descrbing the load in synchronous fiame are:

Due to the selection of reference frame, the equivalent capacitor (CvsI)results in one differential
equation as,

and one algebraic equation that is expressed as:

Figure 2.13. The equivalent circuit of a senes RL load with equivdent capacitor (CvsI).

To solve the differential equations 2.1.2 to 2.1.9 the following algebraic equations have to be
included. These equations formulate the flux M a g e , the current relations for the equivalent circuit of the Figures 2.1.2, and 2.1.3 and the characteristic fwiction of the magnetic saturation of the

induction generator.

The equations for the flux M a g e foiIow as:

The current relations derived from the nodes of Figure 2.1.2 are:

Furthemore, the magnetizing inductance is expressed as:

The magnetizing characteristic for the induction machine is approximated by two equations. The
linear region is,
for O I,i li,

and the non linear region is:

v,

kz
= klio+ batan [b(i, - io)]

for io S im

where i, b, and k[ are constants which result in the best approximation of the measured magnetuing characteristic. Thus, the functionf is wxitten as 121:

f(v,) = ,i

= i,

+ bl - t

a b

(2
-

- io))

Substituthg for the stator flux iinkage nom the fouowing equation (2.1.23) and for the magnetiz-

ing current from equation 2.1.22 into equation 2.1.19 results in equatioo 2.1.24.

vm

Lm =
CO[io

+ g tan

((2

- i,))]

Although the dynamic mode1 c m be used to determine the steady-state performance, it is convenient to formulate the steady-state equations by setting the tirne derivatives of variables in equa-

tions 2.1.2 to 2.1.9 to zero. This set of steady-state equations defmes the combined system
inciuding the hydro turbine. induction generator, the RL load, and the equivaient excitation capacitor (CVSI).
The steady-state equivalent equations follow as:

2.2 Reactive Power


in order to calculate the reactive power required to excite the induction generator, it is necessary
to develop steady-state equations to detemiine the required reactive power under fidl load and no
load. Refe~nce[2] has already developed a computaond method that determines the reactive
power required for the excitation of the induction generator at fidl load. Following the same procedure and considering Figure 2.2.1 where the capacitor (CvsI) represents the equivalent steadystate capacitance of the VSI-based controiier. one c m derive the equivalent circuit of Figure 2.2.2

which can be used to calculate the required reactive power at no load.

Figure 2.2.1. The per-phase steady-state mode1 at no load.

Figure 2 2 2 The parallel equivalent circuit at no load.

The reactive power is calculated for a desired operating point with known generator voltage (V')

and fiequency (a).


The steps to calculate the no load reactive power follow as:
Srep I :
C o ~ e c the
t elements in box A of Figm 2.2.1 into equivalent p a d e l elements Rp, and Lp as

shown in Figure 2.2.2. The series connected impedance R,,

+ Xsec m be converted to a parallel

equivalent circuit consisting of Rp and Xpby ernploying the following equations,

and substitutions for Rse and X, to yield:

Determine the equivalent parailel elements RI,, and

ments in box B of Figure 2.2.1.

where R e ,is calculated as:

in Figure 2.2.2 from the series ele-

Step 3:

Equang the reactive power of the generator system with the equivalent VSI capacitance for the
reactive power balance yields:

This equation combined with 2.2.5 allows CvsI (Xcvs,) to be solved for, if the magnetizing and

parael inductances are known. These inductances can be calcuiated as described in steps 4 to 6.
Step 4:

In the parailel equivalent circuit the resistor I$ is a negative resistance and generates real power,
while the resistor RICOconsumes this real power. These two resiston are in parailel and the magnetizing voltage appears equaiiy across both of them, hence, from a real power balance it follows
that:

RI,, = -R,
Substitution of this equation in equation 2.2.3 wili yield a quadratic equation that resuits in the
following expression for the mechanical speed:

where the speed equation does not depend on the magnetizing or turbine characteristic.
Step 5:
Substituting the mechanical speed obtained into equation 2.2.4 the inductance Lp cm be deter-

Step 6:

The equation 2.1.22 gives the magnetizing inductance in terms of magneUzing voltage (V,).
Hence, V, is expressed in tenns of generator voltage (V,)such that:

Substituthg equation 2.2.10 into equation 2.1.24 gives the magnetizing inductance in terms of
excitation capacitor (Cvsl) Step 7
:

Knowing the inductances Lp, and Lm the required excitation capacitor can be detennined from
equation 2.2.8. Therefore, the total no load reactive power for excitation of the induction generator can be calculated as:

Furthemore, the reactive power required for the full load can be calculated in the same manner as
for the no load [2]. Nevertheless, a simpler method of caiculating total reactive power for a paral-

le1 RL load is given by 131. This method c m be modified, thus, the total reactive power requkd
only for the induction generator is:

It is convenient to choose the induction generator rated voltage, and current as the base values
which results in further simplification of equation 2.2.12 to:

Qgcn

-~:ored

(2.2.13)

The VSI-based controller will be designed to provide the required reactive power for the excita-

tion of the induction generator at no load or at full load.

Voltage Source Inverter Based Controuer


In this chapter the application of a Voltage Source Inverter (VSI) as a new controller unit is investigated. The dynamic and steady-state behavior of the connoiler will be considered. Furthemore.
the o v e r d control range is snidied and verified, and the rating of the controIler components is dis-

cussed.

The primary objective of the VSI-based controller is to introduce a semiconductor controiled


device which is capable of emulating the characteristics of the excitation capacitors and injecting
adequate reactive power into the induction generator and the Ioad. The secondary objective is the
regulation of the reai power. The proposed controller employes a DC side resistor such that the
unwanted real power will be consumed in this resistor. As a consequence, the induction generator
will always observe a constant real power demand. This VSI-based controiier can replace the earlier reported impedance controller [2, 3,4] and eliminates the need for excitation capaciton. Due
to the nature of the VSI-based controller, a wider control range that c m accommodate various
control operations of the overd system is achievable. The controller is capable of delivering or
receiving reai and reactive power. This control should be performed in such a way that the real
and reactive power components c m be controlled independently. Moreover, the VSI-based con-

troller should be able to respond rapidly to the control commands, and drive the operating point of
the system to the desired one.

3.2 Sinusoidd Pulse Width Modulation


Sinusoidal Puise Width Modulation (SPWM) is employed to control the switching of the VSI
conuoiler. The PWM pattern is generated by comparing the moduiating waveforms with a carrier
signal. Three sinusoidal rnodulating signals that are 120 degrees apart are compared to a niangu-

lar carrier signal in order to generate three-phase sinusoidal output wavefomis.

In this method the modulation index is defmed as the ratio of the peak amplitude of the modulath g sine wave ( f, ) to the peak amplitude of the viangular c h e r wave (

v;, ) where this ratio is

less than or equd to 1 ( m 5 1 ).

The frequency modulation ratio (mf)


is defined as the ratio of the aiangular carrier frequency V;n)
to the frequency of the conuol signal fi).

The frequency of the triangular carrier is kept constant and detemiines the switching frequency.

When the switching fiequency is much higher than the generated fkequency and for m S 1 ,which
indicates operation in the hear region, low frequency harmonies cannot appear in the PWM
waveforms. Hence, the distortion is minimal and it is reasonable to neglect higher hannonics and
consider only the fundamental components for subsequent calculations.

Figure 3.3.1 shows the circuit of a VSI-based contrder including the controiier inductor (L,& a
parasitic resistor (R,), the DC capacitor (Cd=),and the DC side resistor (Rd=).The con~ollerunit
is comected to a three-phase star comected voltage source and the terrninal voltage of the VSI is
synchronized to the source voltage by the gating controiier of the VSI.
The magnitude and phase of the terminal voltage is adjusted by setting the modulation index (m),
and the phase angle ( 6 ) respectively.

Fipre 33.1 The VSI with the controiier inductor (L,), resistor (R,,), DC capacitor (Cdc),
and DC side resistor (Rdc).

33.1 VSI-Based Controiler Equations


Using Figure 3.3.1 and considering only the hindamental components one c m evaluate the mm-

sient behavior of the VSI-based controuer. Where co is the fundamentai frequency and the source

voltage is chosen as the reference such that

V, = V,LO,

VP = VpLG

and

Therefore, the following steps can be followed.


1. Consider:

vsc(t)

= V,

- (Ot - Y
)
COS

And
vpo(t)=

Vp -

+6)

COS (ut

2. Assurning a balanced three-phase system without any neutral comection.

w here:

Also:

w here:

3. The controller currents in the stator frame are:

- --Kct
L,,

di,, p =
dt

.
'

'c4

L,- (vSe- vpp)

Assuming zero losses in the VSI. the reai power balance results in:

w here

And:

vpo 'icro +

ictb + Vpc. icrc

Using equations 3.3.12, to 3.3.14 it can be shown that the AC side power in the stator hune is:
'a,

("Pa icra + V p * ~'Cr$)

(3-3-20)

Substituthg in 3 -3.18 fiom 3.320 resdts in:

4. Consider the terminal voltage of the VSI in the stator frame:

or
vPp =

V' - sin ( o t + 6)

5. In order to transform From a stator frame to a synchronous frame, multiply by:


e-ja"

= cos (ut)--sin ( o r )

Therefore, the voltages and currents becorne:

where D =

1 cosot

L- sin ot

sinotl
cos ofj

6. The terminal voltages in equations 3.3.22, and 3.324 are transformed from the stator to the synchronous fiame by using equation 3.3.27 and algebraic identities. Hence,

1
where V, = k -m . Vdc and k = 2

Furthemore, the differentid equations 3.3.15. 3.3.16, and 3.3.21 c m be transformed to the syn-

chronous frame as:

k-m
- cos6
Cd,

k-rn
cd,

- sin6

1'

-cdcRdc

The VSI-based controller is capable of providing ail the reactive power required for the induction
generator and the ioad. Hence, the set of differential equations 3.3.29 is adequate for the dynamic
study of the system. Nevertheless. a filter capacitor is required to compensate the harmonies
present in the system. Due to this capacitor the differential equation 2.1.9 and the algebraic equation 2.1.10 are reintroduced into the system as the equations descnbing the fdter capacitor. Therefore, for the dynamic study of the overall system including the fdter capacitor, the differentiai
equations in 3.3.29 and 2.1.2 to 2.1.9 dong with the algebraic equations 2.1.10 to 2.1.18 wili
define the overall combined generating system and the controiier unit.

33.2 Steady-State Operations


The steady-state can be obtained by equating the tirne derivatives of the variables in the VSI differential equations 3.3.29 to zero. therefore:

This equation and 3.3.28 together with equations 2.1.25 to 2.1.32 resulu in overdl steady-state
equations goveming the combined system.

33.3 Apparent Power


The apparent power in the synchronous frame follows:
S = bsd
+jv,J

-X iLrd+jicsq)*

Therefore, the real and reactive powers are:

The imaginary component of the generator voltage (vSq) will be zero in equations 3.2.29, 3.3.30,
and 3.3.32 if the generator voltage is considered as the synchronization reference.

3.4 Control Range of Proposed VSI-Based Controiler


In order to investigate the control range of the VSI-based controller. different DC-side configurations are considered. Using Matlab a calculation for the control range is carried out. This calculation requires knowledge of the induction generator parameters such as rated voltage, cumnt, and
power in addition to the controiier ratings, aven in section 3.5.

3.4.1 Control Range for VSI with Constant DC Source and no Losses
In order to have some insight into the VSI-based controller. the losses in the VSI and the controller inductance are neglected. The steady-state controller reai 'and reactive power flows are studied
as a hinction of the modulation index (m)and the phase delay angle (6 ). The configuration under
consideration is shown in Figure 3.4.1. A phasor diagram presenting the voltages and currents for
the controiier with no losses is shown in Figure 3.4.2.

Source

Figure 3.4.1. VSI-based controller with no losses comected to a constant DC source.

Figure 3.42. Phasor diagram of the VSI-based controiier with no losses.

Jsing equations 3.3.28.3.3.30, and 3.3.32 the reai and reactive power can be caiculated as a func-

,
tion of the modulation index and the phase delay angle dong with the parameters L

Vk, and the

operating point variables V ,and o.The results are shown as the "power chart" of the controiier

in Figure 3.4.3. The parameters used for this example are given in Table 3.4.1.

Per Unit
p-eter(

W w

Table 3.4.1. The parameter values of Figure 3.4.1.

Figure 3.43. The power chart of the lossless VSI with constant DC voltage (Vdc).

The dependency of the controiler reai and reactive power on the modulation index and phase
delay angle is shown in Figure 3.4.3. Constant values of rn form concentric circles in the power
chart with a center at point "m& which is determined by m=O, or Vp=O and is calcdated as:

On the other hand, constant values of 6 are radial lines out of the point mo The maximum reactive power is determined by m=I and occun at 6 =O. This point is calcdated as:

It cm be seen by studying the power chart that, real and reactive power are coupled and are functions of the modulation index and the phase delay angle. However, it can dso be observed that 6
is usuaily very small (Le. 6 < 12' for P, < I p.u). Furthermore, if

L,, is srnail, which shifts mo

higher up. the circles of rn=comtant become nearly horizontal lines in the important power conno1 range of I I per unit for real and reactive power. This aiiows. as a f i s t approximation, the
reactive power to be considered a function of m and real power a function of 6.
The power chart aiso provides a fmt insight into the rating of the controuer parameten. To
achieve a certain power, Vd,has to be chosen adequately, depending on the given AC voltage. In
addition. choosing L,, determines mo and by this the sensitivity of the controls with regards to m.
A small L
, makes reactive power quite sensitive to rn and provides a high gain to the control m,

but it also provides a better decoupling of 6 and reactive power.

3.4.2 Influence of VSI-Based Controiler Losses on Power Chart


The losses in the VSI-based controller, including the reactor*losses.cm be modeled as a parasitic
resistance (R,) in senes with the controller inductance (L,,).Figure 3.4.4 shows the equivaient
per phase model of the controller including the losses.

Figure 3-44.The equivaient per-phase model of the controller including losses.

Generally. the affect of R,, is such that at modulation index zero the red power is not zero any-

more. This wil1 shift the point rno in the power chart to positive reai power. Au example for the
case of R, = 0.IO6 per unit is shown in Figure 3.4.5. AU the other parameters are as indicated in
the previous case. The new coordinates of the point "nio" wdi be:

Figure 3.45. The power chart of the VSI-based controuer with constant DC source
including the losses.

3.4.3 VSI-Based Controuer with Variable DC Voltage

due to DC Side Resistor


As explained earlier the controller for the induction generator will be confgured with a DC side
consishg of a capacitor (C&)to maintain the DC bus voltage and a resistor (Rd=)to d o w steady

state load governing. A block diagram of the VSI-based controiIer for this configuration is shown

in Figure 3.4.6 where Rct is neglected.

8
Figure 3.4.6. Block diagram of the VSI-based controller with variable DC voltage.

In this configuration the DC side voltage (V&) is no longer constant and will vaiy depending upon
the amount of real power dissipated by the VSI-based controuer in Rd, As seen earlier from the

power chart, a change in Vd,will change the diameter of the concentric circles of constant modulation index, thus, affecting r d and reactive power. As Vd,increases the diameter of the concentric circles also increases, thus, extendhg the power range.

3.4.4 Required Control Range of VSI-Based Controuer for

Induction Generator System


The power chart of the VSI-based controiler cm be divided into four quadrants as shown in Figure 3.4.7 where the previous parameters in Table 3.4.1 are used. The third and fourth quadrants
are considered for the control of the induction generator, as the controiier has to provide reactive
power and may exchange real power with the generator and the load. For the proposed systern
with load govemuig and power dissipation in the resistor (Rdc), the operation of the VSI-based

controller will be limited to the fourth quadrant. The real and the reactive power which have to be
reguiated in the fourth quadrant by the VSI-based controller are determined by the desired operath g point of the induction generator along with the load.

Figure 3.4.7. The VSI-based controller power chart divided into four quadrants.
Load Power Reouirements

For the purpose of the load real and reactive power requirernents, two typical cases of resistive-

inductive loads are studied.


Case 1: Constant apparent power with variable power factor.

Considers a maximum power factor change, that varies fiom one to zero while the corresponding
real power changes fkom maximum to zen, such that the total apparent power ( S I ] )remains constant.

Sll L p h ,

Here the worst case apparent power will traverse the curve s h o w in Figure 3.4.8(a).
Care 2: Constant real power and variable power factor.

The worst case apparent power (SI*) of this type of loads includes a certain power factor for a
given maximum real power (Ph).

Figure 3.4.8(b) illustrates this load with the point "Bu as the

worst condition.

If an equal maximum real power is considered for both types of loads, then:
Sli < s
1
2

(3-4-4)

The maximum load reactive power required is given by:


Qlma

- Ph,taW

(3.4.5)

where <p is the PF angle.

Figure 3.4.8. Two typical cases of resistive-inductive Ioads where SII < S12
(a) constant apparent power with variable PF, and (b) constant real power and variable PF.
Minimum Dower reouirements of load aoverninp scheme

Due to the DC side configuration of the VSI-based conaoller a minimum power (Pmh) dissipa-

tion in Rd, is required in order to maintain the minimum DC voltage.

Pctm i n

Y dcmin
- - Rdc

The generator has to provide the reai power for both the conmuer and the load.
(3.4.7)

Pscn = Petmin + Pinmx


Reauired reactive Dower for penerator

The required reactive power

(eV)for the excitation of the induction generator at rated power is

given by equation 2.2.13 which can be written as:

where the induction generator voltage and current are chosen as the base values.
Total Dower reauired
The VSI-based controller has to supply this reactive power and compensate for the maximum

load reactive power (QI-).


Qcmuu = Qgcn + QI-

therefore,
(3.4.9)

Figure 3.4.9 shows the mapping of the required conmller control range into the power chart
where points A, and B represent the worst case. Note that Figure 3.4.8 shows power as observed
by the generator while Figure 3.4.9 illustrates power as seen be the controller.

Figure 3.4.9. Combined real and reastive power of both types of loads, induction generator,
and VSI-based controller with the worst cases s h o w as A, and B.

Matchina the reauired controller Dower to the Dower chart

At a modulation index of one. mainly the DC voltage and L,, will detexmine the reactive power
control range. Consider only rractive power required for the induction generator, Figure
3.4.10(a). When the system load is at a maximum and the PF is unity. then the controller operates

at minimum power (Pcmh) requiring minimum DC voltage. At this operating point. the DC bus
voltage must still be sficiently high to supply the reactive power for the induction generator
(Q,,,). Considering the fmt type of the load, if the PF now decreases to zero, for the same appar-

ent power. then the controiler must dissipate the unwanted real power. by increasing the DC voltage to Vdcm
Vdcma

The power chart is determined by the voltage ratio (-

), where a high ratio results in a high

'dcmin

voltage rating of the VSI. On the other hand, increasing

V'extends the power control range rap

idly and, therefore, covers any desired control power requirements. This is s h o w in Figure

3.4.10(b).For 3.4.10 a voltage ratio of 1 to 3 has been chosen, which stretches the modulation
index control range. This indicates that a large voltage ratio requires a high W A rating of the

VSI-based controller.
For the second type of Ioads. if it is desired to maintain the maximum load real power dernand
capability with a given PF, the Vkmin has to be selected such that it covers the point "B" of Figure
3.4.1 1. This means a larger Vdnnn than the frst type of the Ioad. Consequently, selecting the Vdc,in

for the load case 2 will automatically cover for both types of Ioads.

-0.5 O
0.5 1
1.5
2
(b) Pct (Pu)
Figure 3.4.10. Mapping the first type of loads into the power chart VSEbased controiler
with (a) Vdcmin=2.34
p-u, and (b) Vk-=6.68
p.u.
-2

-1.5 -1

Figure 3.4.11. Mapping the second type of loads into the power chart of the VSI-based
controller where the worst case of SD (point B) is covered by increase in Vhk.

3.5 Rating of VSI-Based Controller Components


The component rating is a function of the amount of real power received and reactive power

, frequency, and AC voltage. Figure 3.5.1


delivered by the VSI dong with the selection of L
shows the overall block diagram used for the rathg of the generator system. A switchable DC side
resistor (Rd=)is introduced. This resistor, as will be shown, aliows the voltage ratio (
h g to be reduced on the DC side of the VSI-based controller.

Vdcm,
) ratVdcmin

Valve

Figure 3.5.1. The block diagram of generator system used for parameter ratings.

3.5.1 Consumer Load, Induction Generator, and Turbine


The required real power (Pk), voltage (V'),frequency (B, and desired PF are determined by the
consumer load. Based on these values and a minimum power required for the load goveming (Pa) ,

the induction generator and the turbine are selected. This stipulates the required reactive

power for the induction generator (Qg& The Qgcn, P-

Pmin and the minimum PF defme the

required power control range of the VSEbased controiler.

3.5.2 Inductor
The inductor (Lcg)is selected to reduce the hannonics in the cumnt waveforms. If this value is

chosen too small, it will result in harmonies in the current wavefonns. Nevertheless, it causes a
better desouplhg between rn and 6. On the other hand, a large value of the inductor wiU be
costly and a factor of increase in coupling. The practical value is typically a per unit reactance of
0.1 to 0.3 [6].

3-53Minimum and Maximum DC Voltage


The

V',is selected for the VSI-based controller such that it permits enough reactive power to

be delivered to the self-excited induction generator operating at full desired resistive-inductive

load. In other words point B of Figure 3.4.1 1 has to be satisfied- The Vhur requires a constant

,
power (Pcmin) to be dissipated constantly in the Rdc. This P

can be considered as a percent-

age of the generated power (Le. 10%).


On the other hand, the maximum Vd, depends upon the maximum power dissipation (P,-)
where the PC-

can be equai to the generated power in the wont case.

The selection of the DC side resistor (R&) for the load goveming scheme. considering,

Pdcmax

and selecting the dissipated power ratio (-

) results in a given single resistor for a certain

pdcmin

voltage ratio. Hence, given this ratio the Vd,,

In order to lower Vh

can be determined which results in the VSI rating.

for the same P, ratio, a two stage resistor is proposed. This consideration

employs one fixed resistor (Rkl) and one (Rk2) wh"h is switched on during operation. see Fig-

ure 3.5-1.
Case One:

This case considers only one of the resistors (Rdci)in Figure 3-5.1. Therefore, given the values for
the Vdnnn and Pm,.

Rdcl can be found as:

Equation 3.5.2 and the Pcr ratio gives:

Hence, the VdC- is calculated from equation 3.5.3 and the dissipated power ratio.
Case Two:

The choice of the P,,,


Vdc-

and PC-

has an impact on the Vdc ratio. If for a given P,, ratio a Iower

is desired then the option of introducing a second switched DC resistor (Rdc2)is consid-

ered, where Rk2 differs from RdcI by a factor of kd,.

The RdcZ c m be switched onloff during the operation by monitoring the phase delay angle (6)
which is proportional to the consumed real power in the controller. Figure 3.5.2 shows the Vdc

versus P,, where P


,

is the point at which Rk2 is switched odoff. At this point:

which results in a power ratio of:

The result of equation 3.5.7 compared to equation 3.5.3,indicares the improvement of real power

ratio by the square of the Vd,ratio.

Figure 3 5 . 2 The DC voltage (V&) versus controller real power (PJ for two parailel
resiston where Rdd is switched on/off at the point P ,

3.5.5 Switches
The switches can be selected by considering the maximum blocking voltage Vk

and the cur-

rent rating required. Furthemore, the frequency of switches is given by the desired switching fiequency of the system.

35.6 DC Capacitor
The rating of the DC capacitor (C&)depends on the DC voltage ripple (VdCf),and the peak amplitude of the cment drawn (1'). The voltage ripple is affected by the switching frequency
higher,f

a).
The

the lower the relative DC voltage npple. This capacitance for the wont case of the

modulation index cm be calculated using the following equation 161.

where kh is a correction factor given in [6] as 1.25. This factor is mainly introduced since sinusoida1 waveforms are considered for the calculation of the DC capacitor while the actual harmonies

wavefonns are triangular. Furthemore, in selecting of Cd,the V'has to be considered.

3.5.7 Rating Example


The example for the rating is chosen in order to be used for the experimental setup, therefore,

some constraints from the laboratory apply.


The consumer load is chosen with a power demand of 2500 watts at PF=I, and a line-to-line voltage (V,)of 110 volts at a frequency of 60Hz.Allowing 12% of the consumer power to be dissipated for the load goveming scheme and the losses in the controller such that:

P,

= 1246Pl,,

This indicates an induction generator with the rathg given in Appendix B. The induction generator rating is somewhat larger than the requirements, however, the rating of the prime mover is
w i t h the specifications. The controiier inductor is selected as 0.27 per unit.
The rating example is given for the case of single stage resistor (Rdcl)- Selecting Vdonn as 210

volts and considering the Pmh, one can calculate RkI as:

It is decided to use a voltage ratio of approximately 1 to 3 which gives a P, ratio of 1 to 9 for the

single stage resistor. This ratio impiies:


vdcmm E 600~0~tS

The DC capacitor can be calculated using equation 3.5.9 for a switching fiequency of ZlcHz, a
maximum modulation index of one, and Vd,ripple of 1 volt, dong with the rated current of the
induction generator as the maximum current d r a w by the VSI-based controller.

CHAPTER 4
Control Strategy
The regulation of the voltage and fiequency of the stand-alone induction generator is very sensitive to the load and prime mover variations. These disturbances can be categorized into slow and
fast types [2].

The slow disturbances represent srnail or slow changes in the system model, changes in operating
parameters, and srnaii variations in the head of water. A feedback regulator as proposed in [2] can

be used to control these slow disturbances but this is not considered in this thesis.

The fast disturbances stem from rapid changes in the load.

4.1 Fast Disturbances


If it is assumed that the hydro turbine is driven by a constant head of water where the change in

water flow is slow, then the major disturbance is due to sudden changes of real power and/or
power factor of the load. These are the fast disturbances that can be best controlled by immediately compensating the load current changes by adjusting the controller current as proposed in [2].
This compensation scheme is illustrated in Figure 4.1.1 where the relation among controller
generator (< ), and load

(z
),

(6), currents for an arbitrary resistive-inductive load is shown. The cur-

rent directions are chosen as shown in Figure 4.1.2.

Figure 4.1.1 The relation m o n g controiier, generator, and load currents for
an arbitrary resistive and inductive load.

Figure 4.1.2. Current directions used in drawing of Figure 4.1.1.

In order to compensate for the fast disturbances of the system a feedforward regulator is considered. Figure 4.2.1 demonstrates the relations among system space phasor currents. The controlier

command current is calculated as:

'*

ctd

i*
=tq

'Td - ild
= i;, + ilq
=

where the generator current is a reference value.

The load currents ild, and ilq are calculated using measured values of the currents ila. and ilb and
transforming hem into a synchronous h

e [2].

Figure 4.2.1. The feedforward control strategy.

The modulation index (m) and phase delay angle ( 6 ) can be related to the controller tenninal voltages (vpdq) of equation 3.3.28 such that:

where the

vpdq

are calculated by substituting the controller comrnand currents into the steady-

state equation 3.3.30.

Fxperimental Setup
Experiments are performed to smdy and verify the steady-state and transient behavior of the overail generating plant based on the developed model. Figure 5.1 shows the overail experimental

setup.
A DC machine emulates the prime mover and an induction machine is used as the generator. A

series RL load parallel with the controuer is connected to the terrninals of the induction generator.
Furthermore, a VSI connected to a DC capacitor, and a resistor on the DC side as well as capacitor on the AC side configures the VSI-based controller. This AC capacitor has smali capacitance
which together with the controiler inductance (L,) forms a fdter that attenuates higher order harmonics.
In order to process the sampled data from the system and output the desired switching pattern for
the VSI-based controller a General Propose Controlier (GPC)available in the laboratory is used.

Furthermore, the s t m p process is considered where the DC capacitor is precharged by an externa1 source.

5.1 Prime Mover


A DC machine is used as the equivalent hydro turbine. This

DC machine has a rated armature

voltage of 1 15 volts and a current of 3 1 amperes. The DC machine supplies the real power into the
induction generator. The assumption is made that the river has a constant head of water and the
turbine gate is opened to a fixed desired position. The torque-speed characteristic of the hydro tur-

bine is a saaight line defned by equation 2.1.1.

Figure 5.1.1 shows the setup for the DC motor which exhibits a torque-speed characteristic simi-

lar to a hydro turbine.

Garing Signais

VSZ-based Controller Including Filter Capaciror


Figure 5.1. The experimental setup of the self-excited stand-alone
induction generator, and the VSI-based controller.

50A

Resinon

DC-Motor

+
vf
Bridge
Rectifier

Figure 5.1.1 The DC motor setup which represents the hydro turbine.

1l0V

5.2 Induction Generator, Load, and Controller

The induction generator is a 3.7kW induction machine with a terminal voltage of 110 volts. This
squirrel cage Cpole induction machine is coupled to the DCmotor. Due to the smaiier ratings of
the DC motor the induction generator is always operated lower than its rated power. Appendix B

provides the name-plate data for this induction generator.


To the terminais of the induction generator a VSI-based controllcr together with a series RL load
is comected. The earlier design example parameter values discussed in section 3.5 are used for
this experimental senip and are refected in Table 5.2.1. The required Nter capacitor is calculated

in section 5.4.1.

Parameter

("I"I

Table 5.2.1. The parameten of the Generator Systern.

5.3 GPC Board


The General Propose Controller (GPC),which includes a Motorola microprocessor (MC68332).
provides a powerfid controlling unit 171. This unit is able to acquire, process, and output data at a

high speed The GPC also includes a Time Rocessor Unit (TPU) that generates many different

gating patterns including sinusoidal pulse width which is used for the VSI-based controiIer [8].

Figure 5.3.1 illustrates the microprocessor based instrumentation employed to monitor and con-

trol the seif-excited stand-alone induction generator.

Gating Signais

Sync unir
LP.F
Conversion
to Square Wme

Sync.

TL

Oscilloscope

Figure 53.1. The microprocessor based instrumentation for the experimental tests.

5.4 Software
Appendices C.and D include the flow chart of the program and the program algorithm. This program is written in C language using fmed point numben. Furthemore, the program takes advantage of lookup tables for calculations of square mot, and sine functions, to avoid calling C library

functions which takes a long time to execute.


The terminal voltage (Vp) of the VSI-based controiler is synchronized to the generated voltage

(VJ such that:

v. =

V,LO

A synchroning signal is generated by the synchronization unit s h o w in Figure 5.3.1 on every

rising edge of the generated voltage. This signai will trigger-anintempt which registers the time
of the zero crossing and sets a nag. The aigorithm wiU not process this event immediately. However, the program accounts for the delay t h e by measuring the difference between the intempt

and the a m a l process time. In addition, the frequency of the VSI terminal voltage is always
locked to the frequency of V, by using the time between two consecutive zero crossing of V'. This

flexibility enables the algorithm to synchronize to

V' even during the startup process when the

generator may be driven at a different frequency.

5.5 Operationai Considerations


In order to generate an almost distortion free generator voltage the use of a fdter capacitor is proposed. This filter capacitor is too s m d to effect self-excitation. For stamip and operation, the
induction generator is excited by the VSI-based controller, which requires an initiai charge in the
DC side capacitor or an extemal DC voltage.

55.1 Filter Capacitor


The fdter capacitor (CfilJ
introduces a small capacitance across the generator system. This capacitance is not adequate to initiate the excitation of the induction generator. Nevertheless, the reactive power contribution of the fdter capacitor wiii slightly assist the VSI-based controller. The
filter capacitor main purpose is to fdter the higher order harmonies rather than providing reactive
power for the system.

The fdter capacitor is connected to the terminais of the induction generator. The worst case design

scenario yields a combined model of the induction generator and the VSI-based controiier at no
Ioad. This model cm be simpMed and is shown in Figure 5.5.1. This simplification is mauily due
to the large inductance of the induction generator compared to L,, Table 5.5.1 shows the parmeters used for this model. The transfer fuaction for this mode1 follows:

(S.S. 1)

Figure 5.5.1. The simplified model used to detennine the filter capacitor.

Pararneter

Table 5.5.1. The Parameten used in Figure 5.5.1.

Given the data Table 5.5.1 and the worst case fkquency of 1880Hz, the magnitude of the transfer

5.6

function becomes:

Reference [9] gives the foliowing ratio for the worst case of Vk=2 l OVolts and modulation index
of one (m= I ) .

Therefore,

Figures 5.5.2, and 5.5.3 illustrate the generator voltage (Vsd) and current (i,)
the filter capacitor respectively.

with and without

Figure 5 5 2 . The generator voltage Vsab (a), and current,i with the filter capacitor.

Figure 55.3. The generator voltage Vsd (a), and current,i without the fdter capacitor.

An important issue in the excitation of the induction generator employing semiconductor elec-

tronics rather than a fixed bank of AC capacitors is the stariup process. The fdter capacitor does
not innoduce enough reactive power for the selfexcitation of the induction generator. The VSIbased conwller has to initiate the self-excitation process either in the presence or the absence of
the filter capacitor. Thus, an initial DC voltage on the DC capacitor is required. There are two
configurations suggested for pre-charging of the DC capacitor.
Method I .-

Figure 5.5.4 depicts the circuitry for startup where t h e car batteries at 12 volts each are connected in series.

Figure 5.5.4 The startup circuitry using car batteries.

The modulation index (m)and phase delay angle (6) wiil be controlled by the keyboard such that

V' is generated. As the

voltage V, starts increasing and selfexcitation begins, the voltage Vdc

builds up and the diode Dl wiU be reverse biased to protect the batteries.

Method 2:

In this method, a car bartery together with a boost converter is employed to pre-charge the DC
capacitor to approximately 300 volts. The boost converter only uses one battery and can provide
any level of Vdc.
O~en
Loo~
Contrul

The VSI-based controiler is started immediately afker the pre-charging of Cd, is camed out. The
control command for the modulation index and start of the VSI gating is entered from the keyboard.

In the former method the modulation index is set to approximately half its maximum value (i-e.
40%)and, after the gating signais are switched on, will be increased to a higher value (i.e. 80%).

Figure 5.5.5 shows the voltage and frequency during the startup process where the time interval
between switch on of the gating signals and the increase of the modulation index is mainly due to

the t h e required to enter commands fiom the keyboard.


Due to the larger Vd,in the second method the self-excitation wiil take place as soon as the gating
is switched on. Furthemore, the latter rnethod requires lower values of the modulation index (Le.
33%). Figure 5.5.6 illustrates the voltage and frequency wavefonns for the second method.
Svnchronitatiorz

The synchronization unit show in the block diagram of 5.3.1 wiil provide the synchronization
signal for the tenninal voltage of the VSI (Vp). This signal is generated if there exists enough

residual magnetism in the induction generator ( Vmb s 0.6 volt). However, the absence of the synchronization signal during stamip wiil have almost no eflect on the process, since the required
voltage for the synchronization unit is very small and generator excitation is very fast. Initially, no
synchronization is required as there is no initial voltage to synchronize to.

(b)
r(sd
Figure 5.55 The voltage (V')and frequency during startup using Method 1 with three
batteries in series, (a) with the fdter capacitor, (b) without the fdter capacitor.

vs 0.71
and

02

O -4

O 6

O8

(d)

12

1-4

16

18

t ( 4

Figure 5.5.6 The voltage (V')and frequency during stamip using Method 2 with Vk=300 volts,
(a) with the fdter capacitor, (b) without the Nter capacitor.

Many experiments were performed to verify the control capability of the VSI applied to the selfexcited induction generator. The induction generator is driven at approximately 80% of its rated
power throughout ail the experiments, due to the limited m a x i m m power of the DC motor. During these tests oniy a feedforward controller was employed to regulate the voltage and frequency

of the self-excited induction generator. The steady-state errors present in the results can be eliminated by employing a feedback controiier. M a y tests were canied out, some typicai results have
been selected to demonstrate the performance of the VSI-based controller. These experiments are
discussed in the foiiowing sections.

6.1 Resistive Load (Test 1)


This test represents a large change in the load with unity power factor. During this test the system
is configured such that the maximum reai power generated is delivered to a load resistance of 2
per unit. This load is suddenly disconnected fiom the generator system. As a result the real power

generated is directed to be consumed in Rd, by the controIIer such that the fkquency (B remains
unchanged. As shown in Figure 6.1.1 no noticeable transient appears in the voltage (VJ, fie-

quency ), or generator (4)ctment. Figure 6.1.2 illusnates the components of the load in the synchronous reference frame, and the coatroiier currents. The instantaneous controller and ioad
currents are shown in Figure 6.1.3.

OD2

O M

On6

rime of change

rime of change

O M

Of

0D8

006

0 4

016

018

(b)

t (sec)

(c)

t (sec)

(4

O08

Of

02

01 4

t (sec)

Figure 6.1.1. The results of pure maximum resisiive load (T'est 1) where the load is
totaiiy disconnected fkom the generator system, (a) voltage,
(b) frequency, (c) instantaneous voltage, and (d) generator cumnt.

.O5

0.05

0.1

0.1s

O2

(a)
v

O25

t (sec)
I

--2

3-

-0 -05

tirne of change

0 .os

0.1

0.1s

02

02s

(b)

-0 .os

O .OS

t (sec)

0.1

0.15

02

(d
1

056 h

OZ

t (sec)
I

b
I

4
V

u
*-

i
.

O
-0.0s

id
l

rime of change

0.05

O -1

0.1s

02

(4

0.25

t (sec)

Figure 6.1.2. The results of pure maximum resistive load (Test1) where the load is
totdy discomected fiom the generator system, (a) real, and (b) reactive components
of the load cumnt, (c) reai, and (ci) and reactive components of the controlIer current.

r .

am

OM

006

om

fime of change

001

*
01

013

014

(a)

O M

O D6

t (sec)

008

01

OU

0 14

(b)
t (sec)
Figure 6.1.3. The results of pure maximum resistive Ioad (Test 1) where the load is
totally disconnected fiom the generator system for,
(a) instantaneous controuer current, (b) instantaneous load current.

A m e r load change is appiied by recoanecting the fui1 resistive load to the system. The voltage

and frequency waveforms in addition to instantaneous generator and load currents are s h o w in

Figures 6.1.4 and 6.1.S. The cornparison of the voltage wavefoxms indicates that the sudden connection of the full resistive load to the generator system creates more transients than the disconnection of the load.

0-1

O -2

0.15

(4

0-25
t (sec)

1C

-a

*
8

1.

G0.5-

.
I

j dtime

of change

O .O5

AB

O 02

rimofchange

0.1

(b)

0.15

O -2

O -25
t (sec)

O D4

O06

O D8

O1

O U

014

(d

t (sec)

(4

t (sec)

Figure 6.1.4. The results of comecting a pure maximum resistive load (Test 1) to
the generator system. (a) voltage, @) frequency,
and (c) instantaneous voltage. and (d) htantaneous generator current.

Pm

rime of change

O 04

008

On6

01

O U

(a)

014

t (sec)

2
Y

-05

na
rime$change

O M

On6

008

01

O U

014

(b)

t (sec)

Figure 6.1 S. The results of connecting a pure maximum resistive load (Test 1) to
the generator system for the instantaneous, (a) controller, and (b) load currents.

6.2 Resistive Inductive Load with Power Factor 0.8 (Test 2)


A resistive-inductive load is used for this test such that a more realistic scenario can be examined.

The values of load resistor and inductor are chosen such that a power factor of 0.8 is obtained. A
sudden change in the load impedance is applied by connecting a series RL load where:

The resulting voltage and frequency are shown in Figure 6.2.l(a,b). Figure 6.2.l(c,d) shows the
generator and load currents. Figure 6.2.2 illustrates the instantaneous voltage and controller current in addition to load currents in the synchronous frame.

rime of change

,
OM

a
i
OD4

006

OD8

01

0.U

014

O16

018

(4
12

02

t (sec)
L

ODb

008

014

O16

O .i8

I
I

l
I

rime of change '

,
O

OD3

'Qi

O M

-OM

-On1

001

O M

-001

0.U

OD1

OLn

(4

03

t (sec)

003

004

ODS

0-

(4

rime of change

-0M

(dl

O M

0D8

t (sec)

0113

O M

0115

ODo

O M

t (sec)

Figure 651. The results of comecting a load with a PF=0.8 (Test 2) to


the generator system for the, (a) voltage. (b) kquency,
(c) instantaneous generator current, and (d) instantaneous load current.

0118

rime of chunge

t (sec)

(b)

tin& of change

033

3
L

.-2

- -+-

t (sec)
1

-:.

rime of c h g e
,:LY

-0

ns

O0 s

01

(d

OB

02s

03

t (sec)

Figure 6.23 The results of connecting a load with a PF=0.8 (Test 2) to


the generator system for the, (a) Instantaneous voltage, (b) Instantaneous
controiler curent, (c) real, and (d) imaginary components of the load cumnts.

6 3 Resistive and Inductive load with Minimum Power Factor (Test 3)


Although Test 2 depicts a real scenario where power factor is at 0.8, it is possible COtest the system under a load with maximum inductance. The voltage ard frequency variations are examined
while the load is approximately at a power factor of zero where:

Figure 6.3.1(a,b) shows the voltage and fiequency. The real and reactive components of load are
reflected in Figure 6.3. l (c,d).

r (sec)

1
I

'

tirne of change

iI

003

OD1

OD6

0D8

016

018

O2

t (sec)

02

0.2s

t (sec)

O2

t (sec)

Figure 63.1. The results of a resistive-inductive load with a minimum


power factor (PFE O ), (a) voltage, (b) frequency, (c) reai component,
and (d) reactive component of the load current.

022

6.4 Induction Motor Load (Test 4)


This experiment examines the direct switch-on of an induction motor. As it is depicted in Figure
6.4.1(a,b) the voltage dips about 9%. while the frequency remallis nearly constant. Part c, and d of

Figure 6.4.1 (c.d) show the instantaneous value for the generator voltage (V&,) and current (i,,).

The induction motor empioyed is a star comected, wound induction machine with the ratings
show in Table 6.4.1. Figure 6.4.2(a,b) shows the instantaneous and real components of the load
current respectively. As seen due to the huge in rush current of the induction motor the ioad current rises to about 1 per unit. The real and reactive components of the controiler current are s h o w

in Figure 6.4.2(c,d).

Parameter

Value

v d

115 Volts

Rated Speed

3600 rpm

Table 6.4.1. Name plate data of induction motor used in Test 4

O .OS

0.1

fa)

0.15

02

t (sec)

025

B
t
B
B

I
B

rime of change

'

t (sec)

O2

(4

r/me of change

orn E/ am

006

rrme of change

om

01

(4

t (sec)

a u

O 14

O J ~

O ~8

t (sec)

.Figure 6.4.1. Motor ioad test (Test 4) results, (a) voltage, (b) hquency. (c) instantaneous
generator voltage, and (d) instantaneous generator current.

01

02

03

rime of change

0s

OA

05

06

O?

OS

t (sec)

(a)

&

-3
O

-<

tirneOf C?

O1

03

03

O4

(6)

05

O*

03

09

t (sec)

Agure 6.4.2. The result of the motor load test (Test 4), (a) instantaneous load current,
@) real component of the load current, and (c) real component,
and (d) reactive component of controller cumnt.

6.5 Discussion
The experimental resuits show the excelient transient behavior of the selfexcited induction generator when regulated by the VSI-based controller. The cornparison of the test resuits indicates
almost no transients on the generated waveforms with an RL load. Some ansients arr observed,

if an abrupt change of a pure resistive load. Even with a sudden change of 100%in the resistive
load, the transients are minimal- This type of load change is very unrealistic, since under normal

operationai circumstances, the maximum typical change for such a s m d generator system is in
the range of 10% to 15%. The VSI-based controller regulates the generator system even under

direct switch-on of an induction machine.

CHAPTER 7
Conclusions
This thesis demonstrates the feasibility of employing a Voltage Source Inverter (VSI) to control
the flow of reai and reactive power in a stand-done induction generator plant. The VSI-based

controller wiU maintain the impedance observed by the induction generator at a constant value.
Hence, reguiation of the prime mover is not required.
A mode1 is used to detennine the behavior of the hydro turbine, induction generator, and load.

The differential equations describing the behavior of the VSI cootroUer are developed. These

equatioos can predict the dynamic and steady-state performance of the conwller. The overail system has been verified experimentaily.

7.1 Contributions
The major contributions of the thesis are:
1- Introduction of a VSI-based conaoller for regulation of voltage and frequency of selfsxcited

induction generator.
2- Total elimination of the large AC capacitor bank required for excitation of the induction gener-

ator employed by the earlier methods. The VSI controuer wiil provide not only the reactive power
required for the excitation of the induction generator at fidl load, but dso will compensate for any
inductive-resistive load. Nevertheless, a small fdter capacitor is comected to the generator output
terminais so as to eliminate the higher frequency harmonies.

3- Development of the control range and the rating of the VSI-based conwiler which provides
rating niles for the design engineer.

4- The controller &O deals with the

stamip

process. The VSI-based controuer can initiate the

excitation process if the DC side capacitor on the VSI has k e n pre-charged.

5- The experimentd results c o d i the predicted performance of the VSI-based controlier. The
experimental results also demonstrate the direct switch-on capability of an induction motor load
for the proposed system. To the best of this author's knowledge such a feature has not been
reported for the existing methods.

7.2 Suggestion for the Further Studies


Further recommendations for future research are given as follows:

1-Energy Conservation: It is possible to store the unwanted energy due to unloading for a short
duration of time in a bank of capaciton connected to the DC side of the VSI. The capacity of this

bank of capacitors is designed such that the gate on the hydro turbine cm be adjusted. The stored
energy is discharged into the load when the power dernand rises. Thus, adequate time is provided
for readjusnent of the gate.

2- Feedback Loop: In order to eliminate steady-state erron a feedback controiler has to be


designed. The design should consider the compensation for errors due to unsymmetrical loads.

References
[l] Elder, J. M., Boys, J.T., and Woodward, JL., 'The process of self-excitation in induction gen-

eraton", IEEE Proceedings. Pt. B. vol. 130, pp. 103- 108, No. 2, March 1983.
[2] R.M.A.S. Rajakaruna, Conmol of a Stand-Alone SelfExcited Induction Generator Drven by

an Unregulated Turbine, Ph.D. Thesis, Department of Electrical and Computer Engineering, University of Toronto, 1993.
[3] G.D.Hoops. Terminal Zmpedrce Control of a Capacitor Excited Induction Generator, Ph.D.

Thesis, Depanment of Electrical and Computer Engineering. University of Toronto, 1988.


141 E. Ruyter, Automatic Sturt-Up and Unbalanced Load Behavior of an Electronically Con-

nolled Induction Generator System, Diplornaufgabe Thesis, Elehotechnixhes Institut Universitat Karlsruhe, 1995.
[SI G.R. Slernon, ''Circuit models for poly-phase induction machines", Electric Machines and
Power Systems, No. 8, 1983. pp. 369-379
[6] R. Wu, Analysis And Control of Pulse- Width Modulated A C to DC Voltage Source Conver-

ers,Ph.D. Thesis, Department of Eleceical and Computer Engineering, University of Toronto,


1989.
[7] Motorola, User's Manual System lntegration Module MC68332 SIM, 1989.

[8]Motorola, Reference Munual T h e Processor Unit Md8300 Family, 1990.


[9] N. Mohan, T.M. Undeland and W. Robbins, Power Electronics. 2nd edn., John Wiley, New
York, 1995, pp. 228.

R. B o n e ~
S. Rajakaruna "Self-excited induction generator with excellent voltage and fkquency control", IEE Proc. Gener. Tranm- DLnrib. Vol. 145. No. 1. January 1998.

M. Tartibi, A Controlled Series Capacisor Schemefor Power Transmission Line,M.A.Sc. Thesis, Department of Electrical and Computer Engineering, University of Toronto.
D. Zhu. Small-Signal Modelling and Analysic of GTO Bused Static VAR Compensator, Solid-

State Series Capacitor. und Sfatic Phase ShjFter. M.ASc. Thesis. Department of Electrical and
Computer Engineering, University of Toronto.
L-Shndhar, B. Singh, C-S. h a , B. P. Singh and S. S- Murthy, "Selection of capacitors for the
self regulated short shmt self excited induction generatoi', IEEEPES winter meeting, 93 W M
226- 1 EC.

V,Blasko, V. Kaura, 'A New Mathematical Mode1 and Control of a Three-Phase AC-DC Voltage Source Converter", IEEE Tram. on Power Electronics. vol. 12, No-1, Jan 97, pp 1 16-123.

Appendix A

Per Unit Representation


The values of voltage, current, and fkquency of the induction generator are chosen as the base
values. The generated voltage is the pe&, he-to-neutral rated value, and the current is the peak
rated value.
Selected Base Values:

vl, = gvm..I-I

Volts

Considering the rated values of induction machine employed for the experirnental setup (given in
Appendix B)the base values for the generating system c m be derived as:

Vb = 89.81 Volts
Ib = 36.77 Amps

Zb = 2.443 R
Sb,rot = 4953.5 Volt .Amps
Q,

= 0.002653 sec

Lb= 0.006479 Henries


cb

= 0-001086Farads

Rb = 188.5 racsec

Jb = 0.0003698 Watt. s e 2

Experimental Apparatus
B.1 The Induction Generator
The induction generator used for the experimentai setup is a squirrel cage machine with the following ratings:
Vmed = 110 Volts. nnr. he-tu-line
irated = 26 Arnps,
fmrcd

nns

= 60 Hz

Prated

= h~

Number of Poles = 4
Rated Speed = 1730 rpm

The induction machine parameters in per unit system are:


Stator Resistance (R, ) = 0.034pu
Core-bss Resistance (R, ) = 181 pu
Rotor Resistance ( R , ) = 0.04 pu
Leakage Inductance (L,

= 0.34pu

B.2 The DC Motor


The prime mover has been sirnulated by a separately excited DC motor. The name plate data of
this DC rnotor is given as:
Armature Voltage (V,) = ii5 Volts
Armature Current ( i , ) = 31 Arnps
Field Voltage ( Vf ) = Il5 Volts

Appendix C

Microprocessor Program Flow Chart

Define Constants
and Variables

1 Initiaiize and setup TPU 1

w
FeedForward
Yes

Calculate Sync. Frame

Estimate Sync. Frame


Controller Currents

61
+
Calculate

Update

Microprocessor Programs

'program
keyb controls :
* a amplitude in % of amax set in program. One decimal
*
fraction is possible * p phase s h i f t from -35 to 3 5 degrees. One decimal
*
fraction is possible.
R +-un
GT1 turn gatings on
*

S stop

D On/Off feedforward

Typical e x m p l e for start-up process:


>a40

*
*

>Y

>R
>Y

>G11

>Y
>a80
>Y
*
Then i f the excitation h a s taken place can turn on the feed forward:
" >D
= >Y
*
*

*
*
*

*
*

*
*
*

switch n m e s
TPU channels
10 20
30
- > sl
s3 s5 - > ch2 ch4 ch6
11 21
31
s4
s6 s2
ch3 ch5 ch7
ch O switch pexiod
ch 1 sample period
ch 2-7 gating charnels
ch 8 ITC input capture for sync. time base T t R 2 (Msec)
ch 9 OC for Stop watch
/

* t ~ t ~ t t t ~ * * * ~ r t r t i * t * * r * ~ t r t * t f * * * t * < c t * t * r ~ * + * * * * * * * * * * t * t * ~ t *

/ * hardware m e m o r y map

#include "memap332.hm
/ * ====== constants,

variables ======== * /

#include "hextabls.hn
/ * table sine function 0-360 degrees * /
/ * global variables

*/

*/

/ * variables for data transfer to interrupt routines * /


unsigned short k a , loopflg;

unsigned short tl,t2,ilpcnt;


signed int in0,inl,in2,in3,vbc,ibIvalpha,ialpha,vdc,
out0,outl,out2,out3,o~t4,o~t5,0ut6,0ut7,out8,out9;
unsigned i n t swlocnt,swllcnt,sw2ocnt,sw2lcnt,sw3ocnt,sw3lcnt;

/ * variables for table look up + /


unsigned int tabpos,result;
signed short tabres ;

e x t e n void tepsaO(),teplaO(),tepsa40,tepla40,
pp-setup0 ,qsmsS82O ,keyb-i00 ;
/ * ===

FUNCTIONS

&

INTERRUPT ROUTINES ==== * /

/ * int TPU ch 1 * /
#pragma interrupt ( )
void dio-samp()
{ / * interrupt TPU ch 1 for
timing of s a m p l i n g and 1 / 0 through QSPI
analog input l a s t cycle,
analog output and telegrams in next cycle
analog 1/0 data format:
for fxp 1 . 0 p.u. -> signed short var = *pRXDF >> 3;
m i t e fxp to ch *pTXDE = (signed short var fxp) > 1;
if program QSMs582 is used, then :
analog in : in7, . - 6 ,- - 5 , . - 4
in0
*pRXDF, . .C, . . 9 , , .6 *pRXD3
analog o u t : out7..6..5..4..3..2,
out9 - - 8
*pTXDE..D..B..A..8-.7
*pTXD5..4
celegr 16 bit t o slave *pTXDO.-1
"pTXDO = ;-O
*pTXDl = 0 x 5 5 5 5 ;

/*

telegram # 1 dunany * /

= 0x9025; / * starts QSM


QSPI duration see init of QSM, check with Tsa

*pSPCR1

/ * Analog in * /
valpha = 'pRXD6 >> 3 ;
vbc = *pRXD9 >> 3;
ialpha = 'pRXDC >> 3 ;
ib = *pRXDF >> 3;
vdc = 'pFCD3 >> 3 ;

/ * Analog out * /
*pTXD7 = out2 >> 1;
'pTXD8 = out3 >> 1;

/ * Freq

*/

/*ictI

*/

! */

/*
/*
/*
/*
/*
/*

*pCHSp46
*pCH3p46
+pCH4p46
*pCH5p46
*pCH6p46
*pCH7p46

valpha * /
vbeta * /
vl
*/
vavl * /
vav2 * /
vav3 * /

= swlocnt; / * switch data next per * /


= swllcnt; / + coherent mite
*/
= sw2ocnt; / * for gating signals
*/
= sw2lcnt;
= sw3ocnt;
= sw3lcnt;

loopflg = Oxllll; / * set start flag algorithm loop * /

ka = *pCISR; *pCISR = OxFFFD; / * clear int ch1 * /


* end dio-samp + /

maintvoid)
{

/ * variables general infrastructure * /

for keyb-io *O/


static unsigned char letter;
static unsigned char kbflg = 0 x 5 5 ;
static signed int val,valf;
/ * for Loop and QSM sync flag * /
static unsigned int mlo,fsalO,cntdisp;
static unsigned short TEflg,kbstat;
/*O

/*

variables spec. program * /


static unsigned int swpercnt,swotcnt,fsmax,pwlcnt,
pw2cnt,pw3cnt,phil,phiincr,phi1208
phi24O,phiO,phiincr60,a~~,a~~l,aux2,
ml,m2,cntdio,spwmflg;
static signed int v a v 1 , v a v 2 , v a v 3 , m m 8 a m s , a m s b k , ~ , ~ 1 , x 2 , x 3 ,
x4,x5,fsel,x77,phic0,phic,phicin,phicbk~;
static unsigned short syncflg,synccntO,TCR2cnt
,TCR2cntO ,TCRlcnt ,TPUflgs ;
unsigned short *pAddress;

scatic signed int vpd,~pq.corcnt.syncper,freq,freqf.corfreq,


corfreqf ,degf temp,deg,degf,ffw;
static unsigned long LRchO,FTTch8,LTTch8,MichOT,NRchO,
NRchO~r,NRchODe.phicor,FTTch8Pr,L~~ch8~r,
LTTch8De,MCch8;
static int vbeta,ibeta,ilRl,ilIl,ilR,ilI,
ILRR, ILIR, ictR, ictI,v1,d e l t a ;

signed short sindel;


/ * set up / start infrastructure * /

/ * set up port F pin 3-0 for PLD control of gating * /


*pPfpar = Ox00FO;
/ * set pin 3-0 up as port F * /
*pDdrf = Ox000F;
/ * pin 3-0 out * /
/ * IRQ 7-4 still operative * /
/ * setup parallel port M68230 on GPC-board * /
pp-setup ( ) ; / * PA out, PB in, PC out for PLD control * /

/ * programing of PLD U14 controls of ch2..D

pin
PF3
2

setting
function
1 = on
ch2. ,ch7 gating on/off
ch3,5,6 inv for 4Q-chop 1 = inv
I
ch3,5,7 inv for VSI
1 = inv
O
mod with ch0
1 = no mod
PC7
chD,C gating on/off
1 = on
1 = on
4
chB,A gating on/off
f = on
3
ch9,8 gating on/off
2
chS,B,C inv for 4Q-chop 1 = inv
1
ch9,B,D inv for VSI
1 = inv
O
mod with ch0
I = no mod
for pwrn control of IGBT-VSI using ch2..7 for gating
-> no mod, ch3,5,7 inverted, PF3 pulses on/off
-> ch8-D no inv, on, no mod * /
*pPortf = 0x03; / * 0x03 off, OxOB on * /
"pPCDR = 0x99;
/ * initialize and start QSM
i n t ID $10, intv $50 -> $140 offset

no interruprs used * /
qsm5820; / * Ts = 180 + 0 x 2 5 * 1 . 9 = 250 usec * /
/ * init output data
ruri one cycle to set flag, get 1. data * /
'pTXDE = 0;
*pTXDD = 0 ;
'pTXDB = 0;
'pTXD8 = 0;
*pTXD7 = 0;
*pTXDS = 0;
*pTXD4 = 0;
*pTXDO = 0;
*pTXDI = 0;
* p S P C R l = 0x9025;
/ * start QSM * /
TEflg = *pSPSR; / * c e s c end of QSM cycle * /
while ((TEflg & 0x80) == O 1 { TEflg = *pSPSR;}

/ * general set up * /
*pTMCR = OxlAC1;
/ * 0.24 usec; int ID $1, presc=l
-> 16.777216 MHz/4 -> 0-238 418 5 usec
../16 -> 0.953 674 3 usec
Also TCR2 is set up to 262144 Hz * /
*pTICR = 0x0640;
/ * int req 6, intv $ 4 ->
~ $100 offset * /
/ + CAUTION 332Bug trap at $108 ! ! ! * /

/ * description of channel functions

ch O SPWM mode 2 links


ch 1 SPWM mode O or 1 sync t o ch 4(ch0)
ch 2,3 & 6,7 SPWM mode 1
ch4,5 DI0 set to zero!
ch 2. - 7 SPWM mode 1
Tsa >= Tsw,
ratio Tsa/Tsw must a l w a y s be an integer number * /
/ * values for setup of timing pattern : PWM & control * /
swpercnt = 2097; / + 2097 152 = 2kHz
4194 = I kHz = fsw
1398 = 3 kHz, 466 = 9 kHz
9 kHz very limited p w range!*/
fsmax = 100;
/ * in Hz fmax < fsw/15 * /
amax = OxOFSD; / * OxOFSD 2 kHz

0.94
3 kHz 0xOF09
0.87 max for 9 kHz OxODEB
for 1 H z OxOFAD * /
phi1 = 0; / * phi per unit = OxFFFF due t o
table structure of TBLS command
fxp 24.8 for resolution * /
xl = (Ox00041852*60) >> 16;
phiincr = ( ((swpercnt*4*xl) >> 12) *fsmax);
/ * fxp 2 4 . 8 for better resolution * /
*
scart frequency 0.2 % of fmax
incr = OxFFFF
Tsw
fsine */
phi240 = OXFFFF/3;
phil20 = phi240f2;

/*

start modulation index 1% of amax * /

x2 = ( 0 ~ 0 0 2 8 F 3 3 3 ~ 1>>
) 16;
ams = (amax ' x2) >> 1 2 ;

swotcnt = 10;

26
17
IS
10

/*

cnt
cnt
cnt
cnt

is
is
is
is

6.2 usec
4 usec measured 3.2 usec
3-58 usec
2.38 usec * /

pwo upper sw, pwl lower sw, phases 1,2,3


init average voltage vav 0.2 %
phase 1 at zero crossing * /
vavl = 0 ;
vav2 = -ans;
vav3 = ams;

/ * pw ideal,

pwlcnt =

(swpercnt

"(

pw2cnt =
pw3cnt =

(swpercnt
(swpercnt

swlocnt =

(pwlcnt

vavl) ) >>l3 ;
(1-vavl)/2) >> 12
OxOFFF + vav2)) >>13;
OxOFFF + vav3 ) )
;
OxOFFF

(swpercnt

/*
(
(

swotcnt) c < 16)

*/

swllcnt =

+ ( (swpercnt-pwlcnt+swotcnt) >> 1) ;
(pwlcnt + swotcnt)
16)
+ ( (swpercnt-pwlcnt-swotcnt) >> 1) ;

sw2ocnt = ((pw2cnt - swotcnt) cc 16)


+ ( (swpercnt-pw2cnc+swotcnt)>> 1 ) ;
sw2lcnt = ((pw2cnt + swotcnt) c < 1 6 )
+ ((swpercnt-pw2cnt-swotcnt) >> 1);
sw3ocnt = ((pw3cnt - swotcnt)
16)
+ ((swpercnt-pw3cnt+swotcnt)>> 1);
sw3lcnt = ( (pw3cnt + swotcnt) cc 16)
+ ( (swpercnt-pw3cnt-swotcnt)>> 1) ;
/ * set up parameter registers * /
/ * ch0 SPWM mode 2 , switch interval timing * /
*pCHOprO = 0x0092;
/ * f low, TCRl * /
*pCHOp46 = ( (swpercnt >> 1) < c 16) + swpercnt;
/ * coherent write, hightime = swpercnt/S * /
*pCHOpr8 = Ox660E;
/ * L st L cnt, dummy adr * /
*pCHOprA = 0;
/ * delay, only on start * /

/ * ch1 SPWM mode 1 , QSM algorithm timing * /


*pCHlprO = 0x0092;
/ * f low, TCRl * /

/ * Tsw = Tsa /
*pCHlp46 = ( 0x00640000 + (swpercnt-200));
/ * coherent write, hightime 25 usec, del -50 usec * /
'pCHlpr8
= 0x0200;
/ * adr 1, adr 2 ch O + /
/ * ch2 = switch 10, SPWM mode 1 linked * /
/ * f low, TCRl * /
*pCH2prO = 0x0092;
= swlocnt;
/ * coherent write , pw, del * /
'pCH2p46
/ * adrl, adr2 of ch O * /
*pCH2pr8 = 0x0200;

/ * ch3 = switch II, SPWM mode 1 linked * /


/ * f low, TCRl * /
*pCH3prO = 0x0092;
/ * coherent write, pw, del * /
*pCH3p46 = swllcnt;
/ * adrl, adr2 of ch O * /
*pCH3pr8 = 0x0200;
/ * ch4 = switch 20, SPWM mode 1 linked * /

*pCH4prO
'pCH4p46
*pCH4pr8

= 0x0092;
= sw2ocnt;
= 0x0200;

/ * f low, TCRl * /
/ * coherent write , pw, del * /
/ * adrl, adr2 of ch O * /

/ * ch5 = switch

*pCHSprO
'pCHSp46
*pCHSpx8

SI, SPWM mode 1 linked * /


0x0092;
/ * f low, TCRl * /
= sw2lcnt;
/ * coherent write, pw, d e l * /
= 0x0200;
/ * adrl, adr2 of ch O * /
=

/ * ch6 = switch 30, SPWM mode 1 linked * /


/ * f low, TCRl + /
*pCH6prO = 0x0092;
*pCH6p46 = sw3ocnt;
/ * coherent write , pw, del * /
*pCH6pr8 = 0x0200;
/ * adrl, adr2 of ch O * /

/ * ch7 = switch 31, SPWM mode 1 linked * /


/ * f low, TCRl * /
= 0x0092;
'pCH7prO
/ * coherent write, p w , d e l * /
*pCH7p46 = s w 3 l c n t ;
/ * adrl, adr2 of ch O * /
*pCH7pr8 = 0x0200;
/ * ch 9..D DIO, no parameter reg, * /
/ * ch8 ITC, input cap -> set flg * /

*pCH8prO = 0x0047;
*pCH8pr2 = Ox000E;
*pCH8pr4 = 1;

/*

(0007) for TCRI, TCR2. rising edge * /


/ * no li, dummy a&
*/
/ * c n t every transient * /

i * channel function registers group ch F..8 * /


/ * ch D,C,E DI0 , chF is zero*/
*pCFSRO = 0x0888;
*pCFSRl = Ox88EA;
/ * ch9 OC (8),ch8 ITC ch A-.B D I 0 * /

*pCPRO

= 0x1555;

*pHSQRO = Ox2AA9;

/ * ch E.,8 low pri,chF disabled * /


/ * ch8 is no link cont,

ch9..E upd with HSRl1,chF Disabled*/


/ * channel function registers group ch 7..0 * /
/ * ch7..4 SPWM*/
'pCFSR2
= 0x7777;
*pCFSR3 = 0x7777 ;
/ * ch 3 .O SPWM
/
= OxFFFF;
/ * ch 7..0 hi prio * /
*pCPRl
/ * ch7..1 m1,chO m2 * /
*pHSQRl = 0x5556;

*pHSRRO = 0x0800; / * Stop chD DI0 low


gating must be off * /
/ * set up i n t - > ch1 low-high (dio-samp) * /
ka = *pCISR; *pCISX = OxFFFD; / * clear int bit ch1 * /

= 0x0002;
/ * enable c h l i n t * /
move-w #$2500,SR " ) ;
/ * int vec ch1 o f f s e t 0 x 4 1 * 4 = 0x104 * /

*pCIER
asm("

intialize/start channel function reg ch F - - 8 * /


*pHSRRO = Ox3FFS; / * c h 9 OC(D) HIP,ch8 ITC int,
init ch A..E type 3,chF reset*/

/+

/ * intialize/start c h a m e l function reg ch 7..0 * /


'pHSRR1
= O U ;
/ * init ch7..0 i m e d a t e upd
/t********rt***t***t*tt**t*********tt*************

syncflg = *pCISR;

/
*pCfSR = OxFEFF; / * clear int bit ch8 * /

/ * other initializations * /

loopflg = 0x8888;
cntdio = 0;
phi1 = 0;
phicO = 15; / * 16*/
phicin = 182'phicO;

(ml)*/

ilpcnt = 0; / * interrupt loop * /

phic = phicin;

/*

freq = 18; / * intialize to 18 Hz * /


x l = (Ox0028FSC3*freq) >> 16;
/ * start frequency 60% of fmax (60 Hz) * /
phiincr = ( (swpercnt*fsmax*xl) >> 10) ;
/ * incr = OxFFFF
Tsa * fsine
t s a = ilpcnt*Tcl, T c l = 1.2topower22
phiincr is 8 - 2 4 format * /
*/

-------------------'"""'----'-------------------------

TCR2cnt = O;

T C R l c n t = 0;
synccntO = 0;
pAddress = (unsigned short

*)

0x0880;

ffw = 1;

ILRR = 3400;
ILIR = 3400;

/ * NO load Max-ILR.R=l4-7A~ns= ictR * /


/ * Always required at leas t I L I R = 1 4 . 7 A r m s

*/

/ * === program loop ==== * /

/*--------------------

sync-------------------------- * /

syncflg = *pCISR;
if ((syncflg & 0x0100) == OxOlOO 1
{

phil = 0;
/ * stopwatch * /
*pHSRRO = 0x0004;
TPUflgs = 'pHSRRO;
while((TPUflgs & Ox000C) ! = 0)
TPUflgs = "pHSRRO;
T C R S c n t = 'pTCR2;
/ * correction + /
corcnt = T C R 2 c n t - 'pCH8pr8;
i f (corcnt < 0)
corcnt = OxFFFF + corcnt;
phicor = corcnt*IS:

/ * Frequency lock * /
syncper = 'pCH8pr8 - synccnt0;

if(syncper < 0)
syncper =OxFFFF + syncper;
phiincr = 2199023616/syncper;
out2 = 16515072/syncper;
synccntO = *pCH8pr8;
*pCISR = OxFEFF; / * clear int bit ch8 '/
1
/ * Limit vdc to 175 to 615 volt DC. '/

/*

if ( (vdc > OxOOOOOE2B) 1


if(vdc > Ox00000E2B)

(vdc < OxOOOOO3E8)) * /

C:

*pHSRRO = 0x0800;

*pPortf = 0x03;

/ * Stop chD DI0 high * /


/ * gating off, no inv * /
/ * sl/off * /

*pPADR = 0x00;
1
/ * vdc=400 => sl/on * /
if(vdc > 0x00000924)
*pPADR = *pPADR

0x04; * /

if ( f f w == -1)
vbeta = (Ox093D
(valpha + 2*vbc)) >>12;
vl = ((valpha * valpha) + (vbeta vbeta)) >>12;
if (vl <= OxOFFF)
{

tabpos = vl <<4;
asm ( ' MOVE. L -tabpos ,DO * ) ;
asm(' TBLS-L -sqrttab,DO " 1 ;
asm(" M0VE.L DO,-result " ) ;
VI = result;
1
else
C

tabpos = vl ;
asrn(" M0VE.L -tabpos,DO " 1 ;
asm(" TBLS-L -sqrttab,DO ' ) ;
a s m ( " M0VE.L DO,,result
") ;
vl = result << 2 ;

1
if (vl==O)vl = 1;
ibeta = (Ox093D
(ialpha + 2*ib)) >>12;
ilRl = ((ialpha'valpha) + (ibeta'vbeta))
/ vl;
il11 = ( (ibeta'valpha) - (ialpha'vbeta) ) / vl;

/*Imaginary and Real part of load currents * /


Turn 30 deg * /
ilR = ( (ilRl*OxODDB) >>I2) - (ilIl / 2) ;
il1 = ( (ii1l'OxODDB) >>12) + (ilR1 / 2 ) ;
/

/ * calculate controller current * /


ictR = ILRR - ilR;
ict1 = ILIR - ilI;
/ * Calculate delta and modulation index * /

vpd = -ictR/SO + ictI/l2 + 1839;


vpq = -ictI/50 - ictR/12;

tabpos = del;
asm(" M0VE.L -tabpos,DO " ) ;
asm(" TBLS-W arctantab,DO
asm(" M0VE.W DO,-tabres " ) ;
delta = tabres;

");

phictemp = phicin - delta; / * rernove after tesring*/

out3 = delta; out7 = rmn;

t
case 1: out4=ictR; out5=ictI>>l;
break;
case 2 : out4=0;
out5=0;
break;
case 3: out4=ictR; outS=ictI>>I;
break;
case 4: out4=0;
out5=0;
cntdisp = 0;
break;
1
am =

mm;

phic = phicin

delta;

1 / * end of ffw * /
else
(

phic = phicbk;
am = amsbk;
1

/*-----------Gating sine furictions from table------------- * /


phi1 = phi1 + phiincr;
/ * 8.24 -> integer * /
phi0 = (phil >> 8) + phic + phicor;
tabpos = phi0;
/ * table read out signed 4-12 1.0 p.u.
a s m ( ' move.1 -tabpos,DO " 1;
asm( " TBLS-W -sintab,DO " 1;
asm( ' move .w DO ,,tabres " ) ;
vavl = (ams
tabres) >> 12;

*/

tabpos = phiO
asm( "
asm( "
asm( "
vav2 = (ams *

/*

+ phil20;
move. 1 -tabpos, DO " ) ;
TBLS.W -sintab,DO ' 1 ;
move-w DO,-tabres" 1 ;
tabres) >> 12;

tabpos = phi0 + phi240;


a s m ( * move.1 -tabpos,DO " 1 ;
asm( " TBLS.W ,sintab,DO ' ) ;
a s m ( ' rnove-w DO,-tabres' ) ;
vav3 = (ans
tabres) >> 12;
out7 = vavl; out8 = vav2; out9 = vav3;*/
/ * update PWM pulsewidth sinusoidal * /
pwlcnt = (swpercnt * ( OxOFFF + vavl) ) >>13;
/ * (swpercnt * (1-vavl)/2) >> 12
pw2cnr = (swpercnt * ( OxOFFF + vav2)) >>l3;
pw3cnt = (swpercnt * ( OxOFFF + vav3)) >>13;

*/

16)
swlocnt = ((pwlcnt - swotcnt)
+ ( (swpercnt-pwlcnttswotcnt) >> 1);
swllcnt = {(pwlcnt + swotcnt) << 16)
+ ( (swpercnt-pwlcnt-swotcnt) >> 1);

sw2ocnt = ((pw2cnt - swotcnt) << 16)


+ ((swpercnt-pw2cnt+swotcnt) >> 1);
swtlcnt = ((pw2cnt + swotcnt) cc 16)
+ ( (swpercnt-pw2cnt-swotcnt) >> 1) ;
sw3ocnt = ((pw3cnt - swotcnt) <c 16)
+ ( (swpercnt-pw3cnt+swotcnt
1 >> 1) ;
sw3lcnt = ( (pw3cnt + swotcnt) cc 16)
+ ((swpercnt-pw3cnt-swotcnt) >> 1);
/ * end PWM control * /

/ * Al1 keyboard 1/0 done at the end of the algorithm, as it is


uncritical in timing, and if once beyond sample t h e
it is unlikely to cause problem + /

if (kbflg == 0-1

switch (letter)
I:
case ('R') :
*pHSRRO = 0x0400;
break;
case ( ' S ' ) :

/ * R u n chD DI0 high * /

/ * Stop chD DI0 low * /


*pHSREtO = 0x0800;
/ * gating off,no inv * /
* p ~ o r t f= 0x03;
break ;
case ('G') :
/ * gating o f f , n o inv * /
* p P o r t f = 0x03;
if (val == Il)
/ * gating on * /
{ *pPortf = OxOB; 1
break;
/ * phaseshift c o n t r o l * /
case ( ' p ' ) :
/ * input in xxx degrees < 180 * /
if (val > 30)
val = 3 0 ;
i f (val < -30) val = -30;
val = val - phic0;
i f (val > 0)
phic = 182*(360-val) + 0x00000012*val;
else
p h i c = -182*val - 0x00000012*valf;
phicbk = phic;
break;
case ('a'j :
/ * sine amplitude control * /
/ * input in m . x % of amax * /
if (val '> 100) f val = 100; )
if ( v a l < (-100)) { val = (-100); )
xl = ( (OxO028FSC3*val) + (Ox00041893*valf)) >> 16;
ams = ( xl *eamax) >> 12;
amsbk = ams;
break;
case ('D') :
/ * ffw * /
ffw = - f f w ;
break;
} / * end switch letter * /
kbflg = 0 x 5 5 ;

1
/*------------------

test for new input---------------- * /


keyb-io(&kbflg,&letter,&val,&valf) ;
/ * keyboard i n t e r f a c e , input in succesive loop cycles
keyboard input, req. tirne < 40 usec,
placing at end o f loop, means update of variables
in next loop; it avoids cumulative extra loop t h e
for keyb-io routine and! update procedure * /

if (letter == ' E u )
( rnlo = O; letter = OxEE;
*pHSRRO = 0x0800 ;
*pPortf = 0x03;

/ * exit to 332Bug

.*/

/ * Stop chD D I 0 low * /


/ * gating o f f , n o inv * /

/ * loop execution length indicator * /


*
tepsa40;*/

1 / * end program LOOP d o == 2


}/*

end main * /

/ * ====================== END MAIN PROGRAM

==================== * /

/********************************************************
* this file provides functions for the table look up
*
command TBLS. Each table has 257 values (and 7 fiIl
*
up values O-).
The tables are in per unit based
*
on a 4.12 fixed point number (signed 2's complement)
*
OXOFFF = +1.0 p.u. , O X F O O O = - 1 - 0 p . u .
*
The tables are generated with the program tabgen-pas
*
which generates any desired function in p - u . values,
*
f irst in decimal format and then generates the f ixed
*
point format, which can be readily imported to the
*
constant declaration of the C-program.
**********************************************************/

const signed short arctantab[264] = {


0x0000,0x001D,0x0039,0x0056,0x0072,O~OO8F,O~OOAB,OxOOC8,
0x00E4,0x0101,0x011D,0x013A,0x0156,0x0173,OxOl8F,OxOlAC,
0x01C8,0x01E5,0x0201,0x02~E,0x023A,0x0256,OxO273,OxO28F,

0x02AC,0x02C8,0x02E4,0x0301,0x031D,0x033A,OxO356,OxO3728
0x038F,0x03AB,0x03C7,0x03E3,O~O4OO,O~O41C,OxO438,OxO4S4,
0x0471,0x048D,0x04A9,0x04C5,0x04E~,O~O4FD,OxO5l9,OxOS36,
0x0552,0x056E,0x058A,0x05A6,0x05C2,0x05DE,OxO5F9,OxO6l5,

IMAGE EVALUATION
TEST TARGET (QA-3)

APPLIED
J M G E . lnc
=
1653 East Main Street
-.
Rochester. NY 14609 USA

----=
,

Phone: 716/4824W

F m 7161288-5989