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DATA SHEET
TDA8356
DC-coupled vertical deflection
circuit
Product specification
Supersedes data of 1998 Sep 07
File under Integrated Circuits, IC02
1999 Sep 27
Philips Semiconductors
Product specification
TDA8356
FEATURES
GENERAL DESCRIPTION
PARAMETER
MIN.
TYP.
MAX.
UNIT
DC supply
VP
supply voltage
14.5
25
Iq
30
mA
IO(p-p)
Idiff(p-p)
600
Vdiff(p-p)
1.5
1.8
IM
VFB
50
Vertical circuit
Flyback switch
storage temperature
55
+150
Tamb
25
+75
Tvj
150
ORDERING INFORMATION
TYPE
NUMBER
TDA8356
1999 Sep 27
PACKAGE
NAME
SIL9P
DESCRIPTION
plastic single in-line power package; 9 leads
VERSION
SOT131-2
Philips Semiconductors
Product specification
TDA8356
BLOCK DIAGRAM
VP VO(guard)
VFB
6
VP
CURRENT
SOURCE
VP
TDA8356
7
VO(A)
I drive(pos)
IS
IT
IT
I drive(neg)
V I(fb)
VP
V
IS
4
VO(B)
5
GND
MGC091
1999 Sep 27
VO(A)
VO(B)
Philips Semiconductors
Product specification
TDA8356
PINNING
FUNCTIONAL DESCRIPTION
SYMBOL
PIN
DESCRIPTION
Idrive(pos)
Idrive(neg)
VP
VO(B)
output voltage B
GND
ground
VFB
VO(A)
output voltage A
VO(guard)
VI(fb)
handbook, 2 columns
I drive(pos)
I drive(neg)
VP
VO(B)
GND
V FB
VO(A)
Thermal protection
VO(guard)
V I(fb)
TDA8356
MGC092
During flyback
During short-circuit of the coil and during short-circuit of
the output pins (pins 4 and 7) to VP or ground
During open loop
1999 Sep 27
Philips Semiconductors
Product specification
TDA8356
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
DC supply
VP
supply voltage
VFB
non-operating
40
25
50
Vertical circuit
IO(p-p)
note 1
VO(A)
52
1.5
Flyback switch
IM
storage temperature
55
+150
Tamb
25
+75
Tvj
150
tsc
short-circuiting time
hr
note 2
Notes
1. IO maximum determined by current protection.
2. Up to VP = 18 V.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
Rth vj-c
Rth vj-a
1999 Sep 27
CONDITIONS
in free air
VALUE
UNIT
K/W
40
K/W
Philips Semiconductors
Product specification
TDA8356
CHARACTERISTICS
VP = 14.5 V; Tamb = 25 C; VFB = 45 V; fi = 50 Hz; II(sb) = 400 A; measured in test circuit of Fig.3; unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
DC supply
VP
VFB
IP
supply current
9.0
14.5
25
VP
50
no signal; no load
30
55
mA
Vertical circuit
VO
13.2
LE
linearity error
IO = 2 A (p-p); note 1
IO = 50 mA (p-p); note 1
VO
40
VDF
IO = 1 A;
Idiff = 0.3 mA
1.5
Ios
Idiff = 0;
II(sb) = 50 to 500 A
40
mA
Vos
Idiff = 0;
II(sb) = 50 to 500 A
24
mV
VosT
Idiff = 0
72
V/K
VO(A)
DC output voltage
Idiff = 0; note 2
6.5
V 7-4
open-loop voltage gain ----------
V 1-2
notes 3 and 4
80
dB
V 7-4
open loop voltage gain ---------- ; V 1 2 = 0
V 9-4
note 3
80
dB
dB
40
Hz
Gvo
VR
V 1-2
voltage ratio ---------V 9-4
fres
GI
5000
GcT
104
II(sb)
50
400
500
IFB
during scan
100
PSRR
note 6
80
dB
VI(DC)
DC input voltage
2.7
VI(CM)
II(sb) = 0
1.6
Ibias
II(sb) = 0
0.1
0.5
IO(CM)
0.2
mA
1999 Sep 27
Philips Semiconductors
Product specification
SYMBOL
TDA8356
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Guard circuit
not active;
VO(guard) = 0 V
50
2.5
mA
IO = 100 A
4.6
5.5
maximum leakage
current = 10 A;
40
output current
IO
VO(guard)
Notes
1. The linearity error is measured without S-correction and based on the same measurement principle as performed on
the screen. The measuring method is as follows: Divide the output signal I4 I7 (VRM) into 22 equal parts ranging
from 1 to 22 inclusive. Measure the value of two succeeding parts called one block starting with part 2 and 3 (block 1)
and ending with part 20 and 21 (block 10). Thus part 1 and 22 are unused. The equations for linearity error for
adjacent blocks (LEAB) and linearity error for not adjacent blocks (LENAB) are given below:
a max a min
ak a( k + 1 )
LEAB = --------------------------- ; LENAB = -----------------------------a avg
a avg
2. Related to VP.
3. The V values within formulae relate to voltages at or across relative pin numbers, i.e. V7-4/V1-2 = voltage value across
pins 7 and 4 divided by voltage value across pins 1 and 2.
4. V9-4 AC short-circuited.
5. Frequency response V7-4/V9-4 is equal to frequency response V7-4/V1-2.
6. At V(ripple) = 500 mV eff; measured across RM; fi = 50 Hz.
1999 Sep 27
Philips Semiconductors
Product specification
TDA8356
2.2 k
VFB
VO(guard)
8
VP
I I(sb)
TDA8356
signal
bias
7
1
I drive(pos)
R CON
3 k
I drive(neg)
R = 6.0
FEEDBACK 9
INPUT
I diff
2
R M = 0.7
4
signal
bias
I I(sb)
5
GND
MGC093
I diff
I sb
I sb
I sb
0
I diff
I diff
R CON
TDA8356
I diff
2
I sb
I sb
I diff
MGC094
1999 Sep 27
I sb
Philips Semiconductors
Product specification
TDA8356
APPLICATION INFORMATION
VFB
VO(guard)
8
II(sb)
TDA8356
signal
bias
100
nF
100
F
V
FEEDBACK 9 I(fB)
INPUT
Idiff
2
4 VO(B)
II(sb)
5
GND
VP = 13.5 V; IO(p-p) = 1.87 A; II(sb) = 400 A; Idiff(p-p) = 500 A; VFB = 42 V; tFB = 0.6 ms.
1999 Sep 27
100
nF
1
RCON
3 k
signal
bias
10
F
VP
7 VO(A)
Idrive(pos)
Idrive(neg)
10
nF
MGC095
I(coil)
deflection coil
L = 10.7 mH
R = 6.2
RM = 0.8
Philips Semiconductors
Product specification
TDA8356
PACKAGE OUTLINE
SIL9P: plastic single in-line power package; 9 leads
SOT131-2
non-concave
Dh
D
Eh
A2
seating plane
B
E
A1
b
c
1
9
e
w M
bp
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A1
max.
A2
b
max.
bp
D (1)
Dh
E (1)
Eh
Z (1)
mm
2.0
4.6
4.2
1.1
0.75
0.60
0.48
0.38
24.0
23.6
20.0
19.6
10
12.2
11.8
2.54
3.4
3.1
17.2
16.5
2.1
1.8
0.25
0.03
2.00
1.45
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
92-11-17
95-03-11
SOT131-2
1999 Sep 27
EUROPEAN
PROJECTION
10
Philips Semiconductors
Product specification
TDA8356
The total contact time of successive solder waves must
not exceed 5 seconds.
SOLDERING
Introduction to soldering through-hole mount
packages
Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 C, contact may be up to 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods
SOLDERING METHOD
PACKAGE
DIPPING
DBS, DIP, HDIP, SDIP, SIL
WAVE
suitable(1)
suitable
Note
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Sep 27
11
Internet: http://www.semiconductors.philips.com
SCA 68
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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
545004/03/pp12
Sep 27