1

A Novel Bidirectional DC-DC Converter with ZVS

and Interleaving for Dual Voltage Systems in
Automobiles
Philip Jose

Ned Mohan

Department of Electrical Engineering

University of Minnesota
200 Union Street SE
Minneapolis, MN 55455, USA
philip@ece.umn.edu
mohan@ece.umn.edu
Abstract This paper presents a novel bidirectional dc-dc converter for 42V/14V dual voltage systems in automobiles. The converter uses Clamped Zero voltage Switching to minimize loses, and
interleaving for reduced current ripple. SABER simulations are
presented to verify the design. The simulation results are confirmed by hardware implementation.

I. I NTRODUCTION
The requirement of a higher electrical system voltage in automobiles has now been widely acknowledged ([1]), and efforts
are on to formulate standards for the same. The MIT/Industry
Consortium for Advanced Automotive Electrical/Electronic
Components and Systems led by the Massachusetts Institute of
Technology, Boston has chosen 42 volts as the preferred electrical system voltage for automobiles of the future. In the short run
however, it is proposed for new automobiles to have two voltage systems onboard till the components and technology for 42
V systems are fully developed. Several architectures are studied for managing two voltage systems in an automobile, many
of them requiring a bidirectional dc-dc converter which interfaces the 42 V and the 14 V electrical subsystems. This paper
explores the possibility of using a simple buck converter featuring clamped Zero Voltage Switching [2] for reduced switching
losses so that the converter can be run at high switching frequencies. To circumvent the problem of high current ripple in
the proposed ZVS scheme, a number of such converters can be
interleaved. Output current sharing for the converters is based
on the scheme proposed by [3].
Section II describes the design of the converter. Experimental
results are presented in section III.
II. D ESIGN
The converter outline is shown in Fig. 1. N converters connected in parallel transfer power between the 42 V bus and the
14 V bus. The voltage error is amplified by the voltage controller, which generates a current reference. This current reference is equally shared by the current controllers . That is, the
current reference divided by the number of converters is given
to each current controller. Each converter then works in average current control. The inner current control loop is designed

using average model analysis of power converters. H control

[4] is used to design a robust current controller which is insensitive to fluctuations in the input voltage. Further, input voltage
feed forward is used to improve the response of the converter so
as to avoid high startup currents. The converters are interleaved
so as to reduce the ripple in output current.

Fig. 1. Outline of Converter

A. Controller Design
The converter has an inner current loop to facilitate current
sharing across several parallel converters. The current controller has to be insensitive to fluctuations in the input and output voltages, and also the load, which is essentially the internal
resistance of the 12 V battery. To achieve these goals, H
control is used with appropriate weighting functions. First, the
converter is modeled in an average sense [5] with the duty ratio
command as input, and the input and output voltages as disturbances (see Fig. 2). The effect of switching frequency is
modeled as a noise input which adds on to the current output.
The weighting functions are chosen so as to give a high steady
state open loop gain, and also to make the controller insensitive
to switching frequency. Hence the weighting function Wn is a
cascade of two transfer functions, as given in eq. 1, one to increase sensitivity at low frequency, and the other to decrease the

0-7803-7420-7/02/$17.00 2002 IEEE

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sensitivity at the switching frequency. A weighting function is

also added to the measured inductor current to model the bandwidth of measurement circuit. The chosen weighting functions
are:

Wi

1.5 1011 s2 + 0.00021s + 0.15

1 1010 s2 + 0.0028s + 1
5.674 1013 s2 + 1.337 105 s + 0.07
4.053 1013 s2 + 1.91 106 s + 1
1

Wo

Wz

Wn

1
1.592 107 s + 1

Fig. 3. Hysteresis control for current limiting

(1)

Fig. 4. Duty cycle feedforwarding

Fig. 2. Current controller design

B. Zero Voltage Switching

The controller is designed using MATLAB and the suboptimal controller Kc is reduced in order to yield a third-order
controller.
In order to avoid transient high currents, hysteresis control
is added which kicks in when the inductor current goes above
or below the operating region (see Fig. 3). Further, the input
voltage is sensed to predict the duty cycle. For the converter,
Vo

DVin

(2)

where Vo is the output voltage

Vin is the input voltage
and D is the duty cycle
Now, Vin can be expressed as a variation Vin about a nominal Vin,nom . That is,
Vin

= Vin,nom + Vin

In order to reduce switching losses and improve efficiency

of the converter,the converter uses Zero Voltage Switching with
switch voltage clamped to the input voltage as shown in Fig.
5. As switch T1 is turned off, the inductor current charges capacitor C1 to input voltage and discharges C2 to zero voltage
when the antiparallel diode of T2 starts conducting. Switch T2
can then be turned on. The value of the capacitances and the
dead-time between the high and low side gate pulses are critical to obtain proper ZVS operation. Another constraint is that
the inductor current has to reverse in each cycle so that ZVS
is effective when T2 is turned off and T1 is turned on. This
then means that the inductor peak-peak ripple has to be a little
more than double the maximum average current expected. This
large ripple is indeed a problem, which however is alleviated by
interleaving.

(3)
(4)

Eq. 3 can then be rewritten as

D

=
=

Vo
Vin,nom + Vin
Vo
1
Vin,nom 1 + VVin
in,nom
Vo
Vin,nom
2Vo
Vin,nom

Vin
)
Vin,nom
Vo Vin
2
Vin,nom

(1

Fig. 5. Clamped Zero Voltage Switching Power Circuit

(5)

The expression for duty ratio obtained in Eq. 5 is used to predict the nominal duty cycle about which the controller operates.

The circuit was simulated using SABER to determine the values of capacitors C1 and C2, and the deadtime which gave optimum performance. Zero Voltage Switching Waveforms for the

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lower MOSFET are given in Fig. 6.

zero, and the drain-source voltage falls to zero before the gatesource voltage starts to rise, indicating zero voltage turn on and
zero current turn off.

Fig. 7. Clamped Zero Voltage Switching during no load

Fig. 6. Simulation results of Clamped Zero Voltage Switching of Lower MOSFET

C. Interleaving
As mentioned in the previous section, proper ZVS operation
requires that inductor current flows in either direction in each
cycle, which necessitates large inductor current ripple. However, by paralleling several converters and phase shifting their
gate pulses appropriately, this ripple can be reduced to a great
extend. Hence a programmable delay circuit is incorporated
into the gate drive of the converter.
D. Voltage controller
Once the design of the current controller was completed, the
outer voltage loop can be designed. Since the current loop is
much faster than the voltage loop, it could be assumed that the
inductor current is exactly same as the current reference. A
simple integral converter suffices for voltage control so that the
steady state error was zero.

Fig. 8. Clamped Zero Voltage Switching during full load

III. I MPLEMENTATION AND E XPERIMENTAL R ESULTS

The converter was built in two parts: a voltage board, which
generated the current reference, and also the master clock, and
several current controlled ZVS converter boards which were
connected in parallel.
B. Current Loop
A. Zero Voltage Switching
The converter was first tested to see if Zero Voltage Switching was functioning properly. Figures 7 and 8 shows the lower
MOSFET gate-source and drain source voltages, during noload and full-load operation. The MOSFET drain-source rises
only after the gate-source voltage (i.e., drain current) fall to

The current controller was implemented using a linear

OPAMP circuit. The step response of the current loop is shown
in Fig. 9. Fig. 10 shows that the controlled inductor current is
insensitive to a disturbance in input voltage.

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Fig. 9. Step response of current loop

Fig. 11. Effect of interleaving on output current ripple

IV. C ONCLUSION
A bidirectional converter for use in dual voltage systems in
automobiles is presented. Zero Voltage Switching and output current interleaving are implemented for reduced switching
losses and current ripple. Interleaving also helps to modularize
the converter design for use in higher power applications. The
design was carried out using MATLAB and verified by SABER
simulations. Experiment observations confirm simulation results.

Fig. 10. Effect of input voltage fluctuation

C. Interleaving
Two converters were interleaved to observe the effect on output ripple current. Fig. 11 shows the results of the experiment,
with the delay between the two boards set to half the switching
time. There is significant reduction in ripple current. The ripple
would be even lower with more converters in parallel.

R EFERENCES
[1] Kassakian, J. G, Automotive Electrical Systems - The Power Electronic
Market of the Future, APEC 2000, vol. 1, pp 3-9.
[2] Henze, C. P, Martin, H. C and Parsley, D. W, Zero-Voltage Switching
in High Frequency Power Converters using Pulse Width Modulation,
APEC 1988, pp 33-40.
[3] Bhinge, A., Mohan N., Giri, R. and Ayyanar R., Series-Parallel Connection of DC-DC Converter Modules with Active Sharing of Input Voltage
and Load Current, APEC 2002.
[4] Zhou, K., Essentials of Robust Control, Prentice Hall, 1998
[5] Nirgude, G., Tirumala, R., Mohan, N., A new, large-signal average
model for single-switch DC-DC converters operating in both CCM and
DCM, Power Electronics Specialists Conference, 2001. PESC. 2001
IEEE 32nd Annual, Volume: 3 , 2001

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