I

I
x
~

f
i

I
1

Appendix A
Manufacturers' Data Sheets

I
I

I
I

279

N
00
0

~National

Recommended Operating Conditions

~Semiconductor

Symbol

DMMOO/DM7400 Quad 21nput NANO Gates

..........

Yee

Supply Voltage

v,"

High left! Input

Voltage

Y1L

0115400

0117400

llln

Mom

llu

11111

Nom

llax

4.5

5.5

4.75

5.25

Absolute Maximum Ratings (Not 11

Thi d9Ylce conlal111 lour Independent gates each of

Supply Voltage
Input Voltage
Storage Temperature Range

which performs lhe logic NANO function.

Low Leval lnpul

ll

mA

laL

Low Lave! Outpul

Current

111

18

mA

TA

Free Alt Operating

Temperature

70

Inputs
A

l
e.

:z:
!.

i!(>

L
L
H
H

;,

..

L
H
L
H

Symbol

Pa...-W

v,

Input Clamp Voltage

Yeee Min, 11c -12 mA

YaH

High Level Output

VOitage

Yee. Min, IOH. Max

Y1LMax

Low Level Output

Yee. Min, la1. =Max

Y1HMln

Outpul

H
H
H
L

(Nole1)

llax

-1.5
2.4

3.4
0.2

Unh1

0.4

YeeMax, Y15.5Y

mA

11"

High Lave! lrciut

Cunent

YeeMax, Y12.4Y

40

.A

l1L

Low Lave! lnpul

Current

Yee Max, Y1 a 0.4Y

-1.6

mA

los

Short Circuit

Yee=Max

DM54

(Nol 2)

DM74

-55
-55

mA

Output Cutten!
leeH

Supply Current With

Output High

Yee a Max

mA

lccL

Supply Current With

Outputa Low

Vee a Max

12

22

mA

-20
-18

MP

TUFIM1.).I

DMMOO (JI

Switching Characteristics at Yee= 5Y and TA= 25'C (See Section 1 for Tnt Waveforms and 0..lput Load)

DM7400 INI

CLtSpF
ParatM!er

COlldldona

flt.40011
Min

8.

a51

TJP

llln

Candlllona

Input CurrantoMax
Input Yoltege

1,

H Hlgft LOGIC Lftill

L LOw Loflt Level
1'f

125

Electrical Characteristics over recommended operating tree air temperature (unleaa otherwise noted)

YAI

&J

-55

5.5Y
-esc101&0c

Function Table
,,

-0.4

Dual-lnLlna Pacl111ga
..

o.a

-0.4

Voltage

..

0.8

High LAYe1 Output

CurrenI

YoL

,,

laH

7Y

,.... 1: TM "Alleolute Mulmurn Altinga.. .,. thoH watuu btronct

wNCh tN utetr of t"edlwjce can not be euarlnlHd. Thlldifflc:. l'lould
no1 bl opeiratecf at thtM llmita. TM par.,,...,ic vt1ue1 deHnea '" thl
"&tectrieal Cltlf.ctllflltk:I" tibia W flOt tran1Hcf. at tlMI u.olute
mPtmvmratl"91. Thl"~C)peretlftQ~Uon1"tatatwlll
dlfN u. condlllon1 fol eetullt CltwtCa .-auon.

Connection Diagram

Voltage

General Description

Units

TJP

t PLH Propagation Delay Time

Low to Hlah IAvel Output

12

t PHL Propagation Delay Time

High to Low Leval Output

...

Unll1

22

ns

15

na

Motl t: All t,OiC911 ate at VccSY, TA25"C,

NOC mor111han OM output lftOUtd M ahOflld at 1im..

..... z:

'

")

"'-->"'
-"' "'"'~''"',......""'""''"''_..._""""""'' '"""-'""'"',......,_;..,.,,.,,,.,,.,.,,,._.,.,,..,,,._,_,,.....__""""""'_'~""""",.<;;t.:.i'""-~~--~1W'~''1!'!''""""ll\ll""-""<l!"f'':.'-"""'~9\-'~"""""~':\"'"."'!."""'''"'"""'-.....""-' "f.~.....-.n<!<\!\"",'''''"0'~':"''1''"''"">tO)~'~'t_'f~rri;'=';'i1:~'1.~'""WA> :;!f""'r.':/.r"""'1't"~7.........,_., ,,._,.,,~ , -.~

,,_/

\,

".

II Miiitary/A~ lpeclflecl dlvtc. aN requlrod,

'i

O'Cto +70'C

Storage Temperature Range

DM5402/DM7402 Quad 21nput NOR Gates

,.,.......,

Symbol

!(l

General Description

Absolute Maximum Ratings (Note 1)

Thia device contains lour Independent gates each of

which performs the logic NOR function.

Supply Voltage
Input Voltage

TV
5.5V

Storage Temperature Range

-85'Cto 150'C

Not9 1: Ttie ..Absolute Maximum Ratings" 11e thoM values btyond

which lhe Hlty ol the de"lce c1n not a. ouarantMd. The devjce ahoutd

::s

-65"Cto + 150"C

Recommended Operating Conditions

~i.

-ssc to + 125"C

OM54ancl54
OM74

~-

not be oper1tec:I at lhH Hmltt. The parametric 1111tue1 delinec:I In the

"E1ec1rtc11 cnaracterl1tic1" table me no1 guarantttd at thl lbaolute
maximum ratings. The R.comrn'"dtd Operating Conditjona" lable will
define the Concfillona for actual Clewtce operation.

Dll5402

Connection Diagram

Function Table

Dutll-l...UnePacbge

lnpull

L
L

H
H

L
L

H High Logic leV91

L1: Low Logic Level

"

"

...

Output

Min

Nom

4.5

5.5

4.75

....

Uftlta

High leY81 Input Voltage

V1L

Low Level Input Vollaga

0.8

0.8

v
v
v

IOH

High level Output Cunent

-0.4

-0.4

mA

IOL

Low Level Output Current

18

16

mA

TA

Free AJr Opetallng Temperature

70

-c

Max

Unlta

-1.5

5.25

-55

125

Electrical Characteristics
over racommended operating flee air temperatu<e range (unlq otlawtle noted)
SymlMll

,.,...

Min

COltdltlOlla

v,

Input Clamp Voltage

Voe Mln,11- .,-12mA

VOH

High LIMll Output

Vee Mln, IQH

V1L Max

VoL

Low Level Output

- Max

lnputCUmlnte Max
Input Voltage

llH

High Leval Input Curnmt

Vee -

l1t

Low L8Yel Input Cumin!

Voe = Mex, V1 - 0.4V

SholtClll:Uit

Vee-Max
(Note2)

los

Supply Cimini with

Outputa High

Vee Max

lea.

Supply Current with

OutputaLow

Vee Max

Switching Characteristics at Vee -

,__

Propagation Delay Time

Low to High leY8I Output
PrDpmga1IOn Delay Time
High to Low L....r Output

-l:Nol-------t:Al'"*"'"nYcc rv. '

3.4
0.2

Max. V1 2.4V

lcxH

IA.H

Typ
(N-1)

Vee - Mex, V1 = 5.5V

Output Cunant

lymllol

2.4

Vee - Mln, loL - Max

V1t1Mln

11

lfoHL
N

lllu

Supply Voltage

TLJF/14921

DM5402 (J) DM7402 (N)

Nom

V1H

Voltage

YA+li

Dll7402

Min
Vee

Voltage

....=

Note: 7119 "AbsoWts M.ximum Ratings" llf9 /hon vt1/un

bByond which lhB flll/e!Jt al lhB device cannot IHI guersnltHKi. T1"1 t1'lvit:e llhould not btl openti.ti at these limlls. n..
pllf8mllfric VllWs dsfinJ In thB ''EltK:ltical Charactllri$t/cs"
lllbl8 .,. not f/Ulftl'lttltKI at thB llbsolute mllXimum tatings.
Thtl "RBCCmmendfld Optnting Conditions" table will dBliM
lhB r:ond/tionS for actull/ tltwlcfl operalian.

Offlce/Dlntllutora for avaRlblllty and speclflcatloM.

Supply VOitage
TV
Input Voltage
5.5V
Operating Free ~Temperature Range

!.

Absolute Maximum Ratings (Note>

,.._ com.ct the Ndonal 8amicmlcluctor . . . .

e-

.e.z

,.

lll"C.

I
I

5V and TA -

mA

40

p.A

-1.8

mA

OM54

-20

-55

OM74

-18

-55

mA

16

mA

14

27

mA

ai;c (See Section 1 for TM! W8Wlforms and Output Load)

Conditions

Ct. -

0.4

15pF

RL 400fi

Min

llax

Unllil

22

na

15

ns

Absolute Maximum Ratings CNot>

~National

OQ

tr lllllllwy/,..,.,.._. epecllled devloM - .........

, . _ conlllCt Iha llltlonll 8elnlaa11llU010r ..._
Oflloe/Dlllrlllutora tor Vdellllly Md epeolllaallorie.
Supply Vellmge
TV

r.I Semiconductor

lnpul Voltlge
Operallng Fnle All Temperabn Ra'1l9

OM54and5"

~--dol/Mdlnthtl "Elet:trll:al~"
""*_.not~ al thtl ~ tnll1timum f8/lngs.
.,,,,, ..~ ~,..., Cortdlllonil"
1/11(//dtl/lne

""*

5.5V

""' condilJoM ''actual da'lllt:tl opwallon.

-ssc to + t25"C

OM74

DM54041DM7404 Hex Inverting Gates

Nole: .,.,,. ~ """"'- Rlltinp" . . 6 - ......

Nyond wNcll ""' ..,.,,. of ""' dtwlctl _ , t. (IUtftnIHd. .,.,,. dtwlctl moutd nol t. opwated., ,,_/Im/la .,,,,,

O"Cto +70"C

-we to + 150"C

Stcnge T~kn Ra'1l9

Recommended Operating Conditions

General Description

Absolute Maximum Ratings (Not 11

Thia device contain elx Independent gatea each of

whleh perform the logic INVERT !unction.

Supply Voltage
Input Voltage
Storage Temperature Range
-

I: Tiit

-..i.

DlllMOt

Dll7402

111111

Nom

llu

llln

Hom

llu

4.5

5.5

4.75

5.25

Unite

v
v
v

5.5V

Vee

Supply Vollmge

-esc ID 150C

V1H

High LIMll lnpul Vcllage

"'"""

VIL

Low LIMll Input Valtage

0.8

0.8

IOM

High LIMll ~ CUmlnt

-0.4

-0.4

......

loi.

Low LIMll Output CurTenl

HI

18

mA

TA

AM All Operating TemperatUre

70

llu

Unite

-1.5

v
v

0.4

......

Mui....,, Ra"-" a19 -

.-

wMcl'I tM Uf91r Of lhe drMCe CUI not tie CfU8'M'Md. The Cll'l6ae lftOuJd
ftOI bl~ lhele lltnlla. The
dlftRllCI In the

,.,.._klc: .,.._,

.. Eltclrlcll CMr11etlfl1kt table . . Ml guarantMd M the ablohd:

nm1mum101lngo. Tht "-()poqllng~11-wt11
dltlnt thl condttlona tar Ktual . . _ operation.
0

........

Symbol

TV

'

-55

125

Electrlcal Characterlatlca

av Neommended opera1lng he Iii' lemperat\n rmnge (unteaa otherwlu noted)

.,.....

Function Table

Connection Diagram

..........

V1

lnpul Cllmp Vobge

Vee Mln,11 -12mA

VOH

High L8V8I Oulplll

Vee - Min.lot-I Mu
VIL MIX

Voltlge

O...loln-Une Pecllqe

..

li
[

'I:

'R

Input

Output

A
L
H

H
L

Al

AJ

lllf>Ula.r9nlMu

Vee MIX, Vt 5.5V

''"

High LtMl l,.,..i Cumin!

Vee

Low LIMll lnpul Cumlnt

Sllott Circuit

Vee MIX, V1 0.4V

Output CwNnl

Vee - Mex
(Note2)

Supply QllMnl with

Oulputa High

VeeMu

lccL

Supply Cl.nent with

Oulputalow

Vee- MIX

.......

Switching Characteristics at Vee Symbol

""'"

5
~

Pl'opagallon Delay Time

Low to High LIMll Oulput

l'laplgatian Dllay l1me

High IO Low~ Oulput
l : l t o l _ ...
__
_
__._
_,:Mwio. . .avoc
IY.
T_
WC.

"'41.

~)
I~

Tnt
(ltota 1)

3.4

2.4

0.2

MIX. V1 2.4V

lccH
HD

tuFNI

Law 1.9111 Oulplll

inruvon.ae

los

11

DllM04 (J) Dll7404 (N)

Vee Min, 1oi. Max

V1H Min

l1L

H High Logic Lent

L Low Lotte Level

8
2.
z
!.

Voft8ge

Va.

Yl

11111

Condltlone

I
I

5V anc1 TA -

p.A

......

DM54

-20

-55

DM74

-18

-55

mA

18

mA

14

27

mA

as-c (Sea Section 1 for Teal Waveforms t111c1 Oulput Loadl

CondltlDna

Ci. -

40
-1.8

15pF

RL - 4000

llln

Ila

Unlla

22

na

15

na

,,.,-.,

J
2.

!)!

TYPES SN5408, SN5CLS08, SN54SO(" }

SN7408, SN74LS08, SN74SO&J
MWIEl>DECBllEll-

'

TYPES SNl
~N7408
QUADRUPLE 2-INPUT POSITIVE~GATES

QUADRUPLE 2-INPUT POSITIVE-AND GATES

Package Optlona Include Both Piede and

Cantmlc Chip C.nte1'8 In Acldlllon to
Plastic and Ceramic Oii's

1- ...

- - - .IOlll'ACICAGE
- -.IOllWl'ACKAGE
a.JC.S..7- ... O. .IOllNPACIUIGE

and Relleblllty

Yee

1802

dcrlptlon
1111-

-lion

to

1~3B
g
3A

2895
2Y 6

GND

The SN5408, SN54LS08, and SN54S08 .,. cluncterized for

ow. ll1e full mlitllry tempeiatwe
range of -SS"C to 125"C. The SN7408, SN74LS08

3Y

--
- - .- ..
-Atl'ACllAQE
lill74LSm.
SN7Fiil l'ACllMIE

-.tion from

4.5

Vee---

13[)49
4A
4Y

, . _ dewlces cont11in four indopendont 2-input ANO

O"C

.....

rnll'VRWI

Dependable T - lnstrumencs Quality

and SN74S08 ara ""--rind for

-.unended opanrting conditions

V1H

Hil~lwel

input voltagt

VIL

l..Dw-19'1191

i~t

-_

3212019

tY

NC

.....
NC

4Y

)(

NC

38
9 10111213

,no n
>DU><
0

logic dl119ram 1..ch getel

:=o-y

5-25

I/

0.8

0.8

I/

5.5

I/

IOH

H~

OUlPUt cvu...t

-0.8

-0.8

'oL

Low-lwei output current

16

16

.....
.....

TA

()psati119 t,...ir tempwetUre

10

-55

125

TEST CONDITIONSt

SN7-

N TYPt llAX

MAJ(

voltage

PARAMETER

MIN 4.75

electrical chllrac:1eristics over remmmended opanrting .._... -.,....rture ...,.. (unless otherwi noUldl

:!!~~~~

FUNCTION TA8L. t - -
INl'Ulli
OUTPUT

UNIT

fn)l'VRWI

70"C.

..,_

llAX

f'rlZZI'> I'>

"
NC-Noa...---.,.

Vue

VccMIN,

l1-12mA

VoH

VccMIN.

VtH21/,

IOH-0.SmA

llOL

VccMIN,

VtL0.8V,

loL tlmA

'

vccMAX.

llt5.6V

2.4

UNIT

TYi'$ llAX
-1 .5

-1.S

:u
0.2

MIN

2.4

0.2

0.4

I/

3.4

I/
I/

0.4

""'
.....

ltH

VccMAX.

llt:Z.4V

40

40

ltL

VccMAX.

V10.4V

-1.6

-1.6

......

ost

l/ccMAX

-55

mA

'cCH

Vee MAX,

Yt45Y

11

21

11

21

......

'cCL

VccMAX,

11101/

20

33

20

33

mA

TYP

llAX

17.5

27

-20

-55

-18

1 For conditions 18'own .. MIN OI MAX, UM th eppropriet8 .............. under" NCGm........ operating conditione.
t All typlufv.luee era at Vee 5 V, TA 2SoC.

poaltlv. logic

Not more ttt.n ona OU1'Nt shoutd M ...or'9d at a Uma.

swikhingchal'8ctllristics, Vee .. 6

YAB or Yoi\+i

PARAMETER

:=----1

v. TA= 25c

FROll

TO

tlNPVTI

IOUTPUTI

A or B

c--21
nsf CONDIT!a.

RL 4000,

CL 15pF

1PHL

NOTE 2: Sea Gener9I antonnation Section tar loed circuit R

00

-If

\dl.IDI' wewfonnL

TEXAS

-If

TEXAS
INSTRUMENlS

INSTRUMENTS

flOST OfflCE IOJC 225012 a Q,111,LLAS. TUCA.S 1\295

flOS1' OFFtCE M>X Dlil12 DALLAS. TEXAS Jlla5

lllN

12

19 I

UNIT

..

( )

SN5432, SN54LS32, SN54S32,

Sl7432, SN74lS32, SN74S32

OUADRUPLE 2-INPUT POSITIVE-OR GATES
DECEMBER 1983-REVISED MARCH 1988

Package Options Include Plastic "Small

Outline" Packages, Ceramic Chip Carriers
and Flat Packages, and Plastic and Ceramic
DIPs

SN6432, SN54LS32. SN54S32 .. J OR W PACKAGE

SN7432 . . . N PACKAGE
SN74LS32. SN74S32 ... D OR N PACKAGE
ITOPVIEWI

Dependable Texas Instruments Quality and

Reliability

Vee

18

48
4A
4Y
38

1Y

2A
28
2Y

1scription
These devices contain four independent 2-input
OR gates.

GND

The SN5432, SN54LS32 and SN54S32 are

characterized for operation over the full military
range of - 55 C to 125 C. The SN7432,
SN74LS32 and SN74S32 are characterized for
operation from 0 C to 70 C.
FUNCTION TABLE

SN54LS32. SN64S32 ... FK PACKAGE

ITOPVIEWI

u
ai<u um
- - z > ..

leach gatel

1Y

NC

NC
4Y

2A

NC

NC

28

38

INPUTS

>- 0 u >- or(

N Z Z MM

gic symbolf

18

15)

CD

-u>

CD

......_,

(~)

NC - No intomll conn:tiOn

161 2 y

lA
18

(101

4A
48

en

logic diagram

3A
38

12)

2A
28

C!)

:;.1

lA

4A

OUTPUT

1131

(SI 3Y
2A

28

ll1l 4Y

3A
38

his symbol is in accordance with ANSldEEE Std 91-1984 and

Publication 617 12.
1 numbers shown are for 0 . J . N. or W ~ ckages.

:c

4A

48

[)
[)

1Y

2Y

3Y

[)

4Y

positive logic
Y = A + B or Y =

TEXAS

'f

INSTRUMENTS

AB

2-137

POST OFFICf BOX 055012 DAlLAS, TEXAS 75265

Courtesy of Texas lnsttuments Incorporated

284

//'-\
TYPES SN5446A, '47A, '48, '49, SN54L46, 'L47, SN54LS47, 'LS48, 'LS49,
TYPES SN5446A, '47A, '48, '49, SN54L46, 'L47, SN54LS47, 'LS48, 'LS4~/ SN7448A,
'47A, '48, SN74LS47, 'LS48, 'LS49
SN7446A, '47A, '48, SN74LS47, 'LS48, 'LS49
BCD
TO-SEVEN-SEGMENT
DECODERS/DRIVERS
BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS

J
g,
;;l

5'

I
fir

MARCH

lntemal Pull-Upe Eliminate

Need for Extemal Rnldora

lamp-T- Provlalon

lamp-Teat Provlalon

Leadlng/Tranlng Zero
Supp1'8181on

LeadlnglTremng Zero
Supprealon

LT

Bt/RBO
RBI
D
A
GND

4
9
6
1
8

!TOP111Wi

u
u u

umz> ....

NC

iiBi

12
11
10
9

3 2

[Tg

v ..
13

9 10,, 12 13

Ol)ltfl~lec1or

DISSIPATION

s.sv

265mW

5.SV
30V
15V
15V
5.5 v
5.5 v
30V

16SmW
160mW
160mW

15V
5.5V

320mW

6.4mA

24mA
6mA
8mA

1SV
5.5V
5.SV

low
low

open<Olleetor

omA

2-kU pull-up

open-collector

6.4mA
10mA
20mA
20mA

QPen<0tJec1or

12mA

open~llec1or

low
low
low

open<0Uec10f

2~kn

open-collecaor

'"

open<ollector

low

open-co!lecior
2-n pun-up
open-collector

high

241.0-pull-tJp

high

open<etlector

low

high

40mA

pull-up

h~

hfGh

f
9

"

D
A

2mA
4mA
40mA
40mA

SN54LS49 FK PACKAGE
SN74LS49 . FN PACKAGE
ITOPVIEWI

m..W........W---

uu

uaiz>-

GND

3 2 1

iii1

NC
D
NC
A

6
7
8

'49

ou-ac.J
~z

NC - No intnal connKtiOn

lltt/7.sG

ii

\3)

"

J51

IT11
G20

Pin numbeu thown on logic nabltian ani for D. J or N PKkge.

DATA
llolo _PllDUCllDI
__
liolt_OI

. ""-"''"''--

., ~- .... PftitlCtl

c::o

VI

ct11'- ,,

~
::--=.:r;,-:~~.r..c:'::.=

TEXAS.

INSTRUMENTS
POST OFFICE llOX 2nD11 DAI.LAS. TElA.~ ~'IS

320mW

TEXAS

'If

INSTRUMENTS
fl'OST OFFICE 10)(

nson.

DALLAS. TIXAS 7$265

PACKAGES
J. W
J.W
J,W

320mW

35mW

12SmW
40rnW

320mW

26SmW
3SmW
125mW
40mW

'48

.,

TYPICAL
POWER

VOLTAGE
30V
ISV

high
high

MAX

zz

1vr
1

DRIVER OUTPUTS
OUTPUT
SINK
CONFIGURATION
CURRENT

SN6446A
SN5447A
SN5448
SN5449
SN54L46
SN54L47
SN54LS47
SN54LS48
SN54LS49
SN7446A
SN7447A
SN7448
SN74LS47
SN74LS48
SN74LS49

ACTIVE
LEVEL

'46, '47

;O'~';';;

d
e

ITOPY1WI

All Circuit Types Feature Lamp Intensity Modulation Capability

logic symbols

SNfi449 W PACKAGE
SN64LS49 J OR W PACKAGE
SN74LS49 D.JORNPACKAOE

ii

TYPE

Blenklng Input

iitRBO

Open-Collector Outputs

SN54LS47. SN54LS48 . FK PACKAGE

SN74lS47. SN74LS48 . . FNPACKAGE

SN54L48. SN54l47 .. J PACKAGE

SN54441A. SN5447A. SN54LS47. SN54441.
SN54LS48 . J OR W PACKAGE
SN7448A. SN7447A.
SN74441 . JORN PACKAG
SN74LS47. SN741.S48 . D.JORNPACKAG
CTOPVIEWI

REVISED DECEMBER 1983

'49, 'LSG
feature

Open-CoDector Outputs
Drive lndicatora Directly

ttJ.

'48, 'LSGI
feature

'411A, 'OA, 'L41, 'LO, 'LS47

feature

w
J
J
J.W
J.W
J,W
J, N
J.N
J. N
J.N
J, N
J. N

TYPES SN5446A, '47A, '48, '49, SN54L46, 'L47,'SNS4LS47, 'LS48, 'LS49,

SN7446A, '47A, '48, SN74LS47, 'LS48, 'LS49
BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS

00

C"I

description

TYPES SNS448A, SN5447A, SN7446A, SN7447A

BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwi$1! noted)

The '46A, '\.46, '47A, 'l47, ind 'LS.47 feature activelow outputs designed for driving cornmonanode VLEOs or
ine1ndescent indicators directly, ind the '48, '49, 'LS48, 'LS49 feature IClive.f'tigh outputs for driving lamp buffers or
common-cathoda VLEOs. All of the circuits except '49 and 'LS49 have full ripple-blanking input/output controls and a
tamp test input. The '49 and 'LS49 circuits incorporate direct blanking input. Segment identification and resultant
displays -are shown below_ Display patterns for BCD input counts above 9 ire unique symbols to authenticate input
conditions.

The '46A, '47A, '48, 'L46, 'b!!.. 'L$47, and '.k.48 circuits incorporate automatic lelding and/or trail]!!g"!!!s!
zeroblanking control (Rei and RBOI. Lamp test (LTI of these types may be parformld at any time when the 81/RBO
noda is at a high ltvel. All types (including the '49 and 'LS491 contain an overriding blanking input (iiil which can be
used to control the lamp intemity by pulsing or to inhibit the outputs. Inputs and outputs are entirely compatible far
use with TTL logic outputs.
The SN54246/SN74246 through '249 and the SN54LS2471SN74LS247 through 'LS249 compase the 5 and
the 9 with tails ind have been designed to offer the designer a choice be-n IWo indie1tor fonts. The
SNS4249/SN74249 and SN54LS249/SN74LS249 are 16-pin versions of the 14pin SNM49 and ' LS49. Included in the
'249 circuit and 'LS249 circuits are the full functional capability for lamp test and ripple blanking, which k
not available in the 49 or 'LS49 circuit.

.1_:_1.

II

1 I

1-l 1
1l1- 1ICJI
'"'"l 1 lul11i::i
1-1ci-1c::i
I lul'-1'
c=1
=c

l_J

-.-

10

'3

12

It

1-4

I
~

-65C to 150C

MIN

vo1-.

Supply
vee
Off-state output vohtgt, Votoftl I

SN&M6A
N0M MAK

MIN

5.5

4.5

4 .5

SN5447A
NOM MAX

MIN

SN7446A.
SN7447A
UNIT
NOM MAX MIN NOM MAX
5.25 1 v
5.25 l 4.75
5

5.5 4.75

thru g

JO

15

30

151 "

a lhrv g
fl/Mil)

40

40

40

401 mA

-200

-200
8

-200
8

;;;2001 ""'
Ill mA

On-s11te output curr.nt, otonl

Hgh-tevel output CUfftf'lt, IOH

low-level outpUt current. IOL

111/RBO

8
125 j -55

I -55

125

70

70J

"C

electrical characteristics over recommended operating fr!l8-air temperature range (unless otherwisa noted)

INPUTS

FUNCTION
0

tT

iiii

iii1Aao1

'

. . .
OUTPUTS

ON
OFF

ON
ON

OFF

L
L

x
x

L
H

ON
OFF

ON

ON
ON
ON

ON
ON
OFF

ON

ON
OFF

OFF

NOTE
I

~OH

High-ltVl!I ou1pu1 Volllge

ON
OFF

OFF

OFF

OFF
ON

ON

o"
ON

ON
OFF

ON
OFF

ON

OFF

OFF

OFF
ON

ON
ON

ON

ON

ON

ON
ON

OFF

OFF

ON

ON

ON
ON

ON

ON

OFF

OFF

OFF

ON

ON

ON

ON

ON

ON

x
x

ON
ON

OFF

ON

ON

ON

OFF

OFF

ON

ON

10

L
H

OH

OFF

OFF

ON

0"'

ON

OH

OFF

ON

ON

OFF

OFF

ON

12

..

x
x

OFF

"

L
H

OFF

OFF

OFF

ON

ON

tJ

ON

OFF

OFF

ow

OFF

OFF

OFF

OFF

ON

15

OFF
OFF

ON
OFF

Bl

x
x

ON
OFF

o"'
ON

ON

"'

OFF

RSI

OFF

OH
OFF

LT

ON

ON

Off

OFF

OFF

OFF

OFF
OFF
ON

OFF
ON

OFF
OFF
ON

Off
OFF
OFF
ON

OFF
OFF
ON

: VoL

to on.

TEXAS

-If

INSTRUMENTS
'OST OFFIC~ IOX 225012 o DAU.AS. TlJCAS 1l21S

VtH ,.. 2V,

loH -200A
VtH 2V,

2.4

a thru g

lhru 9

Input cvrrent at moimum input woltage

Any input

l1H

Hightevel tnput current

Shortcircuit outPUI curttnt

tee

Supply current

2
J
4

tocon!"OmA

Vee .

MAX.

v, . 5.5 v

mA

Vee. MAX.

v, '2.4 v

40

0.4

0.3

Any input

los

250

v1vo.sv.

Any input

Ii/Im>
iii/Im)

V1H " 2V,

except il/liitl

e.captli/~

0.4

Vee .. MIN,

except BitRBO

Low-level tlPUl current

0 .27

Vtl = 0.8 v. Votofll .. MAX

,,

3.7

VIL"' 0.8 V. 'oL 8mA

Vee= MAX, V1H: 2 v .

vo,onl Onstt OU1PUI voHagr

Il l

v
v

0.8
-1.5

l 1 -12mA

MtN,

s:

Vee MIN,

iii/im5

LON-level output voltage

I. Thtt hl.mking i"put liil must ... opan or hekt ill mp l09tC: lewf wham tn1tpu1 lunc:tion. O throutft I~ i1te a.sited. Fh.t
opphr lJl,mk1r'1'1mc>ul lA'lil mull he up.tit or h19htt blnklngof deciml 1n11011o "011leu,.d.
~ When low I09tc .....1 ii N>Uliect dorKtly 10 h b ..rUttftl input iiii. II ..,ment OUIPUll .... on , . . .rdlH& of IM ,.,,., OI ....,
Olher 1npu1.
l. Wli.th ripp~ ble,.ku~y input 1Rih ..ind inpuK A, a. C, nd 0 i1tt.1 a1 low tewl wnh 1he lemp teu input htgh, an seenien1 ou.1putt
00 all anrt lhc r1pplo blaNonv output Cft'ial 9c1 10 klw i.-t trtd.punw "omlit1onl.
w+wt11 the blankint lncau1/11pPl1t bl,mk111t ou1pu1 tiTiR'lal ~ opeo or hold hinh and low is apptttd 10 It!
ttt lftaNI. 411

I iiitR'iO I\ "'''" ANQ l~tte. wrVln,i M 11'.tnk mti inpul ClJ'i) nft/Or rtpphl' h4enk1nn OUlpul l ~I.

Vee

llee MIN.
VIL 0.8 V,

iii/A!O

ototl) Off-itte aueput current

H hifh lv.t. L low level. )( i "....,..,,

...,..o

MIN TYPt MAX UNIT

2

IUfltftCll\I uutpYb

l1K

High1e\llt input vottlgl

LOWlwel inp,n voltage
Input clmp vottege

V1L

"

TEST CONDIT~St

PARAMETER

OA

NOlES

-ssc 10 12s c
. oc 1010c

recommended operating conditions

YOH

DECIMAL

7V
5.5V
1 mA

NOTE 1: VoltagevelYetarewith r espect 10 network 9round trm inal .

Oporaling ffeefr '"""'' TA

15

'441A, '411, '1.441. 'L47, 'L.Sol7 FUNCTION TAllU

2.

11

NUMERICAL OESKJNATIONS AND RESULTANT DISPLAYS_

SEGMENT
IOINTIFICATION

Vee''"

Supply voltage,
Note
Input voltage . . . . .
Current forced into any output in the off state
Operating freeair temperature range: SN5446A, SN5447 A
SN7446A, SN7447 A
Storage temperature range

-1 .6

Vee" MAX. V1

:0

mA

0.4 v
-4

Vee MAX
Vee. MAX

Set Nott 2

-4

,,.,..

64
64

SN54'

BS

103

mA
mA

I For condi tions lhown n MIN DI' MA1' . u ma appropr i.9' valu 1Pec0f;.t und recommended overUnt " ond1tion.
l An typical vatut ere., Vee~ v . TA 2s"c.
NOTE 2 : tee it mea...,ract w i'h II out puts open and all inPut1 4.5 v .

switching characteristics, Vee= 5 V, TA= 25' e

TEST CONDITIONS

PARAMETER
Turn.off time from A input

Ion

Turnon time horn A-i"Pul

Ct"" 15pf,

ton

Tufnofl time from Rii input

j\,rn-on 1inw trom Rii input

See Note 3

'

MIN

TVP

MAX IUNIT

100

tofl

100

Rt"" 120U.

OO
100

NOTE :1: See Ge.-rI tnlorma11on Section for lod Ctrcuns nd vott

wv~Jorms. :

t 0 tt

cou..pond1 to IPLH .nd ton corn1Pond110

tp~L

TEXAS.

INSTRUMENTS
POST OJFICl 801l 225012 it D4LLAS. TIEX"5 7'26S
'---../~

.!

lEl

[
!.

e'R

~.

I2.

J
i

l
l

J
"{
1

.1
l

l
.1

i
f.

,. ./ -.........

"

"

General Description

Absolute Maximum Ratings <Note 1i

Thia device contains two Independent poaltlv&edg&trlggered 0 flip.flops with complementary outputs. The
Information on the 0 Input la accepted by the flip-flops
on the positive going edge of the clock pulse. The trig
gerlng occurs at a voltage level and Is not directly
related to the transition time of the rising edge of the
clock. The data on the O Input may be changed while the
clock. la low or high without affecting Iha outputs as
long es the data setup and hold times are not violated. A
low logic level on the preeet or clew Inputs wlll Ht or
reset the outputs regardleea of the loglc,levels of the
other Inputs.

Supply Voltage
Input Voltage
Storage Temperature Range

we thoN values beyond

which thl aatatyofthedevlcecan ftOl:MouaranlMd. Thedlwlce should

not M operated. M thlse flmlt1. Tl'la patametrlc wllU91 defined In IM
'"E~al Cnaretef1ttlCI"' tabla lft not guaranlHd II IM ablofult
malmum ratlngt. Tht ..AtcommtnOICI Operating Condition" table wut

Parelnetll'

l
J

Unite

Max

Min

Nom

M11

5.5

4.75

5.25

v
v

0.8

0.8

Supply Voltage

4.5

High Level Input

Volteae

VrL

Low IAYel
Input Voltage

loH

High L8'191 Output

Current

-0.4

-0.4

mA

loL

Low Level Output

Current

18

18

mA

lcLK

Clock Frequency

20

MHz

PulaeWldth

Connection Diagram

....

DM7474

Nam

VtH

define tM concuuone lor actu.. dtvlct operatton.

Du1l-ln-Une Pldutgl

DM5474

Min

Vee

7V
5.5V
- 85'C to 150'C

"-....,,..,,'

Recommended Operating Conditions

Sym

DM5474/DM7474 Dual Positive-Edge-Triggered D

Flip-Flops with Preset, Clear
and Complementary Outputs
"

Note t : lbt "Abeafutl Maximum Aatktol..

.,_, '

20

Cloe!<.
High

30

30

Clock
Low

37

37

Clear
Low

30

30

Preset
Low

30

30

ns

lsu

Input Setup Time (Note 1)

201

201

ns

tH

Input Hold Time (Note 1)

51

51

ns

T,.

Free Air Operating

Temperature

-55

125

70

Not 1! Th symbol (I> lndk:atH lt't rlelng 9dgai of the clock pulM le uaed for referenct.

lV'tll58-1

DM5474 (J) DM7474 (N)

Function Table
lnpull

i
~

ii

CLR

CLK

I>

L
H
L
H
H
H

x
x
x

x
x
x

H
L

H
H'

I
I

H
L

H
L

L
L
H
H
H

x Co Oo

H Hloh Logic Lavtl

-~

.Il

Outpull

PR

X Elt ht1 Low or Hlgl\ Logic Lewtl

00

'J

L l()W logic le11t1I

1 Po1111w~1ng 1ren11Uon of tM c1oc111.
Thi contlouratlot1 l1 non1tabft: 1~t It, H will not,.,,,,, when Mthtr .
lM p1net and/or clHr Input r9lllfn 10 ttt1lt lnaC11wt Chlgh, 1.-.1.
Oo The output logic ltwel of 0 btfora lhe indicated input..condltlon1

were 111ablltMd.

~\:,,

~~~~~~~~~~~~~~~~~~~~~~~~--~~~~-~~~~~~-~-

TYPESSN5471, SN54H78, SN54LS71A.

SN7478, SN74H78, SN74LS78A
DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

c::o
c::o

---

PllCbga Opllana lndllde l'lllldc ....

Sll547'.11115o9111._."JU .IOllWl'ACUm
1117471.1117- JOllllPACIUIGE
11114U71A D, J OllllPM:IUUIE

C....SDIPa

.....

ITllP-

Dependmbla T - ........_.au.tty
~

dllcriptiarl
The '78 -

Vee~

....,._.. J-1(. tip-

tlp-llDpL J..IC ...... ii lo9dld- ... _

K..,.

lo i

c(

..

20
2J

- '18. '1111

FUllClX*T~

- - -..... 1htclad<lllligll.
The 'LS711A CCllllmir1 lndopmldont ~
1rigglled .......... 11111 J K
1111111
.... - . - prior . . . high-....... clad< ..........

..,__be

PRE
L
H
L
H
H
H

-~---111e...-_..__

..,
........_
......
inputs.
. . ....
. Dlllpulll0
""'
-.lde1htcb:k
_ _-_ _
_ faldng

.... . i ,_ _ _ _ ln ...funclianlll*.

Tiie SN547$, SN54H71, ... SN54LS7tlA d&Mlwd far _...... th9 ful .......,
---llftllllol -5&"CID125"C. TlleSN7471,
SN74H71, - ... SN74t.S16A - d-l&d far
---O"C11>7G"C.

tit
tQ
to

76

12~2K
11 20

2CUC I
2 Jiiii 1
2a:Ji

edgo .......

..... ...
clad<
llNgti-...-...IO
...........
hlgb-to_ ......._
fof _
...,_
._ J _

logic diagrams

GNO

"H1I -

...
- - 'H71
.Ht.-...-.
- .....
.......... The '78 - ,..,.... ..

TYPES SN5476, SN54H76,

SN7476, SN74H76
DUALJ-K FLIP-FLOPS WITH PRESET AND CLEAR

Cl.II
H
L
L
H

H
H

CLI<

x
x
x

.n.
.n.
.n.

.n.

I(

Cl

x x
x x

H
L
Ht

L
H
Ht

L
H
L
H

Qi,
H
L

x x
L
L
H
H

U"JU
-TAaE
PRE

L
H
L
H
H
H

lllPUTI
CUC
CLll
H
x
L
x
x
L
H
l
H
I
I
H

CLK

'H7B

I(

Cl

x x
x x

H
HI

L
H

x x

H
TOGGLE

l(

L
L

c==

'-1---++-Plil

CLR~

"'Go

a(

ii

.-~~~~-1~t--CUi

;11t --i-+----"1'

L
H
L
TOGGLE

Go

T111o---11.1tw1u-..._. ... _ . . - or dmlo ....,.. . . IMMM Chlllhl

I
a.

conM:rTlllFM:rOllY
--~-

CLK

:;i

l
1

l
l

....,... -"-t ~--

R'

---:-=-.=:
~

TEXAS

If

TEXAS

..

..

'OST OFFICE IOX 22$012 OALLA.S. TIXAS JUH

'v

fOIT'Ofl:a:.,. DmtJ DAUJlll. YIXAS llm

..

""'-'"'"'_.,....,.,_..~,.._...----.~--~..---. ~~,,,...- ~--"'---...--,.,., .,,,."----- -""'""-~'~

.
,_ _,_,.,_

'f

INSTRUMENlS

f~

INSTRUMENlS

-,_~/

..._

,,.,.._,.,.....,.,....,,..,,,,_.

--~. - -=~ --.., ..---->r-=-=- -'"'"._,.,.,,,~ ;c-.,,, ...._.,.,,,... "''~"""''""~"'-"',_.,.,,..,... __,_

_,,._,,,,_, _ _.,,,.,......,__,_,,_ .,,___

"''-------~""""-""-""-"'------,--~--~-----\-'"-----~__,,,_...._,,.,,,"""''''-

\,_)

2.
n3

logic diagrams (continued)

recommancled operating conditions

'LS76A

&N5478
MIN

NOM

4.5

Vee Supply volt

V1H High-laV11I input vottatt

vott

K-------1

NOM

MAX

5.25

0.8
-0.4
16
I CLKhiall

I
I

Pulse duration

....

'--~~+-~~~+-Ci:R

PRE-t----~~--~

MIN
4.75

1h

Input setup time before CLK 1

Input hold timed1t11fter CLK ~

TA

Operating free.air temptrMure

v
v
v

0.8
-0.4
. 16

mA
mA

20
47

20
47
25
0

CLKlow
PRE or CLR low

UNIT

lo...ttvel oupul c;urrent

...

Sfl7471
MAX
5.S

Low-twel input
HiQh-tevel output currnt

V1L
IQH
IQL

ij
5'

TYPES SN5476, SN7476

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

TYPES SN5476, SN54H76, SN54LS76A,

SN7476,SN74H76,SN74LS76A
DUALJ-K FLIP-FLOPS WITH PRESET AND CLEAR

r:i

ns

25
0

0
-55

125

ns
ns

0
0

70

electrical chBnlCteriatics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

eLK

,~10

1CLK
IK

V1H 2V.

V1L 0.8 V,

Vee MIN,

V1H2V,

V1L 0.8 V,

oL 18mA
Vee MAX,

V16.5V

JO< K
NI othar

Vee MAX,

v,. 2.4 v

,J--illL20

2J
2mi3
zeLK I I
ZK 12

,~20

...........

Vee MAX,

v,. 0.4 v

11

10

2CLR

ltH

t:2D20

l tL

ost
cc
i

schematics of inputs end outputs

0, EACH INPUT

J"'K

-20

Vee MAX
VccMAX,

10

Stt Note 2

TYPICAL OF ALL OUTPUTS

---,.

Vee

tPHL
1PLH

OUTPUT

FROM

TO

llNPUTI

IOUTPUT I

Mi' Ct:R

oo,O

eLK

QorO

TUT CONDITIONS

RL 4000,

eL15pF

1PHL
NOTE 3: SH Genetti lnlormltion Section lor IQMI eireuits and voltage wa\'elorms.

00
l.C

v
mA

40

1
40

80
-1.8
-3.2
-57

80
- 1.6
-3.2
-57

-18
10

20

20

PA
mA
mA
mA

switching charactsistic:t, Vee 5 V, TA 25e 1- note 31

tPLH

ktl

0.4

0.2

0.4

Afltyptcl.,.,u.. .,tYcc v. T11t nc.

'-

INPUT

Roq NOM

v
v

3.4

Not ~ than OM 0Ytl)v1 tltould ... thort.d ., ""-

Clur la testad with pf"9Mt hilh and pre . . It tntad with e.._ hilh.
NOTE 2: With all oytputs opmn,
hi ~r9d with tha Q and 6' output1 hl9h ln tufft. At th time of rnaa1urament, 1h elock input
It ttounded.

PARAMETER

ltLMAX

UNIT

- 1.5

ce

78

Vee

-1.lrnA
-3.2mA

SN7471
TYP
MAX

2.4

3.4
0.2

MIN

t For condltk>ns thown Ml N or MAX .,.. th 11PPJOl)tl.i vlum .-clfiI uncMr rcornmnded op.,tfno condJUonL

Pin num1*s shown on k>gie: notation are fOf' O. J or N ,.ckagu.

EDUIVALENT

2.4

oH -0.4mA

t:IQ

1EiJi

MAX
-1.5

Vee MIN.

VOL

IJ

TYP

l1-12mA

VQH

"LS111A

1Piii

MIN

Vee MIN,

V1K

, j--..ll!L 10

SN5476

TEST CONDITIONSt

2n

TEXAS.,,

INSTRUMENTS
POST OFF ICE IOX 225012 a DAU.AS, lXAS 1'21l

TEXAS.

INSTRUMENTS
POST OFFICE IOX 11llG12 DALLAS, TlXAS 7'21\

MIN

TYP

MAX

IS

20
16

25

25

40

16
25

25

UNIT

..

MHz

40

ns
ns
ns

-------------~---------~

TYPES SN5483A, SN54LS83A, SN7483A, SN74LS83A

4-BIT BINARY FULL ADDERS WITH FAST CARRY

0
'

TYPE$ SN5483A, SN54LS83A, SN7483A, SN74LS83A

4-BIT BINARY FULL ADDERS WITH FAST CARRY

MARCH 117-REVISED DECEMBER 1913

SN6483A, SN&4LSB3A J DR W PACKAGE

SN7413A . JORNPACKAGE
SN7oll.S83A . . D. JORN PACKAGE

FuH-<:arry LookAhud across the Four Bits

Systems Achieve Partial LookAhaad
Performance with the Economy of
Ripple carry

A4
I3
A3
B3

l=T
WORDS

DISSIPATIONPER
C-81T ADDER

'B:IA

n ..

3n1

310m.W

'LS83A

:ans

5n1

9lmW

1 V1t1] 84
2
15 I4
3
11
13
5
12 GNO
81
6
10 Al
1
Il
8

Z2
82
A2

(14)
C4

'co

Vee

TYP=L ADD TIMES TYPICAL POWER

1-llT
-RDS

logic diagram

ITOPlllEWI

SN54283/SN74283 anct SN54LS283/SN74LS283

An Recommended For New Designs as They
Future Supply Voltage Md Ground on Comer
Pins tD Simplify eon Layout
TYPE

"

9,

84 -

A4

SN&4lSll3A . FK PACKAGE
SN74LSl3A . FN PACKAGE

lill:I ~

Thne improved full adders perform the addition of

two 4bit blnwy number" The sum (2:) outputs are
provided for each bit and 1he resultant c1rry IC41 is
obtained from the four111 bit. Th111 adders loature
full internet look held
Ill four bits generating
the carry tarm in ten nlnaucondS typic1lly. This
providll the system designer with partial look-ah1ad
performance at the economy ond reduced pockage
count of 1 ripple-carry impfement.ation.

(15)

NC
M

Al
81

(2)

I:>

82

(7)

A2

181

81

!!.!!

NCJlo--

161

FUNCTICllllTABLE

DesilJled for medium-spoed -'ications. the circuits

utilize transistortransitor logic that is compatible
with most other TTL f1milin ond other saturated
tow-level logic f1milin.

l
l
l
l

L
l

e.

l
l

Series 54 Ind 54LS circuits art characterized for

OPOl'ltion over the full mllitory temper11ure range of
-ss"C to 125C, Series 74 and 74LS circuits are
characterized for operation from oc to 70C.

QI

(9)

Al~
l
H

l
l

l
L
l
l
l
L

L
H
H

l
l
l

L
l

l
L

"

"l

l
l
l
l
l
l
l
H
l
l
L

l
l

"L

l
L
l

l
l
l
L

"

l
H
H

L
l
l

l
l

"
"

l
L

"

L
L

2:1

(131

absolu111 maximum ratings o - operating free-air temperature range (unless otherwise noted}

2:2

Pm nutnl141f 1h0wn on ioQtenotation .... fDf D. J or N pKUgn.

l
l

co

l
l
l
l

"

2:3

84

8~~iU

level inversion.

.:i

2:4

A3
:E3

II
NC

Th adder logic, including the c1rry. is implemented

in its tNt form meaning that the endound carry
con be accomplished without the need for logic or

fi

111

~Iii

A2

acr-

(16)

CTDPVIEWI

description

----~"~~,,-~,

H
H

H hllh lwal, L low lwal

NOTE: Input ~ondlUOf'll "' 81. A2, 82, and co .,.. UHd to
dettirmln OU1PU1t 2:1 and 2:2 and thavalueot th inwnal
urry C2. The waluet at C2. A3, 13, AA, aftd B er tl'tet1
Uled tO dHarmlne Outpun 2:3, ~. aMI C.

Supply voltage, Vee tsee Note 1I

Input voltage: '83A
'LS83A
lnteremitter voltoge (see Note 21
Operating freeair temperature range: SN5483A, SN54LS83A
SN7483A, SN74LS83A
Storage temperature range
NOTES:

7V
5,SV
7V
5.5V
-s5c to 125c
. 0c 1010c
-65C 10 1so0 c

1. Vot1age vM..-t, cel)1 in1.,em1uar vohae, et with rnpec1 to netV110tk 9round tatminal.
2. This is the vOltap be1....-n iwo amiuau ot a mulliplminar tranMstor. Th~ rating appliff tor th 'B3A only Detwen tn
tollowin9 pain: A 1 end 81. A2 and 82. A3 aftd 83. A4 and 84.

PIODUt:llDI DATA

TMt ....... nlHlln lt.r.dt . , . . 11

:.==-...:.--...::o:m..'=-1:

~...:.:::t;::i;.":~
.~

'.,J

...,_...,.._ _ _,,_.,.....--~----.--..~-

TEXAS.,,

TEXAS . .

INSTRUMENTS

INSTRUMENTS

POST Ol'FICl IOX ~12 DALLAS. TEXAS 11211

llOST OH1Ct IOX. 219012 DALLAS. tUCAS ~2&S

/'-)
\___/

!O"""'l~ "7"'-. ....--~~~--....... . . . _ _ . , , .,,._ _,....t\'11'_;:;..,............._ _" _ " " ' '"''" ""'""'' ......__._,<~""'....,_

'.._/

~---~~.._,.,__.,,.,,_,_....,,,,_._ _ _

_. -~-~--------------------~.--<Wry_,i'_'_"""~ -"K.Jo"'.0.._--'"1>-._...,_.,;__,,,,;~,,,,.,...-,0_>

lEl

r-'i"l'ecommended Operating Conditions

srm

ag,

DM5485/DM7485 4-Blt Magnitude Comparators

I
i(l

I
~g,
g

Parameter

Supply Voltage
Input Voltage
Storage Temperature Range

loH

0.8

High Level Output

Currant

-o.a

-0.8

mA

18

18

mA

70

A2

A1

91

ll
12

A2

12

A1

AO

111

Electrical Characteristics over recommended operating free air temperature (unless otherwlee noted)
Sym

Puametar

1-

,.

-1.5

VccMln,11s -12mA
Vee Min, loH Mu
V1L"' Max, V1H Min

Vol

Low Leval Output

Voltage

Yee Min, IOL Max

V1H Min, V1L Ma

0.4

1,

Input CurrentOMu
Input Voltage

Vee Max, v,. s.sv

mA

'"

High Level Input

Current

Vee= Max
V1:2.4V

A<B

40

,.A

A>B

40

l1L

Low Level Input

Current

VcccMax
V10.4V

Short Circuit
Output Current

VccaMax
(Note2t

Supply Current

Vee= Max
(Note 3)

120

OUTPUTS
TliJ'IU30-1

7481 (N)

A<B

-1.8

A>B

-1.6

DM54
DM74

mA

-4.8

Others
los

v
v

2.4

-20
-18

Note 1: All lypJclla .,. II Vcc5V, TA25c.

~TA-..~-..,_~_,-..~-..~~--

Unlta

High Level Output

Voltage

Nol I: NOi tnoN than OM output thould tl4 IMftll'd ll t. tllM.

Not t: cc' rneaaurea wlH,U ""11puta open. A 8 tnput grounded and att other Inputs at 4.SV.

Mu

Input Clamp Voltage

IO

A<IA8A>9A>9A8A<8 GND

_,,.. CAICAlll _,,..S

Typ
(Hot 11

VoH

llO

Min

Condition

v,

AO

11

5415 (J)

Others

A<IAIA>BA>IA9A<9
II
II
OUT OUT our

...i.

125

-ascto 1soc

Ice

N
l.O

-55

7V

'""

~TANVfS

v
I/

5.SV

Note 1: The "Ata.olule Muknum Rat1ngt . .

vatuee Myond
wttlch lhe nr1ly of the dtvlce CM not be gueranteed. The Otvice lhoutd
not be operllld 11 the llmlla. Thi pamttrlc w1111e1 Mltned in lhe
:e11cmc11 Charact1d1ttca tabla are not oua1antHd at the abtotut1
maximum ratingt. n.. ..Aecommendtd Oper.U..g Candltlona'" labll wm

Dual-ln-Une P1ckag1

8'

5.:25

Absolute Maximum Ratings <Note 11

CoMectlon Diagram

83

Unit

0.8

define the COftdlHona for 1etu11 cSrricw operatiOn.

92

4.75

Low L...1Input
Voltage

Free Air Operating

Temper11ure

A3

5.5

v,L

TA

11

Max

Low Level Output

Currant

11

Nom

High Level Input

vo111ge

loL

19

Min

v ...

Typical power dissipation 275 rrNJ

Typical delay (4-bit words) 23 ns

Max

4.5

These 4-btt magnitude comparators perform comparison

of straight binary or BCD codee. Three fully-decoded dee I
slone about two 4-blt worda (A, B) are made and are ext er
nally available at three outputs. These devices are fully
expandable to any number of bits without external gatea.
Word& of greater length may be compared by connecting
comparators In ca9Clde. The A> B, A< B, and A; B out
puts of a stage handling leslgnlflcant blta are con
nected to the corresponding Inputs of the next stage
handling moralonlflc1nt bits. The 1tage handling the
leastslgnlflcant bits must have 1 hlghlevel voltage applied to the A B Input. The caacadlng paths are Im
plemented with only a two-gatl8Y91 delay to reduce
overall comparison times for long word&.

82

Nom

Supply Voltage

Features

A3

DM7486

llln

Vee

General Description

Vee

Dll5415

''"-~'/

55

-55
-55

mA

88

mA

116481, Sll4LSllA. 1114111,

Sl7481,Sl74LSllA.S174111
QUADRUPLE 2-llPUT EXCLUSIVE-OR um

DEcaaR 11n-llE''llED MAACtt 1

Package Options Include Plutlc "Small

Outline" Packages, Ceramic Chip Carriers
and Flat Packages. and Standard Plastic and
Ceramic 300-mH DIPa

INMSI. INN 111A. INMll8 J

CTOPVIEWI

Reliability
TYPICAL AVERAGE

TYPICAL

PAOPAOATIOH

TOTAL POWER

DELAY TIME

DISSIPATION
160mW
30.SmW
260mW

'88
'LS86A

'S88

14 ns
10 na
7 ns

Vee

1A
18
1Y
2A
28
2Y
GND

Dependable Texaa lnatrumenta Quality and

TYPE

oR W PACUGI

IN7488 ... N PACKAGE

8N741.188A. 8N748R .. D ORN PACIAGE

48
4A
4Y
38
3A
3Y

SNl4UUA. 8NS4888 Flt PACKAGE

CTOPVllEWI
CJ

description
These devices contain four independent 2input
Exclusive-OR gates. They perform the Boolean
functions Y = A a B .. AB + AB in positive
logic.
A common application is as a true/complement
element. If one of the inputs is low. the other
input will be reproduced in true form at the
output. If one of the inputs is high, the signal on
the other input will be reproduced inverted at the
output.

~~~~~
4A

NC
4Y

NC
38

The SN5486. 54LS86A, and the SN54S86 are

characterized for operation over the full military
temperature range of - 55 C to 125 C. The
SN7486, SN74LS86A. and the SN74S86 are
characterized for operation from 0C to 70C.

exclualvOR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic
symbols.
EXCWSIV-OR

These are five equivalent Exclusive-OR symbols valid for an '86 or 'LS86A gate in positive logic; negation
may be shown at any two ports.
LOGIC IDENTITY ELEMENT

IEVBH"ARITY

000.PARITY B.EMENT

The CJUIPUl ie active llawl If . ,

The OUIPUt la ac:dve lhlghl If en

odd number of lnpula li.e.. only 1
of the 21 are ac:tive.

The outpUt is active (low) If al

lnputa ltand et the Nm logic:

even number of inputs II.a.. O or

level (I.e., ABI.

21 are sc:tiva.

TEXAS.,,

INSTRUMENTS

2-271

POST OFFICE IOX 659012 DALLAS. TEXAS 752115

Courtesy of Texas Instruments Incorporated

292

- ---<

------~

lj

,r\

- TYPES SN5490A, SN5492A, SNS493A, SN54L90, SN54L93, SN54LS90, SN54LS9iJ

SN54LS93, SN7490A, SN7492A, SN7493A, SN74LS90, SN74LS92, SN74LS93
DECADE, DIVIDE-BY-TWELVE, AND BINARY COUNTERS

s.

;;!

-i

'

SN..-. SN54lS90 J OR W PACKAGE

SN541.90 J PACKAGE
SN7GOA .. JORNPACKAGE
SN74LS90 .. D.JORNPACKAGE

'90A, 'L90, 'LS90 .. DECADE COUNTERS

'92A. 'LS92 . DIVIDE-BY-TWELVE

COUNTERS

'93A, 'L93, 'LS93 . . 4-BIT BINARY

COUNTERS
TYPES

'L90
-'LS90
'92A, '93A
'LS92, 'LS93
'L93

Cle
~Oc

4SmW

130-

SN6492A,SN641.S92 ... JORWPACKAGE

SN7<1!12A JORN PACKAGE
SN741.S92 .. . 0,JORNPACKAG
tTOPYIEWI

46mW
16mW

slave flip.flops and addllional gating to provide a divide

by-two coun1er and 1 thr..siage binary counter for
which tha count cycle length is dividbyfiw for the
'90A, 'L90, nd 'LS90, divide-bvsix for the '92A and
' LS92, and diYidbv-eiQht for the '93A, 'l93, and
'LS93.

AU of 11- counten have a getod '""' r-t and the

'90A, 'L90, and 'LS90 also hew gated selto-nine in
puts for ute in BCD nine's comphtrnent applications.

1-.

CKB
NC
NC

CKA
NC
QA

NC

Os

Vee
ROlll
R0121

To use their maximum count length

divid&-by
.......,, or four-bit binary) of theoe counters, the CKB in
put is ~nnected to the CA, output. The input count
pulses are applied to CKA inP111 and the outputs are as
described in the appropriate function table. A symmetrical d~by-ten count can be obtained from the
'90A. 'L90. or 'LS90 countors bv connecting the Oo
output to the CKA inpiut end applying the input count to
the CKB input which gives 1 dMde--bvten square w~
at output OA

~'!'

ROlll
ROl2l

'

3
NC

2
J

L
L

L
L

l
L

AESET/COUNT
---------- FUNCTION
----. ---- TABLEOUTPUT
A ESET INPUTS
Aot 11 Aom Rg11t R9121 Qo lie 0a QA
H
H
L
x L l l L
H

x
x

x
x

L
H

Oo

6
7

8
9
10

11

RESET INPUTS

R0111
ROl21

CKA
OA

NC

Oo

Vee

GND

0c

NC

NC
NC

9
8

Oo
L

0c 0a

Ro121
H

COUNT

COUNT

QA
l

courit.
C. Output QA i ccmnect9d to Input CtC.B.
D . H., Net\ level, L low IWll, >C lrr1lw1n1

Fot MW chlpconler detlgn, \IH

PIOOllCTIDll IATA

Tin. - ....1 n1t1ln l. . . .lliH anut 11

<..c

[_,---#--

et f.!llUud.. 811. P11ftcu ........ It

.......... , . ........1 .... .........

:-=::u:r~=:;.r.c:~=

_________, ,

'l.SZID.

TEXAS.

TEXAS.,,

INSTRUMENTS

INSTRUMENTS

POSTOHIC( 80'K 221CU2 DAU.AS. TUAS 15215

POST OFFICE IOll 7250t2 OA1.1.A$, TE>CAS 1'11S

...

~--::-~----~-

COUNT

COUNT

COUNT

IS..NoteC)

NC NolntmftlfCOPIMCdon

'LS2111, 'l.S2!1Z. -

OUTPUT

COUNT

NOTES: A. Output QA I COftnectsl to lriput CK8 for &CO courit.

a . Output Co fl connect.Oto lriPvt CKA tor bl-quln11ry

Oe
CKB

'93A, 'L93, 'LS93

OUTPUT

Rom
H

COUNT

COUNT SEQUENCE

'92A, 'LS92, '93A, 'L93, 'LS93

AESET/COUNT
--- --- FUNCTION TABLE

SN541.93 .. J 'ACKAGE
tTCPVIEWl

l
l

'BOA, 'LIO. 'LS90

NC
NC

Oo

'
QA
11Qo
10 GND

Oc
L

Ur

Vee

DA
L

0c

NC

'92A, 'LS92

SNM93A, SN54lS93 J CR W PACKAGE

SN7<1!13A JORIOACltAGE
SN741.S93 . 0,JORNPACKAGE
tTCPVIEWI

OUTPUT

COUNT SEOUENCE
IS.. No.. Cl
OUTPUT
COUNT
Oo De Q9 QA
Q
L
L
L
L

GND

Qo Qc Q9 QA
L
L
L
L

6
,

GND

14520-

.... ,

COUNT

11n0o

Each of these monolithic counters contains four master-

-.. a.

'90A, 'LIO, 'LS90

81-0UINARY 15-21

CSooNOlAI
OUTPUT

COUNT

CKA
NC
QA

TYPICAL
POWER DISStPATION

'90A

'IOA, 'LIO, 'LS90

BCD COUNT SEQUENCE

ITOPYIEWI

description

\._)

TYPES SN5490A, '92A, '93A, SN54L90, 'L93, SN54LS90, 'LS92, 'LS93,

SN7490A, '92A, '93A, SN74LS90, 'LS92, 'LS93
DECADE, DIVIDE-BY-TWELVE, AND BINARY COUNTERS

MARCH 1974 - AEVtSEO DECEMBl!R 1983

"'

,_,..--------~-

-~-----,,.-"----~--=--..-~~

QD
L

0c
L

Q9 OA
L
L

2
3

L
L

L
L

8
9

10

11

12

H
- H

13

14

IS

N
l.O
.i:..

TYPES SN54121, SN54l121, SN74121

MONOSTABLE MULTIVIBRATORS
WITH SCHMITT-TRIGGER INPUTS

TYPES SN54121, SN54l121, SN74121

MONOSTABLE MULTIVIBRATORS
WITH SCHMITT-TRIGGER INPUTS

REVISED MAY 1983

81114121 J 011 W PACKAGE

SNMl.121 J PACKAGE

Programmable Output Pulse Width

With Rint ... 35 ns Typ
With RextlCext .. 40 ns to 28 Seconds

Internal Compensation for Virtual

Temperature Independence

Jitter Free Operation up to 90%

Duty Cycle

Inhibit Capability

H
H

H
H

NC
NC

161

"[s .. ...,,o,.
c..,

B
06
GND7

OU~

H
HI

L1

'L1

111 -

tRint

NC
.___ _1'"'1""01'-c..,
121 .. Rini 2kU NOM
'l 121 Aint 4 kU NOM

NC ND lntMMf COl'IMCloft.

Hf
Hf

Ptn n-.,mb9f5 st'IOwn on logic ncxatton ... ICN J CN NJlllCll.agtt

"c'Cai

NOTES: t. An terMI u,.citot ,.._Y b9 contMCtod b9twen cat (poaitival and

2. To ute the inl9'Nl 1imin9 rnht0t , c:onnact Rint to Vee, For improved pulM wtc;t1h
eccurecy
bUity, con'*t n .....,...1 etktor b9t"""" "tlCt and Vee

NI ,.,....

with Rint DP11n-clrc:uit9d .

1..I

For 11P9n.Oon ot function tbl 'ymbot,

ICMmlltics of inputs end outpuU

'"Pl',.

1 fhMe linn of the function qble nsun\9 thet the indicted t1t8dYtt1t conditiont the A anc:r 8 in putt heY bun setup long noUSJh
10 como1t any pulM 11artad btfore the N!tUD.

EQUIVALENT OF EACH INPUT

description

Pulse triggering occun at a particular V()hage level and is not directly related to the tn1nsition time of the input pulse.
Schmitt-trigger input circuitry (TTL hysterests) for the B input allows jitttrfree triggering from inputs with transition
rates as slow as 1 volt/second. providing the circuit 'Ni.th an e"cenant noise immunitV of tYPicallY 1.2 volts. A high
immunity to Vee noise of typically 1.5 volts is also provided by internal latching circuitry.

J1

l1
j

- -....- - v c c

INPUT

OUTPUT

Once fired, the outputs are independent of further transitions of the inputs and art a function only of the timing
components. Input pulses may be of any duration relative to the output pulse. OutPut pulse tength mav be varied from

Je.
ll

TYPICAL OF BOTH OUTPUTS

VCC

These muhivibrators feature dual negative-tramitiontriggered inputs and a single positive-transition-triggered input
which can be used as an inhibit input. Complementary output pulses are provided.

..n. u
nu
nv
.n... 1..I
.n.

f11l RextlCx1

uur

NC
Al

~--

ITOPlllEWI

FUNCTION
----- - T...ABLE

INPUTS
A1
A2

logic diagram (poshlve logic)

IN741ZI J Oii N PACKAGE

;!

el

I___

40 nanoseconds to 28 seconds by choosing appropriate timing components. With no external timing components
(i.e. Rint connected to Vee. Cext and RexrlCext open}, an output pulse of rypical1y 30 or 35 nanoseconds is achieved
which may be used as a d~ triggered reset signal. Output rise and fall times are TTL compatible and independent of
pulse length.

INPUT

"'A2

Pulse width stability is achieved through internal compensation and is virtually independent of Vee and temperature.
In most applications. pulse stability will only be limited by the accuracy of external timing comp0nents.

..... NOM
121
"L121

kn
4kU
2 kU

BkU
BkU
4kU

I I

'121: Reo 130 U NOM

'l121 : Req ... 26011 NOM

Jitterfree operation is maintained over the full temperature and Vee ranges for more than six decades: of timing capac
itance (10 pF to 10 Fl and more 1han one decade of timing resistance (2 kl! to 30 kl! fonhe SN54121/SN54L121
and 2 kfi to 40 kfi for the SN74121}. Throughout these ranges, pulff width is defined by 1he rela1ionship tw(outl.
CextRtln2 ~ 0.7 CextRT. In circuits where puhe cutoff is not critical, timing capacitance up to 1000 ,.,F and timing
resistance as low as 1.4 kO m1y be used . Alsc, the range of jitter-free output pulse widths is extended if Vee is held to
S volts and free-air temperature is 25C. Duty cycles as high as 90% are achieved when using maximum recommended
Rr:. Higher duty cycles are available if a certain amount of pulsewidth jitter is allowed.
l'llDllUCTIOI DATA
This ...lftHt CHllimi it1fM111tiH

""'"'I&

tf 19!'Jic.tiH thlta. ,H.Htl CHt.rM Qi

.,.aticliital,., ........ ,, 1.... laatJ.-.U
~~...,. PNhc:titfl prDlliltt ....
;'
\f iwcldl--..tDPlf. . .

&.

\-..._/

TEXAS

-If

INSTRUMENTS
POST OFUCf BOX 125012 0.\LLAS. TEXA$1526S

TEXAS

-'\

\J

-----~--,--~~~-~<~

..ff

INSTRUMENTS

'ST OfFICl IOX 225012 DALLAS. TEXAS 1521!.

"--"

~
~

sa.

i-a
2
I

TYPES SN54LS139A, SN54S139, SN74LS139A,.~139

DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

TYPES SN54LS139A, SN54S139, SN74LS139A, SN745139

DUAL 2-LINE TO 4-LINE DECODERSIDEMULTIPLEXERS
REVISED APRIL 1985

Dealgned Speclflcally for High-Spead:

Memory Dacodera
Datll Tranamlaalon Syatema

SN54LS139A,SN54Sl39 . JORWPACKAGE
SN74LS139A. SN74S139 .. D.JORNPACKAGE
tTOPVIEWI

Two FuHy lnd9pand...t 2-to-4-Une

D.codara/Demultlpleera

V_cc
2G

Schottky Clamped for High Performance

2A

schematics of inputs and outputs

vcc

1Y2R6
1Y3 7
GND a

Th- Schottky-clamped TTL MSI circuits are designed

to be used In high-performance memory decoding or
data-routing applications requiring wry 6hon pro-tion delay limos. In high-performance memory systems
these decod1H$ can be uMd to minirrize the effects of
system decoding. When employed with . high-speed
memories utiliiing a lest enlble circuit tho delay times of
t - decodlf9 and the enable time of the memory are
u1Ually kiss than lhe typical access time of the memory.
This - that lhe elflClive svstem defoy introduced
by tho Schottky-clamped system decoder is negligible.

I I

- -

28
2YO

deacrlpllon

I I

EQUIVALENT OF EACH
INPUT Of ' LS131A

EQUIVALENT OF EACH
INPUT OF 4 5131

Vee

20knNOM

,,R2v1
10 2Y2
9 2Y3

INPUT

'

:f4

'

INPUT

SN&4LS 139A, SN54S t 39 .. FK PACKAGE

SN74LS139A,SN74S139 .. FNPACKAGE
ITOPVIEW)

~ 12

!ll

~la

3212019

1812A
17 28
I& NC
15 2YO
1 2Y1

The circuit comprises two individual two-fine to four-Une

decoders In a single pactSge. The active--low enable input can be used es a data lino in demultiplexing applica-

TYPICAL OF OUTPUTS
OF 'LSt39A

TYPICAL OF OUTPUTS
OF 'S13t

---------_....,_Vee

------,..- Vee

1ions.
All of t - decOdors/domultiploxors lea1ure lully but
lerecl inputs, oach of which represents only ona normalized loed 10 ~s driving circuit. All inputs are clamped
with high-performance Schottky diodes to suppress
line-ringing and to simplify system design. Tho
SN54LS139A and SN54S139 are characterized for
-ation range ol-55C to 125"C. Tho SN74LS139A
and SN74S 139 are characteriied for operation fJOm O' C
101oc.

ENABLE

ii

SELECT
B
A

NC No lnlWNI CDMICtlon

' - - -. .-OUTPUT
'

OUTPUTS
VO V1 V2 V3

DATA
OUTl'UTS

PRODUCTIOI DATA

\.0

nil il1K*lln1111 Cllliiftl jftfeUH1iH CIUftftl II

of t'!lilic.tiH 1111. Proi11ct1 cnlonn to

111Cifi:catie1t1 p1r lht t1n111 of T1U1 lnstra11111t1

~!~::!!:!~'c:liv:!t~~l!:'or.~:;:~C:::

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage , Vee (see Note 1} .. .. .. ... ...... .. ... .. ... .... . .. ................... . .. . . .. ... .. 7 v
Input voltage: 'LS139A. 'LS139 .... .. ...... .. ... .... ..... .. . .. .... ... ... , . . .. .... ..... . ....... 7 V
'S139 ................. .. .................................. .. . .. .. ... . . .. .... 5.5V
Operat;ng freeairtemperature range: SN54LS139A, SN54S139 . . . .. . . .. . , . .. ~ . . . , . . . . . . . - 55e to 125e
SN74LS139A. SN54S139 ... .. . .. ... . .. ... ... .. . . .... .... 0C 10 70C
Storage temperature range . . . ... , .... . . . ...... .. ........... . .... .. , ....... .. ..... - 65C to 150C

Pin numbers shOwn on logic no1a1ion ate fOf D. J or N packages.

U"I

OUTPUT

logic diagram

H " high level, L low lhM, X irre'9ven1

'

ENABLEIG~

FUN CT ION TABLE

INPUTS

Ei!EE2

'f

v.I~

ere with respect to ntwork ground trminal.

'f

TEXAS
INSTRUMENlS
POST OFFICE toK 12!011 DAL.\.AS. fE)(AS

NOTE 1: Votiegt

TEXAS
INSTRUMENlS
J!!o~

flOST OFFICE ltO>C 77S012 DALLAS. TEXAS 75765

--~"""----='""""'--~
h""""'--.~~~""""'---~"""------------"""'""-~"""-=~;;,; -~~---------,,.,.<'--~""-'"'=x-=;:""'''""'."'~

l.O

O"I

TYPES SN54S139, SN74S139

DUAL 2-LINE TO 4-UNE DECODERS/DEMULTIPLEXERS

TYPES SN54LS139A, SN74LS139A

DUAL 2-LINE TO 4-UNE DECODERSIDEMULTIPLEXERS
nw:om!'*'ded operating condltiom

recommended operating- conditions

SNS4LS131A
Vee

MIN
4.5

SuPPlv voltqe
High-level input volt191

VtH
YtL

NOM

MAX

5.6

2
0.7
-0.4

HighllYlf output current

Low-ltvel output current

-55

Operating frtir temptraturt

125

0.8
-0.4
8
70

v
v
mA
mA
c

electrical characteriJtics o - recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONS t

PARAMETER
VIK
VoH
VOL

Vee MIN,

11 - 18 mA

Vee. MIN,

V1H2V,

SN74LS131A
MIN TYPI MAX

-1.S

-1.5

V1L MAX.

2.5

loH-0.4mA
Vee MIN,

V1H 2V,

1
l1H

V1 7V
V12.7 V
v 1 o. v

ltL

VccMAX.

IOs

Vee MAX

cc

Vee MAX,

switching characteristics,

LEVELS
OFOELAY

tp1H

Erwble

0.5
0.1

mA

20

20
-0.4

mA

-100

mA

11

mA

-20

6.8

11

TEST CONDITIONS

SNS4LS139A
SN7LS139A
MIN TYP
MAX

2
Any
J

RL2k0,

CL15pF

'P"'
'PLH

0.35

TO

Select

0.4

Vee 6 V. TA= 25e (see note 21

IOUTPUTI

fPLH

6.8

Outputs eruibled .nd open

3.4
0.25

Any

IPHL
'Pl..H prOJ)9. .tion delay time, low to h'Oh levaf 0"'1put; 'PHL. prope . .tion delay time, hl9"1IOlOwlV11I O\ltput.
NOTE 2: S.. Gtnerl lntorm.tton Sclion tor load Circuit n vollliil wavelOfms

13

20

22
18

33

25
16
21

38

29
2
32

MIN
4.5

Vee Supply vollege

VtH Hithf.wl input volt ...
VtL Lcwr~ input VOltlll
IOH High-level output current

20
125

l.o,..ltvel ouiput current

IOL
TA

-ss

Operating ft.... ir ltrnf*'turm

UNIT

"'ns

.."'..
"'

V1K
VoH
VoL

Vee - MIN,
Vee. MIN
loH-1mA
Vee. MIN,

VtH 2V.

I
I

VtL O.BV.

v
v
v

o.s
-1

mA
mA

20
70

2.5

J.4

SN74S'

2.7

3.4

TYPO

v 1L. o.8v .

VtH 2V,

IJH
~

Vee. MAX.

iost

Vee. MAX

tee

Vee. MAX.

UNIT

MAX
-1.2

V1 5. SV
V1 2.?V
v,. o.sv

-40

I
I

Outputs enebted and open

SN54S'
SN74S'

60
75

v
v

o.s

v
mA

so

....

-2

mA

-100

mA

74

90

mA

tFor condition Shown., MIN 01 MAX. u1 1M PPDDlifle v1!1H1 spec~ under recommended 0Peta11nu conditions.
IAlltypi<:atvaluesarea,Vcc 5V, TA 2sc.
I Not more than oneoutpu1 sttould be shorted at tMnt, "Id du,ation of lhe shorl c11cuit test s>utd no1 eiiceed one .secomi.

switching characteristics, Vee 6 V, TA~ 26e 1- note 2)

PARAMETR1
'PLH
tPHL
IPLH

fROM
(INPUTI

TO

LEVELS

IOUTPUTI

Of DELAY

Any
AL 2800,

CL15pf

En1bkt

Any

'PHL prOPaption detav time, hifh to lowl9Val output

NOTE 2: See Genet.a tnformation Seetion tor IOad circuits and vottage waveforms .

2.
~

el

I
TEXAS.

INSTRUMENTS
POST OFFICE IOlC

nson

DAL.l4S. TEXAS 75165

UNIT

SN7CS139
MiN

Binv
S.lect

SNS4S139
TEST CONDITIONS

11 tpLH .. ptOP...tlon delV time, low to hlGhlavel OUtPUt

POST OFFICE eox 125012 DA.LL.AS. TEXAS 152U

UNIT

)C

5.25

SNS4S'

11a18mA

IPHL

TEXAS . . .

MAX

lot 20mA
Vee. MAX,
Vee. MAX,

IPLH

INSTRUMENTS

NOM

SN54S139
SN74S138

TEST CONDITIONS I

PARAMETER

IPHL

SN74S138
MIN
4.75

electrical cheracterlatics over recommended operating free-air temperature range (unless otherwise notedl

UNIT

0.1
-0-'
-100

-20

FROM

Binary

2.7

0.4

8 mA

UNPUT)

tPHL

3.4
0.25

IOL 4 mA

I loL

Vn, MAX
Vee MAX,
VccMAX.

PARAMETEA1

SNlLS131A
MIN TYPI MAX

SNMS139
NOM MAX
5
5.5
2
0.8
-1

UNIT

L.ow-tever input voltge

IOH
IOL
TA

SN7LS139A
MIN NOM MAX
4.7S
5
5.25

TYP

MAX

7.5

6.5
7

10
12
12

a
s

6.5

10

"'ns
"'
"'
"'
"'

- - - - -

,,~

' '

\._,/

TYPES

SN5415~

SN54151A, SN54152A, SN54lS151, SN54lS152, -S151,

SN74150, SN74151A, SN74LS151, SN74S151
DATA SELECTORS/MULTIPLEXERS

ft
'<
"'
0
..,
~

'150 Selects One-of-Sixteen Data Sources

Others Select One-of-Eight Data Sources
Performs Parallel-to-Serial Conversion
Permits Multiplexing from N Lines to
One Line

Also For Use as Boolean Function

Generator

Input-Clamping Diodes Simplify System

Design

"

2
~

=
fjf

S'
0

el
Q.

._..._

C)

\..._;
TYPES SN54150, SN54151A, SN54152A, SN54LS151, SN54LS152, SN54S151
SN74150, SN74151A, SN74LS151, SN74S151
DATA SELECTORS/MULTIPLEXERS

DECEMBER 1972-RE V ISED DECEMBER 1983

SN54150 . . JORWPACKAGE
SN74150 . JORN PACKAGE
ITOPVIEWI

;;i
><

------

-------------------

schematics of inputs and outputs

E4

E3
E2

E8
22
21
20

19
18
17

16
15
14
13

Fully Compatible with Most TTL Circuits

TYPICAL OF ALL OUTPUTS

OF 'Stlt

TYPICAL OF ALL OUTPUTS

OF ' LS151, "LS152

TYPICAL OF ALL OUTPUTS

OF '150. '151A, ' t52A

Vee

1
E6

Vee

E9
E10
E11
E12
ElJ
E14
E15
A

Vee

12on NOM

OUTPUT

OUTPUT

OUTPUT

SN54151A. SN54LS151 . SN54S151 ... JORW PACKAGE

TVl'E
'150
'151A

'152A
'LS151

'LS152
'5151

TYPICAL AVERAGE
PROPAGATION DELAY TIME

TVPlCAL
POWER

DAT A INPUT TO W OUTPUT

DISSIPATION

13 ns

200mW

8 "'

145mW
130mW

Sn
1:l ns

SN74151A ... JORN PACKAGE

SN74LS151.SN745151 ... O,JORNPACKAGE
fTOPVIEWI

oorI"

JO mW

13 ns

2BmW

4.5 ns

225mW

02
01

2
3

DO

15 D4
. -05
13 D6
12 07
11
A

10

GNO

logic

FUNCTION TA9LE

"L
L
L
L
L

L
H

L
L

l
L
L
L

Eo
Ei
E2
E3

L
L
L
L
H

L
H
H

L
H
l
H

H
H

NC
07
A

H
H

L
L

H
L
L

l
L

H
H

H
H

SN5415ZA,SN54LS152 ... WPACKAGE

H
H

L
L

TOPVIEW1

IC> 0

U
zz

U CD

"

The '151A, 'LS151, and 'S151 fea1ure complemen-

NC . No internal conriec1ion

The '151A and '152A incorporate address buffers

which have symmetrkal propagation delay times
through the complementary paths-. This reduces the
possibility of transients occurring at the output(s)
due to changes made at the select inputs, even
when the '151A outputs are enabled {i.e., strobe low).

and 'S 151 have a .strobe input which must be at a low

logic level to enable these devices. A hlgh level at the
strobe forces the W output high. and the Y output (as
applicablel low.

OUTPUT

L
L

05
D6

1he '151A, '152A, 'LS151, 'LS152, and '5151 select

one-of.eighl data sources. The '150, ' 151A, 'LS151 ,

STROBE

---~

c 8 A
x x x

L
L

source. The '150 selects one.of-sixteen data sources;

tary W and Y outputs whereas the ' 150, 152A, and

'LSl52 have an inverted cw Output only,

' '52A.. 'LS'52

FUNCTION TABLE
-----

SELECT

"
s s~~i'!5

These monolithK: data selectors/multiplexers contain

fulr on-chip binary decod~ng to select the desired data

'151A, 'LS151, '$151

INPUTS

SN54LS151 , SN54S151 . . ._FK PACKAGE

SN74LS151. SN74S151 ... FN PACKAGE
fTOPVIEWI

description

'150
FUNCTION TABLE

L
H

L
H

L
H

L
H

E5

L
l
L
L

E6

L
L

ETii

L
L
L
L

E7
E8
E9

INPUTS
OUTPUTS
SELECT
STROBE
y
w
c B A
H
H
x x x
L
L
L
00 00
L
l
H
L
Cl
L
L
Di
H
l
l
L
02
52
H
H
63
L
L
03

H
H

L
L

L
H

L
L
L
l

~" ~h

04
05
06
07

Tltit doc.1rt1nt contiiAt into11netiu c.1111"n H

I ~t.lie11io d110. Prodvctl ctinlonn 10
spectficttion1 per tN term of T11n l111tn11111nt1

:~~-:'!::rt,'i~liw:~,~~~~;nof~ii;!~:=~:

TEXAS.

L
L
L
L
H

L
l
H
H

i56

A
L
H
L
H
L
H
l
H

w
00

51
i52
63
04
Os

06
i5'i

i5'i

le".!!.:..._L ~w level, X irreleyn 1

EO, El .. E 1S .. tho c:ornplemef11of1t11 le.1I of tlie r e wec t ive E tnp u1

00, 01 . , . 07 1h lvI of 1he 0 r es,p.-.::Hve inpvt

ITT

m
m

OS

For SN54LS152 Chip Carrier lnlonna1ion, Conlacl The Factory.

N
<.J:l
'-l

L
L
H

06
07

PRODUCTION OATl

OUTPUT

INPUTS

04
Os

vcc
03

SELECT

TEXAS~

INSTRUMENTS

INSTRUMENTS

POST OFFICE l!O X 225012 DAU. AS. TEXAS 7~:16~

POST OF FICE BO X 225012 O_A.1.LA.S. T EXAS 7!126~

-- ..

--.,---------------------~-,,.,_,,,..,,_.~--------..............-------"'~-~;'-""'''---~--- ..

---~------'----~---~--~---'" ~--~----,, -~~"-~

Sl54153, Sl54lS153, Sl54S153

Sl74153, Sl74LS153, Sl74S153

~
Cl:)

Sl5C153, SIS4LSl53, Sl54S153

Sl74153, Sl74LS153,Sl74S153

DUAL 4-LINE TO 1-LllE DATA SELECTORSIMULTIPl.EXERS

DUAL 4-UIE TO 1-LllE DATA SELECTORS/MULTIPLEXERS

DECEMIP 1112 - llElllSED MARCH I -

Permits Multiplexing from N lines to 1 line

Performs P. .lleltoSerill Convenion

Strobe (Enable) Line Provided for Cascading

{N lines to n linesl

A.

!TOP YIEWJ
B

Vee

HitJ>-Fen-Out, Low-Impedance, TolemPole

26

Outputs

logic aymbalt

SN!i4t53, SNUl.St63. SN!i4S163 J Oii W PACltAGE

SN74163 . 11 MCllAllE
SN74Ut53, SN748153 D Oii ii MCltAOE

A
2C3

Fully Compatible with most TTL Circuits

ICO

2C2

-. - -

TYPICAL

rntCALAVSllAGE
...aPAGATK* 01.AY T.U

TYP

DATA
1'4 na
14 ns

"153

1.$153

19 ns
9.5 ns

"'

"$153

Sll54lS153, SN548153 . . Flt PACllAGE

110mW

ITOPVIEWI

31mW

22SmW

-~~ ~~

2C2
2C3

17 2C3

S
6
7
B

fJNI ....... is in acaans..c. with ANSMHE Std. 91 1184 Md tl:C

PublicMian 111 12.

18 NC
15 2C2

14 2CI

logic - - (poaltiv loglcl

9 10 II 1213

:;:-~E~ii~

"""'C'MOO

Cl

fUNCTION TABLE
SEUCT

INPUTS

...,ii"'

e,

i
iR
~

;'

"

STROBE OUTPUT

DATA INPUTS

co

l
l

'tea ICI

...

C2

C3

jj

)(

)(

)(

)(

)(

x
x

)(

)(

)(

L
H

)(

)(

)(

)(

l
H

)(

)(

)(

)(

)(

r=t=ttL..)

1Ct Ill

NC No W11.... COMCtioft

DATA!

C1

2Y

1131

I 20 19

I l
IC2
N
1C1
1CO

191

1121

?:~~~8

.!

1111
2CI

<J

Eoc:h of monolithic, d11a aellctors/multlpleura

containa inwrtera and to oupply fully complemen..ry. onchip, binary decoding data ulection to
the AND-OR g11es. s_,ato atrobe inputs are provided
for OlllCh of the two four-fine sections.

1Y

IC3

3 2

1C2

171

,~2v

POWl!ll

dMcrfplion

-l

2CO

IMISIPATION

Sll.ECT
22 ns
22 ns
12 ns

11 na

2CI

ICI

1C2~
IC3 131

2CO ltOI

Setecl lnpuu A nd 8 .,.. eommon to both Metion.

H h lth lvI, L tow,.,..,, X " lrtetevent

2C1.!!!!...._ __

DATAZ

eb9olute maximum ratlnp over t1119retlng free-air temperature renge tunlen otherwlff noted!
.... _.. . 7V

Supply voltage, Vee ISo Note 11 ...... .

Input voltage: '153, 'S153
'LS153 ....... . . .. ... . . . . . . _.

. _. .

_. . ... . . . . .. . . s.sv

2C3 Ct31

. . . . ... .. . . . . . . .... .... .. .. 7V

- 55C to 12soe
.. ... . oc to 70c

Operating free-air temperature range: SN54

SN74'

zcz 1121

:::,~" i1irl>-

==t1

-ssc to 150c

Storage temperature range ..... . . . .. ....... . . .

NOTE 1: Voh999 velues are with , ..peel to rietworll ground i.rmin8l.

.... . . - . - ... rorO, J, ,.,ondW--,

-IHTA_ _ _

--"~---'"
=""~.:::.::==

--.-=-.
/r-"l . "-

TEXAS

.Jf

TEXAS.

INSTRUMENTS
POST Ol'FICl IOX 81501 :I DAU.AS. llXAS 1'H$

\__;)

.L---~---

______
_____.......,_

__....

~--1!".-""' o't_,,.,,

INSTRUMENTS

.r "'\

:0
_____,_,___,.,,.,,..,...

POST OFFIC[ BOX n so12 DALLAS. 1E.XAS

~2t~

,_./

--..- ~- ~-- .,.=- -'~----~*'---. ,....,..

I
0
....

I
i;;

...

~----~

..

DECEMBER 1972-PIEVISEO OECEMBEA 19!3

'174, 'LS174, 'S174 ... HEX D-TYPE FLIPFLOPS

'175, 'LS175, 'S175 ... QUADRUPLE DTYPE FLIP-FLOPS
'174, 'LS174, 'S174 Contain Six Flip-Flops
SNS4174.SN54lS174,8N64S174 JORWPACKAGE
SN74174 .. JORN PACKAGE
with Single-Rail Outputs
'175, 'LS175, 'S175 Contain Four Flip-Flops
with Double-Rail Outputs

SN74lS174. SN74S174 D,J ORN PACKAGE

CTOPYIEW)

logic diagrams
'174, 'LS174, '5174

10

..!!

10

vcc

Three Performance Ranges Offered: See

Table Lower Right

CK

60
6D
SD

Buffered Clock and Direct Clear Inputs

Individual Data Input to Each Flip-Flop
Applications include:
Buffer/Storage Registers
Shift Registers
Pattern Generators

'175, 'LS175, '$175

CLEA.fl

50
40
40

!D

_ _ __j,_11 I

141

CLK

fTOPlllEWI

positive-edge-triggered flip-flops
utilize TTL circuitry to implement 0-type flip-flop logic.

3 2

20

I 20 19

&D
50

6M~Zu
'O' TI'Q_,'3

"'

.-o .!!.!.!

40

o
SD

llJt

I I I

40
30

Ot

30

30

Oo

SNS4LS175. SN64S175 FK PACKAGE

SN74l&t75.SN74S175 ... FNPACKAGE

'

TYPH

'l

tD s
NC
20 '
20 6

CLOCK
DISSIPATION
FREQUENCY PER FLIPFLOP
35MHt
38mW
tMHz
14mW
11DMHz

IO

1141

CLEAR

"'

60
CM

CLEAR

l'

17 40
II NC
15 30

,. 3Q

9 10 1112 t3

I I I

ctiiii

(II

Pm numbers shown on logic llOl<1l1or1 are loi 0. J or N pack;iw~ s

~i~]1

"'

75fnW

NC - No intwnll COMtction

""""

PRDDIH:TIDN DATA
Thi1Uc:1111n111tc1n11i11tillt1n111i.. cwrt11t11
of public:1tlo11 d111. Products conform to
1$11ClllclliOM per tM tll'IM tf Ta111 f1111r11_
11Mftll

:::::..-.~1,=~:.~.:t:.r:r,::~:::

TEXAS~

a
(14)

--

Cl.EA.A

2ld ~ ~~
'i'i''i'i:'ii

TYPfCAL
POWER

-"-"------!--+--!

CK

CTOPYIEWI

L low level 111eady "tte)

)( irrel~ant
f trnsition hom low to l\i9h leval
Oo th. level of Q before lh indicated Uudvnate
input conditions were establl1hed.
t '175, 'LS175. and 'S17S Onl;

35

Cl.EAR

vcc

OUTPUTS

H t'.iDh level <ndv stat)

'174, '175
'LS17. 'LS175
'S'14. '5175

CM

TYPICAL
MAXIMUM

30
CK

1111

FUNCTIQN TABLE

Clo

1111

SN54175. SN541.S 175, SNl4S 175 . J OR W PACKAGE

SN74t75 .. JORN PACKAGE
SN74LS175.SN74817& ... D.JORNPACKAGE
fTOPVIEWI

fE.ACH F Ufl'.f'LOPI
0

20

50

40

"'

CK

t Q4D

TTL circuits.

CLEAR CLOCI< . D

20

30

9 10 11t213

These circuits are fully compatible for use with most

"' ~..~-----r;ri

151

NC

fnformatkm et the 0 inputs meeting the setup time

requirements is transferred to the a outputs on the

INPUTS

10

CLEAR

AN have a direct clear Input, and the '175, 'LS175, and

'5175 feature complementary outputs from each flip
flop.

positive-going edge of the clock pulse. Clocl< triggering

occurs at a particular voltage level and is not directly
related to the transition time of the positive-going pulse.
When the clocl< Input is at either the high or low level,
the 0 input signal has no effect at the output.

'"

2ld ~ ~i

These monolithic,

CK

20
CK

SN$4LS174, SN54S174 .. FK PACKAGE

SN74LS174, SN74S174 FN PACKAGE

description

1-.J

...-."'"'

,,,._,_.,.,,,_~ ~ -"'""'"~ ' ,,,w

TYPES SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54Ss: , J TYPES SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54S175,
SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175
SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175
HEX/QUADRUPLE D-TVPE FLIP-FLOPS WITH CLEAR
HEX/QUADRUPLED-TYPE FLIP-FLOPS WITH CLEAR

;;!

_ ____.,._____

TEXAS~

INSTRUMENTS

INSTRUMENTS

POST OFFICE BOX 21SOIZ OALLS. TEXAS Ht16Si

POST OFFICE BOW: 22SOl2 DALLAS. TEXAS 75265

'"

~National

Q
Q

Bipolar RAMs

~Semiconductor

I I.absolute maximum ratings

flusllllv~Vcx:

.......

ou..,.v.._
. . . . , . T _ , . .....
L..sT-,.1_.,., 1 0 -

operating conditions

!Note 11

DM54LS1811
DM741.S1811

T-ITAI
DM641.S1811

:iocrc

Thi TRI-STATE output combines the conYenience of

an opencollactor with the speed of a totem-pole output;
it can be bus-connected to other slmilor outputs. vet it

retalm the fast rise time characteristics of the TTL

totempole output. Systems utilizing data bus lines with
a defined pull-up impedance can employ the open
collector DM54LS289.

..,~::i.
[
$l

;:
1'

~
~-

a.

1"

I
~

t
g

Writa Cycle: Tht complement of the Information at the

datl input is written into the selected location when
both the chip enable input incl the read/writa input ore
low. While the read/write input is low. the outputs 1re in
the high imped.,ce stlte. When a number of the
DM54LS189 outputs are bus-connected. this high
impedance state will neither load nor drive the bus line,

but it will allow the bus line to be driven by another

ective output or a possive pull-up if desired.
Read Cycto: The stored information (complement of
information applied at the data inputs during the wri11
cycle) is available at the outputs when the reod/wri11
input is high and the chip enable is low. When the chip
enable input is high. the OU!PUts will bt In the hlsti
imped1nce st1te.

features
Schottky-clamped for high speed applications
Access from chip enable input-tO ns tvP
Access from address inputs-60 ns tvP
TRlSTATE outputs drin bus-organized systems
and/or high capacitive loads
Low power-76 mW typ
DM54LS189 is guaranteed for operation over tho full
military temperature range ol-56C to +125C
Competible with most TTL and OTL logic circuits
Chip enable input simplifies system decoding

UNITS

4.11
4.75

5.11
6.25

+125
+70

c
c

electrical characteristics
O.or tecGllUMlided -ming tne-.ir twnperature r.,... (unless otherwise notod) !Notes 2 PARAMETER
V1H

H9' Lowol lnpui Vol-

V1L

L""'

YOH

Hftll u..I Output Volt.Igo

VOL

Low Lowol Output Vol-

1H

HV. Lovel Input Cumnt

Hi!#> Lovel Input Curr9nt at Mlxi,...m Volt.Igo Vee= Max, V1 - 5.5V

31

CONDITIONS

MIN

MAX

TYP

UNITS

v
v

Input Voltogt

0.8
Vee r.fin

general description
These 64bit active-element memories are monolithic
Schottky-clamped transistor-transistor lotic ITTLI orrays
or111t1ied as 16 words of 4 bits each. They are fully
decoded and feature a chip enable input to simplify
decoding required to IChieYe the desired system organi
:zation. This device is implemented with low power
Schottky technology resulting in one-fifth power while
retaining the spead of standard TTL.

MAX

116

DM741.Sl811

DM54LS189/DM74LS189 low power 64-bit

random access memories with TRI-STATE outputs

MIN
Supply Ven. IVccl

7V
l.SV
l.SV
..... Cto+llll'C

Vee Min

lnM-2mA

3.4
3.2

2.4
2.4

IME4LS189
DM74LS189

IOL4mA
loLBmA

0.45
0.5

Vee Mix. V1 2.7

ltL

Low l.owol Input Cumnt

Vee. Max. V1. 0.45V

ios

Short-Cimrit Output Cutrant (Nola 41

Vee Max, VoOV

-30

10

1.0

mA

-100

-100

mA

29

mA

ICC

Supply "'9nt (Nan 51

v.ee Max

Vic

lnpulO-VolUge

Vee Min, 11 -lBmA

-1.2

IOZH

TRl.sTATE Output Cu"""t. Hith laYel

Valt9Appliod

Vee. Max. Vo. 2.4V

40

IOZL

TRI.sfATE Clulput Curront. U. L..el

Valtagt A!>Pllad

I Vee Max. Vo 0.45V

15

switching time wavefonns

---a-

-- }it f&
......

-s

--..

...........

- - D-~ """'CllfpE-

-- ~~
____
-

._

- :=$-1 f , ...__ _
.... ~
...
-.. __...-
- . ;-~.
-...
,

_,

...... ..=r-~*
-
1----

40

______ .J:-=.':::,

-~....

...

"

~-.,

.....n
,_. :: ---1

......

llAWl,.,.1

actt11

_T_,,.,._,_

..nn

..,,_,

.....

L(.;-

1::-..,. :.::!--i,,

-- -~

-,

~--i-rlwt---- ... Y.r

..

t.IV

fw

W.~C,...

FIGOllE t

c:ept

Nette 1: WllVWform 1 ii for ttw output with intMI conditions tuch thM the ourpu\ ii tow
when dilllbled. WevefDfm 2 is. for the outpul
wirh irHMI condiiiaa1 -=" thll the output is high
when diMbled.
Not 2. When ........,.,.... def-r 1"'-5 from Mldreu inputs, th9 ~hip lllbl input ii tow and the rNd/writ input is hagt..
Not 3 : WhH rn.1Uring _.., limft fRMn chip enlble input. the 8ddnl1 inputs . . ..ty1tate end the rMdlwrit inpllt is_~

CllPI

IWot 4 : ttipuc WWlfortN are IUPPlimt by pulle generiHon h.wing the following characteriltica= r

:f 2.S ns,t1 S. 2 .'

ZolJT6011.
'

:f 1 MHz, and

 ---

ft3
~

I i
l a
!;'

SN74190, SN74191, SN74LS190, SN74LS191

SYNCHRONOUS UP/DOWN COUNTERS WITH DOWN/UP MODE CONTROL

SYNCHRONOUS UP/DOWN COUNTERS WITH DOWN/UP MODE CONTROL

SN54190. SN54191. SN54LS190.

SN54LS191 ... JORWPACKAGE
SN74190. SN74191 ... JORN PACKAGE
SN74LS190. SN74LS191 ... O. JORN PACKAGE
ITOPV1EWI

Single Down/Up Count Control Line

Count Enable Control Input
Ripple Clock Output for Cescading

Qe

Parallel Outputs

OA

2
3

15
1'

CTEN

Cascadable fol nBlt Applicationa

AVERAGE

TYPE

PROPAGATION

DELAY
190; 191

20ns

"LS190."LS191

20ns

lYPICAL
MAXIMUM

logic diagram

TYPICAL

POWER.
l'REOUENCY DISSIPATION

.13

D/U

Oc
Oo

6
7

12
11

GND

10

-~

DN

CLK
RCO

INPUT A

LOAD
C
D

--141
CTEN

SN54LS190. SN54LS191 .. , FKPACKAGE

SN74LS190.SN74LS191 ... FNPACKAGE
ITOPVIEWI

325mW
100mW

I
ILDtt
L::' I I I I I I I I I I ct> I

~
s

181CLK
17 RCO
15

~MIN

1'

LOAD

P-

rg'Q'
TI'O 'TI
czz

"

NC No ~lff'NI conneclion

=~ 111111111~~
n

The clock, down/up, and load inpu!O aro buffered 10 lower the drive requirement which significantly reduces the number of
clock driver&, etc. required for long par1Hal words.

DATA 191
INPUTD

Two outputs have been made available to perform the cascacting tunction: ripple clock and maxtmumlminimum cour:u. The
18ttar output produces a high-le"91 ourpu! pulM with 1 duration epproxlmately equal 10 one complete cvcte of rhe clock when
the counter overflows or underflows. The ripple clock output prodUCM a low-level output pulse equal in width 10 the low
level portion of the ctock input when an overllow or underflow condition exists. The counters can be easily cascaded by
leed"ing tho ripple dock outpUt to tho enable input of the su~ng counter tt parallel docking Is used. or to tho dock input
if peraUel enabling is used. The maiUmum/minimum count output can be used to accomplish look-ahead for high-speed
operation.

U)AD 111)

Sies 54' and 54LS' are characterized for operation over the fuH military temperature range of 55''C to 125''C; Series 74'
and 74LS' are characterized for operation from O"C to 70C.

Pin numbe.,. 1hownontolilie notlian.,. for O. J or Np.cir.ages.

l'llllDUCTIOI DATA

...i.

Thia . _ . , c..tln lltf.,.1lit111 """1,.

ff ~tlH Mtt. PrM.s11 cnr..
~,,., lltltent11efT1&"ln"1Nlllr'tf1

:~~r~~~-:-.:::;-J~~::'.':.'::

TEXAS~

TEXAS.

INSTRUMENTS

INSTRUMENlS

POST OFFIC( IOX 215012 OAU.-.S. TEXAS 7USS

flOST OFFICE BOX 22'5012 O"'LlAS. lUAS 752CIS

l___

-------~---------_..,

(6)

,___..OUTPUT De

length with the preset inputs.

121

.--..ouTPUT De

These counters are fulty programmable; that is, the outputs may be preset to either level by placing a low on the load input
and entering the desired data at the data inputs. The output will change to agree with the data inputs independently of the
level of the dock input. This feature allows the counters to be used as modulo-N dividers by simply modifying the count

13)
......_....OUTPUT QA

~c1

16 NC

13

MAX/MIN
OUTPUT

.~:;::8 ~11~1~~~~-f-+-+-+-t-t--l--l-+-+-.t::::;:::::;:~~~~~~~-j-~-=======:..J

3212019

10 11 12

l13)RCo

1121

.r

m u 8
OmZ><

The outputs of 1he four masterslave flip-flops are triggered on a low-to-high transition of the clock input If the enable input is
low. A high at the-enable input inhibits counting. Level changes at the enable input should be made only when the dock input is high. The direction of the count is determined by the level of the down/up input. When low, the counter count up and
wwhen high, it counts down. A false clock may occur if the down/up input changes while the dock is Sow. A false ripple carry
may occur ii both the dock and enable are low Ind the down/up input 11 high during a load pulse.

l
l

')

~'lli

MAX/ MIN

CLOCK

Z5MHz
2SMHz

cte

't9t. "LS19t BINARY COUNTERS

111

CLK-V

r1~

Asynchronously Presetuible with Load

Control

Synchronou1 oper1tion is proyided by having aU flipfk>ps crocked simultaneously so that the outputs change
coincident with each other when so instructed by the
steering logic. This mode of DP9fltion eliminates the
output counting 1pikes normalty associated with asvn
chrono1:1s lrippte clockl counters.

Dl!CEMIEA 1972-REVISED DECEMBER 1983

COClnts 8-4-2-1 BCD or Binary

The "190, 'LS190, '191, and 'LS191 are synchronous,

reversible up/down counters hlMng a complexity of 58
equivalent gates. Tho "191 and-'LS191 1re4-bit binary
counters and the '190 and 'LS190 are BCD counters.

"'__,,_..__...__~,,_~,,;,--.'->,,~,

-~ -

TYPES SN54190, SN54191, SN54LS190, SN54LS191, ( )TYPES SN54191, SN54LS191, SN74191, SN74LS191

description

.I

- -

'

a.

-- --- - ----------------------------'

-~

ii

---

__
...

,_._

......._.......-..

TYPES SN54195, SN54LS195A, SN54S195,

SN74195, SN74LS195A, SN74S195
4-BIT PARALLEL-ACCESS SHIFT REGISTERS

MARCH 1974 REVISED APRIL 1986

Synchronous ParaUel Loed

SN54195, SN54LS 195A, SN545195 . . . J OR W PACKAGE

SN74195 .. JORN PACKAGE
SN74LSl95A. SN74S195 . D, JORN PACKAGE

Positive-Edge-Triggered Clocking

"'~' v ..
J

Direct Overriding Clear

Complementary Outputs from Last Stage

For Use in High Performance:
Accumulators/Processors
Sarlal-to-Parallel, Parallel-to-Serial
Converters

la:

..J

OA
Os
Oc
Oo

ao

11

)c

8.

T
17

Oc

16

NC

1s

Oo

Co

9 10 1112 13

oon
"
z0 UIO
z ..J-'

(.!)

i Iv
.J
.J

TYPE

'195
'LS195A

The high-performance '$195, wilh a 105-megahertz

tvi>ical maximum shiftfreciuencv, is panicularly attractive for very-high-speed data proc:essing systems. In
most cases existing systems can be upgraded merely by
using this Schottky-clamped shift register.

'5195

.I

TYPICAL
POWE A
DISSIPATION
195mW
70mW
350mW

..

wz

'

.H

x x x
x x x

' ADDUCTION DATA

TM Dcvrnent eont1i111 iatonn11ioa currnc a
11 pn i;c.1ion dtta. Prtdects conlor ta
~ttit111ptt

tbt sermsol Tn.11 l111tr11M1111

-,

=~~~liu:~.~::f:if=~.-:..~
'\

.......,, ..i"'

1-1 high IAYI l1teat1v autJ

L ,. low ,._,.1 Ctt. .dy ne1e l
)( irrele'llRl Cnv lnpul. includin9 lrn sit io n "
f 1ran~tion from IOw 10 h ltlh '-vI
a, b, c, d TM level o l 1tdYS1H inp1.1t 111 A. B.

or Oo, rSPctivetv. be
for tM indlcat ed ..t..av
1tate
i np111
cont1it1on1.

were euablished
OAr" 09,,, Oen the levI of DA, 09. or ac.
r'"P*Cll~ly, before the' mo1ot

X O.An 0An 09., Oen Oen

r..:t nt tnn1ltiori of che clock.

OAn Oen Oen

..__...

)o

TEXAS.

INSTRUMENTS
f'OST OFFICE BOX ~:15012 OALLAS, 1'UCAS 752ti5

<

!:!

i 2
~ i

.
~

; i

ag

iE !!'i.
.~ a

C. Of' 0, fe1P41Ct'vely
QAO 090. Oc o. Ooc. th IWI of QA, 09. Oc.

Oen.

!!!

. r-=

iC ~

OUTPUTS
INPUTS
SERIAL rARALLEL
SHIFT/
CLOCK
DA 09 Oc Do <io
CUAA
J
j( A 8 c D
LO"D
x x x x x x x L L L L H
L
x
d
d
a
b
x
x
b < d
H
L
<
L
x x x x x x aAo Oeo Dco Ooo Cioo
H
H
1
H x x x x 0Ao 0Ao Oen Oen Oen
L
H
H
L 0An Oen Oen Oen
f
L
L x x x X
H
H

_8

<
a:

..~ -

.FUNCTION
----- --- TABLE
. -----

If

..

NC No interl'IM connecVon

TYPICAL
MAXIMUM CLOCK
FREOUNCV
39MHz
39MHz
105 MHz

t ~I

I l

.J

..

CJ

..

Ill

shift/load control input is high. Serial data for this mode

is entered It the J-K inputs. These inputs
permit the Cirst stage to perform as a J-K, D-. or
T-type flip-flop as shown in the function table.

........
"
....
..."........
......
0

Shifting is accomplished synchronously when the

<.>
<.> <.>

5
6

clock input. During loading, serial data flow is inhibited.

.,,

o--~

10CLK
9 SH/Lo

3212019

j(

bi1s of data and taking the shift/load control input low.

The data is loaded into the associated flip-flop and appears at the outputs after lhe positive transition of the

14

13
12

-.u2>'1

Parallel loadtng is accomplished by applying the four

:a
"'
:;

ITDPVIEWI

Parallel Cbroadsidol load

ShHt Cln the direction QA toward Ool

- 18

SN54l.S195. SN54S191 .. FK PACKAGE

SN74L$195. SN74S195 . . FN PACKAGE

These 4bit registers feature paraliei inputs, parallel outputs, J-K serial inputs, shift/load con
trot input, and a direct overriding dear. AH inputs are
buffered to lower the input drive requirements. The
registers have two modes of QperatiOn:

15

A 4
B 5
c s
07

GND

description

e,

J and K Inputs to First Stage

logic diagram

fTOPVIEWI

Parallel Inputs end Outputs from

Each Flip-Flop

TYPES SN54195, SN54LS195A, SN54S195,

SN74195, SN74LS195A, SN74S195
4-BIT PARALLEL-ACCESS SHIFT REGISTERS

lel:

..

~1

L'.:

;:;"

~i
0 D

TEXAS.
OA~LAS.

INSTRUMENTS
POST OFFICE IOX ni0'7

z _g

TEXAS 7S1ES

','-..,.,._,./"')

:I.
:s

e:

g'"'
s,

f
1'

I
f

~~tional
~miconductor

Absolute Maximum Ratings

Recommended Operatln

(Notes I and 21
--(1.5 to +18 Voe
--0.5 to Voo +0.5 Voe

Voo de Supply Voltqe

V1N Input Voltage

CD4069M/CD4069C Inverter Circuits

Ts Storaiae Temperatur. Range

Package Dissipation
TL Lead Temperature (Soldering, 10 tteondsl

500mW

CD4069M

300"C

C~9C

-55C 10 +126C
-t0C to +85C

All Inputs are protected from damage due to static dis

chargit by diode clamps to V00 and V88 .

Features
Wide supply voltage range

This device Is Intended for all general purpose Inverter

applications where the special characteristics of the
MM74C901, MM74C903, MM74C907, and C04049A Hex In
verier/Buffers are not required. In those applications requiring larger noise Immunity the MM74C14or MM74C914
Hex Schmitt Trigger Is suggested.

3.0Vto 15V

High noise Immunity

0.45 V00 typ.

Low power TTL

compatibility

DC Electrical Characteristics
CD4069M !Note 21

fan out of 2 driving 74L

or 1 driving 74LS
PARAMETER

Equivalent to MM54C04/MM74C04

Schematic and Connection Diagrams

I
I

CONDITIONS

100

Quiescent Device Current

VOL

Low Le,.1 Outl>Ut VoltaQl! J Mol < lA

Voo= 5V
Voo IOV
Voo 15V

OuallnLiM Peck...

.-------..,..,.-u ...

,.

"

It

Voo5V
v 00 1ov
Voo 15V

"
High Level Output Voltage

......

voo 1ov
voo = 15v

vauf
V1L

Low Level Input Valtage

6 6 ova

V1H

High Level Input Voltage

TOPYllW

IOL

AC Test Circuits and Switching Time Waveforms

IOH

Via~
v J_ _v,

I .......

Van
llPUf

f :lr _,

llN

-L

Van

-11

OUTPUT

11
t,lfJI

...'1'

'""

Low Level Output Current

High Level Output Current

Input Cur,ent

I
I

-ssc
MIN

I
I

25C
MIN

MAX

125C

TVP

MAX

0.25
0.5
1.0

MIN

0.25
0.5
1.0

I~

0.051
0.05
0.05

--l UNITS

MAX
7.5
15
30

I I

0.05
0.05
0.05

0.051
0.05
0.05

A
A
A
v
v
v

llol< lA
voo = 5V

V110

w
w

310 15Voc

o to v 0 o Voe

General Description
The C040698 consists of six Inverter circuits and Is
manufactured using complementary MOS (CMOS) to
achieve wide power supp1y operating range, low power
consumption, high noise Immunity, and symmetric con
trolled rise r.nd fall limes.

VOH

Voo de Supply Voltage

V1N Input Voltage
TA OpeJating Temperature Range

-esc to +1SO"C

Po

'ndltlons

'\~"~'")

(Note 2)

llol<lA
Voo = 5V, Vo. 4.5V
Voo. 10V, Vo= 9V
Voo. 15V, vo 13.5V

, 4.951
9.95
14.95

5
10
15

14.951
9.95
14.95

I 5
3.0
40

I I

, 4.951
9.95

I
I I I
14.95

11.5
30
40

1.5
30
40

v
v
v
v
v
v

11 0 1<1A
voo = 5V, vo o.5v
Voo. 10V, Vo. IV
Voo. 15V, Vo. 1.5V

3.5
7.0
11.0

3.5
7.0
tl.O

VOO 5V. Vo 0.4V

Voo = IOV, Vo. 0.5V

0.51

0.88

l.3

2.25

VOD 15V, Vo 1.SV

0.84
1.6
4.2

3.4

8.8

Voo 5V, Vo 4.6V

Voo = 10V, Vo. 9.SV

-0.64
-1.6

-0.88
-2.25

Voo 15V, Vo 13.5V

-4.2

-0.51
-1.3
-3.4

voo. 15V. VtN = ov

Voo = 15V, VtN. 15V

-8.8

-<l.10

-10-5

0.10

10-5

-0.10
0.10

3.5
7.0
11.0

v
v
v

0.36
0.9
2.4

mA

-0.36

mA

-0.9
-2.4

mA

mA
mA

mA
-1.0

1.0

~National

.i::..

Absolute Maximum Ratings

Operating Conditions

(Note 1 and 2)

~Semiconductor

-0.&V to Voo + G.6V

Voltagt at Anv Pin

PaclcegeO;.ipetion

VooRlnll

CD4071 BM/CD4071 BC Quad 21nput OR Buffered

B Series Gate
CD4081 BM/CD4081 BC Quad 21nput AND Buffered
B Series Gate
General Description

Features

Theae quad gates are monolithic complemantaiy MOS

(CMOS) lntegratad circuit constucted with N and P.
ch111nel anhencement mode tranalnora. They ha.,. equal
aourca and alnk current capabllltl.. and conform to
etandwd B -lea output drive. The devlcH elao have
buffered outputs which Improve transfer characterlnlc
by providing YllfY high gain.

Lowpo-TTL

Storege Tern119...1ure

LNd T.._.,.tu,. ISolderlrie. 10 llCC>ndt,

fan out of 2drlvlng 74L

or 1 driving 74LS
compatlblllty
5V-10V-15V parametric ratings
Symmetrical output cllaracterlatlc
Maximum Input leakage 1,,A at 15 V over full tempera
ture range

PARAMETER

oo

Quiescent Device Cuffent

VOL

Low Level Output Voll

Schematic and Connection Diagrams

...

CIM0111

-Mn.I.JM-.,..
YOH

V1L

High level Output Vottege

Low Level Input Volt

c04011eM1co4081BM tNote 2l

-&5c

CONDITIONS

MIN

6'

'3.

i:e

s:

"R

I:

s.z

I('

fi

.....

...

1i
~~~5~~~p,
..: ~-. ".,__
J -A+9
Lagc.t-.., .. Hith
Logic.ti "'O" t.ewJ

......

Au inpvU p-OMCttd by stlnct.rd CMOS

proteetiaft c:ir~ll

...

...

IOH

.q

C :-\

J .... .

l1N

TYP

Yoo SV
Yoo. IDV
Voo. ISV

a .004
a .aos
0.006

Yoo SV }
Yoo. IOV 11()1< lA
Yoo. ISV

0.05
o.as

0
a
a

a.a~

4.95
9.95

Voo5V }
Yoo 10V llol < 1A
Yoo ISV

4.95

9.95
14.95

14.95

voo5V, voo.5v

1.5
3.0
4.a

2
4
8

3.5
.,.a
11.0

Yoo. SY. Vo. a .4V

Voo. 10V, vo. o.sv
Yoo - ISV. Vo. 1.SV

a.64
1.6

0 .51
l.3

4.2

3.4

2.25
8.B

High Lftrfl Output Current

voo sv, v0 4.&v

(Note3J

Voo . IOV, Vo. 9.5V

Voo ISV, Vo. 13.SV

-il.64
-1.6
.....2

-il.51
-l.3
-3.4

-il.88
-2.25
-8.B

Input Current

Yoo . 15V, V1N OV

Voo 15V, V1N. 15V

Low Lt'Vel Output Cur'mt

+125C

MAX

MIN

MAX

UNITS

D.25
0.50
1.0

7.5
15

...
...

3()

0.05
a .05
0.05

a.05
a.OS
0.05

v
v
v

4.95
9.95

5
1a
15

3.5
7.0
11.a

tNoteJJ

f UP"91f.f

C:IMOl1B
Oull~n-1.lno , .....

ltt,l,tJI

IOL

MIN

Voo sv, Vo 4.SV

VOO IOV, VO 9.aV
Yoo. 15V. Vo. 13.5V

TUfllltM

1}4of . . . . .....,,.,

+zsc
MAX
D.25
0.50
1.D

Voo. ISV, Vo. l.5V

Hifh L.w:I Input Voltq

voe to 16 voe

-m;c to +12S-c
-coc to +BS-C

CD>718C. CD40818C

Voo-== 10V, Vo - 1.0V

VtH

Opermting T9mperatura Ran91

C0.071 BM, CD40818M

260'C

DC Bectrlcal Characteristics SYM

All Inputs protected against 81atlc dltcharge with diodes

to v.,., and Vas.

Opera1in1 v 00 Aenet

500mW

-o.& Voe to +11 Voe

-e&c 10 +1!M1'C

14.95

1.5
3.0
4.0

1.5
3.0
4.a

v
v
v

3
6
9

3 .5
7.a
11.a

O.BB

a .36
0.9
2.4

mA
mA
mA

-i).36

"'"'
.....

-().10

-10-S

0.10

10-5

-0.9
-2.4
-11.10
0.10

mA
-1 .0
l .O

...

Not 1: ..Ab10lute Maximum Rlitinp.. r thOM vlue1 b1yond whict) the "'tv of ttte ct.vic4 cennot be g119ran1nd. E~ for ..Opwtint
T.nperaturt Range.. they en not ment to imply the? the dnict should be operat.S at theM limit1. The tabte of ..Electric.f Charei:tetiltic:s"'
provides conditions tor ectu" device optrafion.
Note 2 : All volt1911 m1uf9d with '111P1Ct 10 V55 unleu otherwise 1PKifitd.

......

...

Not 3 : IOH W1d loL 11Je mttd one outpwt 1 a time.

...,_

OIW Number CIM0111M.I, Cll40711CJ,

CD40l11MJ or CD40l11CJ
See NS Plokage J14A

L.otlc_. ..... ... Hith

Logielt .,, Low

TU,ntn4

. .::.::.:::::-......

CMOS

OIW NumlMr CD40711MN, C040711CN,

rMl11MN or CD411111CN
S.. NS Pacbge N14A

d?~.,.

\
!i

. . . . . ._,,,,,-f

,,,.--,
- ..\

/ - "-...\

,t

.."

"<:I
~

'j

I
l
~

l
1
I

j
'i

l1

5
[
!:.

Er

"&

DCr:..c;rlcal Characteristics
SYM

too

I Quiescent Device Current

_I

VOH

H~h Lml Oulpul Volt1g<

V1L

-I

Low level Input Voltage

t1'

E!.
n

0
::s
C>.
c
n

~
n

i.
Cl

MAX

VDO 10V
voo 15v

...

MIN

Voo a 5V

I Low L..;lou1ou1 Volt... I VoD sv

~.

!!!..

-.oc

CONDITIONS

::s

g,

VtH

1 High Level lnpU! Volt I

llol < 1A

Voo 5V }
Voo 10V llol < 1A

4.95
9.95

voo 1sv

14.95

IQH

MAK
1
2

0.05
0.05
0.05

0
0
0
4.95
9.95

Voo "' 1sv. Vo. 1.SV

4.0

2
4
6

3.5
7.0
11.0

3.5

0.52
1.3
3.6

0.44

VOD SY. Vo 4,6V

VoO 10V, Vo 9.SV
VDO 15V, Vo 13.SV

-1).52
-1.3
-3.6

-0.44

Input Current

v 00 15v, v1N ov
Voo. 1SV. V1N. 1SV

-0.30
0.30

o.os
0.05
o.os

v
v
v

0.05
0.05

us

v
v
v

9.95
14.95
1.5
3.0
4.0

1.5
3.0
4.0

v
v
v

0.36
0.9
2.4

mA
mA
mA

-1l.88
-2.25
-8.8

-1l.36
-0.9
-2.4

mA
mA
mA

-10-5
10-!i

-1.0
t.0

-0.30
0.30

A
A

AC Electrlcal Characteristics

,1

li

SYMBOL

fPHL

I Prop1g1tion Del1y Time, Hfgh:toLDw level

IPLH

tTH L.tTLH

j'

PARAMETER

I Propagation Dtlay Time, Low-to- ~igh.Levet

I TranMtion Time

C1N

I Aen19e InputC1patjt~e

Cpo

I PoMr Dissipation ~i::iacitv

voo" 5V
~

10V

voo ..

15V

VQQ

Voo. SV
voo = 1ov
Voo. ISV

Voo. SV
v00 '"' 1ov
VOD 1SV

l'

CONDITIONS

TYP
100
40
30
90

40
30
90
50

40

Anv Input

Any Gate

18

UNITS

250

"'

100
70
250
too
70
200
100
80

7.5

Note h " Absolute Maximum Rating$" are those values beyond which the safety of the device cannot be guarlntettd. Except for "Operating
Temptrature Range" they are not meant_to imply that the devices shoukl t>e operated at these limitt. The table o f ..Efeetrical Characteristics"
provic:lti conditions for actual device ciperation.
Nott 2: All wltages measured with ntspect 1.o Vss unleu otherwise specified.
Note 3: loH and IOL are tested one output 11

0
Ul

ii

40

30

VDD sv

120

VDD tOV
VDD 15V

50

"'

"'
ns

35

250
100
70

VDo = sv

90

200

ns

VDD = tOV

50

100

"'
"'

VDD t5V

40

80

7.5

pF

CpD

Power Dissipation Capacity

Any Gate

18

"'

pF

Typical Perfonnance Characteristics

..
a

TAll"C

v00 -uv
II

J"

..~-

Voottf
II

.r.

..f" I

..

II

..
!

~!:

"

;
i
l

'
~

I
I

..
I

Voo 1tv

YooIY

..
..,._.

T~nc

ri

'

"

"

HTM:uTS

11

..~ ..

Y1 - llfPU1 YDL T.lGE IW!

I
I
"'oo.tOY

...I

0111 . .TML'f'

T~llC

J.

. ~ ..

.;r

'
~ -vr'v 1

" " "

I

V1 -ltH'U1' VOLTAGE ~Yi

C...ltl
1, .. nc

Yoo. UV

"

I
'"

Voo 11V
II

1100 .. 1v

I
"

..~..
..
"f t~'8977-I

TU111-."'74

..
f
..
i= ,.

FIGURE 3. T'fPlml Tnl'llf

~--

~~

c
0

'-- 11PML&1'LH

CIWllll
,,..2rc

Ct I011f

..~L.. L..
i:=
..

t~

...

..
ii
!l

CMJll

l.tll"t
CLM,,

:r "'

"

01&(11.,UtGJILY

FIGURE Z. 1)oplool Tr.-

..I

V1 - lllPUT VOLTAGf IWJ

Ci>orsWlrOtco

CM111

YooISV

..

CO.ti

W1-lllf'UTYDL1A.GEM

a..-"'

ti

I
VootlV

FIGURE 1. T _ , T..-

..
pF

ns

VDD. tOV
VDD 1sv

Any Input

!;

pF

UNITS

250
100
70

Average Input Capacitance

"'

"'
"'

MAX

100

C1N

MAK

Tran1ilion Time

TYP

"'

'
~

CD4071BCICD4071BM

VDD sv

Proplfltion Delay Time. Low-toHifh LOYel

ITHL.tTLH

TA= 25C, Input tr; tf = 20 ns. CL= 50 pF. RL=200Kl1 Typical temperature coefficient is 0.3%fC

CONDITIONS

Pr-tion Delay Time, HightoLow Level

tPLH

PARAMETER

SYMBOL
IPHL

~!:

~-

co.oaiee1cpa1eM

oA

0.88
2.25
8.8

1.1

-3.0

A
A

v
v
v

3.0
-1.1

7.5
15
30

3.5
7.0
11.0

11.0

Voo =10V, Vo o.sv

Voo 15V, Vo. l.5V

UNITS

3
6
9

7.0

voo - sv. v0 .. o.4v

+85C
MIN
MAX

o.os

5
10
15

14.95

Low Level Output Current

1 High lewtl Output Current

f

MIN

tN01e31

(Note 31

,,,.,

TYP
0.004
0.005
0.006

1.5
3.0

voo sv. vo ...sv

zs"c

1
2
4

voo sv. vo o.sv

Voo. 10V, Vo. 1.0V

v 00 10v. vo 9.ov
VOD =1SV. Vo 13.SV
IOL

....-!

AC El.c~rlcai Characteristics

TA 26C. Input tr; tf 20 ns. CL 50pF. RL 200K TypiC<il tempemure coefficient is 0.3%fC
PARAMETER

voo.,. 1sv
voL

;,

\.,_.../

C04071BCIC04081BC (Note 2)

liDo 1ov

.
s

f '

"
Yoo -

,.

IUPPU VOLt AH (VJ

"

llO

,~

'

" "
Voo - SUPPLY vtlTAGI !YI
II

I01MlfH'UTI

time.

TUFlll774

FIGURE . Typlool T.....

0.-lrOtco

rur1M n -10

Ti..Jlltt1'4

FIGURE Ii

FIGURES

MC14051BMC14052BMC14053B

0
a'I

MC14061B
MC14062B
MC14063B

@MOTOROLA

ELECTRICAL CHARACTERISTICS
Cflrcllffllllc

Sptttol

I voo

'-

r . .1 COftdlUon

SUPPLY AEQUfAEllENTS fVOltaiges. Aelrenc:ed 10 VEe:l

Powor Suopty Vota,oo

The MC140S1B, MC140S2B, and MC14053B analog

multiplexers are dlgllally-conlrollad analog swllches. The
MCl4051B elfecllvely Implements an SPBT solid slate awllch. Iha
MC14052B a DP4T, and the MC14053B a Tripi SPOT. All"""
devices fealure low ON Impedance and very low OFF leakage cur
rent. Control of analog slgnals up to Iha complete supply voltage
range can be achieved.

Ouoes.cttnr Cunent Per

CMOSMSI

I DC Supplv Volt age (Reletenceel to VEE

Y11:.!:. V_E.E.)

- o.s 10

fetal Supply Cuuenl

(Dyna"'4C PiuaOutetcent.

Per PCkoI

lew

CONTROL

Unll

SOD

mW

-6510 ... 150

c
c

POW<*r OiHipahon. pe1 Pckllgat

lL

Lead Tempera1u1 (&Second Sotderlng)

--L IUPFIX

'IUFPllC

P't,.ASTIC l'ACAG

v...

H'IJ)Ut Leak90e Cutttnt

(CUCP Dewice)

...

AS.rlea: -H"Cto 1zsc

MC t4'P(X8Al 1c.tanoc Psctt111 Onty)

Pekto

{.

I
~

,,

Con Hoh

13

MC14XXX8CP CPIMlle P1111ka9e)

uc,.xxxacc. ic.rall'lk , . . . . .,

lwotC~
1n01t1

15
3

""

Co"..
Our n

12

11
t

,,

'\ <~j

22
4.SO

40

875

351

2.15

''"

IVinOoVoo

:011 -

'"'

1s

lv,n

:03

on
Aon

oo

,.

Aon - per epec.

1.0

per iapec

10
'1.0

"0

001 Yoo

s. ~

5
30

3 .0

8 .2 5

40

13.

1.0
11 .0

l:o.000011 .:.0.1

: 10

:0000011 :0.3

: 1

oI

so I 1.s

..
.-A

pF

tYOHagH Rerereneed to YEE>

ChMI On (If Off

Voo

oo

voo I

Ypp

Ct1a11nel011

600

600

300 - I

rnV

.'...

1300
550
320

"

1200

"""''

.....

An,- f 111iO ChannelS

,,. 1he Satnt Packa;te

OllCtiannel Leekage
Curre11t IAL. De.ice)

Con,.ott{ 1~

1
IS

13
Out/In
SwitcMt { 2
In/Out
1

Commons

Yoo. PM 1C
Vg P' lnl
VII Pin 1

v85 m

"'""be CY55.

..,.
O

50

::: 100

:::oos

: 100

290

300

..
70

1000

Anr On Chennef

Yj.,. .. Vu .. o r V1H (Conl rOI)

Chanl'\8'1 10 Q\enn11 a.-

1::: 3001

::: O.OS

: 300

..
10

klhibil Voe

Co11

Inhibit VOO (MC1405t8)

(MCt4052BI
(MCt40538)

CtlO

... ...

290

120
ID

.v

500

..

Yin V1L ot Y1H ICOfttrOI)

Ch8"nel to Ct\anntr or

C110

OH)

eo

70

Capacdance. Common on

~ChaMftl

...

220

and V1n - o to voo (S"'itc"I

Cac>lcdance, Swtlcn lfO

C.pac1t1&ne9, F. .dlfllroUQ"

2. .

IOO

6VawiJc,, SOO mv...

Yir1 VJL Ol Vttt (Control),

Any One Channel

(F'51ur 10)

Ou1ll11

,.

10

...
...
...

6Vwiteh c SOD ftlVu,

Y1n .. v 1L a.- Vitt (C ontro l),
ano Vin O to Yoo (5Mtehl

v 00 "'" 11

...

0 11-crianne1 Leoaae
C1.1ffen1 tCLICP ()ey1Ce)

12

..

1011

(Ftgute 10)

10

Yin Q V. No lo.td

.... ,...
..

A ON Aes1star1Ce Between

Tripla 2.chll..,.I
Multlplu/D-ltiplox

V1 6" 1
~~:itlfol lnpull ref.,.nctlld to Yss. Anoe Inputs end Outpub ,...,.._ 10 VEE. YEE
f

10 0
loo

..

... ..
300

1-1 1 ..

30

ltott

oo

* lfO!lr
l'in 1e
ftln a
"EE Ith\ 7

Aon .. pet psc ,

ltanper..,.c

IS

ON Ftea.atance

(CLICP Device)

v 00
Vss

CVotet Ret-.ncect 10 Vssl

10

Ou1pu1 OllHI VOitage

I AL Oew.c.e)

Swttch..
tn/Ou1

...

20
40
80

0010
OOIS

,o 36 _..AlkHzt

...

,.

6Ywitch

ON Ae tance

} Common

13

.oo. 1

Dynamic Votege Acroaa

th S111111:c h. . (F1oure S)

MCl-

12

..

li

Conuo{:

tO

300
600

20

to 0 1 ~1kHZ)1
{ (D 20 ti-AlkHt)I

(V"'- V01.11ltAQft, It not

10

110

Aec onunencfed Static or

CStrln: -40-c to .. tsc

Dual 4-Cllanrwl ArwlDI

Miiltipll-/Demullipla

Multipl_IO_iJllH

g,

Typical

C:Plannal compot111n1,

... ..

Out ol lhe Sw1tcP'I

MCI-

I.Channel An11lot

l(Tfle

I .

.....

Peak Yollge 1n10 or

OllllQIOIQlllFORllATIOll

(")
MC140518

C,.

lnPUt Capac11ancie

"Maaimum Ptaling1 are those watuea beyond wl'lic:;h damage to 1P'le device may oec.ur
tlemP'lVfa Oeratina: Plaslic " P" Package: - 12mwr c rrom 55c t o asc
Ceramtc: "L" Package: - 12mwrc hom 1ooc to t2!l-C

-8

_ I
1-

TA .. tsConty

tO

IS

INHIBIT, A , B , C

IAL Devu:e)

CASE . . .

Cl ..AMIC PACKAGE

'25

Storage Temperatu re

IN~TS

1npu1 Leak9ge Cuuent

Recommended

-os1ov0 o +o.s I

SW11ch Thtouoh Cuuent

YllQ ... Yoo.

and AVwttch SOO mV

0 10
00 1!>

20
40
80

15wi1Ch t/O. VE

SWITCHES IN/OUT AND COMMONS OUTnN - X, V. Z

....
....

'DCAV)

111QhLe\l'el tnpu1 Votta;

+ 18.0

: 1Q

Po

LO*Lwel lnpuJ Vottage

per Control Pin

Tata

. I _I o

20

and AYwlef'I C 500 mV

Tttt1t1
Min-[ liH

ltlc.luded.,

I lnPul Curren! (DC or Tran1en1).

lin

O
15

fyp

0 ...

Ccn1ro1 tnpuls: V1n Vss 01 Yoo.

100

I lltft

Yoo. 1

to 1sw1tcn 110. Yu c v,IO .. voo.

Pa c kage ICLICP Oevoce)

Vm. VOi.it tnput or Output vonage (DC or Transienl)

(Relarenced 10 Yss tor ConlrOI Input and VEE
lot Switc:n 110)

Contrcl lnpurs. Vm Vs$o'

1!t
Qwescenl Current Pet

CASE I'

Yoo

100

Pac.11ago (AL Device)

ANALOG MULTIPLEXERS/
DEMULTIPLEXERS

Diode Protection on All Inputs

Supply Voltage Range 3.0 Vdc 10 1a Vdc
Analog Vottaga Range (Voo - VEE) 3 to 18 V
Note: VEE mull be ,. Vss
Linearized Transfer Characterlallcs
1-Noisa -12 nVi./f!Y'Cii, I 1 kHz lypicel
Pin-for-Pin Replacement lor CD4051, CD4052, and CD4053
e For 4PDT Swllch, See MC14551B
For Lower RoN. Use Iha HC40S, HC4052, or HC4053
HlghSpaad CMOS Devices

Value

voo3 ao vss Vee

ILDW.PDWUI C~LEMENTARY MOSI

MAXIMUM RATINGS'
Sy"'ltotl
Pare,..._r

oo

l'tllttgC!

ANALOG MULTIPLEXERS/DEMULTIPLEXERS

....

21c

Mht !Mu

1:10001 nA

pF
pF

32
17

Pina Hal Adjacent

0.15

Pint Adl*Cenl

0 .4 1

pF

- ssc 101 M. Dewie:. - -o for CVCP O.wie.

Devtc:.

' '"D" . + 12s c fOf AL

15~ IOf CUCP Deice.
- Data lebeleod "lyp it not llO De UMd lor deaign purpo. . .. t>u' t9 Mtentt.d Han tridk:elion ot.,.,. IC' a potenUal perf0tmence

dropt 1c rou tM tWieefll (6Vwttehl >IOOmV C>300 mv a9 l'VO" iamperetute), Hcaive voo current may be drewn; i.e . rhll c:urren1
oul or th hWtlch rnay cont.WI bOth Yoo and awilch tnput c omponenta. The rehabifdy ot traa device .,;t1 be unettecled unleH the Maximum Ael
.-r'--.~-~~ino a1e eKCeected. (See fif'SI page of thia dela .,..__,
H f Of YOHage

),

~-

-'"-.___,f"

1
J

l
l
l

a,

l'

l
1

tLOWPOWEA COMPLEMENTARY MOSJ

Diode P'rotection on All Inputs

Supply Voltage Range 3.0 Vdc 10 18 Vdc

--

Capol>lo of Driving Two Low-power TTL Loads or One LowPower

5cho11ky TTL Load over the Raled Temperature Range

MAXIMUM RATINGS (Vorn1g11s Retitrel\Ced ro Vss>

Symbol

Peremr

lin. lou1

Po

- osrovoo

(OC o' T1a,,s1cn1

J lnpul or Output Cuuenl tOC or T1ans1enl), pe1 Ptn

/Power D1H1palion. pet Pa.ckaget

500

!Storage Tempera1urt

ls1a

JLead

fl

CERAMIC 'ACK.AGE

'LASTIC iaACKAOE

CASI: 820

CASE 648

OUENNQ IMPOAMATION
MC_1 4XXX8AL CCe,.mlt; PKlil9p Chllr)

CS

10

65toIMI

..w
c

260

lemp_era1ure (8-SeeonCil SOfctennol

P SUFFIX

A Serliff: -55-C to ll&"'C

-0510 180

Youd Input or Output Voltage

L SUFFIX

Unit

Ylue

Joc Supp1r vouaoe

Voo
Vin.

MCt4XXX8Cl.

1Nl'UT

Ein

I
I
1
I

0
0
0

01. Oii

" "

1
I
I
1

O&
)(

D4

03

" "

01

01

00

)(

)(

)(

GS

"I x "x " xx xx "" 1I

0
1
1 x " 1I
0
x
0
I

I 1
0

)(

)(

0
0

0
0

0
0
D
D

D
0
.0
0

)(

D
0

)(
)(

01

1
I
I
I

D
0

0
0

01
0
0
I

QO

'

l
l

05

Eout

IS

06

GS

14

1
0

07

03

13

0
0

Ein

02

12

01

DI

11

01

DO

10

00

Thf:t d1vlce contalnl protection ctrcultty to guard agalnat damage du 10

high ltaUc vohO or electrfC telda. However, prKauUone mu1t ~ taken
to hOld_ appDeatloin1 of any Ohg hlahr than maximum rated Ol'8QN 10
this high..mpedance Circuit. For proper operation, Vin and Yout lh0u1d be
canatralfted to the range Vss c (Vlft or V0 ut> c Yoo
UnuMd &riputa mu1t atwaya be U-S 10 an mppropriate loglc voltage level lD
lttter Vas or. voo). Un1.11ed outpwta muet be latt open.

0
'-I

16

CV OH 9.5 Vdct

IVoH 13.5 Vdcl

SiftIt

CVoL 0.5Vdd
IVOL 1.5Vdd
IOulpul Orn. Cun .nt (Cl/CP
IVOH 2 .S Vdcl

......'""'
Sin'

c:::j Vss

Device

4.9S
9.95
14.9!'

IOL

s.o
5.0
IQ
15
5.Q
10
15
5.0

s.o
10L

...
I;.,

10
15
5.0
10
15
IS
IS

4.95
9.85
U.95

1.5
3 .Q
4 .Q

Min

oo

5 .0
10
15

oo

5 .0
10
15
S.O
10
IS

tPet '-"....
IT

T1oe -H'C torM. o..tce. -40'C tDtCLJCP'.o..k:e.

T Meh + lft-C for M. 0.WC., +M-C tor C\.IC" 0.W-k:i9.

'' .....,....,,,... w

lmendeCIUMlfldicedonllf tC'aPl*'f'tial pe~,

0 .05"

0.05

..
10

..

2.25
6 .7S

3 .5
7.0

11.0

11.0

UQ
8.25

-3.0
-0.84
-1.B

-2 .4
-0.5!
- t.3
-3.4

-0.BB
-2.25
-B.8

Un,1

Ydr:

Vdc

Vd<

V<k

4 .95
9 .95
14.95
l.S

3.0
4 .0

4 .50

0.05
0.05
005

0 .05

3 .5
7.0

3 .0
4.0
J .5
7.0

2.7!i

11.0

I mAdc

-4.l

0.'4
1.6

0 .51

-L1
-0 .36
-0.9
-2.4

-4.2

0.88
2.25
88

o.36
0 ,9

..,

I3
3.4

-2.5
- 0.52
-1.3
-3.B

-0.44

-1.1
-3.0

- 2.4
-0.88
- 2.2&
-8.8

0.52

0 .44

088

1.3

I .I
3 .0

2.25

-2. 1

J.6
tO. t
O.l

IOYtelaftt Cuuent IAL Onic:et

<Per PackI

o.ta .--.. "Twi'" "noc M YMd

ThMlf'I

M,.

&.O
10

--

10
10

o
80

--T~AdC

2.

IOH

Ci"

Total Supply Cuttenr t

fOYntmN: plus Quietceltt,
PlffPa::btel
tel so pF o" 911 outputt, an
bullen tw1tc.h tn11

25C
Typ If

0
0
0

0 .0 5

..

Oulfteftlt Currtnt lCL/CP 0.v.:t

0
0

PIN ASllONMENT

"'oo

0
0

Eou1
0

04

IOH

fVOL 0.5 VdcJ

VoH

10
IS

s.....

M"'

o.os

to

f0cnpu1 Dtiw Current IAL O.vnl

tVoL 0.4 Vdd

M"
0 .05

&.O

.. , L9Wl

tVOH 2.SVdd
(YOH 4.&Vdcl

,_.

Mit1

Vol

IVo t3.50r 1.5 Vdd

r...,,

VoH

"O"~I

IVOL 1.SVdel
Cvrreru tAL
'"put CUn'eftl (CLICP DevictJ
1n.pu1 C.-cit~
,..,.,. 01

Il

&.O
10
15
S.O
10
15

9.0 or 1.0, Vdel

(VOL 0.4 Vdcl

XOon'1C..

VOL

CVo. a 0.5 or 4.5 Vckl

(VO 1.0 Of 9 .0 VckJ
<Vo. 1.Sor 13.SVdc;t

tCermic- Padl:9(Je)

OUTPUT

tV OH 4 .fi Vdd
fVOH 9.5Vdd
tVOH t3.5 Vdd

TAUTHTA9LE

IVo

CS.llf: - ..-CIC>IFC
MCHXXlCBCP tPlade Peckafl)

'M1rnum Ratings are those values beyona wt11cn damage to the oev1ce may OCCUI
tfemp8falure Oera11ng Pie.she p.. Pac~e '2mWl*C lrom 65~ to esC
Ce,am1c t,."" Package - 12mw1c from lWC to 125'C

"'l'Le~

Vin'" Dor Voo

8-BIT PRIORITY ENCODER

_j

oo

vin . Yoo' o

Input VolUrge

l
!

crt.e~'

....

,,_,

IVo 4.5 IDr 0.5 Ydcl

0Wo'PUt Yollage

IEou1L

.l

MC14532B

Ct..r.ct.,lt.tic

CMOS MSI

The MCl4532'8 is constructed with complementary MOS

(CMOS) enhancement mode devices. The primerv function of a pri
ority encoder is to provide e binv address for the active input with
the highest priority. Eight data inputs 100 tlvu D71 and an enable
input (I; inl are provided. F iwe outputs are available. three are .ctdress
outputs (QO thru Q2). one group select tGS) and one enable outpu1

/i

I~

\"'--')

8BIT PRIORITY ENCODER

..,)

ELECTRICAL CHARACTERISTICS cvo1ta,H Aeferet1ced to V55l

I MC1~32B

~ MOTOROLA

(~~

8.8
t0.00001
l0.00001

- TmA.tc

o.36
0 .9
2.4
tO. t
tO.l

""

7.5

0 .005
0.010
0 .015'

5 .0
10

o.oos

20

150

0 .010
0.01$

o
ao

300
600

,.

""

......

1&0

JOO
600

ly U.74 11A/ltH11 f . oo
., C3.&5 .,..., .. Htl I . loo

r tS.73 .,AA.Hr! f too

-n. fOml!llU 9twen are tor~ tJp6cel CUlec10.UC. ant)' 111 Z&"'C.

._,.other ntan f f pf:

fy(C1,.) - ltilO pFJ + (CL - IO} Vfk

..._.: tr 11 tn PA,,., peckate). ~ mf/1. v cv00 -vasl ftl VGtra,

f tt1 ldU la ltlput lrequMCy, Md k - 0.001.

Ade

l1.0

&O

tTo c~ ~ tupply curren1 .a

mAdc

-1. 7

-0 .36
-0.9
-2.4

,.Ade

I .....

QO

~NaHonal

Absolute Maximum Ratings

Industrial Blocks

D Semiconductor

Supply Voltllf

LM5551LM555C Timer
General Description
Tht LM566 ii 1 highly 11abla device for 11n1r11ing
occurtte time dtloys or oscill11ion. Additionll 11rmin1l1
.,, provided for lriggerint or Hiiiing ii dtli1fd. In tho
lime dtloy mode of opanrlion, tho time is precillly controlled by one ox""'-1 rtsistor end upacitor. For 11tablt
opor11ion an oscillllor, !ht fr running frequency and
duty cycle are accuralely controlled with two 1x1orntl
rtsislors and one cepacitor. The circuit moy be triggered
and reset on filling wo..lorms, and the output circuit
un source or sink up 10 200 mA or drive TTL circuits.

Features
Direct repl-menl for SE!i!i!i/NESSb
Timing from microseconds through.hours
Oporotos, in both astlbl1 1nd monost>ble mod ts

Adjustll>lt duty cycle

Ouiput cm source or link 200 mA

Output tnd 1Upply TTL cornpotibie
Tempor11ur1 otlbllity boner lh., 0.005% par C
Normofly on end norm11ty off output

Electrical Characteristics
PAllAllETIR

AppllcatlOns

+18V

Power Dissipation (Noto 11

Opoming Tomparoturt Renges
LM555C
LM551i
Stor111 Temperature Rlnll
Leid Temperature (Soldering, 10 11condsl

600mW

oc to+10c
~sc to +12s0 c

-ii5C to +150C
300c

(TA 25C, Vee +SV 10 +ISV, unleu 01htrwi11 _.ilitdl

MIN

Precision timing
Pulse g1n1ration
SlqlMttiol timing
Time dtloy genomion
Pulst width rnodui1tion
Pulse position modulation
Linear ramp gen1r1tor

Supply Vo....
Suppty Current

3
10

A... At 1kto 100k.

Ofitt with Suppty

Schematic Diagram

Tril(llrVolt

Vee 15V
Vee SV

Re111 VOIUfl

~IU'mlT

Threshold Currtnt

Connol Volt Ltwtl

"".

'g

' t#.

I:

Outpur Volt Dtop (Lowl

OullltH.klo-...

Connection Diagrams

IH ~

,.--I-=-- +Ve.:

TRIHlR

DllCltAflll

TKIHIMDLG

ClTllDl
VOLTAll

RISlT

15

mA

"

ppmfc

..,.."

Ordar Numbllr 1.MSllJ or LMISISICJ

Soo NS P - HCllC

Soo NS Plcoto .ICllA

0.867

0.667

0.01

0.5

0 .5

0.1

O.

0.1

0 .25

10
3.33

l0 .4
3.8

150
70

9.8
2.9

"

ppmf c

"

OJV

Vee

1.87

0.5

0.9

0 .5

0 .1

0 .4

mA

0.1

0.25

10
3.33

""v

100

100

nA

100

180
80

200

mV
mV

0 .1
0.4
2
2.

Q.25
0.75
2.5

0.25

0 .35

0 .4

9
2 .6

11

Vee t5V
f11Jif 10mA
laiN SOmA
l11N11t IOOmA
l11Nfll "'200mA
Vee 5V
ls1N11: 8mA

0.1
0.4
2
2.5

0.15
0.5
2.2

0 .1

0.25

lsouM.- 200 MA, Yee 15V

lsoufll:et 100mA, Vee 15V

13
3

12.6
13.3
3.3

12.75
2.75

12.5
13.3
3.3

v
v
v
v
v
v

A... Tim1 of 0..tput

100

100

Ft11T... ol0....,.

"'

100

100

"'

No 1: For operedng et all'tltld 1tml)eretunt -ch devict mull be dtr1tld beMd on +1&oc maximum junctiori ~cure Ind tftermet

- 2 : Supplycurr..1-'"''""'hlthtvoicallv I mAlettotVcc sv.

_ ,, T-otVcc6VondVcc t5V.

Ordef Number LMIACN

Onflir Num'* LMllSH, lMUICH

2.25
llO
3.0
0.30

'911ttMcli of +41CJW Junction toe. . for T0-5 end +1eoC/W Junction to ambient fo,. bod\~.

TO,VtEW

SooNSP--

2.5
0. 15

1SJNic SmA
Output Volt191 Drop IHifhl

DUTf&lf

mA

...

0 .4

Vc:c: 15V.1115mA
Vee 4.SV, 17 4.StnA

Vee SV

0. 1

P'tn 7 Sit fNott 51

1.5
0 .05

5.2
1.9

Pin 1 Lhkll' Output .....

rm

Output low
Output Low

T8' VIEW

I
IO

1.8?

(Nott4)

Vee 15V

Vee -.sv

f!!1

UNITS
MAX
18

0.6
30

RnttOmtnt

12

48
1.45

TriprCurrtnt

TYP

3
10

1.5

Tllrtlhold Volt

4.5

llO

Drift with Supply

-c...-..

18

L_,.

TiMint Error, A1t1tlll

lnltill Ac:c:urle'f'
Drift with T1,,...ra1urt
""1o:ufle'f' vw.t Temp11r1tur1

MIN

C 0.1~F. 1Now 31
AocuflCY CMf ftmOf'etUfl

MAX

CNott 2l

Tinting rr0t, MOtwMt.,,t

tnilill AccurlCY

Drift witta TtfnPlfaturt

TYP

4.S

Yee .. 5V. A\.Yee. 11SV. AL ...

Clow State)

LIMITS

.._

CONDITIONS

/.)
~-

. . . . 4: TMt wUI dlqrmir. the maximum ftlue of RA+ Re for 16V operation. TM ftMXimum totaf fR.t. + Rel ii 20 MO.
Noll 6 : No prOtlCdon lglln11
Pin 7 C\lrRnt ii ,__ry provklk\t ttt. peckege dittlpetion rH~ng welt not W exr

xceal

..._......,,.

'O

:i.

["'

!!.

Er
~

~
;

., ~
attonal

LM741/LM741A/LM741CILM741E Operational Amplifier

~.

General Description

The LM741 series are gener1I purpose operational

amplifiers which feature improved performance
over industry standards like the LM709. They are
direct, plugin replacements for the 709C, LM201,
MC14391nd 748 in most applications.

e.

le'

e.
g

Operational Amplifiers/ Buffers

tection on the input and output, no latch-up when

the common mode range is exceeded. as well as
freedom from oscillatk>ns.

Absolute Maximum Ratings

Supply Voltage
Power Dissipation !Note H
Differential Input Voltage
Input Voltage (Note 2)
Output Short Circuit Duration
Operating Temperature R1nge
Storage Temperature Range
Leed Temperature
(Soldering, 10 seconds)

LM741A

LM741E

LM74;

LM741C

22V
500mW
30V
15V
Indefinite
--ssc to +12sc
-65C to+1soc

22V
500mW
30V
15V
Indefinite
0C to +70i>C
-tisc to +1so0 c
300C

22'/
500 nW
30V
15V
Indefinite
-ssc to +12s0 c
-osc to +150C
3ooc

1BV
500mW
30V
15V
Indefinite
oc to +1oc
,;s"'c to +1so0 c

300c

300c

The LM741C/LM741E are identical to the

LM741/LM741A except that the LM741C/
LM7 41 E have their performance guaranteed over
a 0C to .+70C temperature range, instead of
-ssc to + 125c.

The amplifiers offer many features which make

their application nearly foolproof: overload pro

Schematic and Connection Diagrams

...

(Top Views!

c.

l'S
0..,

Electrical Characteristics
PARAMETER

(Note Jl

CONDITIONS

LM741A/lM74tE
MIN
TYP
MAX

LM741C

LM741

MIN

TVP

MAX

t.0

5.0

MIN

TVP

MAX

2.0

6.0

UNITS

TA 2S"C

lnpL.tt Offset Voltage

Rs-:; 1ou1
Rs~

son

0.8

mV
mV

3 .0

TAMIN 'STA$ TAMAX

Ass son

.o

RsS10kU

.
'"

6 .0

Av.rage lnpul OflMI

VoltqOrift
TA 25"C, V5 .. !:20V

!15

-"!.10

Range

Input Othet Current

TA .. 2S"C

1 .0

TAMIN <;TA< T AMAX .

Averagir fnpu1 OffHt

mV
mV

.V/C

IS

lnpu1 Offset VoH19t

Ad;un~t

7.5

30

,.

200

10

85

500

20

..

mV

t.15

200
300

0 .5

nA

nA/C

Current Drift

......--~....~~....~~~._~_.~...~~--<~~~~-<~

Input Sias Cutr1n1

TA'" 25"C

~~

......~e~c-::
P~~
Jt'lllllllllI

_,.11u111 '

lnpUI Ft.si1t.1nc.

lftlltM4--I

. . . ~ .. wtlll,111(,

1411"1

llUl!-1

TA

25"C,

Vs"

nput Voluge R&n9e

1111"1

120V

'"'"~u

Large S1gnI Volt'9! Gin

1.0
0.5

80
0.210

t.12

'$ TAMAX

TA c 2S"C, RL >. 2 kU
Vs .\20V. Vo"'! 1SV
Vs t15V, Vo~ .tlOV

~B~LIM
Pode.::
IC'

u-.

f IK

UT111 t

"w

-11 '
I

9C'

'

Ou1pu1 Voluge Swl!lg

2.0

M<l
M<l

t12

'!:1J

t13

V/mV
50

Vs,. t.20V, Vo !15V

Vs.tlSV, Vo t.10V

32

10

nA

0.3

50

Vs !SV, Vo"' :!.2V

200

..

20

200

V/mV

V/mV

IS

V/mV
VJmV

V5 t20V
RL~ 10k12

16

Al~

:115

Al~

tff.11111"

2 kH

v
v

IOkO

RL~211U

'.

Order Number LM7'1CN14

S.. NS P11ebp N14A
Orci Number LM741J14, LM741AJ1"
ar LM741CJ.14
S-- NS Pack ... J14A

2.0

500

o.s

Vs .. t.15V

... ltl!NI
I

80

500
1.5

0.3

6.0

lAMIN ~;TA '!f TAMA>

RL? 2kU,

:=~

80

TA" 2S"C
TAMIN'$:TA

OrHr NumMr LM741CN or LIA741EN

S.. NS Peele... NOB&
OnferNumt:litr LM141CJ
SH NS Pacltqe JOIA

TA.MIN'S TA S lAMAX.
Vs " !20V

Ordor Nvmbor LM741H, LM741AH.

LM741CH or LM741EH
SN NS P...119 H08C

..... ":O~-UnoP
...:...

JO

TAMIN~lA'5lAMAX

Output Sh.or! CiJcuit

TA25.. C
lAMtN<TA~TAMAX

10
10

25

Currtm
Common-Mode

TAMIN '5 TA-5' iAM~X

Rs lO kU, Vet.~" ~ '2V
Rs $50 uz. VcM'" 'IN

80

95

Rejection A.-1io

:!:12

t14

t12

t14

!10

!13

!10

!13

v
v

25

mA

25

35
40

mA

70

90

70

90

dB

Absolute Maximum Ratings <Notes 1 & 2i

n llllltary/A_.pece apecllled devtc.a ara required,

mNational
Semiconductor
General Description
The AOC0801, ADC0802, ADC0803, ~ end
AOCOBOS are CMOS 8-bit successive approximation AID
converters that usa a differential potentiometrlc laddersimil&r to the 256R products. These converters are de
signed to allOw operation with the NSCBOO and INSBOBOA
derivative control bus with TRI-STATE output latches di
rectty driving the dala bus. These A/Os appear fike memory
locations or 110 ports to the microprocessor and no Interfacing logic is needed.
Differential analog voltage inputs allow increasing the com
mon-mode rejection and offsetting the analog zero input
voltage vahJe. In additiOn, the voltage reference input can
be adjusted to aHow encoding any smaller analog vottage
span to the full 8 bits of resolution.

Features

Typical Applications
1

H HJ
11 Ill

~'.

GVlatYIClfUD

---... . .

u1n111u. 1

....

m.

LSB

VREFl2=2.500Vee

ADC0803: Total Adjusted Error (Note 8)

With Full-Scale Adj.

(See Section 2.5.2)

Yz

LSB

ADC0804: Total Unadjusted Error (Note 8)

VREF/2=2.500Voc

LSB

ADC0805: Total Unadjusted Error (Note 8)

VREF/2-No Connection

LSB

VREF/2 Input Resistance (Pin 9)

ADC0801 /02/03105
AOC0804 (Note 9)

ADC0802: Total Unadjusted Error (Note 8)

2.5
0.75

LSB

kn
kn

8.0

1.1

Analog Input VOitage Range

(Note4) V(+ )orV(-)

Vcc+0.05

Voe

DC Common-Mode Error

Over Analog lnpul Voltage

Range

:y,.

'lo

LSB

Power Supply Sensitivity

Vcc=5Voc 10%0ver
Allowed V1N( +)and V1N(-)
Vottage Range (Note 4)

y,

Ye

LSB

Gnd-0.05

Full-

Humber

Seal
Adjuated

ADC0801

%LSB

ADC0803
IAlA

ADC0804
ADC0805

ParM1eter

Max

l,lnlt

103

114

,..

Tc

Conversion Time

(Note5,6)

68

73

1/fcLK

fclK

Clock Frequency
Clock Duly Cycle

Vcc=5V, (Note 5)
(Note 5)

100
40

Conversion Rate in Fr-Running

IR'm tied to WA with

Mode

CS=OVoc. fCLK840 kHz

tw.am'L

Width of WR: Input (Slart Pulse Width)

l::S=O Voe (Note 7)

IACC

Access Time (Delay from Falling

Edge of mi to Output Data Valid)

CLm100pF

t1H. loH

TRI-STATE Con1rol ;1ay

from Rising Edge of
to
Hi-ZSta18)

Cl ~10pF,RL 10k
(See TRI-STATE Test

lwr,IRt

De~frorn Falling Edge

CtN

CoUT
1 LSB

Typ

lcLK 840 kHz (Note 6)

of

VaLSB

Min

Conversion Time

VREFl2 Z.500 Voe VREFl2 = Ho Connectton

(Ho Adju9tm9nla)
(Ho AdJua-nta)

Y1LS8

Condition

Tc

CR

ADC0802

1111

Units

Y.
y,

TUH/56711

Part

.,.

Typ

Max

With Full-Scale Adj.

(See Section 2.5.2)

5y!llbOI

AIALHrwlT
'lll1't.UU...t

""

Error Speclftcetlon (Includes Full-Scele,

Zero Error, and Non-Llnerlty)

Min

Condition

AOC0801: Total Adjusted Emor (Note 8)

AC Electrical Characteristics

IOIO lnrtse

IS

TM1NS:TAS:Tr.cAX
-sscs:T,.s: +12sc
-40"Cs:TAs: +8sc
-40"Cs:T"s: +ssc
O"Cs:T,o.s: +70"C
O"CS:T,o.S: +70"C
O'C<:T,o.,; +70'C
4.5 Voe to 6.3 Voe

The following specifications apply for Vcc5 Vee and T,, =25'C unless otherwise specified.

" "'

8 bits
\4 LSB and 1 LSB
100 ,..

Ml1'HllUITIOll

1' ..,

()

....
" ..
.....
.....

"8

~
g

y. LSB,

fl

nm

Key Specifications

Temperature Range
ADC0801/02U
ADC0801 f02/03/04LCJ
ADC0801/02/03/05LCN
ADC0804LCN
AOCo802/03/04LCV
ADC0802/03/04LCWM
Range of Vee

215'C
220"C

Pameler

No zero adjust requltad

0.3" standard wtdtll 20-pin DIP package
20-pin mokled chip carrier or small ouUine package
Operates ratiometrically or with 5 Voe;. 2.5 Voe, or ans
log apan adjusted voltage reference

Total enor
Conversion time

soov

Operating Ratings <Notes 1 & 21

Electrical Characteristics

IQI

~-

B75mW

ESD Susceptibility (Note 1O)

The following specifications apply for Vee - 5 Vee. T MIN s: T" s: TMAX and fcLK =840 kHz unless otherwise specified.

i:'

l('

Surface Mount Package

Vapor Phase (80 seconds)
Infrared (15 seconds)

age level 91'8Cificationa

WOfkl with 2.5V (LM336) voltage reference
On-chip clock generator
OV to 5V anslog Input vollage range with single sv
supply

Resolution

Compali>le with 8080 .P derivatives-no Interfacing

logic needed access lime 135 ns
Easy interface 10 all microprocessors, or operates
"stand alone"

Differential analog voHage inputs

Logic Inputs and outputs meet both MOS and nL volt-

-65'C 10+150'C

Package Dissipation al TA= 25'C

Supply Vottage (Vee) (Note 3)

6.SV
Voltage
Logic Control Inputs
-0.3Vto +18V
Al Other Input and Outputs
-0.3Vto(Vcc+0.3V)
Lesd Temp. (Soldering, 10 seconds)
Dual-In-Line Package (plastic)
260'C
Dual-In-Line Package (ceramic)
300'C

ADC0801/ ADC0802/ ADC0803/ ADC0804/ ADC0805

8Bit .P Compatible A/D Converters

!s,

Storage Temperature Range

pleHe contact th Hatlonal Semiconductor satea

Offlce/Dletrlbuto,. tor avaAablllty and apecnlcatlona.

1460
60

kHz

9708

conv/s

135

200

ns

125

200

ns

300

450

ns

7.5

pf

7.5

pf

840

8770

"

ns

100

Circuits)

or mi to Reset of TR'm

lnputCapecitanceofLogic

Control Inputs
TRI-STATE Output
Capacllance (Data Buffers)

COHTIIOL INPUTS (Note: CLK IN (Pin 4) Is the input of a Schmitt trigger circuit and is therefore specified separately]
1LSB

V1N(1)

TUH/15871-31

""

,,,

Logical "1" Input Voltage

(Except Pin 4 CLK IN)

Vcc=5.25Voc

2.0

15

Voe

\.:,__)

g,

Specifications and Applications

Information

2.

.j
l

.
~

.j

L SUFFIX

M1S Vde.

~~~

Slew Rate 4.0 mA/s

.4

21

P ropagation Delay Time

TA .. +25C

Ou1pu1 Full Scale Current Otih

FIGURE 2 - BLOCK DtAGRAM

l!

5
tP1_ M. IPHL

TC to

100

PPM/DC

Vdc

2.0
0 .8

'l

Rference lnpu' Biat Curren1 !Pin 151

'15

-1 .0

-5.0

IQR

iQ
lotrnin}

a TA .. 1250c1

Power Supply Voltage Aange

ITA "' +2S<:l

2.0
2 .0

2.1
4 .2

1.9

1.99

2.1
4.0

Vo

Tr.eking A to-0 Conv.tert

Audio Oigt1izin1 and Dec:odint

Sucetuive Ai>Proximtion Ato-0 Conv1,tert

2 1'2 Digit Penltl ""'''"Ind DVM'1

Wavfonn Syntheila

Sampta and Hotd

Programmable Power Supplin

Analt19'0i9it1I Multipl~1tion
Oi9iulDiQii.I Multiplie.tion
AnllOf"Ditit.. Division

Paek DetlCCOt

Pro9rM'lmffli Getn nd Auanuuion

Sp-.ch Comp"911ion end ExpansiOft

CRT Chtmctr G.Nration

Sttppi119 Mat0t Dri11e

-- ~

mA/~s

SR 1ref

4 .0

PSRRI - >

0.5

2.7

~A/V

'cc

13.5

22

mA

-7.5

-13

5.0

-ts

+5.5
-16.5

105
190

170
305

VccA
VEER

4.5
-4.5

...w

Vee "' .15 Vdc

All bit1 high
VEE "' -5.0 Vdc

90

vee ... -1s ve1e

160
An current switches are tesled 1o'guaran1ee al lean 50% of rated output cunent.
All bits switched.

Offitll Addition and Subtrction

MOTOROLA LINEAAflNTERFACE DEVICES

MOTOROLA LINEARflNTERFACE DEVICES

....I.

l\."""""""~=""'"<'''"'""'''"'""'''"'--""""'....;...~--

......."""""-

' ''"'""

>:>:

.. -

-~~,..,,~~~-";lf"ll"'!~.;-!111-~~""-~-~~-.

__

~.-~""""""'""'""'""""""

......,...,~,,.,.,.....,.,"''0"'''"-"""'"'-i''""'~""-.....,.;.......,........,,....._,.,_,....,,..,,,W,<"'."!.~;o. ,;"'""~"'''''"."."'lo'O' ~">' '""'-...;;,r.. ,'"'"'""

Vdc

mW

Note 1.
Note 2 .

- 0 .55. 0.4
- 5 0 04

VEE "' -5.0 Vele

TYPICAL APPLICATIONS

Vdc

All bl!llOV<f

:j

mA

mA

tee

Powtr Oiuipa1ion

mA

TA"' 1s0 c

IAll biUlow)

I u:

.t0.78

Outpu1 Curren1 Range

Power Supply Curren1

INPUT DIGITAL WOAD

0 .04
-0.8

Reference Current Sle,... Rate

Mox

Output Current Power Suppty Se'nsitiv1ry

0t111111J

.J Typ

-0.4

Chnpu1 Vohe91 Complia11ce fEr s o.19%

Pin 1 grounded
Pin 1 open.Vee be!ow ~ TOV

.tOOOOOOOOJ

Min

'1H

Output Current
t AU bit; tow)

E,

V1H

Output Current
Vref 2,000 V. A14 .. 1000 1l

c ..,,.,.1s....1cl'lu

Syrnbal

Oigilal tnpu1 Curren' (MSBt

High Letl. V1t-t 5 .0 V
Low Level, V1L " 0.8 V

vee -5.o v
VEE . -ts v.

A3y, A4Y. My9 ""'-Y10A.1

v,l

Low LllYel. Loi.ic: "O"

FfOURE 1 - D-toA TRANSFER CHARACTefUSTICS

!(I

figurt

Digital Input t..ogic: Levels (MS81

High 1......ei. Logic "'1''

CASEM8~5

MiB

J0.19

P SUFl'IX
PLASTIC PACICAGE

Standard Supply Voltages: +5.0 V and

-6.0 V to -16 V

= 2.0mA, MC1508 L.8 TA - -ss0 c to -+t2s0 c.

0.39
2

GE

CERAMIC PACKA
CASE 82o-o2

.~

I1

oc

Setding Time lo within ,112LSB ! includes IPLHlfT A t25CJSee Note

-l

Relative Accuracy (Error ,~111ivt to lull .c-ale lol

MC15091..8, MC1408t..8, MC1408P8
MC1 ..08P7, MC1408L7, See Nole 1
MC1..08P6, MC1'08L.6. See Nate 1

Jlfl//m1-

CMOS Compatible

Il

v.x

Chlfatteristic

Output Voltage Swing - +o.4 V to -5.0 V

High-Speed Multiplying Input

mA

Reference-Amplifier lnpUts

MC1408L SeriH: TA"' 0 to +75t unless olhtrwn.e noted. All digi1al inpu1s a1 h'1gh logic fwet.I

SeYen and SixBit Accuracy Av1i11ble with MC1408 Designated

by 7 or 6 Suffix after Package SuffiX

Fast Settling Time - 300 ns typical

Vdo

Referenc Current

ELECTRICAL CHARACTERSTfCS IVee"' +5.0 Vde. VEE -

(MC1408L8, MC1408P8. MCl508L81

Noninverting Digital tnputs are MTTL and

V<X

Applid Output Vohaga

Storage Tempera1un! Aan,e

EightBit Accuracy Avai11bte in Both Temperature Ranges

Relative Accuracy: 0.19" Error maximum

Vdo

Dtgi1at lnput Voltige

MClSOB
MC1408 Sertes

SILICON MONOLITHIC
INTEGAATEO CIRCUIT

. designed for use -wh_ere the output curreru is a lin_ear ptoduct

of an eightbit digital word and_an analog input voltage.

Unit

Poo.wr Supply Vofta91

Oc>trting Temperature Aenge

EIGHT-BIT MULTIPLYING
DIGITAL-TO-ANALOG
CONVERTER

EIGHT BIT MULTIPLYING

DIGITAL TO-ANALOG CONVERTER

'8

\....,_.,/
Rning

MC1408
MC1508

MOTOROLA

c:

lI
1

'::-..-)
MAXIMUM RATINGS ITA +25oc unless 01herwise noted. t

(-""\

::i.

___

{/"'"~''<'.-,\,

Appendix B
List of Materials for the Experiments and Index_
to Manufacturers' Data Sheets

Page number refers to the page on which the data

sheet is found:

The following additional parts are needed for the

experiments:

Integrated Circuits:

Display:

ITL
7400
7402
7404
7408
7432
7447A
7474
74LS76
7483A
7485
7486

Page
280
281
282
283
284
285
287
288
290
291
292

Page
293
293
294
295
297
298
299
300
301
302

303
304
304
306
307

LM555
LM741
ADC0804
MC1408

MAN-72 (or equivalent)

Resistors:

ol

An assortment of Y4-W resistors is suggested. The

most widely used values are 330 n, 390 n, 1.0 kfi,
2 kf!, 10 kf!, and 100 kf!.

Capacitors:
One 0.01 F
Three 0.1 F
One 1.0 F
One 100 F

Miscellaneous:

Linear

CMOS
4069
4071
4081
14051B
14532B

ITL
7492A
7493A
74121
74LS139A
74151A
74LS153
74175
74LS189
74191
74195

308
309
310
311

One l kf! potentiometer

LEDs
Signal diodes (1N914 or equivalent)
4-position DIP switch
Two SPST N.O. pushbuttons
Two CdS photocells (Jameco 120299 or equivalent)
Solderless breadboard (Radio Shack #276-174 or
equivalent)

0
312

I
!